fwk: pd: fix profile restore when port role is swapped to source

When a port performs a Power Role Swap (PR_SWAP) and becomes
a source, previously, the code skipped profile evaluation for
all Source ports.
It may keep the other port limited to 1.5A output because the
previous logic only reduced the current on sink detection and
never restored it after a role change.

Behavior summary:
- [source, sink] → no change profile
- [source, nothing] → restore profile to default
- [source, source] → skip evaluation

This ensures correct power negotiation after PR_SWAP and
prevents the sink port from being stuck at 1.5A limit.

BRANCH=fwk-tulip-29169
BUG=https://app.clickup.com/t/86ev324ut
TEST= [Port1 (A device), Port2 (B device)]
1. Connect two pd device -> [3A, 1.5A]
2. A device connect AC [3A + AC, 1.5A] -> [SRC, keep 1.5A]
3. A device remove AC  [SRC remove AC, 1.5A] -> [3A, keep 1.5A]
4. B device connect AC [3A, 1.5A + AC] -> [keep 3A, SRC]
5. B device remove AC  [3A, SRC remove AC] -> [keep 3A, 1.5A]
6. A device disconnect [3A remove device, 1.5A] -> [Nothing, keep 1.5A]
7. A device connect    [Nothing, 1.5A] -> [3A, 1.5A]
8. B device disconnect [3A, 1.5A remove device] -> [keep 3A, Nothing]
9. B device connect    [3A, Nothing] -> [3A, 1.5A]
TEST=Connect the PD device (max operating current less than 1500mA) to port 0.
This device gets the 5V/3A PDO; And then connect the PD device (max
operating current is 3000mA) to port 1, the first device do the
re-negotiation to 5V/1.5A and the second device do the re-negotiation
to 5V/3A.

Signed-off-by: johnwc_yeh <JohnWC_Yeh@compal.com>

Author: JohnWC-Yeh

zephyr/program/framework/src/cypress_pd_common.c

@@ -474,9 +474,10 @@ void cypd_evaluate_port_profile(int controller, int port, int ccg_event)
 	int pd_port = PDPORT(controller, port);
 	int shared_pd_port = PDPORT(controller, (port ? 0 : 1));
 	bool first_port = false;
-	bool all_ports_disconnect = false;
+	bool restore_profile = false;
 	bool profile_is_changed = false;
 	static uint8_t ignore_evaluate_reason;
+	bool allow_profile_swap  = true;
 
 #ifndef CONFIG_SELECT_3A_TYPEC_OUTPUT_CURRENT
 	return
@@ -486,18 +487,23 @@ void cypd_evaluate_port_profile(int controller, int port, int ccg_event)
 	if (pd_chip_config[controller].support_max_port < 2)
 		return;
 
-	/* Skip to evaluate the port profile if the port is a source */
-	if (pd_port_states[pd_port].c_state == CCG_STATUS_SOURCE)
-		return;
-
 	/* Skip to evaluate the port profile if the safety level is 2 or more */
 	if (pre_safety_level >= TYPEC_SAFETY_LEVEL_2)
 		return;
 
-	if ((ccg_event == CCG_RESPONSE_PORT_DISCONNECT) &&
-	    (pd_port_states[shared_pd_port].c_state == CCG_STATUS_NOTHING))
-		all_ports_disconnect = true;
-	else {
+	/* Skip to evaluate the port profile if both are source ports */
+	if (pd_port_states[pd_port].c_state == CCG_STATUS_SOURCE &&
+		pd_port_states[shared_pd_port].c_state == CCG_STATUS_SOURCE)
+		return;
+
+	if (ccg_event == CCG_RESPONSE_PORT_DISCONNECT ||
+		pd_port_states[pd_port].c_state == CCG_STATUS_SOURCE) {
+		if (pd_port_states[shared_pd_port].c_state == CCG_STATUS_NOTHING)
+			restore_profile = true;
+
+		/* Only allow swapping profiles when both ports sink devices */
+		allow_profile_swap  = false;
+	} else {
 		/* Avoid the infinite loop if the ports reset or exchange profile */
 		if (ignore_evaluate_reason & BIT(controller))
 			return;
@@ -539,7 +545,7 @@ void cypd_evaluate_port_profile(int controller, int port, int ccg_event)
 
 			cypd_select_pdo(controller, (port ? 0 : 1), CCG_PD_CMD_SET_TYPEC_1_5A);
 		}
-	} else if (all_ports_disconnect) {
+	} else if (restore_profile) {
 
 		for (int idx = 0; idx < pd_chip_config[controller].support_max_port; idx++) {
 			int port_idx = PDPORT(controller, idx);
@@ -586,10 +592,12 @@ void cypd_evaluate_port_profile(int controller, int port, int ccg_event)
 			}
 		} else if ((pre_safety_level < TYPEC_SAFETY_LEVEL_2) &&
 		    ((pd_port_states[shared_pd_port].pd_state) &&
-		    (pd_port_states[shared_pd_port].current <= 1500)) &&
+		    (pd_port_states[shared_pd_port].current <= 1500) &&
+			(pd_port_states[shared_pd_port].safety_table[pre_safety_level] ==
+		     CCG_PD_CMD_SET_TYPEC_3A)) &&
 		    (((pd_port_states[pd_port].pd_state) &&
 		    (pd_port_states[pd_port].max_operating_current > 1500)) ||
-		     pd_port_states[pd_port].rdo_mismatch)) {
+		     pd_port_states[pd_port].rdo_mismatch) && allow_profile_swap) {
 			/**
 			 * Another port maximum operating current less than 1.5A
 			 * EC allows PD chip provide more current if the RDO capabilities mismatch