Lotus: turn off the 0.75 and 1.8 power rail when the system in S5/G3

Signed-off-by: Josh-Tsai <josh_tsai@compal.com>

Author: Josh-Tsai

zephyr/program/lotus/lotus/src/power_button_x86.c

@@ -260,19 +260,13 @@ static void state_machine(uint64_t tnow)
 	case PWRBTN_STATE_PRESSED:
 		/* chipset exit hard off function only executes at G3 state */
 		if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) {
-			/* Check the VALW power rail is ready */
-			if (get_power_rail_status()) {
-				/*
-				 * Power button out signal implements in power_sequence.c,
-				 * just call the exit hard off start to run the state mechine.
-				 */
-				reset_diagnostics();
-				chipset_exit_hard_off();
-				pwrbtn_state = PWRBTN_STATE_IDLE;
-			} else {
-				tnext_state = tnow + PWRBTN_DELAY_INIT;
-				pwrbtn_state = PWRBTN_STATE_PRESSED;
-			}
+			/*
+			 * Power button out signal implements in power_sequence.c,
+			 * just call the exit hard off start to run the state mechine.
+			 */
+			reset_diagnostics();
+			chipset_exit_hard_off();
+			pwrbtn_state = PWRBTN_STATE_IDLE;
 		} else {
 			/*
 			 * when in preOS still need send power button signal
@@ -344,19 +338,13 @@ static void state_machine(uint64_t tnow)
 			}
 		}
 
-		/* Check the VALW power rail is ready */
-		if (get_power_rail_status()) {
-			/*
-			 * Power button out signal implements in power_sequence.c,
-			 * just call the exit hard off start to run the state mechine.
-			 */
-			reset_diagnostics();
-			chipset_exit_hard_off();
-			pwrbtn_state = PWRBTN_STATE_IDLE;
-		} else {
-			tnext_state = tnow + PWRBTN_DELAY_INIT;
-			pwrbtn_state = PWRBTN_STATE_INIT_ON;
-		}
+		/*
+		 * Power button out signal implements in power_sequence.c,
+		 * just call the exit hard off start to run the state mechine.
+		 */
+		reset_diagnostics();
+		chipset_exit_hard_off();
+		pwrbtn_state = PWRBTN_STATE_IDLE;
 		break;
 	case PWRBTN_STATE_HELD:
 

zephyr/program/lotus/lotus/src/power_sequence.c

@@ -27,7 +27,6 @@
 
 #define IN_VR_PGOOD POWER_SIGNAL_MASK(X86_VR_PG)
 
-static int power_ready;
 static int power_s5_up;		/* Chipset is sequencing up or down */
 static int ap_boot_delay = 9;	/* For global reset to wait SLP_S5 signal de-asserts */
 static int s5_exit_tries;	/* For global reset to wait SLP_S5 signal de-asserts */
@@ -121,31 +120,6 @@ static void clear_rtcwake(void)
 	*host_get_memmap(EC_CUSTOMIZED_MEMMAP_WAKE_EVENT) &= ~BIT(0);
 }
 
-static void board_power_on(void);
-DECLARE_DEFERRED(board_power_on);
-DECLARE_HOOK(HOOK_INIT, board_power_on, HOOK_PRIO_DEFAULT);
-
-static void board_power_on(void)
-{
-	static int logs_printed; /* Only prints the log one time */
-
-	/*
-	 * we need to wait the 3VALW power rail ready
-	 * then enable 0.75VALW and 1.8VALW power rail
-	 */
-	if (gpio_pin_get_dt(GPIO_DT_FROM_NODELABEL(gpio_spok)) == 1) {
-		gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_0p75_1p8valw_pwren), 1);
-		power_ready = 1;
-		CPRINTS("0.75 and 1.8 VALW power rail ready");
-	} else {
-		if (!logs_printed) {
-			CPRINTS("wait 3VALW power rail ready");
-			logs_printed = 1;
-		}
-		hook_call_deferred(&board_power_on_data, 5 * MSEC);
-	}
-}
-
 void power_state_clear(int state)
 {
 	*host_get_memmap(EC_CUSTOMIZED_MEMMAP_POWER_STATE) &= ~state;
@@ -213,16 +187,6 @@ void s0ix_status_handle(void)
 DECLARE_HOOK(HOOK_TICK, s0ix_status_handle, HOOK_PRIO_DEFAULT);
 #endif
 
-int get_power_rail_status(void)
-{
-	/*
-	 * If the 3VALW, 0.75VALW and 1.8VALW power rail not ready,
-	 * the unit should not power on.
-	 * This function will be used by PB task.
-	 */
-	return power_ready;
-}
-
 void power_s5_up_control(int control)
 {
 	CPRINTS("%s power s5 up!", control ? "setup" : "clear");
@@ -246,6 +210,7 @@ static void chipset_force_g3(void)
 	gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_pbtn_out), 0);
 	gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_apu_aud_pwr_en), 0);
 	gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_pch_pwr_en), 0);
+	gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_0p75_1p8valw_pwren), 0);
 }
 
 void chipset_force_shutdown(enum chipset_shutdown_reason reason)
@@ -299,6 +264,14 @@ enum power_state power_handle_state(enum power_state state)
 		break;
 
 	case POWER_G3S5:
+		if (power_wait_signals(X86_3VALW_PG)) {
+			/* something wrong, turn off power and force to g3 */
+			chipset_force_g3();
+			return POWER_G3;
+		}
+
+		gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_0p75_1p8valw_pwren), 1);
+		k_msleep(10);
 		gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_apu_aud_pwr_en), 1);
 		k_msleep(10);
 		gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_pch_pwr_en), 1);
@@ -548,6 +521,7 @@ enum power_state power_handle_state(enum power_state state)
 		k_msleep(5);
 		gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_apu_aud_pwr_en), 0);
 		gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_pch_pwr_en), 0);
+		gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_0p75_1p8valw_pwren), 0);
 		input_modules_powerdown();
 
 		/* clear suspend flag when system shutdown */