Merge pull request #691 from FrameworkComputer/azalea.fix_dead_battery_poweron

pd enable error recovery on boot

Author: kiram9

zephyr/program/lotus/azalea/src/power_sequence.c

@@ -568,6 +568,9 @@ enum power_state power_handle_state(enum power_state state)
 		gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_apu_aud_pwr_en), 0);
 		gpio_pin_set_dt(GPIO_DT_FROM_NODELABEL(gpio_pch_pwr_en), 0);
 
+		cypd_set_power_active(POWER_G3);
+
+
 		return POWER_G3;
 	default:
 		break;

zephyr/program/lotus/include/cypress_pd_common.h

@@ -43,7 +43,7 @@
 #define CCG_CUST_C_CTRL_CONTROL_REG	0x003B
 #define CCG_HPI_VERSION			0x003C
 /*User registers from 0x40 to 0x48 are used for BB retimer */
-#define CCG_ICL_CTRL_REG		0x0040
+#define CCG_ERR_RECOVERY_REG		0x0040
 #define CCG_ICL_STS_REG			0x0042
 #define CCG_ICL_BB_RETIMER_CMD_REG	0x0046
 #define CCG_ICL_BB_RETIMER_DAT_REG	0x0048
@@ -140,12 +140,12 @@
 /************************************************/
 /*          POWER STATE DEFINITION              */
 /************************************************/
-#define CCG_POWERSTATE_S0	0x01
-#define CCG_POWERSTATE_S0ix	0x02
-#define CCG_POWERSTATE_S3	0x03
-#define CCG_POWERSTATE_S4	0x04
-#define CCG_POWERSTATE_S5	0x05
-#define CCG_POWERSTATE_G3	0x06
+#define CCG_POWERSTATE_S0	0x00
+#define CCG_POWERSTATE_S3	0x01
+#define CCG_POWERSTATE_S4	0x02
+#define CCG_POWERSTATE_S5	0x03
+#define CCG_POWERSTATE_S0ix	0x04
+#define CCG_POWERSTATE_G3	0x05
 
 /************************************************/
 /*  CCG_CUST_C_CTRL_CONTROL_REG DEFINITION      */

zephyr/program/lotus/src/cypress_pd_common.c

@@ -912,36 +912,72 @@ static int cypd_update_power_status(int controller)
 	return rv;
 }
 
+static void perform_error_recovery(int controller)
+{
+	int i;
+	if (controller < 2)
+		for (i = 0; i < 2; i++) {
+		if (!((controller*2 + i) == prev_charge_port && battery_is_present() != BP_YES) )
+			cypd_write_reg8(controller, CCG_ERR_RECOVERY_REG, i);
+		}
+	else {
+		/* Hard reset all ports that are not supplying power in dead battery mode */
+		for (i = 0; i < 4; i++) {
+			if (!(i == prev_charge_port && battery_is_present() != BP_YES) ) {
+				CPRINTS("Hard reset %d", i);
+				cypd_write_reg8(i >> 1, CCG_ERR_RECOVERY_REG, i & 1);
+			}
+		}
+	}
+	return ;
+}
+enum power_state pd_prev_power_state = POWER_G3;
 void update_system_power_state(int controller)
 {
 	enum power_state ps = power_get_state();
 
+	if (battery_is_present() != BP_YES && ps == POWER_G3) {
+		return;
+	}
 	switch (ps) {
 	case POWER_G3:
-	case POWER_S5:
 	case POWER_S5G3:
+		pd_prev_power_state = POWER_G3;
 		cypd_set_power_state(CCG_POWERSTATE_G3, controller);
 		break;
+	case POWER_S5:
 	case POWER_S3S5:
+	case POWER_S4S5:
+		pd_prev_power_state = POWER_S5;
 		cypd_set_power_state(CCG_POWERSTATE_S5, controller);
 		break;
 	case POWER_S3:
+	case POWER_S4S3:
+	case POWER_S5S3:
+	case POWER_S0S3:
+	case POWER_S0ixS3: /* S0ix -> S3 */
+		if (pd_prev_power_state < POWER_S3) {
+			perform_error_recovery(controller);
+			pd_prev_power_state = ps;
+		}
 		cypd_set_power_state(CCG_POWERSTATE_S3, controller);
 		break;
+	case POWER_S0:
+	case POWER_S3S0:
 	case POWER_S0ixS0: /* S0ix -> S0 */
+		if (pd_prev_power_state < POWER_S3) {
+			perform_error_recovery(controller);
+			pd_prev_power_state = ps;
+		}
 		cypd_set_power_state(CCG_POWERSTATE_S0, controller);
 		break;
-	case POWER_S0S0ix: /* S0 -> S0ix */
-		cypd_set_power_state(CCG_POWERSTATE_S0ix, controller);
-		break;
-	case POWER_S0ixS3: /* S0ix -> S3 */
-		cypd_set_power_state(CCG_POWERSTATE_S3, controller);
-		break;
+	case POWER_S0ix:
 	case POWER_S3S0ix: /* S3 -> S0ix */
+	case POWER_S0S0ix: /* S0 -> S0ix */
 		cypd_set_power_state(CCG_POWERSTATE_S0ix, controller);
 		break;
+
 	default:
-		cypd_set_power_state(CCG_POWERSTATE_S0, controller);
 		break;
 	}
 
@@ -1044,7 +1080,7 @@ static void cypd_handle_state(int controller)
 			cypd_get_version(controller);
 			cypd_update_power_status(controller);
 
-			cypd_set_power_state(CCG_POWERSTATE_S5, controller);
+			//update_system_power_state(controller);
 			cypd_setup(controller);
 
 			/* After initial complete, update the type-c port state */