kicad: added clocks, vregs, and other power routings

2025/09/01

1. Follow Demo board design and datasheet
        - Change L1, L2 to 600R/0.5A
2. 5V -> 3.3V LDO
	- Add U7, C23, C24
3. Getting power from host by 5.1k RD on CC.
	- Add R30 5.1k on CC1 of USB-C Receptacle
4. A method for being provider or receiver of 5V of Target device Provider path: 12k Rp for 5V@1.5A
	- Add SW1
	- Remove R5 on VCONN
	- Add R5 12k on SW
	- Change R4 to 5.1K."
5. Prioritizing Host 5V as default
	- Add D1, Q1, R31
6. Add power switch for 5V path output
	- Add U9, C31, C32
7. External Clock for FT4232
	- Add C27, C28, Y1
8. EC_VREF (3.3v) LDO
	- Add U8, C25, C26
9. Channel C and D don't have GPIO function.
	- "Move AP_UART_VREF_FORCE_3.3 to GPIO_L2 (but maybe we don't need it)"
10. LDO for SPI 3.3V and 1.8V
	- Add U11, C29, C30
11. Prevent activating SPI 3.3V and 1.8V at the same time.
	- Add U10(XOR), U12(AND), U13(AND)

Author: ImanthonyYe