Clippy warnings in 1.85+

Author: CedarMist

src/fpu.rs

@@ -4,8 +4,8 @@ use core::borrow::Borrow;
 
 use super::{
     softfloat::{
-        float32_t, float64_t, i32_to_f32, i32_to_f64, i64_to_f32, i64_to_f64,
-        init_detectTininess, ui32_to_f32, ui32_to_f64, ui64_to_f32, ui64_to_f64,
+        float32_t, float64_t, i32_to_f32, i32_to_f64, i64_to_f32, i64_to_f64, init_detectTininess,
+        ui32_to_f32, ui32_to_f64, ui64_to_f32, ui64_to_f64,
     },
     wrapper::{ExceptionFlags, Float, RoundingMode, TininessMode},
 };

src/softfloat/f32_classify.rs

@@ -10,13 +10,13 @@ pub const fn f32_classify(a: float32_t) -> u16 {
     let isSNaN = softfloat_isSigNaNF32UI(a.v);
 
     return ((sign && infOrNaN && fracZero) as u16)
-        | ((sign && !infOrNaN && !subnormalOrZero) as u16) << 1
-        | ((sign && subnormalOrZero && !fracZero) as u16) << 2
-        | ((sign && subnormalOrZero && fracZero) as u16) << 3
-        | ((!sign && infOrNaN && fracZero) as u16) << 7
-        | ((!sign && !infOrNaN && !subnormalOrZero) as u16) << 6
-        | ((!sign && subnormalOrZero && !fracZero) as u16) << 5
-        | ((!sign && subnormalOrZero && fracZero) as u16) << 4
-        | ((isNaN && isSNaN) as u16) << 8
-        | ((isNaN && !isSNaN) as u16) << 9;
+        | (((sign && !infOrNaN && !subnormalOrZero) as u16) << 1)
+        | (((sign && subnormalOrZero && !fracZero) as u16) << 2)
+        | (((sign && subnormalOrZero && fracZero) as u16) << 3)
+        | (((!sign && infOrNaN && fracZero) as u16) << 7)
+        | (((!sign && !infOrNaN && !subnormalOrZero) as u16) << 6)
+        | (((!sign && subnormalOrZero && !fracZero) as u16) << 5)
+        | (((!sign && subnormalOrZero && fracZero) as u16) << 4)
+        | (((isNaN && isSNaN) as u16) << 8)
+        | (((isNaN && !isSNaN) as u16) << 9);
 }

src/softfloat/f64_classify.rs

@@ -10,13 +10,13 @@ pub const fn f64_classify(a: float64_t) -> u16 {
     let isSNaN = softfloat_isSigNaNF64UI(a.v);
 
     return ((sign && infOrNaN && fracZero) as u16)
-        | ((sign && !infOrNaN && !subnormalOrZero) as u16) << 1
-        | ((sign && subnormalOrZero && !fracZero) as u16) << 2
-        | ((sign && subnormalOrZero && fracZero) as u16) << 3
-        | ((!sign && infOrNaN && fracZero) as u16) << 7
-        | ((!sign && !infOrNaN && !subnormalOrZero) as u16) << 6
-        | ((!sign && subnormalOrZero && !fracZero) as u16) << 5
-        | ((!sign && subnormalOrZero && fracZero) as u16) << 4
-        | ((isNaN && isSNaN) as u16) << 8
-        | ((isNaN && !isSNaN) as u16) << 9;
+        | (((sign && !infOrNaN && !subnormalOrZero) as u16) << 1)
+        | (((sign && subnormalOrZero && !fracZero) as u16) << 2)
+        | (((sign && subnormalOrZero && fracZero) as u16) << 3)
+        | (((!sign && infOrNaN && fracZero) as u16) << 7)
+        | (((!sign && !infOrNaN && !subnormalOrZero) as u16) << 6)
+        | (((!sign && subnormalOrZero && !fracZero) as u16) << 5)
+        | (((!sign && subnormalOrZero && fracZero) as u16) << 4)
+        | (((isNaN && isSNaN) as u16) << 8)
+        | (((isNaN && !isSNaN) as u16) << 9);
 }

src/softfloat/f64_sqrt.rs

@@ -53,7 +53,7 @@ pub const fn f64_sqrt(a: float64_t, roundingMode: u8, detectTininess: u8) -> (fl
     }
     let mut rem = sigA.wrapping_sub((sig32Z as u64).wrapping_mul(sig32Z as u64));
     let q = (((rem >> 2) as u64).wrapping_mul(recipSqrt32 as u64) >> 32) as u32;
-    let mut sigZ = ((sig32Z as u64) << 32 | 1u64 << 5).wrapping_add((q as u64) << 3);
+    let mut sigZ = (((sig32Z as u64) << 32) | (1u64 << 5)).wrapping_add((q as u64) << 3);
     // ------------------------------------------------------------------------
     if ((sigZ & 0x1FF) < 0x22) {
         sigZ &= !(0x3F as u64);

src/softfloat/s_mul64To128.rs

@@ -10,7 +10,7 @@ pub const fn softfloat_mul64To128(a: u64, b: u64) -> uint128 {
     let mid1 = (a32 as u64).wrapping_mul(b0 as u64);
     let mut mid = mid1.wrapping_add((a0 as u64).wrapping_mul(b32 as u64));
     let mut z_v64 = (a32 as u64).wrapping_mul(b32 as u64);
-    z_v64 = z_v64.wrapping_add((((mid < mid1) as u64) << 32) | mid >> 32);
+    z_v64 = z_v64.wrapping_add((((mid < mid1) as u64) << 32) | (mid >> 32));
     mid <<= 32;
     z_v0 = z_v0.wrapping_add(mid);
     z_v64 = z_v64.wrapping_add((z_v0 < mid) as u64);

src/softfloat/s_shiftRightJam128.rs

@@ -7,7 +7,7 @@ pub const fn softfloat_shiftRightJam128(a64: u64, a0: u64, dist: u32) -> uint128
         let u8NegDist = dist.wrapping_neg() as u8;
         uint128 {
             v64: a64 >> dist,
-            v0: a64 << (u8NegDist & 63) | a0 >> dist | ((a0 << (u8NegDist & 63)) != 0) as u64,
+            v0: (a64 << (u8NegDist & 63)) | (a0 >> dist) | ((a0 << (u8NegDist & 63)) != 0) as u64,
         }
     } else {
         uint128 {

src/softfloat/s_shiftRightJam64.rs

@@ -2,7 +2,7 @@
 #[must_use]
 pub const fn softfloat_shiftRightJam64(a: u64, dist: u32) -> u64 {
     if dist < 63 {
-        a >> dist | (a << (dist.wrapping_neg() & 63) != 0) as u64
+        (a >> dist) | (a << (dist.wrapping_neg() & 63) != 0) as u64
     } else {
         (a != 0) as u64
     }

src/softfloat/s_shortShiftLeft128.rs

@@ -5,6 +5,6 @@ use super::uint128;
 pub const fn softfloat_shortShiftLeft128(a64: u64, a0: u64, dist: u8) -> uint128 {
     uint128 {
         v0: a0 << dist,
-        v64: a64 << dist | a0 >> (dist.wrapping_neg() & 63),
+        v64: (a64 << dist) | (a0 >> (dist.wrapping_neg() & 63)),
     }
 }

src/softfloat/s_shortShiftRightJam128.rs

@@ -5,8 +5,8 @@ use super::uint128;
 pub const fn softfloat_shortShiftRightJam128(a64: u64, a0: u64, dist: u8) -> uint128 {
     let uNegDist = dist.wrapping_neg() as u8;
     let v64 = a64 >> dist;
-    let v0 = a64 << (uNegDist & 63)
-        | a0 >> dist as i32
+    let v0 = (a64 << (uNegDist & 63))
+        | (a0 >> dist as i32)
         | (a0 << (uNegDist as i32 & 63 as i32) != 0 as i32 as u64) as i32 as u64;
     uint128 { v0, v64 }
 }

src/softfloat/s_shortShiftRightJam64.rs

@@ -1,5 +1,5 @@
 #[inline]
 #[must_use]
 pub const fn softfloat_shortShiftRightJam64(a: u64, dist: u8) -> u64 {
-    return a >> dist | (a & ((1 as u64) << dist).wrapping_sub(1) != 0 as u64) as u64;
+    return (a >> dist) | (a & ((1 as u64) << dist).wrapping_sub(1) != 0 as u64) as u64;
 }