stm32: Add support for STM32F469xx MCUs.

Signed-off-by: Mike Tolkachev <contact@miketolkachev.dev>

Author: miketlk

ports/stm32/adc.c

@@ -138,7 +138,7 @@
     defined(STM32F413xx) || defined(STM32F427xx) || \
     defined(STM32F429xx) || defined(STM32F437xx) || \
     defined(STM32F439xx) || defined(STM32F446xx) || \
-    defined(STM32F479xx)
+    defined(STM32F479xx) || defined(STM32F469xx)
 #define VBAT_DIV (4)
 #elif defined(STM32F722xx) || defined(STM32F723xx) || \
     defined(STM32F732xx) || defined(STM32F733xx) || \

ports/stm32/boards/stm32f469xi.ld

@@ -0,0 +1,35 @@
+/*
+    GNU linker script for STM32F469xI (2Mbyte)
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 2048K   /* Entire flash */
+    FLASH_START (rx): ORIGIN = 0x08000000, LENGTH = 16K     /* Sector 0 */
+    FLASH_FS (r)    : ORIGIN = 0x08004000, LENGTH = 112K    /* Sectors 1, 2, 3, 4 */
+    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 1920K   /* Sectors 5 - 23 */
+    CCMRAM (rw)     : ORIGIN = 0x10000000, LENGTH = 64K     /* CCM RAM used for storage cache */
+    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 320K    /* SRAM1, SRAM2, SRAM3 */
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 16K;
+
+/* Define the stack.  The stack is full descending so begins just above last byte
+   of RAM.  Note that EABI requires the stack to be 8-byte aligned for a call. */
+_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
+_sstack = _estack - 16K; /* tunable */
+
+/* RAM extents for the garbage collector */
+_ram_start = ORIGIN(RAM);
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+_heap_start = _ebss; /* heap starts just after statically allocated memory */
+_heap_end = _sstack;
+
+/* Filesystem cache in RAM, and storage in flash */
+_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(CCMRAM);
+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(CCMRAM) + LENGTH(CCMRAM);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);

ports/stm32/mpu.h

@@ -28,7 +28,7 @@
 
 #include "irq.h"
 
-#if (defined(STM32F4) && defined(MICROPY_HW_ETH_MDC)) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB)
+#if (defined(STM32F4) && defined(MICROPY_HW_ETH_MDC)) || defined(STM32F469xx) || defined(STM32F7) || defined(STM32G4) || defined(STM32H7) || defined(STM32WB)
 
 #define MPU_REGION_ETH      (MPU_REGION_NUMBER0)
 #define MPU_REGION_QSPI1    (MPU_REGION_NUMBER1)

ports/stm32/powerctrl.c

@@ -798,13 +798,13 @@ void powerctrl_enter_stop_mode(void) {
 
     #if defined(STM32H7) || \
     defined(STM32F427xx) || defined(STM32F437xx) || \
-    defined(STM32F429xx) || defined(STM32F439xx) || \
+    defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || \
     defined(STM32WB55xx) || defined(STM32WB35xx)
     // Disable SysTick Interrupt
     // Note: This seems to be required at least on the H7 REV Y,
     // otherwise the MCU will leave stop mode immediately on entry.
     // Note: According to ST Errata ES0206 Rev 18, Section 2.2.1 this is needed
-    // for STM32F427xx, STM32F437xx, STM32F429xx and STM32F439xx
+    // for STM32F427xx, STM32F437xx, STM32F429xx, STM32F439xx, and STM32F469xx
     // Note: According to ST Errata ES0394 Rev 11, Section 2.2.17 this is needed
     // for STM32WB55xx and STM32WB35xx
     SysTick->CTRL &= ~SysTick_CTRL_TICKINT_Msk;
@@ -1039,7 +1039,7 @@ void powerctrl_enter_stop_mode(void) {
 
     #if defined(STM32H7) || \
     defined(STM32F427xx) || defined(STM32F437xx) || \
-    defined(STM32F429xx) || defined(STM32F439xx) || \
+    defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || \
     defined(STM32WB55xx) || defined(STM32WB35xx)
     // Enable SysTick Interrupt
     SysTick->CTRL |= SysTick_CTRL_TICKINT_Msk;