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| 1 | +.\" $NetBSD: paravirt_membar_sync.9,v 1.1.6.2 2025/10/19 10:44:31 martin Exp $ |
| 2 | +.\" |
| 3 | +.\" Copyright (c) 2025 The NetBSD Foundation |
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| 27 | +.Dd August 31, 2025 |
| 28 | +.Dt PARAVIRT_MEMBAR_SYNC 9 |
| 29 | +.Os |
| 30 | +.Sh NAME |
| 31 | +.Nm paravirt_membar_sync |
| 32 | +.Nd memory barrier for paravirtualized device drivers |
| 33 | +.Sh SYNOPSIS |
| 34 | +.In sys/paravirt_membar.h |
| 35 | +.Ft void |
| 36 | +.Fn paravirt_membar_sync "void" |
| 37 | +.Sh DESCRIPTION |
| 38 | +The |
| 39 | +.Nm |
| 40 | +function issues a store-before-load barrier for coordination with a |
| 41 | +paravirtualized device. |
| 42 | +.Pp |
| 43 | +This function has the same ordering semantics as |
| 44 | +.Xr membar_sync 3 , |
| 45 | +but |
| 46 | +.Xr membar_sync 3 |
| 47 | +can only coordinate with other CPUs that |
| 48 | +.Nx |
| 49 | +is running on. |
| 50 | +In a virtual machine, |
| 51 | +.Nx |
| 52 | +may be running on a single |
| 53 | +.Em virtual |
| 54 | +CPU, and patch |
| 55 | +.Xr membar_sync 3 |
| 56 | +to be a no-op, while the host side of a paravirtualized device may be |
| 57 | +running on a different |
| 58 | +.Em physical |
| 59 | +CPU requiring a barrier that |
| 60 | +.Xr membar_sync 3 |
| 61 | +does not issue. |
| 62 | +.Sh EXAMPLES |
| 63 | +Submit a request to the host device, and notify the host to process |
| 64 | +it\(embut elide the notification, which is expensive, if the host is |
| 65 | +already reading requests anyway: |
| 66 | +.Bd -literal |
| 67 | + /* |
| 68 | + * Write the request into the ring buffer. |
| 69 | + */ |
| 70 | + memcpy(cputodev_ring->buffer[sc->sc_cputodev_idx], request, |
| 71 | + sizeof(*request)); |
| 72 | + |
| 73 | + /* |
| 74 | + * Publish the request to the host device side. |
| 75 | + */ |
| 76 | + cputodev_ring->header->producer_tail = ++sc->sc_cputodev_idx; |
| 77 | + |
| 78 | + /* |
| 79 | + * Ensure we have published it _before_ we check whether the |
| 80 | + * host needs notification. |
| 81 | + */ |
| 82 | + paravirt_membar_sync(); |
| 83 | + |
| 84 | + /* |
| 85 | + * Notify the host, if needed. Notifying the host is usually |
| 86 | + * expensive (trap to hypervisor), so we try to avoid it if not |
| 87 | + * needed. |
| 88 | + */ |
| 89 | + if (cputodev_ring->header->needs_notification) |
| 90 | + notify_host(); |
| 91 | +.Ed |
| 92 | +.Pp |
| 93 | +Enable interrupts from the host and check whether any were pending |
| 94 | +while interrupts were disabled: |
| 95 | +.Bd -literal |
| 96 | + /* |
| 97 | + * Tell the host device to deliver interrupts after this |
| 98 | + * point. |
| 99 | + */ |
| 100 | +restart: |
| 101 | + devtocpu_ring->header->needs_notification = true; |
| 102 | + |
| 103 | + /* |
| 104 | + * Ensure we have requested interrupts _before_ we check |
| 105 | + * whether we missed any notifications. |
| 106 | + */ |
| 107 | + paravirt_membar_sync(); |
| 108 | + |
| 109 | + /* |
| 110 | + * Check whether there were any pending notifications while |
| 111 | + * interrupts were blocked. If not, stop here. |
| 112 | + */ |
| 113 | + idx = devtocpu_ring->header->producer_idx; |
| 114 | + if (sc->sc_devtocpu_idx == idx) |
| 115 | + return; |
| 116 | + |
| 117 | + /* |
| 118 | + * Process the notifications. |
| 119 | + */ |
| 120 | + devtocpu_ring->header->needs_notification = false; |
| 121 | + while (sc->sc_devtocpu_idx != idx) { |
| 122 | + struct buffer *buf = |
| 123 | + devtocpu_ring->buffer[sc->sc_devtocpu_idx]; |
| 124 | + process_notification(buf); |
| 125 | + sc->sc_devtocpu_idx++; |
| 126 | + sc->sc_devtocpu_idx %= ringlen; |
| 127 | + } |
| 128 | + goto restart; |
| 129 | +.Ed |
| 130 | +.Pp |
| 131 | +.Sy "N.B.:" |
| 132 | +Other ordering or bouncing may be required with |
| 133 | +.Xr bus_dmamap_sync 9 ; |
| 134 | +this is independent of |
| 135 | +.Nm , |
| 136 | +which is needed |
| 137 | +.Em in addition to |
| 138 | +.Xr bus_dmamap_sync 9 |
| 139 | +to guarantee store-before-load ordering when there is no intervening |
| 140 | +I/O doorbell trigger for a DMA operation, nor interrupt delivery for a |
| 141 | +DMA completion. |
| 142 | +.Sh SEE ALSO |
| 143 | +.Xr membar_ops 3 , |
| 144 | +.Xr bus_dma 9 , |
| 145 | +.Xr bus_space 9 |
| 146 | +.Sh HISTORY |
| 147 | +These atomic operations first appeared in |
| 148 | +.Nx 12.0 . |
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