1818 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
1919 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
2020 */
21-
21+ #include "core_irq.h"
2222#include "user.h"
2323typedef struct
2424{
25- const DMA_TypeDef * RegBase ;
25+ DMA_TypeDef * RegBase ;
2626 const uint32_t Index ;
2727 CBFuncEx_t CB ;
2828 void * pData ;
@@ -65,17 +65,17 @@ typedef struct
6565
6666/************ operation definition for DMA DMA_CFG_L REGISTER ************/
6767#define DMA_CFG_HS_SEL_SRC_Pos (11)
68- #define DMA_CFG_HS_SEL_SRC_Mask (0x01U<<DMA_CFG_HS_SEL_SRC_Pos)// 0 HARD 1 SOFT
68+ #define DMA_CFG_HS_SEL_SRC_Mask (0x01U<<DMA_CFG_HS_SEL_SRC_Pos)/* 0 HARD 1 SOFT*/
6969
7070#define DMA_CFG_HS_SEL_DST_Pos (10)
7171#define DMA_CFG_HS_SEL_DST_Mask (0x01U<<DMA_CFG_HS_SEL_DST_Pos)
7272
7373/************ operation definition for DMA DMA_CFG_H REGISTER ************/
7474#define DMA_CFG_DEST_PER_Pos (11)
75- #define DMA_CFG_DEST_PER_Mask (0x07U<<DMA_CFG_DEST_PER_Pos)// need write current channel num
75+ #define DMA_CFG_DEST_PER_Mask (0x07U<<DMA_CFG_DEST_PER_Pos)/* need write current channel num*/
7676
7777#define DMA_CFG_SRC_PER_Pos (7)
78- #define DMA_CFG_SRC_PER_Mask (0x07U<<DMA_CFG_SRC_PER_Pos)// need write current channel num
78+ #define DMA_CFG_SRC_PER_Mask (0x07U<<DMA_CFG_SRC_PER_Pos)/* need write current channel num*/
7979
8080/************ operation definition for DMA DMA_LLP_L REGISTER ************/
8181#define DMAC_LLP_NEXT_LLI_MSK (0x3)
@@ -212,7 +212,7 @@ int DMA_ConfigStream(uint8_t Stream, void *Config)
212212 (DMA_InitStruct -> DMA_PeripheralDataSize << DMA_CTL_DST_TR_WIDTH_Pos );
213213
214214 hwDMAChannal [Stream ].TxDir = 1 ;
215- // hwDMA->CFG_L = (1 << 18);
215+ /* hwDMA->CFG_L = (1 << 18); */
216216 hwDMA -> CFG_L = 0 ;
217217 break ;
218218 default :
@@ -333,7 +333,7 @@ uint32_t DMA_GetDataLength(uint8_t Stream, uint32_t FirstAddress)
333333static void DMA_IrqHandle (int32_t IrqLine , void * pData )
334334{
335335 uint32_t i ;
336- // DBG("%x", DMA->StatusTfr_L);
336+ /* DBG("%x", DMA->StatusTfr_L); */
337337 if (DMA -> StatusInt_L & (1 << 0 ))
338338 {
339339 for (i = 0 ; i < DMA_STREAM_QTY ; i ++ )
@@ -352,7 +352,7 @@ static void DMA_IrqHandle(int32_t IrqLine, void *pData)
352352 if (DMA -> StatusErr_L & (1 << i ))
353353 {
354354 DMA -> ClearErr_L = (1 << i );
355- hwDMAChannal [i ].CB (hwDMAChannal [i ].pData , 0xffffffff );
355+ hwDMAChannal [i ].CB (hwDMAChannal [i ].pData , ( void * ) 0xffffffff );
356356 }
357357 }
358358 }
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