From b118a36e3233ac2edcaf5c2202a546b775ed0424 Mon Sep 17 00:00:00 2001 From: kaidegit <2857693944@qq.com> Date: Sun, 2 Mar 2025 17:15:12 +0800 Subject: [PATCH] [libcpu][riscv] add a doc for wch saving the irq stack as stack-512 --- libcpu/risc-v/common/context_gcc.S | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/libcpu/risc-v/common/context_gcc.S b/libcpu/risc-v/common/context_gcc.S index b0dc0aa16a4..792ac8bd677 100644 --- a/libcpu/risc-v/common/context_gcc.S +++ b/libcpu/risc-v/common/context_gcc.S @@ -49,6 +49,15 @@ rt_hw_interrupt_enable: rt_hw_context_switch_to: la t0, __rt_rvstack #ifdef SOC_RISCV_FAMILY_CH32 +/* + * if it is an assembly entry code, the SP offset value is determined by the assembly code, + * but the C code is determined by the compiler, so we subtract 512 here as a reservation. + * When entering the interrupt function of C code, the compiler automatically presses the stack + * into the task stack. We can only change the SP value used by the calling function after switching + * the interrupt stack.This problem can be solved by modifying the interrupt to the assembly entry, + * and there is no need to reserve 512 bytes. You only need to switch the interrupt stack at the + * beginning of the interrupt function +*/ addi t0, t0, -512 // for ch32 #endif /* SOC_RISCV_FAMILY_CH32 */ csrw mscratch,t0