From b42431f8b83e325088f56b5c7bdbf7f2fcb64ec4 Mon Sep 17 00:00:00 2001 From: Chasel Date: Wed, 21 May 2025 13:51:26 +0800 Subject: [PATCH 1/3] [bsp][wch][risc-v] add drv_flash for ch32v307. --- .../risc-v/Libraries/ch32_drivers/SConscript | 3 + .../risc-v/Libraries/ch32_drivers/drv_flash.c | 208 ++++++++++++++++++ .../risc-v/Libraries/ch32_drivers/drv_flash.h | 31 +++ bsp/wch/risc-v/ch32v307v-r1/.config | 120 +++++++++- bsp/wch/risc-v/ch32v307v-r1/board/Kconfig | 4 + bsp/wch/risc-v/ch32v307v-r1/board/board.h | 4 + bsp/wch/risc-v/ch32v307v-r1/rtconfig.h | 20 +- bsp/wch/risc-v/yd-ch32v307vct6/.config | 115 +++++++++- bsp/wch/risc-v/yd-ch32v307vct6/board/Kconfig | 4 + bsp/wch/risc-v/yd-ch32v307vct6/board/board.h | 4 + bsp/wch/risc-v/yd-ch32v307vct6/rtconfig.h | 16 +- 11 files changed, 512 insertions(+), 17 deletions(-) create mode 100644 bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.c create mode 100644 bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.h diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript b/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript index 3b8e88aa834..e2e361e2608 100644 --- a/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript +++ b/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript @@ -51,6 +51,9 @@ if GetDepend('SOC_RISCV_FAMILY_CH32'): if GetDepend('BSP_USING_HWTIMER'): src += ['drv_hwtimer.c'] + if GetDepend(['BSP_USING_ON_CHIP_FLASH']): + src += ['drv_flash.c'] + group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path) Return('group') diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.c b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.c new file mode 100644 index 00000000000..9aecc9766c8 --- /dev/null +++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.c @@ -0,0 +1,208 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-05-20 Chasel first version + * + */ + +#include +#include + +#ifdef BSP_USING_ON_CHIP_FLASH +#include "drv_flash.h" +#include + +#if defined(RT_USING_FAL) +#include "fal.h" +#endif + +//#define DRV_DEBUG +#define LOG_TAG "drv.flash" +#include + +#define FLASH_PAGE_SIZE 4096 + +/** + * @brief Gets the page of a given address + * @param Addr: Address of the FLASH Memory + * @retval The page of a given address + */ +static uint32_t GetPage(uint32_t addr) +{ + uint32_t page = 0; + page = RT_ALIGN_DOWN(addr, FLASH_PAGE_SIZE); + return page; +} + +/** + * Read data from flash. + * @note This operation's units is word. + * + * @param addr flash address + * @param buf buffer to store read data + * @param size read bytes size + * + * @return result + */ +int ch32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size) +{ + size_t i; + + if ((addr + size) > CH32_FLASH_END_ADDRESS) + { + LOG_E("read outrange flash size! addr is (0x%p)", (void *)(addr + size)); + return -RT_EINVAL; + } + + for (i = 0; i < size; i++, buf++, addr++) + { + *buf = *(rt_uint8_t *) addr; + } + + return size; +} + +/** + * Write data to flash. + * @note This operation's units is word. + * @note This operation must after erase. @see flash_erase. + * + * @param addr flash address + * @param buf the write data buffer + * @param size write bytes size + * + * @return result + */ +int ch32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size) +{ + rt_err_t result = RT_EOK; + FLASH_Status status = 0; + rt_uint32_t end_addr = addr + size; + + if (addr % 4 != 0) + { + LOG_E("write addr must be 4-byte alignment"); + return -RT_EINVAL; + } + + if ((end_addr) > CH32_FLASH_END_ADDRESS) + { + LOG_E("write outrange flash size! addr is (0x%p)", (void *)(addr + size)); + return -RT_EINVAL; + } + + FLASH_Unlock(); + FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_WRPRTERR); + + while (addr < end_addr) + { + status = FLASH_ProgramWord(addr, *((rt_uint32_t *)buf)); + if (status == FLASH_COMPLETE) + { + if (*(rt_uint32_t *)addr != *(rt_uint32_t *)buf) + { + result = -RT_ERROR; + break; + } + addr += 4; + buf += 4; + } + else + { + result = -RT_ERROR; + break; + } + } + + FLASH_Lock(); + + if (result != RT_EOK) + { + return result; + } + + return size; +} + +/** + * Erase data on flash . + * @note This operation is irreversible. + * @note This operation's units is different which on many chips. + * + * @param addr flash address + * @param size erase bytes size + * + * @return result + */ +int ch32_flash_erase(rt_uint32_t addr, size_t size) +{ + rt_err_t result = RT_EOK; + FLASH_Status status = 0; + uint32_t num_page = 0; + uint32_t i = 0; + + if ((addr + size) > CH32_FLASH_END_ADDRESS) + { + LOG_E("ERROR: erase outrange flash size! addr is (0x%p)\n", (void *)(addr + size)); + return -RT_EINVAL; + } + + FLASH_Unlock(); + + num_page = (size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE; + + FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_WRPRTERR); + + for(i = 0; (i < num_page) && (status == FLASH_COMPLETE); i++) + { + status = FLASH_ErasePage(GetPage(addr + i * FLASH_PAGE_SIZE)); //Erase 4KB + + if(status != FLASH_COMPLETE) + { + LOG_E("FLASH Erase Fail\r\n"); + result = -RT_ERROR; + goto __exit; + } + } + +__exit: + FLASH_Lock(); + + if (result != RT_EOK) + { + return result; + } + + return size; +} + + +#if defined(RT_USING_FAL) + +static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size); +static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size); +static int fal_flash_erase(long offset, size_t size); + +const struct fal_flash_dev ch32_onchip_flash = { "onchip_flash", CH32_FLASH_START_ADRESS, CH32_FLASH_SIZE, FLASH_PAGE_SIZE, {NULL, fal_flash_read, fal_flash_write, fal_flash_erase}, 8, {} ,}; + +static int fal_flash_read(long offset, rt_uint8_t *buf, size_t size) +{ + return ch32_flash_read(ch32_onchip_flash.addr + offset, buf, size); +} + +static int fal_flash_write(long offset, const rt_uint8_t *buf, size_t size) +{ + return ch32_flash_write(ch32_onchip_flash.addr + offset, buf, size); +} + +static int fal_flash_erase(long offset, size_t size) +{ + return ch32_flash_erase(ch32_onchip_flash.addr + offset, size); +} + +#endif +#endif /* BSP_USING_ON_CHIP_FLASH */ diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.h b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.h new file mode 100644 index 00000000000..48bee90b1b8 --- /dev/null +++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.h @@ -0,0 +1,31 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-05-20 Chasel first version + */ + +#ifndef __DRV_FLASH_H__ +#define __DRV_FLASH_H__ + +#include +#include "rtdevice.h" +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +int ch32_flash_read(rt_uint32_t addr, rt_uint8_t *buf, size_t size); +int ch32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size); +int ch32_flash_erase(rt_uint32_t addr, size_t size); + +#ifdef __cplusplus +} +#endif + +#endif /* __DRV_FLASH_H__ */ diff --git a/bsp/wch/risc-v/ch32v307v-r1/.config b/bsp/wch/risc-v/ch32v307v-r1/.config index abd39016cdc..5f0a1dec3a9 100644 --- a/bsp/wch/risc-v/ch32v307v-r1/.config +++ b/bsp/wch/risc-v/ch32v307v-r1/.config @@ -182,7 +182,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -CONFIG_RT_VER_NUM=0x50200 +CONFIG_RT_VER_NUM=0x50201 # CONFIG_RT_USING_STDC_ATOMIC is not set CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 # end of RT-Thread Kernel @@ -487,6 +487,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set # CONFIG_PKG_USING_LHC_MODBUS is not set # CONFIG_PKG_USING_QMODBUS is not set +# CONFIG_PKG_USING_PNET is not set +# CONFIG_PKG_USING_OPENER is not set # end of IoT - internet of things # @@ -514,6 +516,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_PARSON is not set +# CONFIG_PKG_USING_RYAN_JSON is not set # end of JSON: JavaScript Object Notation, a lightweight data-interchange format # @@ -618,6 +621,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set # CONFIG_PKG_USING_VOFA_PLUS is not set # CONFIG_PKG_USING_ZDEBUG is not set +# CONFIG_PKG_USING_RVBACKTRACE is not set +# CONFIG_PKG_USING_HPATCHLITE is not set # end of tools packages # @@ -629,7 +634,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # CONFIG_PKG_USING_RT_MEMCPY_CM is not set # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set -# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set # end of enhanced kernel services # CONFIG_PKG_USING_AUNITY is not set @@ -647,7 +651,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # CONFIG_PKG_USING_CMSIS_5 is not set # CONFIG_PKG_USING_CMSIS_CORE is not set -# CONFIG_PKG_USING_CMSIS_DSP is not set # CONFIG_PKG_USING_CMSIS_NN is not set # CONFIG_PKG_USING_CMSIS_RTOS1 is not set # CONFIG_PKG_USING_CMSIS_RTOS2 is not set @@ -699,7 +702,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARM_2D is not set # CONFIG_PKG_USING_MCUBOOT is not set # CONFIG_PKG_USING_TINYUSB is not set -# CONFIG_PKG_USING_CHERRYUSB is not set # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set @@ -707,10 +709,13 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_FLASH_BLOB is not set # CONFIG_PKG_USING_MLIBC is not set # CONFIG_PKG_USING_TASK_MSG_BUS is not set +# CONFIG_PKG_USING_UART_FRAMEWORK is not set # CONFIG_PKG_USING_SFDB is not set # CONFIG_PKG_USING_RTP is not set # CONFIG_PKG_USING_REB is not set +# CONFIG_PKG_USING_RMP is not set # CONFIG_PKG_USING_R_RHEALSTONE is not set +# CONFIG_PKG_USING_HEARTBEAT is not set # end of system packages # @@ -724,10 +729,44 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # STM32 HAL & SDK Drivers # +# CONFIG_PKG_USING_STM32F0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F0_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F1_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F1_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F2_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F2_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F3_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F3_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F7_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F7_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32G0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32G0_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32G4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32G4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H5_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H7_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H7_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32L0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L0_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set # CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32L5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L5_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32U5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32U5_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_STM32WL_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32WL_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32WB_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32WB_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32MP1_M4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32MP1_M4_CMSIS_DRIVER is not set # end of STM32 HAL & SDK Drivers # @@ -760,6 +799,64 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_NRFX is not set # CONFIG_PKG_USING_NUCLEI_SDK is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_MM32 is not set + +# +# WCH HAL & SDK Drivers +# +# CONFIG_PKG_USING_CH32V20x_SDK is not set +CONFIG_PKG_USING_CH32V307_SDK=y +CONFIG_PKG_CH32V307_SDK_PATH="/packages/peripherals/hal-sdk/wch/ch32v307_sdk" +CONFIG_PKG_USING_CH32V307_SDK_V207=y +# CONFIG_PKG_USING_CH32V307_SDK_LATEST_VERSION is not set +CONFIG_PKG_CH32V307_SDK_VER="v2.7" +# end of WCH HAL & SDK Drivers + +# +# AT32 HAL & SDK Drivers +# +# CONFIG_PKG_USING_AT32A403A_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32A403A_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32A423_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32A423_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F45x_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F45x_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F402_405_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F402_405_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F403A_407_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F403A_407_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F413_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F413_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F415_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F415_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F421_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F421_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F423_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F423_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F425_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F425_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F435_437_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F435_437_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32M412_416_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32M412_416_CMSIS_DRIVER is not set +# end of AT32 HAL & SDK Drivers + +# +# HC32 DDL Drivers +# +# end of HC32 DDL Drivers + +# +# NXP HAL & SDK Drivers +# +# CONFIG_PKG_USING_NXP_MCX_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_NXP_MCX_SERIES_DRIVER is not set +# CONFIG_PKG_USING_NXP_LPC_DRIVER is not set +# CONFIG_PKG_USING_NXP_LPC55S_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMX6SX_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set +# end of NXP HAL & SDK Drivers # end of HAL & SDK Drivers # @@ -797,14 +894,17 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_BMI088 is not set # CONFIG_PKG_USING_HMC5883 is not set # CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_MAX31855 is not set # CONFIG_PKG_USING_TMP1075 is not set # CONFIG_PKG_USING_SR04 is not set # CONFIG_PKG_USING_CCS811 is not set # CONFIG_PKG_USING_PMSXX is not set # CONFIG_PKG_USING_RT3020 is not set # CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90382 is not set # CONFIG_PKG_USING_MLX90393 is not set # CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90394 is not set # CONFIG_PKG_USING_MLX90397 is not set # CONFIG_PKG_USING_MS5611 is not set # CONFIG_PKG_USING_MAX31865 is not set @@ -830,6 +930,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_STHS34PF80 is not set +# CONFIG_PKG_USING_P3T1755 is not set +# CONFIG_PKG_USING_QMI8658 is not set # end of sensors drivers # @@ -918,6 +1020,11 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_SYSTEM_RUN_LED is not set # CONFIG_PKG_USING_BT_MX01 is not set # CONFIG_PKG_USING_RGPOWER is not set +# CONFIG_PKG_USING_BT_MX02 is not set +# CONFIG_PKG_USING_GC9A01 is not set +# CONFIG_PKG_USING_IK485 is not set +# CONFIG_PKG_USING_SERVO is not set +# CONFIG_PKG_USING_SEAN_WS2812B is not set # CONFIG_PKG_USING_SPI_TOOLS is not set # end of peripheral libraries and drivers @@ -934,6 +1041,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_QUEST is not set # CONFIG_PKG_USING_NAXOS is not set # CONFIG_PKG_USING_R_TINYMAIX is not set +# CONFIG_PKG_USING_LLMCHAT is not set # end of AI packages # @@ -1004,6 +1112,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set # CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LIBCRC is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set @@ -1014,6 +1123,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_SOEM is not set # CONFIG_PKG_USING_QPARAM is not set # CONFIG_PKG_USING_CorevMCU_CLI is not set +# CONFIG_PKG_USING_DRMP is not set # end of miscellaneous packages # @@ -1027,6 +1137,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set # CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set # CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_RTDUINO_SENSORFUSION_SHIELD is not set # CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set # CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set # CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set @@ -1291,6 +1402,7 @@ CONFIG_BSP_USING_UART1=y # CONFIG_BSP_USING_RTC is not set CONFIG_LSI_VALUE=40000 # CONFIG_BSP_USING_IWDT is not set +# CONFIG_BSP_USING_ON_CHIP_FLASH is not set # CONFIG_BSP_USING_CAN is not set # CONFIG_BSP_USING_TIM is not set # end of On-chip Peripheral Drivers diff --git a/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig b/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig index d9275a620ea..a2a28dbb038 100644 --- a/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig +++ b/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig @@ -286,6 +286,10 @@ menu "On-chip Peripheral Drivers" select LSI_VALUE default n + config BSP_USING_ON_CHIP_FLASH + bool "Enable on-chip FLASH" + default n + menuconfig BSP_USING_CAN bool "Enable CAN" default n diff --git a/bsp/wch/risc-v/ch32v307v-r1/board/board.h b/bsp/wch/risc-v/ch32v307v-r1/board/board.h index 4af121813b7..437bab131d3 100644 --- a/bsp/wch/risc-v/ch32v307v-r1/board/board.h +++ b/bsp/wch/risc-v/ch32v307v-r1/board/board.h @@ -21,6 +21,10 @@ #define SRAM_SIZE 96 #define SRAM_END (0x20000000 + SRAM_SIZE * 1024) +#define CH32_FLASH_START_ADRESS ((uint32_t)0x08000000) +#define CH32_FLASH_SIZE (224 * 1024) +#define CH32_FLASH_END_ADDRESS ((uint32_t)(CH32_FLASH_START_ADRESS + CH32_FLASH_SIZE)) + extern int _ebss, _susrstack; #define HEAP_BEGIN ((void *)&_ebss) #define HEAP_END ((void *)&_susrstack) diff --git a/bsp/wch/risc-v/ch32v307v-r1/rtconfig.h b/bsp/wch/risc-v/ch32v307v-r1/rtconfig.h index da386bed01f..87bb80f2bce 100644 --- a/bsp/wch/risc-v/ch32v307v-r1/rtconfig.h +++ b/bsp/wch/risc-v/ch32v307v-r1/rtconfig.h @@ -103,7 +103,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart1" -#define RT_VER_NUM 0x50200 +#define RT_VER_NUM 0x50201 #define RT_BACKTRACE_LEVEL_MAX_NR 32 /* end of RT-Thread Kernel */ #define RT_USING_HW_ATOMIC @@ -287,6 +287,24 @@ /* Kendryte SDK */ /* end of Kendryte SDK */ + +/* WCH HAL & SDK Drivers */ + +#define PKG_USING_CH32V307_SDK +#define PKG_USING_CH32V307_SDK_V207 +/* end of WCH HAL & SDK Drivers */ + +/* AT32 HAL & SDK Drivers */ + +/* end of AT32 HAL & SDK Drivers */ + +/* HC32 DDL Drivers */ + +/* end of HC32 DDL Drivers */ + +/* NXP HAL & SDK Drivers */ + +/* end of NXP HAL & SDK Drivers */ /* end of HAL & SDK Drivers */ /* sensors drivers */ diff --git a/bsp/wch/risc-v/yd-ch32v307vct6/.config b/bsp/wch/risc-v/yd-ch32v307vct6/.config index 74aeef11762..9d7bcd68e52 100644 --- a/bsp/wch/risc-v/yd-ch32v307vct6/.config +++ b/bsp/wch/risc-v/yd-ch32v307vct6/.config @@ -182,7 +182,7 @@ CONFIG_RT_USING_DEVICE=y CONFIG_RT_USING_CONSOLE=y CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" -CONFIG_RT_VER_NUM=0x50200 +CONFIG_RT_VER_NUM=0x50201 # CONFIG_RT_USING_STDC_ATOMIC is not set CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 # end of RT-Thread Kernel @@ -487,6 +487,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set # CONFIG_PKG_USING_LHC_MODBUS is not set # CONFIG_PKG_USING_QMODBUS is not set +# CONFIG_PKG_USING_PNET is not set +# CONFIG_PKG_USING_OPENER is not set # end of IoT - internet of things # @@ -514,6 +516,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_JSMN is not set # CONFIG_PKG_USING_AGILE_JSMN is not set # CONFIG_PKG_USING_PARSON is not set +# CONFIG_PKG_USING_RYAN_JSON is not set # end of JSON: JavaScript Object Notation, a lightweight data-interchange format # @@ -618,6 +621,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set # CONFIG_PKG_USING_VOFA_PLUS is not set # CONFIG_PKG_USING_ZDEBUG is not set +# CONFIG_PKG_USING_RVBACKTRACE is not set +# CONFIG_PKG_USING_HPATCHLITE is not set # end of tools packages # @@ -629,7 +634,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # CONFIG_PKG_USING_RT_MEMCPY_CM is not set # CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set -# CONFIG_PKG_USING_RT_VSNPRINTF_FULL is not set # end of enhanced kernel services # CONFIG_PKG_USING_AUNITY is not set @@ -647,7 +651,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # CONFIG_PKG_USING_CMSIS_5 is not set # CONFIG_PKG_USING_CMSIS_CORE is not set -# CONFIG_PKG_USING_CMSIS_DSP is not set # CONFIG_PKG_USING_CMSIS_NN is not set # CONFIG_PKG_USING_CMSIS_RTOS1 is not set # CONFIG_PKG_USING_CMSIS_RTOS2 is not set @@ -699,7 +702,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ARM_2D is not set # CONFIG_PKG_USING_MCUBOOT is not set # CONFIG_PKG_USING_TINYUSB is not set -# CONFIG_PKG_USING_CHERRYUSB is not set # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set @@ -707,10 +709,13 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_FLASH_BLOB is not set # CONFIG_PKG_USING_MLIBC is not set # CONFIG_PKG_USING_TASK_MSG_BUS is not set +# CONFIG_PKG_USING_UART_FRAMEWORK is not set # CONFIG_PKG_USING_SFDB is not set # CONFIG_PKG_USING_RTP is not set # CONFIG_PKG_USING_REB is not set +# CONFIG_PKG_USING_RMP is not set # CONFIG_PKG_USING_R_RHEALSTONE is not set +# CONFIG_PKG_USING_HEARTBEAT is not set # end of system packages # @@ -724,10 +729,44 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # STM32 HAL & SDK Drivers # +# CONFIG_PKG_USING_STM32F0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F0_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F1_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F1_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F2_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F2_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F3_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F3_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F7_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F7_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32G0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32G0_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32G4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32G4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H5_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H7_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H7_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32L0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L0_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set # CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32L5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L5_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32U5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32U5_CMSIS_DRIVER is not set # CONFIG_PKG_USING_STM32WB55_SDK is not set # CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_STM32WL_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32WL_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32WB_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32WB_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32MP1_M4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32MP1_M4_CMSIS_DRIVER is not set # end of STM32 HAL & SDK Drivers # @@ -760,21 +799,64 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_NRFX is not set # CONFIG_PKG_USING_NUCLEI_SDK is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_MM32 is not set # # WCH HAL & SDK Drivers # +# CONFIG_PKG_USING_CH32V20x_SDK is not set CONFIG_PKG_USING_CH32V307_SDK=y CONFIG_PKG_CH32V307_SDK_PATH="/packages/peripherals/hal-sdk/wch/ch32v307_sdk" CONFIG_PKG_USING_CH32V307_SDK_V207=y # CONFIG_PKG_USING_CH32V307_SDK_LATEST_VERSION is not set CONFIG_PKG_CH32V307_SDK_VER="v2.7" -CONFIG_PKG_USING_CH32V307_SDK_RTT_PATCH=y -CONFIG_PKG_CH32V307_SDK_RTT_PATCH_PATH="/packages/peripherals/hal-sdk/wch/ch32v307_sdk_rtt_patch" -CONFIG_PKG_USING_CH32V307_SDK_RTT_PATCH_V207=y -# CONFIG_PKG_USING_CH32V307_SDK_RTT_PATCH_LATEST_VERSION is not set -CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7" # end of WCH HAL & SDK Drivers + +# +# AT32 HAL & SDK Drivers +# +# CONFIG_PKG_USING_AT32A403A_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32A403A_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32A423_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32A423_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F45x_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F45x_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F402_405_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F402_405_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F403A_407_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F403A_407_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F413_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F413_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F415_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F415_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F421_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F421_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F423_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F423_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F425_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F425_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F435_437_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F435_437_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32M412_416_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32M412_416_CMSIS_DRIVER is not set +# end of AT32 HAL & SDK Drivers + +# +# HC32 DDL Drivers +# +# end of HC32 DDL Drivers + +# +# NXP HAL & SDK Drivers +# +# CONFIG_PKG_USING_NXP_MCX_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_NXP_MCX_SERIES_DRIVER is not set +# CONFIG_PKG_USING_NXP_LPC_DRIVER is not set +# CONFIG_PKG_USING_NXP_LPC55S_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMX6SX_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set +# end of NXP HAL & SDK Drivers # end of HAL & SDK Drivers # @@ -812,14 +894,17 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7" # CONFIG_PKG_USING_BMI088 is not set # CONFIG_PKG_USING_HMC5883 is not set # CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_MAX31855 is not set # CONFIG_PKG_USING_TMP1075 is not set # CONFIG_PKG_USING_SR04 is not set # CONFIG_PKG_USING_CCS811 is not set # CONFIG_PKG_USING_PMSXX is not set # CONFIG_PKG_USING_RT3020 is not set # CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90382 is not set # CONFIG_PKG_USING_MLX90393 is not set # CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90394 is not set # CONFIG_PKG_USING_MLX90397 is not set # CONFIG_PKG_USING_MS5611 is not set # CONFIG_PKG_USING_MAX31865 is not set @@ -845,6 +930,8 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7" # CONFIG_PKG_USING_ICM20608 is not set # CONFIG_PKG_USING_PAJ7620 is not set # CONFIG_PKG_USING_STHS34PF80 is not set +# CONFIG_PKG_USING_P3T1755 is not set +# CONFIG_PKG_USING_QMI8658 is not set # end of sensors drivers # @@ -933,6 +1020,11 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7" # CONFIG_PKG_USING_SYSTEM_RUN_LED is not set # CONFIG_PKG_USING_BT_MX01 is not set # CONFIG_PKG_USING_RGPOWER is not set +# CONFIG_PKG_USING_BT_MX02 is not set +# CONFIG_PKG_USING_GC9A01 is not set +# CONFIG_PKG_USING_IK485 is not set +# CONFIG_PKG_USING_SERVO is not set +# CONFIG_PKG_USING_SEAN_WS2812B is not set # CONFIG_PKG_USING_SPI_TOOLS is not set # end of peripheral libraries and drivers @@ -949,6 +1041,7 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7" # CONFIG_PKG_USING_QUEST is not set # CONFIG_PKG_USING_NAXOS is not set # CONFIG_PKG_USING_R_TINYMAIX is not set +# CONFIG_PKG_USING_LLMCHAT is not set # end of AI packages # @@ -1019,6 +1112,7 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7" # CONFIG_PKG_USING_KI is not set # CONFIG_PKG_USING_ARMv7M_DWT is not set # CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LIBCRC is not set # CONFIG_PKG_USING_LWGPS is not set # CONFIG_PKG_USING_STATE_MACHINE is not set # CONFIG_PKG_USING_DESIGN_PATTERN is not set @@ -1029,6 +1123,7 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7" # CONFIG_PKG_USING_SOEM is not set # CONFIG_PKG_USING_QPARAM is not set # CONFIG_PKG_USING_CorevMCU_CLI is not set +# CONFIG_PKG_USING_DRMP is not set # end of miscellaneous packages # @@ -1042,6 +1137,7 @@ CONFIG_PKG_CH32V307_SDK_RTT_PATCH_VER="v2.7" # CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set # CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set # CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_RTDUINO_SENSORFUSION_SHIELD is not set # CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set # CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set # CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set @@ -1300,6 +1396,7 @@ CONFIG_BSP_USING_UART1=y # CONFIG_BSP_USING_RTC is not set CONFIG_LSI_VALUE=39000 # CONFIG_BSP_USING_IWDT is not set +# CONFIG_BSP_USING_ON_CHIP_FLASH is not set # CONFIG_BSP_USING_CAN is not set # CONFIG_BSP_USING_TIM is not set # end of On-chip Peripheral Drivers diff --git a/bsp/wch/risc-v/yd-ch32v307vct6/board/Kconfig b/bsp/wch/risc-v/yd-ch32v307vct6/board/Kconfig index c20f233f302..2ad8cc13364 100644 --- a/bsp/wch/risc-v/yd-ch32v307vct6/board/Kconfig +++ b/bsp/wch/risc-v/yd-ch32v307vct6/board/Kconfig @@ -234,6 +234,10 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n + config BSP_USING_ON_CHIP_FLASH + bool "Enable on-chip FLASH" + default n + menuconfig BSP_USING_CAN bool "Enable CAN" default n diff --git a/bsp/wch/risc-v/yd-ch32v307vct6/board/board.h b/bsp/wch/risc-v/yd-ch32v307vct6/board/board.h index e3e8983f48a..301b9511edb 100644 --- a/bsp/wch/risc-v/yd-ch32v307vct6/board/board.h +++ b/bsp/wch/risc-v/yd-ch32v307vct6/board/board.h @@ -22,6 +22,10 @@ #define SRAM_SIZE 64 #define SRAM_END (0x20000000 + SRAM_SIZE * 1024) +#define CH32_FLASH_START_ADRESS ((uint32_t)0x08000000) +#define CH32_FLASH_SIZE (256 * 1024) +#define CH32_FLASH_END_ADDRESS ((uint32_t)(CH32_FLASH_START_ADRESS + CH32_FLASH_SIZE)) + extern int _ebss, _susrstack; #define HEAP_BEGIN ((void *)&_ebss) #define HEAP_END ((void *)&_susrstack) diff --git a/bsp/wch/risc-v/yd-ch32v307vct6/rtconfig.h b/bsp/wch/risc-v/yd-ch32v307vct6/rtconfig.h index a9338ceab40..19c843fafcc 100644 --- a/bsp/wch/risc-v/yd-ch32v307vct6/rtconfig.h +++ b/bsp/wch/risc-v/yd-ch32v307vct6/rtconfig.h @@ -104,7 +104,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart1" -#define RT_VER_NUM 0x50200 +#define RT_VER_NUM 0x50201 #define RT_BACKTRACE_LEVEL_MAX_NR 32 /* end of RT-Thread Kernel */ #define RT_USING_HW_ATOMIC @@ -293,9 +293,19 @@ #define PKG_USING_CH32V307_SDK #define PKG_USING_CH32V307_SDK_V207 -#define PKG_USING_CH32V307_SDK_RTT_PATCH -#define PKG_USING_CH32V307_SDK_RTT_PATCH_V207 /* end of WCH HAL & SDK Drivers */ + +/* AT32 HAL & SDK Drivers */ + +/* end of AT32 HAL & SDK Drivers */ + +/* HC32 DDL Drivers */ + +/* end of HC32 DDL Drivers */ + +/* NXP HAL & SDK Drivers */ + +/* end of NXP HAL & SDK Drivers */ /* end of HAL & SDK Drivers */ /* sensors drivers */ From af14cb80d21be9a8453730889b986f4a934d46df Mon Sep 17 00:00:00 2001 From: Chasel Date: Fri, 23 May 2025 08:21:07 +0000 Subject: [PATCH 2/3] [bsp][wch][risc-v] 1. add yml file for ch32v307. 2. fix programs a word at chip flash timeout. 3. priority use of fast mode. --- .../risc-v/Libraries/ch32_drivers/drv_flash.c | 52 +++++++++++++++++-- .../.ci/attachconfig/ci.attachconfig.yml | 33 ++++++++++++ .../.ci/attachconfig/ci.attachconfig.yml | 33 ++++++++++++ 3 files changed, 115 insertions(+), 3 deletions(-) create mode 100644 bsp/wch/risc-v/ch32v307v-r1/.ci/attachconfig/ci.attachconfig.yml create mode 100644 bsp/wch/risc-v/yd-ch32v307vct6/.ci/attachconfig/ci.attachconfig.yml diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.c b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.c index 9aecc9766c8..474de7cc432 100644 --- a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.c +++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_flash.c @@ -20,12 +20,19 @@ #include "fal.h" #endif -//#define DRV_DEBUG +#define DRV_DEBUG #define LOG_TAG "drv.flash" #include #define FLASH_PAGE_SIZE 4096 +/* @note If there is no down-frequency processing, the timeout time needs to be modified */ +#ifdef ProgramTimeout +#undef ProgramTimeout +#define ProgramTimeout ((uint32_t)0x00010000) +#endif + + /** * @brief Gets the page of a given address * @param Addr: Address of the FLASH Memory @@ -95,6 +102,23 @@ int ch32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size) return -RT_EINVAL; } + if (((addr & 0x000000FF) == 0) && (size & 0xFFFFFF00)) { + rt_uint32_t fast_size = (size & 0xFFFFFF00); + + status = FLASH_ROM_WRITE(addr, (rt_uint32_t *)buf, fast_size); + if (status != FLASH_COMPLETE) { + LOG_E("FLASH ROM Write Fail\r\n"); + return -RT_ERROR; + } + + addr += fast_size; + buf += fast_size; + } + if (addr == end_addr) { + return size; + } + + FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM_HALF); FLASH_Unlock(); FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_WRPRTERR); @@ -119,6 +143,7 @@ int ch32_flash_write(rt_uint32_t addr, const rt_uint8_t *buf, size_t size) } FLASH_Lock(); + FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM); if (result != RT_EOK) { @@ -144,6 +169,7 @@ int ch32_flash_erase(rt_uint32_t addr, size_t size) FLASH_Status status = 0; uint32_t num_page = 0; uint32_t i = 0; + rt_uint32_t total_size = size; if ((addr + size) > CH32_FLASH_END_ADDRESS) { @@ -151,9 +177,28 @@ int ch32_flash_erase(rt_uint32_t addr, size_t size) return -RT_EINVAL; } + if (((addr & 0x000000FF) == 0) && (total_size & 0xFFFFFF00)) { + rt_uint32_t fast_size = (total_size & 0xFFFFFF00); + + status = FLASH_ROM_ERASE(addr, fast_size); + if (status != FLASH_COMPLETE) { + LOG_E("FLASH ROM Erase Fail\r\n"); + return -RT_ERROR; + } + + addr += fast_size; + total_size -= fast_size; + } + + if (0 == total_size) { + return size; + } + + FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM_HALF); FLASH_Unlock(); + FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_WRPRTERR); - num_page = (size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE; + num_page = (total_size + FLASH_PAGE_SIZE - 1) / FLASH_PAGE_SIZE; FLASH_ClearFlag(FLASH_FLAG_BSY | FLASH_FLAG_EOP | FLASH_FLAG_WRPRTERR); @@ -171,10 +216,11 @@ int ch32_flash_erase(rt_uint32_t addr, size_t size) __exit: FLASH_Lock(); + FLASH_Access_Clock_Cfg(FLASH_Access_SYSTEM); if (result != RT_EOK) { - return result; + return -RT_ERROR; } return size; diff --git a/bsp/wch/risc-v/ch32v307v-r1/.ci/attachconfig/ci.attachconfig.yml b/bsp/wch/risc-v/ch32v307v-r1/.ci/attachconfig/ci.attachconfig.yml new file mode 100644 index 00000000000..8f92bf90466 --- /dev/null +++ b/bsp/wch/risc-v/ch32v307v-r1/.ci/attachconfig/ci.attachconfig.yml @@ -0,0 +1,33 @@ +devices.gpio: + kconfig: + - CONFIG_BSP_USING_GPIO=y +devices.adc: + kconfig: + - CONFIG_BSP_USING_ADC=y + - CONFIG_BSP_USING_ADC1=y + - CONFIG_BSP_USING_ADC2=n +devices.dac: + kconfig: + - CONFIG_BSP_USING_DAC=y + - CONFIG_BSP_USING_DAC_CHANNEL1=y + - CONFIG_BSP_USING_DAC_CHANNEL2=n +devices.i2c: + kconfig: + - CONFIG_BSP_USING_SOFT_I2C=y + - CONFIG_BSP_USING_I2C1=y + - CONFIG_BSP_USING_I2C2=y +devices.spi: + kconfig: + - CONFIG_BSP_USING_SPI=y + - CONFIG_BSP_USING_SPI1=n + - CONFIG_BSP_USING_SPI2=n + - CONFIG_BSP_USING_SPI3=y +devices.uart: + kconfig: + - CONFIG_BSP_USING_UART=y +devices.watchdog: + kconfig: + - CONFIG_BSP_USING_IWDT=y +devices.flash: + kconfig: + - CONFIG_BSP_USING_ON_CHIP_FLASH=y diff --git a/bsp/wch/risc-v/yd-ch32v307vct6/.ci/attachconfig/ci.attachconfig.yml b/bsp/wch/risc-v/yd-ch32v307vct6/.ci/attachconfig/ci.attachconfig.yml new file mode 100644 index 00000000000..8f92bf90466 --- /dev/null +++ b/bsp/wch/risc-v/yd-ch32v307vct6/.ci/attachconfig/ci.attachconfig.yml @@ -0,0 +1,33 @@ +devices.gpio: + kconfig: + - CONFIG_BSP_USING_GPIO=y +devices.adc: + kconfig: + - CONFIG_BSP_USING_ADC=y + - CONFIG_BSP_USING_ADC1=y + - CONFIG_BSP_USING_ADC2=n +devices.dac: + kconfig: + - CONFIG_BSP_USING_DAC=y + - CONFIG_BSP_USING_DAC_CHANNEL1=y + - CONFIG_BSP_USING_DAC_CHANNEL2=n +devices.i2c: + kconfig: + - CONFIG_BSP_USING_SOFT_I2C=y + - CONFIG_BSP_USING_I2C1=y + - CONFIG_BSP_USING_I2C2=y +devices.spi: + kconfig: + - CONFIG_BSP_USING_SPI=y + - CONFIG_BSP_USING_SPI1=n + - CONFIG_BSP_USING_SPI2=n + - CONFIG_BSP_USING_SPI3=y +devices.uart: + kconfig: + - CONFIG_BSP_USING_UART=y +devices.watchdog: + kconfig: + - CONFIG_BSP_USING_IWDT=y +devices.flash: + kconfig: + - CONFIG_BSP_USING_ON_CHIP_FLASH=y From 9540f4548e40245e2aeccfb34075d494bd2dd4e6 Mon Sep 17 00:00:00 2001 From: Chasel Date: Fri, 23 May 2025 09:13:17 +0000 Subject: [PATCH 3/3] [bsp][wch][risc-v] fix spi device for ch32v307. --- bsp/wch/risc-v/Libraries/ch32_drivers/drv_spi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_spi.c b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_spi.c index ca439feccd6..2bb74bf7409 100644 --- a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_spi.c +++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_spi.c @@ -322,8 +322,9 @@ static rt_err_t ch32_spi_init(struct ch32_spi *spi_drv, struct rt_spi_configurat /* min prescaler 256 */ spi_handle->Init.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256; } + SystemCoreClockUpdate(); LOG_D("sys freq: %d, pclk2 freq: %d, SPI limiting freq: %d, BaudRatePrescaler: %d", - HAL_RCC_GetSysClockFreq(), + SystemCoreClock, SPI_APB_CLOCK, cfg->max_hz, spi_handle->Init.SPI_BaudRatePrescaler);