From 415441bf7d1c47b6d6cb743b0aa694eb068ac037 Mon Sep 17 00:00:00 2001 From: Yaochenger <1516081466@qq.com> Date: Thu, 29 May 2025 11:30:04 +0800 Subject: [PATCH 1/2] =?UTF-8?q?[libcpu/common]=20=E4=BF=AE=E6=AD=A3?= =?UTF-8?q?=E5=AF=B9RV32E=E7=9A=84=E6=94=AF=E6=8C=81=EF=BC=8CRV32E?= =?UTF-8?q?=E4=B8=8D=E6=94=AF=E6=8C=81s2=E5=AF=84=E5=AD=98=E5=99=A8?= =?UTF-8?q?=EF=BC=8C=E4=BF=AE=E6=94=B9=E4=B8=BAs1=E5=AF=84=E5=AD=98?= =?UTF-8?q?=E5=99=A8?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- libcpu/risc-v/common/interrupt_gcc.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libcpu/risc-v/common/interrupt_gcc.S b/libcpu/risc-v/common/interrupt_gcc.S index fc916dd821a..6eb0ef371f6 100644 --- a/libcpu/risc-v/common/interrupt_gcc.S +++ b/libcpu/risc-v/common/interrupt_gcc.S @@ -337,8 +337,8 @@ trap_entry: /* need to switch new thread */ la s0, rt_thread_switch_interrupt_flag - lw s2, 0(s0) - beqz s2, spurious_interrupt + lw s1, 0(s0) + beqz s1, spurious_interrupt sw zero, 0(s0) la s0, rt_interrupt_from_thread From 8bdb6949e44336e8d904c602bdd3726503a9dd80 Mon Sep 17 00:00:00 2001 From: Yaochenger <1516081466@qq.com> Date: Thu, 29 May 2025 13:32:25 +0800 Subject: [PATCH 2/2] =?UTF-8?q?=E7=A7=BB=E9=99=A4=E6=97=A0=E7=94=A8?= =?UTF-8?q?=E6=96=87=E4=BB=B6=EF=BC=8C=E8=AF=A5=E6=96=87=E4=BB=B6=E6=9C=AA?= =?UTF-8?q?=E8=A2=AB=E4=BB=BB=E4=BD=95BSP=E4=BD=BF=E7=94=A8?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- libcpu/risc-v/common/riscv-plic.h | 113 ------------------------------ 1 file changed, 113 deletions(-) delete mode 100644 libcpu/risc-v/common/riscv-plic.h diff --git a/libcpu/risc-v/common/riscv-plic.h b/libcpu/risc-v/common/riscv-plic.h deleted file mode 100644 index 53e19d29628..00000000000 --- a/libcpu/risc-v/common/riscv-plic.h +++ /dev/null @@ -1,113 +0,0 @@ -/* - * Copyright (c) 2006-2021, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2018-10-03 Bernard The first version - */ - -#ifndef RISCV_PLIC_H__ -#define RISCV_PLIC_H__ - -#ifndef PLIC_BASE_ADDR -#define PLIC_BASE_ADDR 0x0 -#endif - -/* Priority Register - 32 bits per source */ -#define PLIC_PRIORITY_OFFSET (0x00000000UL) -#define PLIC_PRIORITY_SHIFT_PER_SOURCE 2 - -/* Pending Register - 1 bit per soirce */ -#define PLIC_PENDING_OFFSET (0x00001000UL) -#define PLIC_PENDING_SHIFT_PER_SOURCE 0 - -/* Enable Register - 0x80 per target */ -#define PLIC_ENABLE_OFFSET (0x00002000UL) -#define PLIC_ENABLE_SHIFT_PER_TARGET 7 - -/* Priority Threshold Register - 0x1000 per target */ -#define PLIC_THRESHOLD_OFFSET (0x00200000UL) -#define PLIC_THRESHOLD_SHIFT_PER_TARGET 12 - -/* Claim Register - 0x1000 per target */ -#define PLIC_CLAIM_OFFSET (0x00200004UL) -#define PLIC_CLAIM_SHIFT_PER_TARGET 12 - -#if defined(__GNUC__) && !defined(__ASSEMBLER__) -__attribute__((always_inline)) static inline void __plic_set_feature(unsigned int feature) -{ - volatile unsigned int *feature_ptr = (volatile unsigned int *)PLIC_BASE_ADDR; - *feature_ptr = feature; -} - -__attribute__((always_inline)) static inline void __plic_set_threshold(unsigned int threshold) -{ - unsigned int hart_id = read_csr(mhartid); - volatile unsigned int *threshold_ptr = (volatile unsigned int *)(PLIC_BASE_ADDR + - PLIC_THRESHOLD_OFFSET + - (hart_id << PLIC_THRESHOLD_SHIFT_PER_TARGET)); - *threshold_ptr = threshold; -} - -__attribute__((always_inline)) static inline void __plic_set_priority(unsigned int source, unsigned int priority) -{ - volatile unsigned int *priority_ptr = (volatile unsigned int *)(PLIC_BASE_ADDR + - PLIC_PRIORITY_OFFSET + - (source << PLIC_PRIORITY_SHIFT_PER_SOURCE)); - *priority_ptr = priority; -} - -__attribute__((always_inline)) static inline void __plic_set_pending(unsigned int source) -{ - volatile unsigned int *current_ptr = (volatile unsigned int *)(PLIC_BASE_ADDR + - PLIC_PENDING_OFFSET + - ((source >> 5) << 2)); - *current_ptr = (1 << (source & 0x1F)); -} - -__attribute__((always_inline)) static inline void __plic_irq_enable(unsigned int source) -{ - unsigned int hart_id = read_csr(mhartid); - volatile unsigned int *current_ptr = (volatile unsigned int *)(PLIC_BASE_ADDR + - PLIC_ENABLE_OFFSET + - (hart_id << PLIC_ENABLE_SHIFT_PER_TARGET) + - ((source >> 5) << 2)); - unsigned int current = *current_ptr; - current = current | (1 << (source & 0x1F)); - *current_ptr = current; -} - -__attribute__((always_inline)) static inline void __plic_irq_disable(unsigned int source) -{ - unsigned int hart_id = read_csr(mhartid); - volatile unsigned int *current_ptr = (volatile unsigned int *)(PLIC_BASE_ADDR + - PLIC_ENABLE_OFFSET + - (hart_id << PLIC_ENABLE_SHIFT_PER_TARGET) + - ((source >> 5) << 2)); - unsigned int current = *current_ptr; - current = current & ~((1 << (source & 0x1F))); - *current_ptr = current; -} - -__attribute__((always_inline)) static inline unsigned int __plic_irq_claim(void) -{ - unsigned int hart_id = read_csr(mhartid); - volatile unsigned int *claim_addr = (volatile unsigned int *)(PLIC_BASE_ADDR + - PLIC_CLAIM_OFFSET + - (hart_id << PLIC_CLAIM_SHIFT_PER_TARGET)); - return *claim_addr; -} - -__attribute__((always_inline)) static inline void __plic_irq_complete(unsigned int source) -{ - unsigned int hart_id = read_csr(mhartid); - volatile unsigned int *claim_addr = (volatile unsigned int *)(PLIC_BASE_ADDR + - PLIC_CLAIM_OFFSET + - (hart_id << PLIC_CLAIM_SHIFT_PER_TARGET)); - *claim_addr = source; -} -#endif /* end of __GNUC__ */ - -#endif