diff --git a/bsp/xuantie/smartl/e906/board/SConscript b/bsp/xuantie/smartl/e906/board/SConscript
index d9603bd08e2..7e7b944703d 100644
--- a/bsp/xuantie/smartl/e906/board/SConscript
+++ b/bsp/xuantie/smartl/e906/board/SConscript
@@ -11,5 +11,20 @@ src = ['board.c']
path = [cwd]
-group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path)
+# CPPDEFINES = ['CONFIG_KERNEL_RTTHREAD=1', 'RT_USING_LIBC']
+CPPDEFINES = [
+ 'CONFIG_KERNEL_RTTHREAD=1'
+ ,'__RT_KERNEL_SOURCE__=1'
+ ,'CONFIG_CSI_V2=1 '
+ ,'CONFIG_CSI="csi2" '
+ ,'CONFIG_SUPPORT_TSPEND=0 '
+ ,'CONFIG_SUPPORT_IRQ_NESTED=0 '
+ ,'CONFIG_XIP=1 '
+ ,'CONFIG_ARCH_MAINSTACK=4096 '
+ ,'CONFIG_ARCH_INTERRUPTSTACK=4096 '
+ ,'CONFIG_BOARD_SMARTL_EVB=1 '
+ ,'CLI_CONFIG_STACK_SIZE=4096 '
+ ,'CONFIG_CPU_XUANTIE_E906FD=1 '
+]
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
Return('group')
diff --git a/bsp/xuantie/smartl/e906/template.cdkproj b/bsp/xuantie/smartl/e906/template.cdkproj
new file mode 100644
index 00000000000..b03a7efe44f
--- /dev/null
+++ b/bsp/xuantie/smartl/e906/template.cdkproj
@@ -0,0 +1,250 @@
+
+
+
+
+
+ new_psf_project_SmartL_E906FD-R2S2(V1.7.9)
+
+
+
+ XTGccElfNewlib
+ latest
+
+
+
+
+ ;;;
+ ;;MHZ
+
+
+
+
+
+
+
+
+
+
+
+
+ no
+
+
+
+
+ no
+
+
+
+
+ no
+
+
+
+
+ no
+
+
+
+
+ no
+
+
+
+
+
+
+ no
+
+
+ yes
+
+
+ no
+
+
+ yes
+
+
+ no
+
+
+ yes
+
+
+ no
+
+
+ yes
+
+
+ no
+
+
+ yes
+
+
+ e906fd
+ yes
+ little
+ no
+ no
+ no
+
+
+ no
+
+
+
+
+ no
+
+ no
+
+
+ no
+
+ no
+
+
+ no
+
+ no
+
+
+
+
+
+
+ Optimize size (-Os)
+ Maximum (-g3)
+ $(ProjectPath);$(ProjectPath)/../../../../../csi_core/include;$(ProjectPath)/../../../../../csi_driver/include;$(ProjectPath)/../../../../../libs/include;$(ProjectPath)/../../../../../csi_driver/smartl_rv32/include;$(ProjectPath)/../../../../../csi_kernel/include;$(ProjectPath)/../../../../../csi_kernel/freertosv10.3.1/include/;$(ProjectPath)/../../../../../csi_kernel/freertosv10.3.1/FreeRTOS/Source/include;$(ProjectPath)/../../../../../csi_kernel/freertosv10.3.1/FreeRTOS/Source/portable/GCC/riscv;$(ProjectPath)/../../../../../csi_kernel/freertosv10.3.1/FreeRTOS/Source/portable/GCC/riscv/chip_specific_extensions/thead_rv32;$(ProjectPath)/../../../../../board/smartl_e906_evb/include;$(ProjectPath)/../../../../../projects/tests/dtest/include;$(ProjectPath)/../../../../../projects/tests/kernel/include;;;;;;;$(ProjectPath)/../../../../../projects/tests/kernel/freertos/configs
+ -ffunction-sections -fdata-sections
+ no
+ no
+ no
+ no
+ no
+ no
+ yes
+ no
+ yes
+ no
+ no
+
+
+
+
+
+ -D"Default_IRQHandler=SW_handler"
+ gdwarf2
+
+
+ yes
+ yes
+ $(ProjectPath)/../../libraries/xuantie_libraries/chip_riscv_dummy/gcc_flash_smartl.ld
+ m
+
+ -Wl,-zmax-page-size=1024
+ no
+
+ no
+ none
+ no
+ no
+
+
+ yes
+ SIM
+ yes
+ main
+ $(ProjectPath)/utilities/gdb.init
+
+
+ yes
+ Hard Reset
+ 0
+ no
+
+ no
+
+
+
+ localhost
+ 1025
+ 0
+ 12000
+ 10
+ 100
+ 50
+ yes
+ no
+ no
+ no
+ Normal
+ soft
+ 0
+ None
+ no
+ yes
+
+ Local
+
+ no
+ 1000
+ no
+ 1026
+ latest
+ no
+
+
+ soccfg/riscv32/smartl_e906_cfg.xml
+
+ yes
+ no
+ no
+ latest
+
+
+
+ yes
+ no
+ 4444
+ no
+ 6666
+
+ 5000
+ localhost
+ 3333
+ openocd-sifive
+ latest
+
+
+
+ $(ProjectPath)/../../../../../utilities//flash.init
+
+ Erase Sectors
+
+ yes
+ no
+ no
+
+
+ no
+ 0
+ no
+
+
+
+
+
+
diff --git a/bsp/xuantie/smartl/e906/template.cdkws b/bsp/xuantie/smartl/e906/template.cdkws
new file mode 100644
index 00000000000..a1c3cd0a730
--- /dev/null
+++ b/bsp/xuantie/smartl/e906/template.cdkws
@@ -0,0 +1,11 @@
+
+
+ $(CDKWS)\__workspace_pack__
+
+
+
+
+
+
+
+
diff --git a/bsp/xuantie/smartl/e906/utilities/gdb.init b/bsp/xuantie/smartl/e906/utilities/gdb.init
new file mode 100644
index 00000000000..7792c77445e
--- /dev/null
+++ b/bsp/xuantie/smartl/e906/utilities/gdb.init
@@ -0,0 +1,6 @@
+set *(int *)0x0=0x6f
+si
+reset
+set *(int *)0x40011008=0x0
+set *(int *)0x4001101c=0x0
+
diff --git a/tools/targets/cdk.py b/tools/targets/cdk.py
index 8a473f72914..73fb06559ca 100644
--- a/tools/targets/cdk.py
+++ b/tools/targets/cdk.py
@@ -114,6 +114,9 @@ def _CDKProject(tree, target, script):
Define = tree.find('BuildConfigs/BuildConfig/Compiler/Define')
Define.text = '; '.join(set(CPPDEFINES))
+
+ Define = tree.find('BuildConfigs/BuildConfig/Asm/Define')
+ Define.text = '; '.join(set(CPPDEFINES))
CC_Misc = tree.find('BuildConfigs/BuildConfig/Compiler/OtherFlags')
CC_Misc.text = CCFLAGS
@@ -128,7 +131,7 @@ def _CDKProject(tree, target, script):
LibName.text=';'.join(LIBS)
xml_indent(root)
- out.write(etree.tostring(root, encoding='utf-8'))
+ out.write(etree.tostring(root, encoding='utf-8').decode('utf-8'))
out.close()
def CDKProject(target, script):