diff --git a/.github/ALL_BSP_COMPILE.json b/.github/ALL_BSP_COMPILE.json index 496aa9ce064..114a931d134 100644 --- a/.github/ALL_BSP_COMPILE.json +++ b/.github/ALL_BSP_COMPILE.json @@ -303,6 +303,7 @@ "gd32/arm/gd32450z-eval", "gd32/arm/gd32470z-lckfb", "gd32/arm/gd32h759i-start", + "gd32/arm/gd32h759i-eval", "gd32/arm/gd32e503v-eval", "gd32/arm/gd32527I-eval", "gd32/arm/gd32e230-lckfb", diff --git a/bsp/gd32/arm/gd32h759i-eval/.config b/bsp/gd32/arm/gd32h759i-eval/.config new file mode 100644 index 00000000000..dba099e3b60 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/.config @@ -0,0 +1,1451 @@ + +# +# RT-Thread Kernel +# + +# +# klibc options +# + +# +# rt_vsnprintf options +# +# CONFIG_RT_KLIBC_USING_LIBC_VSNPRINTF is not set +# CONFIG_RT_KLIBC_USING_VSNPRINTF_LONGLONG is not set +# CONFIG_RT_KLIBC_USING_VSNPRINTF_STANDARD is not set +# end of rt_vsnprintf options + +# +# rt_vsscanf options +# +# CONFIG_RT_KLIBC_USING_LIBC_VSSCANF is not set +# end of rt_vsscanf options + +# +# rt_memset options +# +# CONFIG_RT_KLIBC_USING_USER_MEMSET is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMSET is not set +# CONFIG_RT_KLIBC_USING_TINY_MEMSET is not set +# end of rt_memset options + +# +# rt_memcpy options +# +# CONFIG_RT_KLIBC_USING_USER_MEMCPY is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMCPY is not set +# CONFIG_RT_KLIBC_USING_TINY_MEMCPY is not set +# end of rt_memcpy options + +# +# rt_memmove options +# +# CONFIG_RT_KLIBC_USING_USER_MEMMOVE is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMMOVE is not set +# end of rt_memmove options + +# +# rt_memcmp options +# +# CONFIG_RT_KLIBC_USING_USER_MEMCMP is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMCMP is not set +# end of rt_memcmp options + +# +# rt_strstr options +# +# CONFIG_RT_KLIBC_USING_USER_STRSTR is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRSTR is not set +# end of rt_strstr options + +# +# rt_strcasecmp options +# +# CONFIG_RT_KLIBC_USING_USER_STRCASECMP is not set +# end of rt_strcasecmp options + +# +# rt_strncpy options +# +# CONFIG_RT_KLIBC_USING_USER_STRNCPY is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRNCPY is not set +# end of rt_strncpy options + +# +# rt_strcpy options +# +# CONFIG_RT_KLIBC_USING_USER_STRCPY is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRCPY is not set +# end of rt_strcpy options + +# +# rt_strncmp options +# +# CONFIG_RT_KLIBC_USING_USER_STRNCMP is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRNCMP is not set +# end of rt_strncmp options + +# +# rt_strcmp options +# +# CONFIG_RT_KLIBC_USING_USER_STRCMP is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRCMP is not set +# end of rt_strcmp options + +# +# rt_strlen options +# +# CONFIG_RT_KLIBC_USING_USER_STRLEN is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRLEN is not set +# end of rt_strlen options + +# +# rt_strnlen options +# +# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set +# end of rt_strnlen options + +# CONFIG_RT_UTEST_TC_USING_KLIBC is not set +# end of klibc options + +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_NANO is not set +# CONFIG_RT_USING_SMART is not set +# CONFIG_RT_USING_AMP is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_CPUS_NR=1 +CONFIG_RT_ALIGN_SIZE=8 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_HOOK_USING_FUNC_PTR=y +# CONFIG_RT_USING_HOOKLIST is not set +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +CONFIG_RT_USING_TIMER_SOFT=y +CONFIG_RT_TIMER_THREAD_PRIO=4 +CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 +# CONFIG_RT_USING_TIMER_ALL_SOFT is not set +# CONFIG_RT_USING_CPU_USAGE_TRACER is not set + +# +# kservice options +# +# CONFIG_RT_USING_TINY_FFS is not set +# end of kservice options + +CONFIG_RT_USING_DEBUG=y +CONFIG_RT_DEBUGING_ASSERT=y +CONFIG_RT_DEBUGING_COLOR=y +CONFIG_RT_DEBUGING_CONTEXT=y +# CONFIG_RT_DEBUGING_AUTO_INIT is not set +# CONFIG_RT_USING_CI_ACTION is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set +# CONFIG_RT_USING_SIGNALS is not set +# end of Inter-Thread communication + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMHEAP is not set +CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y +# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set +# CONFIG_RT_USING_SLAB_AS_HEAP is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +# CONFIG_RT_USING_HEAP_ISR is not set +CONFIG_RT_USING_HEAP=y +# end of Memory Management + +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +# CONFIG_RT_USING_THREADSAFE_PRINTF is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" +CONFIG_RT_VER_NUM=0x50201 +# CONFIG_RT_USING_STDC_ATOMIC is not set +CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 +# end of RT-Thread Kernel + +CONFIG_RT_USING_CACHE=y +CONFIG_RT_USING_HW_ATOMIC=y +CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M7=y + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 +# CONFIG_RT_USING_LEGACY is not set +CONFIG_RT_USING_MSH=y +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +# CONFIG_FINSH_USING_WORD_OPERATION is not set +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 +CONFIG_FINSH_USING_OPTION_COMPLETION=y + +# +# DFS: device virtual file system +# +CONFIG_RT_USING_DFS=y +CONFIG_DFS_USING_POSIX=y +CONFIG_DFS_USING_WORKDIR=y +# CONFIG_RT_USING_DFS_MNTTABLE is not set +CONFIG_DFS_FD_MAX=16 +CONFIG_RT_USING_DFS_V1=y +# CONFIG_RT_USING_DFS_V2 is not set +CONFIG_DFS_FILESYSTEMS_MAX=4 +CONFIG_DFS_FILESYSTEM_TYPES_MAX=4 +# CONFIG_RT_USING_DFS_ELMFAT is not set +CONFIG_RT_USING_DFS_DEVFS=y +# CONFIG_RT_USING_DFS_ROMFS is not set +# CONFIG_RT_USING_DFS_CROMFS is not set +# CONFIG_RT_USING_DFS_RAMFS is not set +# CONFIG_RT_USING_DFS_TMPFS is not set +# CONFIG_RT_USING_DFS_MQUEUE is not set +# end of DFS: device virtual file system + +# CONFIG_RT_USING_FAL is not set + +# +# Device Drivers +# +# CONFIG_RT_USING_DM is not set +# CONFIG_RT_USING_DEV_BUS is not set +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +# CONFIG_RT_SERIAL_USING_DMA is not set +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_SERIAL_BYPASS is not set +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_CPUTIME is not set +CONFIG_RT_USING_I2C=y +# CONFIG_RT_I2C_DEBUG is not set +CONFIG_RT_USING_I2C_BITOPS=y +# CONFIG_RT_I2C_BITOPS_DEBUG is not set +# CONFIG_RT_USING_SOFT_I2C is not set +# CONFIG_RT_USING_PHY is not set +# CONFIG_RT_USING_PHY_V2 is not set +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_NULL is not set +# CONFIG_RT_USING_ZERO is not set +# CONFIG_RT_USING_RANDOM is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_LCD is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_BLK is not set +# CONFIG_RT_USING_VIRTIO is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_KTIME is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CHERRYUSB is not set +# end of Device Drivers + +# +# C/C++ and POSIX layer +# + +# +# ISO-ANSI C layer +# + +# +# Timezone and Daylight Saving Time +# +# CONFIG_RT_LIBC_USING_FULL_TZ_DST is not set +CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y +CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8 +CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0 +CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 +# end of Timezone and Daylight Saving Time +# end of ISO-ANSI C layer + +# +# POSIX (Portable Operating System Interface) layer +# +# CONFIG_RT_USING_POSIX_FS is not set +# CONFIG_RT_USING_POSIX_DELAY is not set +# CONFIG_RT_USING_POSIX_CLOCK is not set +# CONFIG_RT_USING_POSIX_TIMER is not set +# CONFIG_RT_USING_PTHREADS is not set +# CONFIG_RT_USING_MODULE is not set + +# +# Interprocess Communication (IPC) +# +# CONFIG_RT_USING_POSIX_PIPE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set + +# +# Socket is in the 'Network' category +# +# end of Interprocess Communication (IPC) +# end of POSIX (Portable Operating System Interface) layer + +# CONFIG_RT_USING_CPLUSPLUS is not set +# end of C/C++ and POSIX layer + +# +# Network +# +# CONFIG_RT_USING_SAL is not set +# CONFIG_RT_USING_NETDEV is not set +# CONFIG_RT_USING_LWIP is not set +# CONFIG_RT_USING_AT is not set +# end of Network + +# +# Memory protection +# +# CONFIG_RT_USING_MEM_PROTECTION is not set +# CONFIG_RT_USING_HW_STACK_GUARD is not set +# end of Memory protection + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_RESOURCE_ID is not set +# CONFIG_RT_USING_ADT is not set +# CONFIG_RT_USING_RT_LINK is not set +# end of Utilities + +# CONFIG_RT_USING_VBUS is not set + +# +# Using USB legacy version +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set +# end of Using USB legacy version + +# CONFIG_RT_USING_FDT is not set +# end of RT-Thread Components + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set +# end of RT-Thread Utestcases + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_NANOPB is not set +# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set +# CONFIG_PKG_USING_ESP_HOSTED is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set +# end of Marvell WiFi + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# end of Wiced WiFi + +# CONFIG_PKG_USING_RW007 is not set + +# +# CYW43012 WiFi +# +# CONFIG_PKG_USING_WLAN_CYW43012 is not set +# end of CYW43012 WiFi + +# +# BL808 WiFi +# +# CONFIG_PKG_USING_WLAN_BL808 is not set +# end of BL808 WiFi + +# +# CYW43439 WiFi +# +# CONFIG_PKG_USING_WLAN_CYW43439 is not set +# end of CYW43439 WiFi +# end of Wi-Fi + +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_IOTSHARP_SDK is not set +# end of IoT Cloud + +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_BT_CYW43012 is not set +# CONFIG_PKG_USING_CYW43XX is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set +# CONFIG_PKG_USING_RYANW5500 is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set +# CONFIG_PKG_USING_NET_SERVER is not set +# CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set +# CONFIG_PKG_USING_ZEPHYR_POLLING is not set +# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set +# CONFIG_PKG_USING_LHC_MODBUS is not set +# CONFIG_PKG_USING_QMODBUS is not set +# CONFIG_PKG_USING_PNET is not set +# CONFIG_PKG_USING_OPENER is not set +# CONFIG_PKG_USING_FREEMQTT is not set +# end of IoT - internet of things + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_LIBHYDROGEN is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set +# end of security packages + +# +# language packages +# + +# +# JSON: JavaScript Object Notation, a lightweight data-interchange format +# +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PARSON is not set +# CONFIG_PKG_USING_RYAN_JSON is not set +# end of JSON: JavaScript Object Notation, a lightweight data-interchange format + +# +# XML: Extensible Markup Language +# +# CONFIG_PKG_USING_SIMPLE_XML is not set +# CONFIG_PKG_USING_EZXML is not set +# end of XML: Extensible Markup Language + +# CONFIG_PKG_USING_LUATOS_SOC is not set +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set +# CONFIG_PKG_USING_RTT_RUST is not set +# end of language packages + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set +# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set +# end of LVGL: powerful and easy-to-use embedded GUI library + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# end of u8g2: a monochrome graphic library + +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_TERMBOX is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set +# CONFIG_PKG_USING_3GPP_AMRNB is not set +# end of multimedia packages + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RTT_AUTO_EXE_CMD is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set +# CONFIG_PKG_USING_CBOX is not set +# CONFIG_PKG_USING_SNOWFLAKE is not set +# CONFIG_PKG_USING_HASH_MATCH is not set +# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set +# CONFIG_PKG_USING_RT_TRACE is not set +# CONFIG_PKG_USING_ZDEBUG is not set +# CONFIG_PKG_USING_RVBACKTRACE is not set +# CONFIG_PKG_USING_HPATCHLITE is not set +# CONFIG_PKG_USING_THREAD_METRIC is not set +# end of tools packages + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# end of enhanced kernel services + +# CONFIG_PKG_USING_AUNITY is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set +# end of acceleration: Assembly language or algorithmic acceleration packages + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_CORE is not set +# CONFIG_PKG_USING_CMSIS_NN is not set +# CONFIG_PKG_USING_CMSIS_RTOS1 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set +# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# end of Micrium: Micrium software products porting for RT-Thread + +# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set +# CONFIG_PKG_USING_LITEOS_SDK is not set +# CONFIG_PKG_USING_TZ_DATABASE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_PERF_COUNTER is not set +# CONFIG_PKG_USING_FILEX is not set +# CONFIG_PKG_USING_LEVELX is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_RPMSG_LITE is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_KMULTI_RTIMER is not set +# CONFIG_PKG_USING_TFDB is not set +# CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set +# CONFIG_PKG_USING_FLASH_BLOB is not set +# CONFIG_PKG_USING_MLIBC is not set +# CONFIG_PKG_USING_TASK_MSG_BUS is not set +# CONFIG_PKG_USING_UART_FRAMEWORK is not set +# CONFIG_PKG_USING_SFDB is not set +# CONFIG_PKG_USING_RTP is not set +# CONFIG_PKG_USING_REB is not set +# CONFIG_PKG_USING_RMP is not set +# CONFIG_PKG_USING_R_RHEALSTONE is not set +# CONFIG_PKG_USING_HEARTBEAT is not set +# CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set +# end of system packages + +# +# peripheral libraries and drivers +# + +# +# HAL & SDK Drivers +# + +# +# STM32 HAL & SDK Drivers +# +# CONFIG_PKG_USING_STM32F0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F0_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F1_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F1_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F2_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F2_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F3_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F3_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F7_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F7_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32G0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32G0_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32G4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32G4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H5_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H7_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H7_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32L0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L0_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32L5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L5_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32U5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32U5_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_STM32WL_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32WL_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32WB_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32WB_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32MP1_M4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32MP1_M4_CMSIS_DRIVER is not set +# end of STM32 HAL & SDK Drivers + +# +# Infineon HAL Packages +# +# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set +# CONFIG_PKG_USING_INFINEON_CMSIS is not set +# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set +# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set +# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set +# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set +# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set +# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set +# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set +# CONFIG_PKG_USING_INFINEON_USBDEV is not set +# end of Infineon HAL Packages + +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_ESP_IDF is not set + +# +# Kendryte SDK +# +# CONFIG_PKG_USING_K210_SDK is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# end of Kendryte SDK + +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_RASPBERRYPI_PICO_RP2350_SDK is not set +# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_MM32 is not set + +# +# WCH HAL & SDK Drivers +# +# CONFIG_PKG_USING_CH32V20x_SDK is not set +# CONFIG_PKG_USING_CH32V307_SDK is not set +# end of WCH HAL & SDK Drivers + +# +# AT32 HAL & SDK Drivers +# +# CONFIG_PKG_USING_AT32A403A_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32A403A_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32A423_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32A423_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F45x_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F45x_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F402_405_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F402_405_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F403A_407_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F403A_407_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F413_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F413_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F415_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F415_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F421_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F421_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F423_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F423_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F425_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F425_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F435_437_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F435_437_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32M412_416_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32M412_416_CMSIS_DRIVER is not set +# end of AT32 HAL & SDK Drivers + +# +# HC32 DDL Drivers +# +# CONFIG_PKG_USING_HC32F3_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_HC32F3_SERIES_DRIVER is not set +# CONFIG_PKG_USING_HC32F4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_HC32F4_SERIES_DRIVER is not set +# end of HC32 DDL Drivers + +# +# NXP HAL & SDK Drivers +# +# CONFIG_PKG_USING_NXP_MCX_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_NXP_MCX_SERIES_DRIVER is not set +# CONFIG_PKG_USING_NXP_LPC_DRIVER is not set +# CONFIG_PKG_USING_NXP_LPC55S_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMX6SX_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set +# end of NXP HAL & SDK Drivers + +# +# NUVOTON Drivers +# +# CONFIG_PKG_USING_NUVOTON_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_NUVOTON_SERIES_DRIVER is not set +# CONFIG_PKG_USING_NUVOTON_ARM926_LIB is not set +# end of NUVOTON Drivers + +# +# GD32 Drivers +# +CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER=y +CONFIG_PKG_GD32_ARM_CMSIS_DRIVER_PATH="/packages/peripherals/hal-sdk/gd32/gd32-arm-cmsis" +CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER_LATEST_VERSION=y +CONFIG_PKG_GD32_ARM_CMSIS_DRIVER_VER="latest" +CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER=y +CONFIG_PKG_GD32_ARM_SERIES_DRIVER_PATH="/packages/peripherals/hal-sdk/gd32/gd32-arm-series" +CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER_LATEST_VERSION=y +CONFIG_PKG_GD32_ARM_SERIES_DRIVER_VER="latest" +# end of GD32 Drivers +# end of HAL & SDK Drivers + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSM is not set +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BME680 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set +# CONFIG_PKG_USING_MS5805 is not set +# CONFIG_PKG_USING_DA270 is not set +# CONFIG_PKG_USING_DF220 is not set +# CONFIG_PKG_USING_HSHCAL001 is not set +# CONFIG_PKG_USING_BH1750 is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_TSL4531 is not set +# CONFIG_PKG_USING_DS18B20 is not set +# CONFIG_PKG_USING_DHT11 is not set +# CONFIG_PKG_USING_DHTXX is not set +# CONFIG_PKG_USING_GY271 is not set +# CONFIG_PKG_USING_GP2Y10 is not set +# CONFIG_PKG_USING_SGP30 is not set +# CONFIG_PKG_USING_HDC1000 is not set +# CONFIG_PKG_USING_BMP180 is not set +# CONFIG_PKG_USING_BMP280 is not set +# CONFIG_PKG_USING_SHTC1 is not set +# CONFIG_PKG_USING_BMI088 is not set +# CONFIG_PKG_USING_HMC5883 is not set +# CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_MAX31855 is not set +# CONFIG_PKG_USING_TMP1075 is not set +# CONFIG_PKG_USING_SR04 is not set +# CONFIG_PKG_USING_CCS811 is not set +# CONFIG_PKG_USING_PMSXX is not set +# CONFIG_PKG_USING_RT3020 is not set +# CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90382 is not set +# CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90394 is not set +# CONFIG_PKG_USING_MLX90397 is not set +# CONFIG_PKG_USING_MS5611 is not set +# CONFIG_PKG_USING_MAX31865 is not set +# CONFIG_PKG_USING_VL53L0X is not set +# CONFIG_PKG_USING_INA260 is not set +# CONFIG_PKG_USING_MAX30102 is not set +# CONFIG_PKG_USING_INA226 is not set +# CONFIG_PKG_USING_LIS2DH12 is not set +# CONFIG_PKG_USING_HS300X is not set +# CONFIG_PKG_USING_ZMOD4410 is not set +# CONFIG_PKG_USING_ISL29035 is not set +# CONFIG_PKG_USING_MMC3680KJ is not set +# CONFIG_PKG_USING_QMP6989 is not set +# CONFIG_PKG_USING_BALANCE is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_SHT4X is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_STHS34PF80 is not set +# CONFIG_PKG_USING_P3T1755 is not set +# CONFIG_PKG_USING_QMI8658 is not set +# CONFIG_PKG_USING_ICM20948 is not set +# end of sensors drivers + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_CST816X is not set +# CONFIG_PKG_USING_CST812T is not set +# end of touch drivers + +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_MULTI_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_ILI9341 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set +# CONFIG_PKG_USING_RFM300 is not set +# CONFIG_PKG_USING_IO_INPUT_FILTER is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_AIP650 is not set +# CONFIG_PKG_USING_FINGERPRINT is not set +# CONFIG_PKG_USING_BT_ECB02C is not set +# CONFIG_PKG_USING_UAT is not set +# CONFIG_PKG_USING_ST7789 is not set +# CONFIG_PKG_USING_VS1003 is not set +# CONFIG_PKG_USING_X9555 is not set +# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set +# CONFIG_PKG_USING_BT_MX01 is not set +# CONFIG_PKG_USING_RGPOWER is not set +# CONFIG_PKG_USING_BT_MX02 is not set +# CONFIG_PKG_USING_GC9A01 is not set +# CONFIG_PKG_USING_IK485 is not set +# CONFIG_PKG_USING_SERVO is not set +# CONFIG_PKG_USING_SEAN_WS2812B is not set +# CONFIG_PKG_USING_IC74HC165 is not set +# CONFIG_PKG_USING_IST8310 is not set +# CONFIG_PKG_USING_ST7789_SPI is not set +# CONFIG_PKG_USING_SPI_TOOLS is not set +# end of peripheral libraries and drivers + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set +# CONFIG_PKG_USING_R_TINYMAIX is not set +# CONFIG_PKG_USING_LLMCHAT is not set +# end of AI packages + +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_APID is not set +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_QPID is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_KISSFFT is not set +# CONFIG_PKG_USING_CMSIS_DSP is not set +# end of Signal Processing and Control Algorithm Packages + +# +# miscellaneous packages +# + +# +# project laboratory +# +# end of project laboratory + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# end of samples: kernel and components samples + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_MORSE is not set +# CONFIG_PKG_USING_TINYSQUARE is not set +# end of entertainment: terminal games and other interesting software packages + +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_RALARAM is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_HEATSHRINK is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LIBCRC is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set +# CONFIG_PKG_USING_MFBD is not set +# CONFIG_PKG_USING_SLCAN2RTT is not set +# CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set +# CONFIG_PKG_USING_DRMP is not set +# end of miscellaneous packages + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects and Demos +# +# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set +# CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_RTDUINO_SENSORFUSION_SHIELD is not set +# CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set +# end of Projects and Demos + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set +# end of Sensors + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set +# end of Display + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set +# CONFIG_PKG_USING_ARDUINO_TICKER is not set +# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set +# end of Timing + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set +# CONFIG_PKG_USING_ARDUINO_TENSORFLOW_LITE_MICRO is not set +# CONFIG_PKG_USING_ARDUINO_RUNNINGMEDIAN is not set +# end of Data Processing + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set +# end of Communication + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set +# end of Device Control + +# +# Other +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set +# end of Other + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set +# end of Signal IO + +# +# Uncategorized +# +# end of Arduino libraries +# end of RT-Thread online packages + +CONFIG_SOC_FAMILY_GD32=y +CONFIG_SOC_SERIES_GD32H7xx=y + +# +# Hardware Drivers Config +# +CONFIG_SOC_GD32H759I=y + +# +# Onboard Peripheral Drivers +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART0=y +# CONFIG_BSP_UART0_RX_USING_DMA is not set +# CONFIG_BSP_USING_UART1 is not set +# CONFIG_BSP_USING_UART2 is not set +# CONFIG_BSP_USING_UART3 is not set +# end of On-chip Peripheral Drivers + +# +# Board extended module Drivers +# +# end of Hardware Drivers Config diff --git a/bsp/gd32/arm/gd32h759i-eval/.gitignore b/bsp/gd32/arm/gd32h759i-eval/.gitignore new file mode 100644 index 00000000000..dba98af7b1b --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/.gitignore @@ -0,0 +1,44 @@ +*.pyc +*.map +*.dblite +*.elf +*.bin +*.hex +*.axf +*.exe +*.pdb +*.idb +*.ilk +*.old +build +Debug +documentation/html +packages/ +*~ +*.o +*.obj +*.out +*.bak +*.dep +*.lib +*.i +*.d +.DS_Stor* +.config 3 +.config 4 +.config 5 +Midea-X1 +*.uimg +GPATH +GRTAGS +GTAGS +.vscode +JLinkLog.txt +JLinkSettings.ini +DebugConfig/ +RTE/ +settings/ +*.uvguix* +cconfig.h +*.scvd +*.ini diff --git a/bsp/gd32/arm/gd32h759i-eval/Kconfig b/bsp/gd32/arm/gd32h759i-eval/Kconfig new file mode 100644 index 00000000000..9c9c0356d2f --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/Kconfig @@ -0,0 +1,15 @@ +mainmenu "RT-Thread Configuration" + +BSP_DIR := . + +RTT_DIR := ../../../.. + +PKGS_DIR := packages + +source "$(RTT_DIR)/Kconfig" +osource "$PKGS_DIR/Kconfig" +rsource "../libraries/Kconfig" + +if !RT_USING_NANO +rsource "board/Kconfig" +endif diff --git a/bsp/gd32/arm/gd32h759i-eval/README.md b/bsp/gd32/arm/gd32h759i-eval/README.md new file mode 100644 index 00000000000..53ad4c3ec41 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/README.md @@ -0,0 +1,99 @@ +# GD32H759I-EVAL 开发板 BSP 说明 + +## 简介 + +GD32H759I-EVAL评估板使用GD32H759IMK6作为主控制器。评估板使用GD-Link Mini USB接口或者DC-005连接器提供5V电源。提供包括扩展引脚在内的及Reset，Boot，Wakeup KEY，Tamper KEY，User KEY，LED，ADC，DAC，CAN，DCI，ETHNET，HPDF，SAI，I2S，I2C_SMbus，OSPI，SPI_LCD，SDIO，SDRAM，TLI_LCD，USB，USART转USB接口等外设资源。 + +该评估板是兆易创新推出的一款GD32H7系列的评估板，最高主频高达600MHz，该开发板具有丰富的板载资源，可以充分发挥GD32H759IMK6的芯片性能。 + +开发板外观如下图所示： + +![board](figures/board.png) + +该开发板常用 **板载资源** 如下： + +- GD32H759IMK6，主频 600MHz，CPU 内核：ARM Cortex-M7，3840KB FLASH ，1024KB RAM +- 常用外设 + + - 用户LED ：2个，LED1 (PF10），LED2（PA6） + - 电源指示灯：一个红色LED + - 按键：4个，Wakeup Key（PA0），Tamper Key（PC13），User Key（PE4），Reset(NRST) +- 调试接口：GD-LINK , JTAG + + +## 外设支持 + +## 外设支持 + +本 BSP 目前对外设的支持情况如下： + +| **片上外设** | **支持情况** | **备注** | +|:-------- |:--------:|:-------------------------------- | +| GPIO | 支持 | PA0, PA1... ---> PIN: 0, 1...121 | +| UART | 支持 | UART0 - UART3 | +| LED | 支持 | LED1(PF10), LED2(PA6) | +| KEY | 支持 | Wakeup(PA0), Tamper(PC13), User(PE4) | +| I2C | 支持 | I2C1 | +| SPI | 支持 | SPI0 | + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + +### 快速上手 + +本 BSP 为开发者提供 MDK5工程，支持 GCC 开发环境，也可使用RT-Thread Studio开发。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用数据线连接开发板 GD-LINK USB 口到 PC，使用另一数据线连接开发板 USART(0) USB 口到 PC，并给开发板供电。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 GD-Link 仿真器下载程序，在通过 GD-Link 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，LED 闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 5.0.0 build Mar 3 2023 00:43:44 + 2006 - 2022 Copyright by RT-Thread team +msh /> +``` + +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口1的功能，如果需使用高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +## 注意事项 + +暂无 + +## 联系人信息 + +维护人: + +- [Astrozen](https://github.com/wirano), 邮箱： diff --git a/bsp/gd32/arm/gd32h759i-eval/SConscript b/bsp/gd32/arm/gd32h759i-eval/SConscript new file mode 100644 index 00000000000..c7ef7659ece --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/SConscript @@ -0,0 +1,14 @@ +# for module compiling +import os +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/gd32/arm/gd32h759i-eval/SConstruct b/bsp/gd32/arm/gd32h759i-eval/SConstruct new file mode 100644 index 00000000000..cd112be3d09 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/SConstruct @@ -0,0 +1,74 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +def bsp_pkg_check(): + import subprocess + + check_paths = [ + os.path.join("packages", "gd32-arm-cmsis-latest"), + os.path.join("packages", "gd32-arm-series-latest") + ] + + need_update = not all(os.path.exists(p) for p in check_paths) + + if need_update: + print("\n===============================================================================") + print("Dependency packages missing, please running 'pkgs --update'...") + print("If no packages are fetched, run 'pkgs --upgrade' first, then 'pkgs --update'...") + print("===============================================================================") + exit(1) + +RegisterPreBuildingAction(bsp_pkg_check) + +TARGET = 'rt-thread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM in ['iccarm']: + env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map') + +Export('env') +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +# include libraries +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'gd32_drivers', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/gd32/arm/gd32h759i-eval/applications/SConscript b/bsp/gd32/arm/gd32h759i-eval/applications/SConscript new file mode 100644 index 00000000000..9bb9abae897 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/applications/SConscript @@ -0,0 +1,15 @@ +from building import * +import os + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +list = os.listdir(cwd) +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + group = group + SConscript(os.path.join(item, 'SConscript')) + +Return('group') diff --git a/bsp/gd32/arm/gd32h759i-eval/applications/main.c b/bsp/gd32/arm/gd32h759i-eval/applications/main.c new file mode 100644 index 00000000000..9219b288398 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/applications/main.c @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2006-2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + * 2025-08-20 WangShun change the LED pins + */ + +#include +#include +#include +#include + +/* defined the LED1 pin: PF10 */ +#define LED1_PIN GET_PIN(F, 10) + +int main(void) +{ + int count = 1; + + /* set LED1 pin mode to output */ + rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED1_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED1_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} diff --git a/bsp/gd32/arm/gd32h759i-eval/board/Kconfig b/bsp/gd32/arm/gd32h759i-eval/board/Kconfig new file mode 100644 index 00000000000..54a654ed6eb --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/board/Kconfig @@ -0,0 +1,81 @@ +menu "Hardware Drivers Config" + +config SOC_SERIES_GD32H7xx + bool + default y + +config SOC_GD32H759I + bool + select SOC_SERIES_GD32H7xx + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART0 + bool "Enable UART0" + default y + + config BSP_UART0_RX_USING_DMA + bool "Enable UART0 RX DMA" + depends on BSP_USING_UART0 + select RT_SERIAL_USING_DMA + default n + + config BSP_USING_UART1 + bool "Enable UART1" + default n + + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 + select RT_SERIAL_USING_DMA + default n + + config BSP_USING_UART2 + bool "Enable UART2" + default n + + config BSP_UART2_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 + select RT_SERIAL_USING_DMA + default n + + config BSP_USING_UART3 + bool "Enable UART3" + default n + + config BSP_UART3_RX_USING_DMA + bool "Enable UART3 RX DMA" + depends on BSP_USING_UART3 + select RT_SERIAL_USING_DMA + default n + + endif + + source "$(BSP_DIR)/../libraries/gd32_drivers/Kconfig" + +endmenu + +menu "Board extended module Drivers" + +endmenu + +endmenu + diff --git a/bsp/gd32/arm/gd32h759i-eval/board/SConscript b/bsp/gd32/arm/gd32h759i-eval/board/SConscript new file mode 100644 index 00000000000..0cd2fafee69 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/board/SConscript @@ -0,0 +1,17 @@ +import os +import rtconfig +from building import * + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +''') + +path = [cwd] + +CPPDEFINES = ['GD32H7XX'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') diff --git a/bsp/gd32/arm/gd32h759i-eval/board/board.c b/bsp/gd32/arm/gd32h759i-eval/board/board.c new file mode 100644 index 00000000000..4a863c54791 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/board/board.c @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2006-2025 RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + */ +#include +#include +#include +#include + +/** + * @brief This function is executed in case of error occurrence. + * @param None + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler */ + /* User can add his own implementation to report the HAL error return state */ + while (1) + { + } + /* USER CODE END Error_Handler */ +} + +/** System Clock Configuration +*/ +void SystemClock_Config(void) +{ + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); + NVIC_SetPriority(SysTick_IRQn, 0); +} + +/** + * This is the timer interrupt service routine. + * + */ +void SysTick_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +/** + * This function will initial GD32 board. + */ +void rt_hw_board_init() +{ + /* NVIC Configuration */ +#define NVIC_VTOR_MASK 0x3FFFFF80 +#ifdef VECT_TAB_RAM + /* Set the Vector Table base location at 0x10000000 */ + SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK); +#else /* VECT_TAB_FLASH */ + /* Set the Vector Table base location at 0x08000000 */ + SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK); +#endif + + SystemClock_Config(); + +#ifdef RT_USING_SERIAL + rt_hw_usart_init(); +#endif + +#ifdef RT_USING_HEAP + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif + +#ifdef RT_USING_CONSOLE + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif +} diff --git a/bsp/gd32/arm/gd32h759i-eval/board/board.h b/bsp/gd32/arm/gd32h759i-eval/board/board.h new file mode 100644 index 00000000000..4902e313f09 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/board/board.h @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2006-2025 RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + */ +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include "gd32h7xx.h" +#include "drv_usart.h" +#include "drv_gpio.h" + +#include "gd32h7xx_exti.h" + +#define EXT_SDRAM_BEGIN (0xC0000000U) /* the begining address of external SDRAM */ +#define EXT_SDRAM_END (EXT_SDRAM_BEGIN + (32U * 1024 * 1024)) /* the end address of external SDRAM */ + +/* Internal SRAM memory size[Kbytes] <8-512>*/ +/* Default: 512*/ +#ifdef __ICCARM__ +/* Use *.icf ram symbal, to avoid hardcode.*/ +extern char __ICFEDIT_region_RAM_end__; +#define GD32_SRAM_END &__ICFEDIT_region_RAM_end__ +#else +#define GD32_SRAM_SIZE 512 +#define GD32_SRAM_END (0x24000000 + GD32_SRAM_SIZE * 1024) +#endif + +#ifdef __ARMCC_VERSION +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="HEAP" +#define HEAP_BEGIN (__segment_end("HEAP")) +#else +extern int __bss_end; +#define HEAP_BEGIN (&__bss_end) +#endif + +#define HEAP_END GD32_SRAM_END + +#endif /* __BOARD_H__ */ diff --git a/bsp/gd32/arm/gd32h759i-eval/board/gd32h7xx_libopt.h b/bsp/gd32/arm/gd32h759i-eval/board/gd32h7xx_libopt.h new file mode 100644 index 00000000000..de87fefb987 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/board/gd32h7xx_libopt.h @@ -0,0 +1,89 @@ +/*! + \file gd32h7xx_libopt.h + \brief library optional for gd32h7xx + + \version 2024-01-05, V1.2.0, demo for GD32H7xx +*/ + +/* + Copyright (c) 2024, GigaDevice Semiconductor Inc. + + Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. + 2. Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimer in the documentation + and/or other materials provided with the distribution. + 3. Neither the name of the copyright holder nor the names of its contributors + may be used to endorse or promote products derived from this software without + specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, +INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR +PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY +OF SUCH DAMAGE. +*/ + +#ifndef GD32H7XX_LIBOPT_H +#define GD32H7XX_LIBOPT_H + +#include "gd32h7xx_adc.h" +#include "gd32h7xx_axiim.h" +#include "gd32h7xx_can.h" +#include "gd32h7xx_cau.h" +#include "gd32h7xx_cmp.h" +#include "gd32h7xx_cpdm.h" +#include "gd32h7xx_crc.h" +#include "gd32h7xx_ctc.h" +#include "gd32h7xx_dac.h" +#include "gd32h7xx_dbg.h" +#include "gd32h7xx_dci.h" +#include "gd32h7xx_dma.h" +#include "gd32h7xx_edout.h" +#include "gd32h7xx_efuse.h" +#include "gd32h7xx_enet.h" +#include "gd32h7xx_exmc.h" +#include "gd32h7xx_exti.h" +#include "gd32h7xx_fac.h" +#include "gd32h7xx_fmc.h" +#include "gd32h7xx_fwdgt.h" +#include "gd32h7xx_gpio.h" +#include "gd32h7xx_hau.h" +#include "gd32h7xx_hpdf.h" +#include "gd32h7xx_hwsem.h" +#include "gd32h7xx_i2c.h" +#include "gd32h7xx_ipa.h" +#include "gd32h7xx_lpdts.h" +#include "gd32h7xx_mdio.h" +#include "gd32h7xx_mdma.h" +#include "gd32h7xx_misc.h" +#include "gd32h7xx_ospi.h" +#include "gd32h7xx_ospim.h" +#include "gd32h7xx_pmu.h" +#include "gd32h7xx_rameccmu.h" +#include "gd32h7xx_rcu.h" +#include "gd32h7xx_rspdif.h" +#include "gd32h7xx_rtc.h" +#include "gd32h7xx_rtdec.h" +#include "gd32h7xx_sai.h" +#include "gd32h7xx_sdio.h" +#include "gd32h7xx_spi.h" +#include "gd32h7xx_syscfg.h" +#include "gd32h7xx_timer.h" +#include "gd32h7xx_tli.h" +#include "gd32h7xx_tmu.h" +#include "gd32h7xx_trigsel.h" +#include "gd32h7xx_trng.h" +#include "gd32h7xx_usart.h" +#include "gd32h7xx_vref.h" +#include "gd32h7xx_wwdgt.h" + +#endif /* GD32H7XX_LIBOPT_H */ diff --git a/bsp/gd32/arm/gd32h759i-eval/board/linker_scripts/link.icf b/bsp/gd32/arm/gd32h759i-eval/board/linker_scripts/link.icf new file mode 100644 index 00000000000..0c38c558970 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/board/linker_scripts/link.icf @@ -0,0 +1,40 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2006FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x2000; +define symbol __ICFEDIT_size_heap__ = 0x2000; +/**** End of ICF editor section. ###ICF###*/ + +export symbol __ICFEDIT_region_RAM_end__; + +define symbol __region_RAM1_start__ = 0x10000000; +define symbol __region_RAM1_end__ = 0x1000FFFF; + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; +define region RAM1_region = mem:[from __region_RAM1_start__ to __region_RAM1_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +keep { section FSymTab }; +keep { section VSymTab }; +keep { section .rti_fn* }; +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; +place in RAM1_region { section .sram }; diff --git a/bsp/gd32/arm/gd32h759i-eval/board/linker_scripts/link.ld b/bsp/gd32/arm/gd32h759i-eval/board/linker_scripts/link.ld new file mode 100644 index 00000000000..72d03371d8b --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/board/linker_scripts/link.ld @@ -0,0 +1,169 @@ +/* memory map */ +MEMORY +{ + CODE (rx) : ORIGIN = 0x08000000, LENGTH = 3M + DATA (xrw) : ORIGIN = 0x24000000, LENGTH = 512K + ITCMRAM(xrw) : ORIGIN = 0x00000000, LENGTH = 64K + DTCMRAM(xrw) : ORIGIN = 0x20000000, LENGTH = 64K +} + +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + . = ALIGN(4); + + . = ALIGN(4); + _etext = .; + } > CODE = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > CODE + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >DATA + + .stack : + { + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >DATA + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > DATA + __bss_end = .; + + _end = .; + + _sitcmram = LOADADDR(.itcmram); + + .itcmram : + { + . = ALIGN(4); + _sitcmram = .; /* create a global symbol at itcmram start */ + *(.itcmram) + *(.itcmram*) + + . = ALIGN(4); + _eitcmram = .; /* create a global symbol at itcmram end */ + } >ITCMRAM AT> CODE + + _sdtcmram = LOADADDR(.dtcmram); + + .dtcmram : + { + . = ALIGN(4); + _sdtcmram = .; /* create a global symbol at dtcmram start */ + *(.dtcmram) + *(.dtcmram*) + + . = ALIGN(4); + _edtcmram = .; /* create a global symbol at dtcmram end */ + } >DTCMRAM AT> CODE + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} + + /* input sections */ +GROUP(libgcc.a libc.a libm.a libnosys.a) diff --git a/bsp/gd32/arm/gd32h759i-eval/board/linker_scripts/link.sct b/bsp/gd32/arm/gd32h759i-eval/board/linker_scripts/link.sct new file mode 100644 index 00000000000..56a5b1213b3 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00100000 { ; load region size_region + ER_IROM1 0x08000000 0x00100000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x20000000 0x00070000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/bsp/gd32/arm/gd32h759i-eval/figures/board.png b/bsp/gd32/arm/gd32h759i-eval/figures/board.png new file mode 100644 index 00000000000..e63411804b2 Binary files /dev/null and b/bsp/gd32/arm/gd32h759i-eval/figures/board.png differ diff --git a/bsp/gd32/arm/gd32h759i-eval/project.ewp b/bsp/gd32/arm/gd32h759i-eval/project.ewp new file mode 100644 index 00000000000..09f8d649b2a --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/project.ewp @@ -0,0 +1,2432 @@ + + 3 + + rtthread + + ARM + + 1 + + General + 3 + + 31 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 35 + 1 + 1 + + + + + + + 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$PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscall_close.c + + + $PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscall_lseek.c + + + $PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscall_mem.c + + + $PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscall_open.c + + + $PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscall_read.c + + + $PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscall_remove.c + + + $PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscall_write.c + + + $PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscalls.c + + + + DeviceDrivers + + $PROJ_DIR$\..\..\..\..\components\drivers\core\device.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\completion_comm.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\completion_up.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\condvar.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\dataqueue.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\pipe.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\ringblk_buf.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\ringbuffer.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\waitqueue.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\workqueue.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\pin\dev_pin.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\serial\dev_serial.c + + + + Drivers + + $PROJ_DIR$\board\board.c + + + $PROJ_DIR$\..\libraries\GD32H7xx_Firmware_Library\CMSIS\GD\GD32H7xx\Source\IAR\startup_gd32h7xx.s + + + $PROJ_DIR$\..\libraries\gd32_drivers\drv_gpio.c + + + $PROJ_DIR$\..\libraries\gd32_drivers\drv_usart.c + + + + Filesystem + + $PROJ_DIR$\..\..\..\..\components\dfs\dfs_v1\filesystems\devfs\devfs.c + + + $PROJ_DIR$\..\..\..\..\components\dfs\dfs_v1\src\dfs.c + + + $PROJ_DIR$\..\..\..\..\components\dfs\dfs_v1\src\dfs_file.c + + + $PROJ_DIR$\..\..\..\..\components\dfs\dfs_v1\src\dfs_fs.c + + + $PROJ_DIR$\..\..\..\..\components\dfs\dfs_v1\src\dfs_posix.c + + + + Finsh + + $PROJ_DIR$\..\..\..\..\components\finsh\msh_parse.c + + + $PROJ_DIR$\..\..\..\..\components\finsh\shell.c + + + $PROJ_DIR$\..\..\..\..\components\finsh\msh.c + + + $PROJ_DIR$\..\..\..\..\components\finsh\msh_file.c + + + $PROJ_DIR$\..\..\..\..\components\finsh\cmd.c + + + + Kernel + + $PROJ_DIR$\..\..\..\..\src\clock.c + + + $PROJ_DIR$\..\..\..\..\src\components.c + + + $PROJ_DIR$\..\..\..\..\src\cpu_up.c + + + $PROJ_DIR$\..\..\..\..\src\defunct.c + + + $PROJ_DIR$\..\..\..\..\src\idle.c + + + $PROJ_DIR$\..\..\..\..\src\ipc.c + + + $PROJ_DIR$\..\..\..\..\src\irq.c + + + $PROJ_DIR$\..\..\..\..\src\kservice.c + + + $PROJ_DIR$\..\..\..\..\src\mem.c + + + $PROJ_DIR$\..\..\..\..\src\mempool.c + + + $PROJ_DIR$\..\..\..\..\src\object.c + + + $PROJ_DIR$\..\..\..\..\src\scheduler_comm.c + + + $PROJ_DIR$\..\..\..\..\src\scheduler_up.c + + + $PROJ_DIR$\..\..\..\..\src\thread.c + + + $PROJ_DIR$\..\..\..\..\src\timer.c + + + + klibc + + $PROJ_DIR$\..\..\..\..\src\klibc\kstring.c + + + $PROJ_DIR$\..\..\..\..\src\klibc\rt_vsscanf.c + + + $PROJ_DIR$\..\..\..\..\src\klibc\rt_vsnprintf_tiny.c + + + $PROJ_DIR$\..\..\..\..\src\klibc\kerrno.c + + + $PROJ_DIR$\..\..\..\..\src\klibc\kstdio.c + + + + libcpu + + $PROJ_DIR$\..\..\..\..\libcpu\arm\common\div0.c + + + $PROJ_DIR$\..\..\..\..\libcpu\arm\common\showmem.c + + + $PROJ_DIR$\..\..\..\..\libcpu\arm\cortex-m7\context_iar.S + + + $PROJ_DIR$\..\..\..\..\libcpu\arm\cortex-m7\cpu_cache.c + + + $PROJ_DIR$\..\..\..\..\libcpu\arm\cortex-m7\cpuport.c + + + + Libraries + + $PROJ_DIR$\..\libraries\GD32H7xx_Firmware_Library\GD32H7xx_standard_peripheral\Source\gd32h7xx_misc.c + + + $PROJ_DIR$\..\libraries\GD32H7xx_Firmware_Library\CMSIS\GD\GD32H7xx\Source\system_gd32h7xx.c + + + $PROJ_DIR$\..\libraries\GD32H7xx_Firmware_Library\GD32H7xx_standard_peripheral\Source\gd32h7xx_syscfg.c + + + $PROJ_DIR$\..\libraries\GD32H7xx_Firmware_Library\GD32H7xx_standard_peripheral\Source\gd32h7xx_pmu.c + + + $PROJ_DIR$\..\libraries\GD32H7xx_Firmware_Library\GD32H7xx_standard_peripheral\Source\gd32h7xx_rcu.c + + + $PROJ_DIR$\..\libraries\GD32H7xx_Firmware_Library\GD32H7xx_standard_peripheral\Source\gd32h7xx_gpio.c + + + $PROJ_DIR$\..\libraries\GD32H7xx_Firmware_Library\GD32H7xx_standard_peripheral\Source\gd32h7xx_exti.c + + + $PROJ_DIR$\..\libraries\GD32H7xx_Firmware_Library\GD32H7xx_standard_peripheral\Source\gd32h7xx_usart.c + + + + POSIX + + + utestcases + + diff --git a/bsp/gd32/arm/gd32h759i-eval/project.eww b/bsp/gd32/arm/gd32h759i-eval/project.eww new file mode 100644 index 00000000000..c2cb02eb1e8 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/project.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\project.ewp + + + + + diff --git a/bsp/gd32/arm/gd32h759i-eval/project.uvoptx b/bsp/gd32/arm/gd32h759i-eval/project.uvoptx new file mode 100644 index 00000000000..881a54bdf9e --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/project.uvoptx @@ -0,0 +1,1153 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rtthread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + ARMRTXEVENTFLAGS + -L70 -Z18 -C0 -M0 -T1 + + + 0 + DLGTARM + (1010=-1,-1,-1,-1,0)(6017=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(6016=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0) + + + 0 + ARMDBGFLAGS + + + + 0 + DLGUARM + + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O206 -S0 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(0BD12477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD24000000 -FC2000 -FN1 -FF0GD32H7xx_3840KB.FLM -FS08000000 -FL03C0000 -FP0($$Device:GD32H759IM$Flash\GD32H7xx_3840KB.FLM) + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD24000000 -FC2000 -FN1 -FF0GD32H7xx_3840KB -FS08000000 -FL03C0000 -FP0($$Device:GD32H759IM$Flash\GD32H7xx_3840KB.FLM)) + + + + + 0 + + + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + Applications + 0 + 0 + 0 + 0 + + 1 + 1 + 1 + 0 + 0 + 0 + applications\main.c + main.c + 0 + 0 + + + + + Compiler + 0 + 0 + 0 + 0 + + 2 + 2 + 1 + 0 + 0 + 0 + ..\..\..\..\components\libc\compilers\armlibc\syscall_mem.c + syscall_mem.c + 0 + 0 + + + 2 + 3 + 1 + 0 + 0 + 0 + ..\..\..\..\components\libc\compilers\armlibc\syscalls.c + syscalls.c + 0 + 0 + + + 2 + 4 + 1 + 0 + 0 + 0 + ..\..\..\..\components\libc\compilers\common\cctype.c + cctype.c + 0 + 0 + + + 2 + 5 + 1 + 0 + 0 + 0 + ..\..\..\..\components\libc\compilers\common\cstdlib.c + cstdlib.c + 0 + 0 + + + 2 + 6 + 1 + 0 + 0 + 0 + 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timer.c + 1 + ..\..\..\..\src\timer.c + + + 2 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + __RT_KERNEL_SOURCE__ + + + + + + + + + + + klibc + + + kstdio.c + 1 + ..\..\..\..\src\klibc\kstdio.c + + + rt_vsscanf.c + 1 + ..\..\..\..\src\klibc\rt_vsscanf.c + + + rt_vsnprintf_tiny.c + 1 + ..\..\..\..\src\klibc\rt_vsnprintf_tiny.c + + + kerrno.c + 1 + ..\..\..\..\src\klibc\kerrno.c + + + kstring.c + 1 + ..\..\..\..\src\klibc\kstring.c + + + + + libcpu + + + atomic_arm.c + 1 + ..\..\..\..\libcpu\arm\common\atomic_arm.c + + + div0.c + 1 + ..\..\..\..\libcpu\arm\common\div0.c + + + showmem.c + 1 + ..\..\..\..\libcpu\arm\common\showmem.c + + + context_rvds.S + 2 + ..\..\..\..\libcpu\arm\cortex-m7\context_rvds.S + + + cpu_cache.c + 1 + ..\..\..\..\libcpu\arm\cortex-m7\cpu_cache.c + + + cpuport.c + 1 + ..\..\..\..\libcpu\arm\cortex-m7\cpuport.c + + + + + Libraries + + + startup_gd32h7xx.s + 2 + packages\gd32-arm-cmsis-latest\GD32H7xx\GD\GD32H7xx\Source\ARM\startup_gd32h7xx.s + + + system_gd32h7xx.c + 1 + packages\gd32-arm-cmsis-latest\GD32H7xx\GD\GD32H7xx\Source\system_gd32h7xx.c + + + gd32h7xx_exti.c + 1 + packages\gd32-arm-series-latest\GD32H7xx\GD32H7xx_standard_peripheral\Source\gd32h7xx_exti.c + + + gd32h7xx_gpio.c + 1 + packages\gd32-arm-series-latest\GD32H7xx\GD32H7xx_standard_peripheral\Source\gd32h7xx_gpio.c + + + gd32h7xx_i2c.c + 1 + packages\gd32-arm-series-latest\GD32H7xx\GD32H7xx_standard_peripheral\Source\gd32h7xx_i2c.c + + + gd32h7xx_misc.c + 1 + packages\gd32-arm-series-latest\GD32H7xx\GD32H7xx_standard_peripheral\Source\gd32h7xx_misc.c + + + gd32h7xx_pmu.c + 1 + packages\gd32-arm-series-latest\GD32H7xx\GD32H7xx_standard_peripheral\Source\gd32h7xx_pmu.c + + + gd32h7xx_rcu.c + 1 + packages\gd32-arm-series-latest\GD32H7xx\GD32H7xx_standard_peripheral\Source\gd32h7xx_rcu.c + + + gd32h7xx_syscfg.c + 1 + packages\gd32-arm-series-latest\GD32H7xx\GD32H7xx_standard_peripheral\Source\gd32h7xx_syscfg.c + + + gd32h7xx_usart.c + 1 + packages\gd32-arm-series-latest\GD32H7xx\GD32H7xx_standard_peripheral\Source\gd32h7xx_usart.c + + + + + + + + + + + + + + diff --git a/bsp/gd32/arm/gd32h759i-eval/rtconfig.h b/bsp/gd32/arm/gd32h759i-eval/rtconfig.h new file mode 100644 index 00000000000..c842aa85683 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/rtconfig.h @@ -0,0 +1,433 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* RT-Thread Kernel */ + +/* klibc options */ + +/* rt_vsnprintf options */ + +/* end of rt_vsnprintf options */ + +/* rt_vsscanf options */ + +/* end of rt_vsscanf options */ + +/* rt_memset options */ + +/* end of rt_memset options */ + +/* rt_memcpy options */ + +/* end of rt_memcpy options */ + +/* rt_memmove options */ + +/* end of rt_memmove options */ + +/* rt_memcmp options */ + +/* end of rt_memcmp options */ + +/* rt_strstr options */ + +/* end of rt_strstr options */ + +/* rt_strcasecmp options */ + +/* end of rt_strcasecmp options */ + +/* rt_strncpy options */ + +/* end of rt_strncpy options */ + +/* rt_strcpy options */ + +/* end of rt_strcpy options */ + +/* rt_strncmp options */ + +/* end of rt_strncmp options */ + +/* rt_strcmp options */ + +/* end of rt_strcmp options */ + +/* rt_strlen options */ + +/* end of rt_strlen options */ + +/* rt_strnlen options */ + +/* end of rt_strnlen options */ +/* end of klibc options */ +#define RT_NAME_MAX 8 +#define RT_CPUS_NR 1 +#define RT_ALIGN_SIZE 8 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_HOOK_USING_FUNC_PTR +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_USING_TIMER_SOFT +#define RT_TIMER_THREAD_PRIO 4 +#define RT_TIMER_THREAD_STACK_SIZE 512 + +/* kservice options */ + +/* end of kservice options */ +#define RT_USING_DEBUG +#define RT_DEBUGING_ASSERT +#define RT_DEBUGING_COLOR +#define RT_DEBUGING_CONTEXT + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE +/* end of Inter-Thread communication */ + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_SMALL_MEM_AS_HEAP +#define RT_USING_HEAP +/* end of Memory Management */ +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart0" +#define RT_VER_NUM 0x50201 +#define RT_BACKTRACE_LEVEL_MAX_NR 32 +/* end of RT-Thread Kernel */ +#define RT_USING_CACHE +#define RT_USING_HW_ATOMIC +#define RT_USING_CPU_FFS +#define ARCH_ARM +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M7 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 +#define RT_USING_MSH +#define RT_USING_FINSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 +#define FINSH_USING_OPTION_COMPLETION + +/* DFS: device virtual file system */ + +#define RT_USING_DFS +#define DFS_USING_POSIX +#define DFS_USING_WORKDIR +#define DFS_FD_MAX 16 +#define RT_USING_DFS_V1 +#define DFS_FILESYSTEMS_MAX 4 +#define DFS_FILESYSTEM_TYPES_MAX 4 +#define RT_USING_DFS_DEVFS +/* end of DFS: device virtual file system */ + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_UNAMED_PIPE_NUMBER 64 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_I2C +#define RT_USING_I2C_BITOPS +#define RT_USING_PIN +/* end of Device Drivers */ + +/* C/C++ and POSIX layer */ + +/* ISO-ANSI C layer */ + +/* Timezone and Daylight Saving Time */ + +#define RT_LIBC_USING_LIGHT_TZ_DST +#define RT_LIBC_TZ_DEFAULT_HOUR 8 +#define RT_LIBC_TZ_DEFAULT_MIN 0 +#define RT_LIBC_TZ_DEFAULT_SEC 0 +/* end of Timezone and Daylight Saving Time */ +/* end of ISO-ANSI C layer */ + +/* POSIX (Portable Operating System Interface) layer */ + + +/* Interprocess Communication (IPC) */ + + +/* Socket is in the 'Network' category */ + +/* end of Interprocess Communication (IPC) */ +/* end of POSIX (Portable Operating System Interface) layer */ +/* end of C/C++ and POSIX layer */ + +/* Network */ + +/* end of Network */ + +/* Memory protection */ + +/* end of Memory protection */ + +/* Utilities */ + +/* end of Utilities */ + +/* Using USB legacy version */ + +/* end of Using USB legacy version */ +/* end of RT-Thread Components */ + +/* RT-Thread Utestcases */ + +/* end of RT-Thread Utestcases */ + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + +/* end of Marvell WiFi */ + +/* Wiced WiFi */ + +/* end of Wiced WiFi */ + +/* CYW43012 WiFi */ + +/* end of CYW43012 WiFi */ + +/* BL808 WiFi */ + +/* end of BL808 WiFi */ + +/* CYW43439 WiFi */ + +/* end of CYW43439 WiFi */ +/* end of Wi-Fi */ + +/* IoT Cloud */ + +/* end of IoT Cloud */ +/* end of IoT - internet of things */ + +/* security packages */ + +/* end of security packages */ + +/* language packages */ + +/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ + +/* end of JSON: JavaScript Object Notation, a lightweight data-interchange format */ + +/* XML: Extensible Markup Language */ + +/* end of XML: Extensible Markup Language */ +/* end of language packages */ + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + +/* end of LVGL: powerful and easy-to-use embedded GUI library */ + +/* u8g2: a monochrome graphic library */ + +/* end of u8g2: a monochrome graphic library */ +/* end of multimedia packages */ + +/* tools packages */ + +/* end of tools packages */ + +/* system packages */ + +/* enhanced kernel services */ + +/* end of enhanced kernel services */ + +/* acceleration: Assembly language or algorithmic acceleration packages */ + +/* end of acceleration: Assembly language or algorithmic acceleration packages */ + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + +/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + +/* Micrium: Micrium software products porting for RT-Thread */ + +/* end of Micrium: Micrium software products porting for RT-Thread */ +/* end of system packages */ + +/* peripheral libraries and drivers */ + +/* HAL & SDK Drivers */ + +/* STM32 HAL & SDK Drivers */ + +/* end of STM32 HAL & SDK Drivers */ + +/* Infineon HAL Packages */ + +/* end of Infineon HAL Packages */ + +/* Kendryte SDK */ + +/* end of Kendryte SDK */ + +/* WCH HAL & SDK Drivers */ + +/* end of WCH HAL & SDK Drivers */ + +/* AT32 HAL & SDK Drivers */ + +/* end of AT32 HAL & SDK Drivers */ + +/* HC32 DDL Drivers */ + +/* end of HC32 DDL Drivers */ + +/* NXP HAL & SDK Drivers */ + +/* end of NXP HAL & SDK Drivers */ + +/* NUVOTON Drivers */ + +/* end of NUVOTON Drivers */ + +/* GD32 Drivers */ + +#define PKG_USING_GD32_ARM_CMSIS_DRIVER +#define PKG_USING_GD32_ARM_CMSIS_DRIVER_LATEST_VERSION +#define PKG_USING_GD32_ARM_SERIES_DRIVER +#define PKG_USING_GD32_ARM_SERIES_DRIVER_LATEST_VERSION +/* end of GD32 Drivers */ +/* end of HAL & SDK Drivers */ + +/* sensors drivers */ + +/* end of sensors drivers */ + +/* touch drivers */ + +/* end of touch drivers */ +/* end of peripheral libraries and drivers */ + +/* AI packages */ + +/* end of AI packages */ + +/* Signal Processing and Control Algorithm Packages */ + +/* end of Signal Processing and Control Algorithm Packages */ + +/* miscellaneous packages */ + +/* project laboratory */ + +/* end of project laboratory */ + +/* samples: kernel and components samples */ + +/* end of samples: kernel and components samples */ + +/* entertainment: terminal games and other interesting software packages */ + +/* end of entertainment: terminal games and other interesting software packages */ +/* end of miscellaneous packages */ + +/* Arduino libraries */ + + +/* Projects and Demos */ + +/* end of Projects and Demos */ + +/* Sensors */ + +/* end of Sensors */ + +/* Display */ + +/* end of Display */ + +/* Timing */ + +/* end of Timing */ + +/* Data Processing */ + +/* end of Data Processing */ + +/* Data Storage */ + +/* Communication */ + +/* end of Communication */ + +/* Device Control */ + +/* end of Device Control */ + +/* Other */ + +/* end of Other */ + +/* Signal IO */ + +/* end of Signal IO */ + +/* Uncategorized */ + +/* end of Arduino libraries */ +/* end of RT-Thread online packages */ +#define SOC_FAMILY_GD32 +#define SOC_SERIES_GD32H7xx + +/* Hardware Drivers Config */ + +#define SOC_GD32H759I + +/* Onboard Peripheral Drivers */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART0 +/* end of On-chip Peripheral Drivers */ + +/* Board extended module Drivers */ + +/* end of Hardware Drivers Config */ + +#endif diff --git a/bsp/gd32/arm/gd32h759i-eval/rtconfig.py b/bsp/gd32/arm/gd32h759i-eval/rtconfig.py new file mode 100644 index 00000000000..5df9eca7e60 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/rtconfig.py @@ -0,0 +1,151 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m7' +CROSS_TOOL='gcc' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'/usr/bin' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armcc' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iccarm' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.3' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.ld' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armcc': + # toolchains + CC = 'armcc' + CXX = 'armcc' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M7.fp.sp' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + CFLAGS += ' -std=c99' + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iccarm': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M7' + CFLAGS += ' -e' + CFLAGS += ' --fpu=VFPv5_sp' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M7' + AFLAGS += ' --fpu VFPv5_sp' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/gd32/arm/gd32h759i-eval/template.ewp b/bsp/gd32/arm/gd32h759i-eval/template.ewp new file mode 100644 index 00000000000..bc0b523beb4 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/template.ewp @@ -0,0 +1,2106 @@ + + + 3 + + rtthread + + ARM + + 1 + + General + 3 + + 31 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 35 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 23 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 31 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 35 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 10 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 23 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + diff --git a/bsp/gd32/arm/gd32h759i-eval/template.eww b/bsp/gd32/arm/gd32h759i-eval/template.eww new file mode 100644 index 00000000000..bd036bb4c98 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/template.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\template.ewp + + + + + diff --git a/bsp/gd32/arm/gd32h759i-eval/template.uvoptx b/bsp/gd32/arm/gd32h759i-eval/template.uvoptx new file mode 100644 index 00000000000..5bd57320858 --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/template.uvoptx @@ -0,0 +1,180 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rtthread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\keil\List\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 0 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 -FD24000000 -FC2000 -FN1 -FF0GD32H7xx_3840KB -FS08000000 -FL03C0000 -FP0($$Device:GD32H759IM$Flash\GD32H7xx_3840KB.FLM)) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + Source Group 1 + 0 + 0 + 0 + 0 + + + diff --git a/bsp/gd32/arm/gd32h759i-eval/template.uvprojx b/bsp/gd32/arm/gd32h759i-eval/template.uvprojx new file mode 100644 index 00000000000..2457ac2921a --- /dev/null +++ b/bsp/gd32/arm/gd32h759i-eval/template.uvprojx @@ -0,0 +1,397 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
+ + + + rtthread + 0x4 + ARM-ADS + 5060750::V5.06 update 6 (build 750)::ARMCC + 0 + + + GD32H759IM + GigaDevice + GigaDevice.GD32H7xx_DFP.1.4.0 + https://gd32mcu.com + IRAM(0x24000000,0x000D0000) IRAM2(0x00000000,0x00010000) IROM(0x08000000,0x03C0000) XRAM(0x20000000,0x00020000) XRAM2(0x30000000,0x00004000) XRAM3(0x30004000,0x00004000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD24000000 -FC2000 -FN1 -FF0GD32H7xx_3840KB -FS08000000 -FL03C0000 -FP0($$Device:GD32H759IM$Flash\GD32H7xx_3840KB.FLM)) + 0 + $$Device:GD32H759IM$Device\Include\gd32h7xx.h + + + + + + + + + + $$Device:GD32H759IM$SVD\GD32H7xx.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\build\keil\Obj\ + rt-thread + 1 + 0 + 0 + 1 + 1 + .\build\keil\List\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 1 + 0 + fromelf --bin !L --output rtthread.bin + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 1 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM7 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M7" + + 0 + 0 + 0 + 1 + 1 + 1 + 0 + 3 + 0 + 0 + 0 + 1 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x24000000 + 0xd0000 + + + 1 + 0x8000000 + 0x3c0000 + + + 1 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x3c0000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x30000000 + 0x4000 + + + 0 + 0x30004000 + 0x4000 + + + 0 + 0x24000000 + 0xd0000 + + + 0 + 0x0 + 0x10000 + + + + + + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 2 + 0 + 0 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 0 + + + + + + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 0 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\board\linker_scripts\link.sct + + + + + + + + + + + Source Group 1 + + + + + + + + + + + + diff --git a/bsp/gd32/arm/gd32h759i-start/.config b/bsp/gd32/arm/gd32h759i-start/.config index 71f4c3c2839..c86e3bbe190 100644 --- a/bsp/gd32/arm/gd32h759i-start/.config +++ b/bsp/gd32/arm/gd32h759i-start/.config @@ -211,6 +211,7 @@ CONFIG_FINSH_THREAD_PRIORITY=20 CONFIG_FINSH_THREAD_STACK_SIZE=4096 CONFIG_FINSH_USING_HISTORY=y CONFIG_FINSH_HISTORY_LINES=5 +# CONFIG_FINSH_USING_WORD_OPERATION is not set CONFIG_FINSH_USING_SYMTAB=y CONFIG_FINSH_CMD_SIZE=80 CONFIG_MSH_USING_BUILT_IN_COMMANDS=y @@ -254,7 +255,7 @@ CONFIG_RT_UNAMED_PIPE_NUMBER=64 CONFIG_RT_USING_SERIAL=y CONFIG_RT_USING_SERIAL_V1=y # CONFIG_RT_USING_SERIAL_V2 is not set -CONFIG_RT_SERIAL_USING_DMA=y +# CONFIG_RT_SERIAL_USING_DMA is not set CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_SERIAL_BYPASS is not set # CONFIG_RT_USING_CAN is not set @@ -402,6 +403,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_FREEMODBUS is not set # CONFIG_PKG_USING_NANOPB is not set # CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set +# CONFIG_PKG_USING_ESP_HOSTED is not set # # Wi-Fi @@ -646,6 +648,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_ZDEBUG is not set # CONFIG_PKG_USING_RVBACKTRACE is not set # CONFIG_PKG_USING_HPATCHLITE is not set +# CONFIG_PKG_USING_THREAD_METRIC is not set # end of tools packages # @@ -821,6 +824,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_NRF5X_SDK is not set # CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_RASPBERRYPI_PICO_RP2350_SDK is not set # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set # CONFIG_PKG_USING_MM32 is not set @@ -863,6 +867,8 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # HC32 DDL Drivers # +# CONFIG_PKG_USING_HC32F3_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_HC32F3_SERIES_DRIVER is not set # CONFIG_PKG_USING_HC32F4_CMSIS_DRIVER is not set # CONFIG_PKG_USING_HC32F4_SERIES_DRIVER is not set # end of HC32 DDL Drivers @@ -1070,6 +1076,7 @@ CONFIG_PKG_GD32_ARM_SERIES_DRIVER_VER="latest" # CONFIG_PKG_USING_SEAN_WS2812B is not set # CONFIG_PKG_USING_IC74HC165 is not set # CONFIG_PKG_USING_IST8310 is not set +# CONFIG_PKG_USING_ST7789_SPI is not set # CONFIG_PKG_USING_SPI_TOOLS is not set # end of peripheral libraries and drivers diff --git a/bsp/gd32/arm/gd32h759i-start/project.uvoptx b/bsp/gd32/arm/gd32h759i-start/project.uvoptx index 537bb4f7702..7872a5ef66a 100644 --- a/bsp/gd32/arm/gd32h759i-start/project.uvoptx +++ b/bsp/gd32/arm/gd32h759i-start/project.uvoptx @@ -28,7 +28,7 @@ 12000000 - 0 + 1 1 0 1 @@ -73,11 +73,11 @@ 0 - 0 + 1 0 1 - 18 + 255 0 1 @@ -103,7 +103,7 @@ 1 0 0 - 0 + 3 @@ -114,13 +114,13 @@ - BIN\UL2CM3.DLL + BIN\CMSIS_AGDI.dll 0 UL2CM3 - UL2CM3(-S0 -C0 -P0 -FD20000000 -FC8000 -FN1 -FF0STM32H7x_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32H743IITx$CMSIS\Flash\STM32H7x_2048.FLM)) + UL2CM3(-S0 -C0 -P0 -FD24000000 -FC2000 -FN1 -FF0GD32H7xx_3840KB -FS08000000 -FL03C0000 -FP0($$Device:GD32H759IM$Flash\GD32H7xx_3840KB.FLM)) @@ -166,13 +166,6 @@ - - 1 - 1 - 0 - 2 - 400000000 - @@ -577,8 +570,8 @@ 0 0 0 - ..\..\..\..\components\finsh\shell.c - shell.c + ..\..\..\..\components\finsh\msh.c + msh.c 0 0 @@ -589,8 +582,8 @@ 0 0 0 - ..\..\..\..\components\finsh\msh_file.c - msh_file.c + ..\..\..\..\components\finsh\msh_parse.c + msh_parse.c 0 0 @@ -601,8 +594,8 @@ 0 0 0 - ..\..\..\..\components\finsh\msh.c - msh.c + ..\..\..\..\components\finsh\cmd.c + cmd.c 0 0 @@ -613,8 +606,8 @@ 0 0 0 - ..\..\..\..\components\finsh\msh_parse.c - msh_parse.c + ..\..\..\..\components\finsh\msh_file.c + msh_file.c 0 0 @@ -625,8 +618,8 @@ 0 0 0 - ..\..\..\..\components\finsh\cmd.c - cmd.c + ..\..\..\..\components\finsh\shell.c + shell.c 0 0 @@ -833,8 +826,8 @@ 0 0 0 - ..\..\..\..\src\klibc\rt_vsscanf.c - rt_vsscanf.c + ..\..\..\..\src\klibc\rt_vsnprintf_tiny.c + rt_vsnprintf_tiny.c 0 0 @@ -845,8 +838,8 @@ 0 0 0 - ..\..\..\..\src\klibc\kerrno.c - kerrno.c + ..\..\..\..\src\klibc\kstring.c + kstring.c 0 0 @@ -857,8 +850,8 @@ 0 0 0 - ..\..\..\..\src\klibc\rt_vsnprintf_tiny.c - rt_vsnprintf_tiny.c + ..\..\..\..\src\klibc\kstdio.c + kstdio.c 0 0 @@ -869,8 +862,8 @@ 0 0 0 - ..\..\..\..\src\klibc\kstdio.c - kstdio.c + ..\..\..\..\src\klibc\kerrno.c + kerrno.c 0 0 @@ -881,8 +874,8 @@ 0 0 0 - ..\..\..\..\src\klibc\kstring.c - kstring.c + ..\..\..\..\src\klibc\rt_vsscanf.c + rt_vsscanf.c 0 0 diff --git a/bsp/gd32/arm/gd32h759i-start/project.uvprojx b/bsp/gd32/arm/gd32h759i-start/project.uvprojx index e830f0b55f5..249d7ae5a27 100644 --- a/bsp/gd32/arm/gd32h759i-start/project.uvprojx +++ b/bsp/gd32/arm/gd32h759i-start/project.uvprojx @@ -10,20 +10,20 @@ rtthread 0x4 ARM-ADS - 5060960::V5.06 update 7 (build 960)::.\ARMCC + 5060750::V5.06 update 6 (build 750)::ARMCC 0 - STM32H743IITx - STMicroelectronics - Keil.STM32H7xx_DFP.4.0.0 - https://www.keil.com/pack/ - IRAM(0x20000000,0x00020000) IRAM2(0x24000000,0x00080000) IROM(0x08000000,0x00200000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE + GD32H759IM + GigaDevice + GigaDevice.GD32H7xx_DFP.1.4.0 + https://gd32mcu.com + IRAM(0x24000000,0x000D0000) IRAM2(0x00000000,0x00010000) IROM(0x08000000,0x03C0000) XRAM(0x20000000,0x00020000) XRAM2(0x30000000,0x00004000) XRAM3(0x30004000,0x00004000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE - UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32H7x_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32H743IITx$CMSIS\Flash\STM32H7x_2048.FLM)) + UL2CM3(-S0 -C0 -P0 -FD24000000 -FC2000 -FN1 -FF0GD32H7xx_3840KB -FS08000000 -FL03C0000 -FP0($$Device:GD32H759IM$Flash\GD32H7xx_3840KB.FLM)) 0 - $$Device:STM32H743IITx$Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h7xx.h + $$Device:GD32H759IM$Device\Include\gd32h7xx.h @@ -33,7 +33,7 @@ - $$Device:STM32H743IITx$CMSIS\SVD\STM32H7x3.svd + $$Device:GD32H759IM$SVD\GD32H7xx.svd 0 0 @@ -181,7 +181,7 @@ 0 1 1 - 0 + 1 0 3 0 @@ -246,18 +246,18 @@ 0 - 0x20000000 - 0x20000 + 0x24000000 + 0xd0000 1 0x8000000 - 0x200000 + 0x3c0000 - 0 - 0x0 - 0x0 + 1 + 0x20000000 + 0x20000 1 @@ -277,7 +277,7 @@ 1 0x8000000 - 0x200000 + 0x3c0000 1 @@ -286,28 +286,28 @@ 0 - 0x0 - 0x0 + 0x20000000 + 0x20000 0 - 0x0 - 0x0 + 0x30000000 + 0x4000 0 - 0x0 - 0x0 + 0x30004000 + 0x4000 0 - 0x20000000 - 0x20000 + 0x24000000 + 0xd0000 0 - 0x24000000 - 0x80000 + 0x0 + 0x10000 @@ -338,9 +338,9 @@ 0 - USE_STDPERIPH_DRIVER, GD32H7XX, RT_USING_ARMLIBC, __STDC_LIMIT_MACROS, __CLK_TCK=RT_TICK_PER_SECOND, RT_USING_LIBC, __RTTHREAD__ + __RTTHREAD__, RT_USING_LIBC, __STDC_LIMIT_MACROS, GD32H7XX, __CLK_TCK=RT_TICK_PER_SECOND, USE_STDPERIPH_DRIVER, RT_USING_ARMLIBC - ..\..\..\..\components\drivers\include;..\..\..\..\components\finsh;.;..\..\..\..\libcpu\arm\cortex-m7;..\..\..\..\components\dfs\dfs_v1\filesystems\devfs;..\..\..\..\components\libc\compilers\common\include;..\..\..\..\components\drivers\include;packages\gd32-arm-cmsis-latest\GD32H7xx;packages\gd32-arm-series-latest\GD32H7xx\GD32H7xx_standard_peripheral\Include;..\..\..\..\components\drivers\include;..\..\..\..\libcpu\arm\common;..\..\..\..\include;..\..\..\..\components\libc\posix\io\poll;..\..\..\..\components\drivers\phy;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\posix\io\epoll;applications;..\..\..\..\components\libc\posix\ipc;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\..\components\libc\compilers\common\extension;packages\gd32-arm-cmsis-latest\GD32H7xx\GD\GD32H7xx\Include;..\..\..\..\components\libc\posix\io\eventfd;board;..\..\..\..\components\dfs\dfs_v1\include;..\..\..\..\components\drivers\smp_call;..\libraries\gd32_drivers + packages\gd32-arm-series-latest\GD32H7xx\GD32H7xx_standard_peripheral\Include;..\..\..\..\components\drivers\include;..\..\..\..\components\drivers\include;..\..\..\..\components\dfs\dfs_v1\include;..\..\..\..\include;applications;..\..\..\..\components\drivers\include;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\posix\io\poll;..\..\..\..\components\libc\compilers\common\extension;..\..\..\..\components\libc\posix\io\eventfd;..\..\..\..\components\dfs\dfs_v1\filesystems\devfs;..\..\..\..\components\finsh;..\libraries\gd32_drivers;..\..\..\..\libcpu\arm\common;..\..\..\..\components\libc\posix\io\epoll;..\..\..\..\components\drivers\phy;..\..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\..\components\libc\compilers\common\include;.;..\..\..\..\components\drivers\smp_call;packages\gd32-arm-cmsis-latest\GD32H7xx;packages\gd32-arm-cmsis-latest\GD32H7xx\GD\GD32H7xx\Include;..\..\..\..\libcpu\arm\cortex-m7;..\..\..\..\components\libc\posix\ipc;board;..\..\..\..\components\drivers\include @@ -489,7 +489,7 @@ __RT_IPC_SOURCE__ - + @@ -545,7 +545,7 @@ __RT_IPC_SOURCE__ - + @@ -601,7 +601,7 @@ __RT_IPC_SOURCE__ - + @@ -657,7 +657,7 @@ __RT_IPC_SOURCE__ - + @@ -713,7 +713,7 @@ __RT_IPC_SOURCE__ - + @@ -769,7 +769,7 @@ __RT_IPC_SOURCE__ - + @@ -825,7 +825,7 @@ __RT_IPC_SOURCE__ - + @@ -881,7 +881,7 @@ __RT_IPC_SOURCE__ - + @@ -937,7 +937,7 @@ __RT_IPC_SOURCE__ - + @@ -993,7 +993,7 @@ __RT_IPC_SOURCE__ - + @@ -1049,7 +1049,7 @@ __RT_IPC_SOURCE__ - + @@ -1105,7 +1105,7 @@ __RT_IPC_SOURCE__ - + @@ -1186,7 +1186,7 @@ --c99 - + @@ -1242,7 +1242,7 @@ --c99 - + @@ -1298,7 +1298,7 @@ --c99 - + @@ -1354,7 +1354,7 @@ --c99 - + @@ -1410,7 +1410,7 @@ --c99 - + @@ -1421,16 +1421,6 @@ Finsh - - shell.c - 1 - ..\..\..\..\components\finsh\shell.c - - - msh_file.c - 1 - ..\..\..\..\components\finsh\msh_file.c - msh.c 1 @@ -1446,6 +1436,16 @@ 1 ..\..\..\..\components\finsh\cmd.c + + msh_file.c + 1 + ..\..\..\..\components\finsh\msh_file.c + + + shell.c + 1 + ..\..\..\..\components\finsh\shell.c + @@ -1501,7 +1501,7 @@ __RT_KERNEL_SOURCE__ - + @@ -1557,7 +1557,7 @@ __RT_KERNEL_SOURCE__ - + @@ -1613,7 +1613,7 @@ __RT_KERNEL_SOURCE__ - + @@ -1669,7 +1669,7 @@ __RT_KERNEL_SOURCE__ - + @@ -1725,7 +1725,7 @@ __RT_KERNEL_SOURCE__ - + @@ -1781,7 +1781,7 @@ __RT_KERNEL_SOURCE__ - + @@ -1837,7 +1837,7 @@ __RT_KERNEL_SOURCE__ - + @@ -1893,7 +1893,7 @@ __RT_KERNEL_SOURCE__ - + @@ -1949,7 +1949,7 @@ __RT_KERNEL_SOURCE__ - + @@ -2005,7 +2005,7 @@ __RT_KERNEL_SOURCE__ - + @@ -2061,7 +2061,7 @@ __RT_KERNEL_SOURCE__ - + @@ -2117,7 +2117,7 @@ __RT_KERNEL_SOURCE__ - + @@ -2173,7 +2173,7 @@ __RT_KERNEL_SOURCE__ - + @@ -2229,7 +2229,7 @@ __RT_KERNEL_SOURCE__ - + @@ -2285,7 +2285,7 @@ __RT_KERNEL_SOURCE__ - + @@ -2297,29 +2297,29 @@ klibc - rt_vsscanf.c + rt_vsnprintf_tiny.c 1 - ..\..\..\..\src\klibc\rt_vsscanf.c + ..\..\..\..\src\klibc\rt_vsnprintf_tiny.c - kerrno.c + kstring.c 1 - ..\..\..\..\src\klibc\kerrno.c + ..\..\..\..\src\klibc\kstring.c - rt_vsnprintf_tiny.c + kstdio.c 1 - ..\..\..\..\src\klibc\rt_vsnprintf_tiny.c + ..\..\..\..\src\klibc\kstdio.c - kstdio.c + kerrno.c 1 - ..\..\..\..\src\klibc\kstdio.c + ..\..\..\..\src\klibc\kerrno.c - kstring.c + rt_vsscanf.c 1 - ..\..\..\..\src\klibc\kstring.c + ..\..\..\..\src\klibc\rt_vsscanf.c diff --git a/bsp/gd32/arm/gd32h759i-start/rtconfig.h b/bsp/gd32/arm/gd32h759i-start/rtconfig.h index afc98e2737d..3bac79c342d 100644 --- a/bsp/gd32/arm/gd32h759i-start/rtconfig.h +++ b/bsp/gd32/arm/gd32h759i-start/rtconfig.h @@ -154,7 +154,6 @@ #define RT_UNAMED_PIPE_NUMBER 64 #define RT_USING_SERIAL #define RT_USING_SERIAL_V1 -#define RT_SERIAL_USING_DMA #define RT_SERIAL_RB_BUFSZ 64 #define RT_USING_PIN /* end of Device Drivers */ diff --git a/bsp/gd32/arm/libraries/gd32_drivers/drv_usart.c b/bsp/gd32/arm/libraries/gd32_drivers/drv_usart.c index 8bd47b967c0..3ac6565469e 100644 --- a/bsp/gd32/arm/libraries/gd32_drivers/drv_usart.c +++ b/bsp/gd32/arm/libraries/gd32_drivers/drv_usart.c @@ -22,11 +22,67 @@ #include +#ifdef RT_SERIAL_USING_DMA +static void gd32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag); +static void gd32_dma_tx_config(struct rt_serial_device *serial, rt_ubase_t flag); +static void dma_rx_done_isr(struct rt_serial_device *serial); + +extern void Error_Handler(void); +#endif + static void GD32_UART_IRQHandler(struct rt_serial_device *serial); #if defined(BSP_USING_UART0) struct rt_serial_device serial0; +#if defined(RT_SERIAL_USING_DMA) +gd32_uart_dma uart0_rxdma = { + DMA0, + DMA_CH0, +#ifdef SOC_SERIES_GD32H7xx + DMA_REQUEST_USART0_RX, +#endif + DMA_INTF_FTFIF, + DMA0_Channel0_IRQn, + 0, +}; +gd32_uart_dma uart0_txdma = { + DMA1, + DMA_CH0, +#ifdef SOC_SERIES_GD32H7xx + DMA_REQUEST_USART0_TX, +#endif + DMA_INTF_FTFIF, + DMA1_Channel0_IRQn, + 0, +}; + +void DMA0_Channel0_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + dma_rx_done_isr(&serial0); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +void DMA1_Channel0_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + dma_flag_clear(DMA1, DMA_CH0, DMA_FLAG_FTF); + dma_flag_clear(DMA1, DMA_CH0, DMA_FLAG_HTF); + dma_flag_clear(DMA1, DMA_CH0, DMA_FLAG_FEE); + dma_flag_clear(DMA1, DMA_CH0, DMA_FLAG_TAE); + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_SERIAL_USING_DMA */ + void USART0_IRQHandler(void) { /* enter interrupt */ @@ -43,6 +99,30 @@ void USART0_IRQHandler(void) #if defined(BSP_USING_UART1) struct rt_serial_device serial1; +#if defined(RT_SERIAL_USING_DMA) +gd32_uart_dma uart1_rxdma = { + DMA0, + DMA_CH1, +#ifdef SOC_SERIES_GD32H7xx + DMA_REQUEST_USART1_RX, +#endif + DMA_INTF_FTFIF, + DMA0_Channel1_IRQn, + 0, +}; + +void DMA0_Channel1_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + dma_rx_done_isr(&serial1); + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_SERIAL_USING_DMA */ + void USART1_IRQHandler(void) { /* enter interrupt */ @@ -59,6 +139,54 @@ void USART1_IRQHandler(void) #if defined(BSP_USING_UART2) struct rt_serial_device serial2; +#if defined(RT_SERIAL_USING_DMA) +gd32_uart_dma uart2_rxdma = { + DMA0, + DMA_CH2, +#ifdef SOC_SERIES_GD32H7xx + DMA_REQUEST_USART2_RX, +#endif + DMA_INTF_FTFIF, + DMA0_Channel2_IRQn, + 0, +}; +gd32_uart_dma uart2_txdma = { + DMA1, + DMA_CH2, +#ifdef SOC_SERIES_GD32H7xx + DMA_REQUEST_USART2_TX, +#endif + DMA_INTF_FTFIF, + DMA1_Channel2_IRQn, + 0, +}; + +void DMA0_Channel2_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + dma_rx_done_isr(&serial2); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +void DMA1_Channel2_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + dma_flag_clear(DMA1, DMA_CH2, DMA_FLAG_FTF); + dma_flag_clear(DMA1, DMA_CH2, DMA_FLAG_HTF); + dma_flag_clear(DMA1, DMA_CH2, DMA_FLAG_FEE); + dma_flag_clear(DMA1, DMA_CH2, DMA_FLAG_TAE); + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_SERIAL_USING_DMA */ + void USART2_IRQHandler(void) { /* enter interrupt */ @@ -75,6 +203,30 @@ void USART2_IRQHandler(void) #if defined(BSP_USING_UART3) struct rt_serial_device serial3; +#if defined(RT_SERIAL_USING_DMA) +gd32_uart_dma uart3_rxdma = { + DMA0, + DMA_CH3, +#ifdef SOC_SERIES_GD32H7xx + DMA_REQUEST_UART3_RX, +#endif + DMA_INTF_FTFIF, + DMA0_Channel3_IRQn, + 0, +}; + +void DMA0_Channel3_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + dma_rx_done_isr(&serial3); + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_SERIAL_USING_DMA */ + void UART3_IRQHandler(void) { /* enter interrupt */ @@ -91,6 +243,30 @@ void UART3_IRQHandler(void) #if defined(BSP_USING_UART4) struct rt_serial_device serial4; +#if defined(RT_SERIAL_USING_DMA) +gd32_uart_dma uart4_rxdma = { + DMA0, + DMA_CH4, +#ifdef SOC_SERIES_GD32H7xx + DMA_REQUEST_UART4_RX, +#endif + DMA_INTF_FTFIF, + DMA0_Channel4_IRQn, + 0, +}; + +void DMA0_Channel4_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + dma_rx_done_isr(&serial4); + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_SERIAL_USING_DMA */ + void UART4_IRQHandler(void) { /* enter interrupt */ @@ -106,6 +282,30 @@ void UART4_IRQHandler(void) #if defined(BSP_USING_UART5) struct rt_serial_device serial5; +#if defined(RT_SERIAL_USING_DMA) +gd32_uart_dma uart5_rxdma = { + DMA0, + DMA_CH5, +#ifdef SOC_SERIES_GD32H7xx + DMA_REQUEST_USART5_RX, +#endif + DMA_INTF_FTFIF, + DMA0_Channel5_IRQn, + 0, +}; + +void DMA0_Channel5_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + dma_rx_done_isr(&serial5); + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_SERIAL_USING_DMA */ + void USART5_IRQHandler(void) { /* enter interrupt */ @@ -122,6 +322,30 @@ void USART5_IRQHandler(void) #if defined(BSP_USING_UART6) struct rt_serial_device serial6; +#if defined(RT_SERIAL_USING_DMA) +gd32_uart_dma uart6_rxdma = { + DMA0, + DMA_CH6, +#ifdef SOC_SERIES_GD32H7xx + DMA_REQUEST_UART6_RX, +#endif + DMA_INTF_FTFIF, + DMA0_Channel6_IRQn, + 0, +}; + +void DMA0_Channel6_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + dma_rx_done_isr(&serial6); + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_SERIAL_USING_DMA */ + void UART6_IRQHandler(void) { /* enter interrupt */ @@ -138,6 +362,30 @@ void UART6_IRQHandler(void) #if defined(BSP_USING_UART7) struct rt_serial_device serial7; +#if defined(RT_SERIAL_USING_DMA) +gd32_uart_dma uart7_rxdma = { + DMA0, + DMA_CH7, +#ifdef SOC_SERIES_GD32H7xx + DMA_REQUEST_UART7_RX, +#endif + DMA_INTF_FTFIF, + DMA0_Channel7_IRQn, + 0, +}; + +void DMA0_Channel7_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + dma_rx_done_isr(&serial7); + + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif /* RT_SERIAL_USING_DMA */ + void UART7_IRQHandler(void) { /* enter interrupt */ @@ -157,15 +405,10 @@ static const struct gd32_uart uart_obj[] = { USART0, /* uart peripheral index */ USART0_IRQn, /* uart iqrn */ RCU_USART0, /* uart periph clock */ -#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx +#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx || defined SOC_SERIES_GD32H7xx RCU_GPIOA, RCU_GPIOA, /* tx gpio clock, rx gpio clock */ GPIOA, GPIO_AF_7, GPIO_PIN_9, /* tx port, tx alternate, tx pin */ GPIOA, GPIO_AF_7, GPIO_PIN_10, /* rx port, rx alternate, rx pin */ -#elif defined SOC_SERIES_GD32H7xx - RCU_GPIOF, /* periph clock, tx gpio clock */ - RCU_GPIOF, /* periph clock, rx gpio clock */ - GPIOF, GPIO_AF_4, GPIO_PIN_4, /* tx port, tx alternate, tx pin */ - GPIOF, GPIO_AF_4, GPIO_PIN_5, /* rx port, rx alternate, rx pin */ #elif defined SOC_SERIES_GD32E50x RCU_GPIOA, RCU_GPIOA, /* tx gpio clock, rx gpio clock */ GPIOA, 0, GPIO_PIN_9, /* tx port, tx alternate, tx pin */ @@ -179,6 +422,12 @@ static const struct gd32_uart uart_obj[] = { RCU_GPIOA, RCU_GPIOA, /* tx gpio clock, rx gpio clock */ GPIOA, GPIO_PIN_9, /* tx port, tx pin */ GPIOA, GPIO_PIN_10, /* rx port, rx pin */ +#endif +#ifdef RT_SERIAL_USING_DMA + &uart0_rxdma, +#ifdef RT_SERIAL_USING_TX_DMA + &uart0_txdma, +#endif #endif &serial0, "uart0", @@ -204,9 +453,14 @@ static const struct gd32_uart uart_obj[] = { GPIOA, GPIO_AF_1, GPIO_PIN_14, GPIOA, GPIO_AF_1, GPIO_PIN_15, #else + RCU_GPIOA, RCU_GPIOA, /* periph clock, tx gpio clock, rt gpio clock */ + GPIOA, GPIO_PIN_2, /* tx port, tx pin */ RCU_GPIOA, RCU_GPIOA, /* periph clock, tx gpio clock, rt gpio clock */ GPIOA, GPIO_PIN_2, /* tx port, tx pin */ GPIOA, GPIO_PIN_3, /* rx port, rx pin */ +#endif +#ifdef RT_SERIAL_USING_DMA + &uart1_rxdma, #endif &serial1, "uart1", @@ -231,6 +485,12 @@ static const struct gd32_uart uart_obj[] = { RCU_GPIOB, RCU_GPIOB, /* tx gpio clock, rt gpio clock */ GPIOB, GPIO_PIN_10, /* tx port, tx pin */ GPIOB, GPIO_PIN_11, /* rx port, rx pin */ +#endif +#ifdef RT_SERIAL_USING_DMA + &uart2_rxdma, +#ifdef RT_SERIAL_USING_TX_DMA + &uart2_txdma, +#endif #endif &serial2, "uart2", @@ -242,7 +502,7 @@ static const struct gd32_uart uart_obj[] = { UART3, /* uart peripheral index */ UART3_IRQn, /* uart iqrn */ RCU_UART3, /* uart periph clock */ -#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx +#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx || defined SOC_SERIES_GD32H7xx RCU_GPIOC, RCU_GPIOC, /* tx gpio clock, rt gpio clock */ GPIOC, GPIO_AF_8, GPIO_PIN_10, /* tx port, tx alternate, tx pin */ GPIOC, GPIO_AF_8, GPIO_PIN_11, /* rx port, rx alternate, rx pin */ @@ -255,6 +515,9 @@ static const struct gd32_uart uart_obj[] = { RCU_GPIOC, RCU_GPIOC, /* periph clock, tx gpio clock, rt gpio clock */ GPIOC, GPIO_PIN_10, /* tx port, tx pin */ GPIOC, GPIO_PIN_11, /* rx port, rx pin */ +#endif +#ifdef RT_SERIAL_USING_DMA + &uart3_rxdma, #endif &serial3, "uart3", @@ -266,7 +529,7 @@ static const struct gd32_uart uart_obj[] = { UART4, /* uart peripheral index */ UART4_IRQn, /* uart iqrn */ RCU_UART4, RCU_GPIOC, RCU_GPIOD, /* periph clock, tx gpio clock, rt gpio clock */ -#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx +#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx || defined SOC_SERIES_GD32H7xx GPIOC, GPIO_AF_8, GPIO_PIN_12, /* tx port, tx alternate, tx pin */ GPIOD, GPIO_AF_8, GPIO_PIN_2, /* rx port, rx alternate, rx pin */ #elif defined SOC_SERIES_GD32E50x @@ -290,6 +553,10 @@ static const struct gd32_uart uart_obj[] = { #if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx GPIOC, GPIO_AF_8, GPIO_PIN_6, /* tx port, tx alternate, tx pin */ GPIOC, GPIO_AF_8, GPIO_PIN_7, /* rx port, rx alternate, rx pin */ +#elif defined (SOC_SERIES_GD32H7xx) + GPIOC, GPIO_AF_7, GPIO_PIN_6, // tx port, tx alternate, tx pin + GPIOC, GPIO_AF_7, GPIO_PIN_6, /* tx port, tx alternate, tx pin */ + GPIOC, GPIO_AF_7, GPIO_PIN_7, /* rx port, rx alternate, rx pin */ #elif defined SOC_SERIES_GD32E50x GPIOC, AFIO_PC6_USART5_CFG, GPIO_PIN_6, /* tx port, tx alternate, tx pin */ GPIOC, AFIO_PC7_USART5_CFG, GPIO_PIN_7, /* rx port, rx alternate, rx pin */ @@ -297,6 +564,9 @@ static const struct gd32_uart uart_obj[] = { #else GPIOC, GPIO_PIN_6, /* tx port, tx pin */ GPIOC, GPIO_PIN_7, /* rx port, rx pin */ +#endif +#ifdef RT_SERIAL_USING_DMA + &uart5_rxdma, #endif &serial5, "uart5", @@ -311,9 +581,15 @@ static const struct gd32_uart uart_obj[] = { #if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx GPIOE, GPIO_AF_8, GPIO_PIN_7, /* tx port, tx alternate, tx pin */ GPIOE, GPIO_AF_8, GPIO_PIN_8, /* rx port, rx alternate, rx pin */ +#elif defined (SOC_SERIES_GD32H7xx) + GPIOE, GPIO_AF_7, GPIO_PIN_8, // tx port, tx alternate, tx pin + GPIOE, GPIO_AF_7, GPIO_PIN_7, // rx port, rx alternate, rx pin #else GPIOE, GPIO_PIN_7, /* tx port, tx pin */ GPIOE, GPIO_PIN_8, /* rx port, rx pin */ +#endif +#ifdef RT_SERIAL_USING_DMA + &uart6_rxdma, #endif &serial6, "uart6", @@ -325,12 +601,15 @@ static const struct gd32_uart uart_obj[] = { UART7, /* uart peripheral index */ UART7_IRQn, /* uart iqrn */ RCU_UART7, RCU_GPIOE, RCU_GPIOE, /* periph clock, tx gpio clock, rt gpio clock */ -#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx +#if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32F5xx || defined SOC_SERIES_GD32H7xx GPIOE, GPIO_AF_8, GPIO_PIN_0, /* tx port, tx alternate, tx pin */ GPIOE, GPIO_AF_8, GPIO_PIN_1, /* rx port, rx alternate, rx pin */ #else GPIOE, GPIO_PIN_0, /* tx port, tx pin */ GPIOE, GPIO_PIN_1, /* rx port, rx pin */ +#endif +#ifdef RT_SERIAL_USING_DMA + &uart7_rxdma, #endif &serial7, "uart7", @@ -416,6 +695,7 @@ void gd32_uart_gpio_init(struct gd32_uart *uart) #endif NVIC_SetPriority(uart->irqn, 0); + NVIC_EnableIRQ(uart->irqn); } /** @@ -486,6 +766,10 @@ static rt_err_t gd32_uart_control(struct rt_serial_device *serial, int cmd, void { struct gd32_uart *uart; +#ifdef RT_SERIAL_USING_DMA + rt_ubase_t ctrl_arg = (rt_ubase_t)arg; +#endif + RT_ASSERT(serial != RT_NULL); uart = (struct gd32_uart *)serial->parent.user_data; @@ -497,13 +781,55 @@ static rt_err_t gd32_uart_control(struct rt_serial_device *serial, int cmd, void /* disable interrupt */ usart_interrupt_disable(uart->uart_periph, USART_INT_RBNE); +#ifdef RT_SERIAL_USING_DMA + /* disable DMA */ + if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) { + nvic_irq_disable(uart->uart_dma->rx_irq_ch); + + /* disable interrupt */ + usart_interrupt_disable(uart->uart_periph, USART_INT_IDLE); + + dma_channel_disable(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch); + usart_dma_receive_config(uart->uart_periph, USART_RECEIVE_DMA_DISABLE); + dma_deinit(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch); + + uart->uart_dma->last_recv_index = 0; + } +#ifdef RT_SERIAL_USING_TX_DMA + else if (ctrl_arg == RT_DEVICE_FLAG_DMA_TX) { + nvic_irq_disable(uart->uart_tx_dma->rx_irq_ch); + + dma_channel_disable(uart->uart_tx_dma->dma_periph, uart->uart_tx_dma->dma_ch); + usart_dma_transmit_config(uart->uart_periph, USART_TRANSMIT_DMA_DISABLE); + dma_deinit(uart->uart_tx_dma->dma_periph, uart->uart_tx_dma->dma_ch); + } +#endif +#endif break; case RT_DEVICE_CTRL_SET_INT: /* enable rx irq */ NVIC_EnableIRQ(uart->irqn); + usart_flag_clear(uart->uart_periph, USART_FLAG_RBNE); /* enable interrupt */ usart_interrupt_enable(uart->uart_periph, USART_INT_RBNE); break; + +#ifdef RT_SERIAL_USING_DMA + case RT_DEVICE_CTRL_CONFIG: + if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) { + gd32_dma_config(serial, ctrl_arg); + } +#ifdef RT_SERIAL_USING_TX_DMA + else if (ctrl_arg == RT_DEVICE_FLAG_DMA_TX) { + gd32_dma_tx_config(serial, ctrl_arg); + } +#endif + break; +#endif + + case RT_DEVICE_CTRL_CLOSE: + usart_disable(uart->uart_periph); + break; } return RT_EOK; @@ -546,6 +872,275 @@ static int gd32_uart_getc(struct rt_serial_device *serial) return ch; } +#ifdef RT_SERIAL_USING_DMA +static void dma_uart_config(struct rt_serial_device *serial, uint32_t setting_recv_len, + void *mem_base_addr) +{ + struct gd32_uart *uart = (struct gd32_uart *) serial->parent.user_data; + dma_single_data_parameter_struct dma_init_struct; + + /* rx dma config */ + uart->uart_dma->setting_recv_len = setting_recv_len; + dma_deinit(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch); + + dma_single_data_para_struct_init(&dma_init_struct); + dma_init_struct.request = uart->uart_dma->dma_mux_req_rx; + dma_init_struct.direction = DMA_PERIPH_TO_MEMORY; + dma_init_struct.memory0_addr = (uint32_t)mem_base_addr; + dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE; + dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT; + dma_init_struct.number = uart->uart_dma->setting_recv_len; + dma_init_struct.periph_addr = (uint32_t) &(USART_RDATA(uart->uart_periph)); + dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE; + dma_init_struct.priority = DMA_PRIORITY_HIGH; + + dma_single_data_mode_init(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch, &dma_init_struct); + /* configure DMA mode */ + dma_circulation_disable(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch); + + dma_flag_clear(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch, uart->uart_dma->rx_flag); + dma_interrupt_enable(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch, DMA_CHXCTL_FTFIE); +} + +static void gd32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag) +{ + dma_single_data_parameter_struct dma_init_struct; + + struct gd32_uart *uart = (struct gd32_uart *) serial->parent.user_data; + struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx; + + /* wait IDLEF set and clear it */ + while(RESET == usart_flag_get(uart->uart_periph, USART_FLAG_IDLE)) { + rt_thread_mdelay(10); + } + + usart_flag_clear(uart->uart_periph, USART_FLAG_IDLE); + /* enable transmit idle interrupt */ + usart_interrupt_enable(uart->uart_periph, USART_INT_IDLE); + /* DMA clock enable */ + if(DMA0 == uart->uart_dma->dma_periph) { + rcu_periph_clock_enable(RCU_DMA0); + } else if(DMA1 == uart->uart_dma->dma_periph) { + rcu_periph_clock_enable(RCU_DMA1); + } else { + Error_Handler(); + } + + /* enable DMAMUX clock */ + rcu_periph_clock_enable(RCU_DMAMUX); + +#ifdef RT_USING_CACHE + /* clean d-cache */ + rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, rx_fifo->buffer, serial->config.bufsz); +#endif + + /* rx dma config */ + dma_uart_config(serial, serial->config.bufsz, rx_fifo->buffer); + + usart_dma_receive_config(uart->uart_periph, USART_RECEIVE_DMA_ENABLE); + dma_channel_enable(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch); + /* rx dma interrupt config */ + nvic_irq_enable(uart->uart_dma->rx_irq_ch, 1, 0); +} + +#ifdef RT_SERIAL_USING_TX_DMA +static void gd32_dma_tx_config(struct rt_serial_device *serial, rt_ubase_t flag) +{ + dma_single_data_parameter_struct dma_init_struct; + + struct gd32_uart *uart = (struct gd32_uart *) serial->parent.user_data; + struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx; + + /* DMA clock enable */ + if(DMA0 == uart->uart_tx_dma->dma_periph) { + rcu_periph_clock_enable(RCU_DMA0); + } else if(DMA1 == uart->uart_tx_dma->dma_periph) { + rcu_periph_clock_enable(RCU_DMA1); + } else { + Error_Handler(); + } + + /* enable DMAMUX clock */ + rcu_periph_clock_enable(RCU_DMAMUX); + +#ifdef RT_USING_CACHE + /* clean d-cache */ + rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, rx_fifo->buffer, serial->config.bufsz); +#endif + + /* tx dma config */ + uart->uart_tx_dma->setting_recv_len = 0; + dma_deinit(uart->uart_tx_dma->dma_periph, uart->uart_tx_dma->dma_ch); + + dma_single_data_para_struct_init(&dma_init_struct); + dma_init_struct.request = uart->uart_tx_dma->dma_mux_req_rx; + dma_init_struct.direction = DMA_MEMORY_TO_PERIPH; + dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE; + dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT; + dma_init_struct.periph_addr = (uint32_t) &(USART_TDATA(uart->uart_periph)); + dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE; + dma_init_struct.priority = DMA_PRIORITY_HIGH; + + dma_single_data_mode_init(uart->uart_tx_dma->dma_periph, uart->uart_tx_dma->dma_ch, &dma_init_struct); + /* configure DMA mode */ + dma_circulation_disable(uart->uart_tx_dma->dma_periph, uart->uart_tx_dma->dma_ch); +} + +#ifdef RT_USING_CACHE +#ifdef BSP_SCB_ENABLE_D_CACHE +static uint8_t dma_buf_cache_pre_bk[32] = {0}; +static uint8_t dma_buf_cache_post_bk[32] = {0}; +#endif +#endif +static rt_ssize_t gd32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction) +{ + struct gd32_uart *uart; + RT_ASSERT(serial != RT_NULL); + RT_ASSERT(buf != RT_NULL); + + uart = (struct gd32_uart *) serial->parent.user_data; + + if (size == 0) + { + return 0; + } + + if (RT_SERIAL_DMA_TX == direction) + { +#ifdef RT_USING_CACHE +#ifdef BSP_SCB_ENABLE_D_CACHE + uint32_t *dma_cache_pre_ptr = NULL, *dma_cache_post_ptr = NULL; + uint32_t pre_size = (rt_uint32_t)buf & (rt_uint32_t)0x1F; + dma_cache_pre_ptr = (uint32_t *)((uint32_t)buf - pre_size); + rt_memcpy(dma_buf_cache_pre_bk, dma_cache_pre_ptr, pre_size); + dma_cache_post_ptr = (uint32_t *)((uint32_t)buf + size); + rt_memcpy(dma_buf_cache_post_bk, dma_cache_post_ptr, sizeof(dma_buf_cache_post_bk)); + /* invalidate d-cache */ + rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, buf, size); + + rt_memcpy(dma_cache_pre_ptr, dma_buf_cache_pre_bk, pre_size); + rt_memcpy(dma_cache_post_ptr, dma_buf_cache_post_bk, sizeof(dma_buf_cache_post_bk)); +#endif +#endif + + dma_memory_address_config(uart->uart_tx_dma->dma_periph, uart->uart_tx_dma->dma_ch, DMA_MEMORY_0, (uint32_t)buf); + dma_transfer_number_config(uart->uart_tx_dma->dma_periph, uart->uart_tx_dma->dma_ch, size); + + dma_flag_clear(uart->uart_tx_dma->dma_periph, uart->uart_tx_dma->dma_ch, uart->uart_tx_dma->rx_flag); + dma_interrupt_enable(uart->uart_tx_dma->dma_periph, uart->uart_tx_dma->dma_ch, DMA_CHXCTL_FTFIE); + + usart_flag_clear(uart->uart_periph, USART_FLAG_TBE); + usart_flag_clear(uart->uart_periph, USART_FLAG_TC); + /* enable transmit idle interrupt */ + usart_interrupt_enable(uart->uart_periph, USART_INT_TC); + + usart_dma_transmit_config(uart->uart_periph, USART_TRANSMIT_DMA_ENABLE); + /* rx dma interrupt config */ + nvic_irq_enable(uart->uart_tx_dma->rx_irq_ch, 1, 0); + + dma_channel_enable(uart->uart_tx_dma->dma_periph, uart->uart_tx_dma->dma_ch); + + } + return 0; +} +#endif + +#ifdef RT_USING_CACHE +static struct rt_serial_rx_fifo rx_fifo_cahce_bk = {0}; +static uint8_t rx_fifo_buf_cache_bk[32] = {0}; +#endif + +/** + * Serial port receive idle process. This need add to uart idle ISR. + * + * @param serial serial device + */ +static void dma_uart_rx_idle_isr(struct rt_serial_device *serial) +{ + struct gd32_uart *uart = (struct gd32_uart *) serial->parent.user_data; + rt_size_t recv_total_index, recv_len; + + struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx; + +#ifdef RT_USING_CACHE + uint32_t *rx_fifo_end_ptr = NULL; + rx_fifo_end_ptr = (uint32_t *)((uint32_t)rx_fifo->buffer + serial->config.bufsz); + rt_memcpy(&rx_fifo_cahce_bk, rx_fifo, sizeof(rx_fifo_cahce_bk)); + rt_memcpy(rx_fifo_buf_cache_bk, rx_fifo_end_ptr, sizeof(rx_fifo_buf_cache_bk)); + /* invalidate d-cache */ + rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, rx_fifo->buffer, serial->config.bufsz); + + rt_memcpy(rx_fifo, &rx_fifo_cahce_bk, sizeof(rx_fifo_cahce_bk)); + rt_memcpy(rx_fifo_end_ptr, rx_fifo_buf_cache_bk, sizeof(rx_fifo_buf_cache_bk)); +#endif + + recv_total_index = uart->uart_dma->setting_recv_len - + dma_transfer_number_get(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch); + + if (recv_total_index >= uart->uart_dma->last_recv_index) { + recv_len = recv_total_index - uart->uart_dma->last_recv_index; + } else { + recv_len = uart->uart_dma->setting_recv_len - uart->uart_dma->last_recv_index + recv_total_index; + } + uart->uart_dma->last_recv_index = recv_total_index; + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); + + /* read a data for clear receive idle interrupt flag */ + usart_data_receive(uart->uart_periph); + usart_flag_clear(uart->uart_periph, USART_FLAG_IDLE); +} + +/** + * DMA receive done process. This need add to DMA receive done ISR. + * + * @param serial serial device + */ +static void dma_rx_done_isr(struct rt_serial_device *serial) +{ + struct gd32_uart *uart = (struct gd32_uart *) serial->parent.user_data; + rt_size_t recv_total_index, recv_len; + + struct rt_serial_rx_fifo *rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx; + +#ifdef RT_USING_CACHE + uint32_t *rx_fifo_end_ptr = NULL; + rx_fifo_end_ptr = (uint32_t *)((uint32_t)rx_fifo->buffer+serial->config.bufsz); + rt_memcpy(&rx_fifo_cahce_bk, rx_fifo, sizeof(rx_fifo_cahce_bk)); + rt_memcpy(rx_fifo_buf_cache_bk, rx_fifo_end_ptr, sizeof(rx_fifo_buf_cache_bk)); + /* invalidate d-cache */ + rt_hw_cpu_dcache_ops(RT_HW_CACHE_INVALIDATE, rx_fifo->buffer, serial->config.bufsz); + + rt_memcpy(rx_fifo, &rx_fifo_cahce_bk, sizeof(rx_fifo_cahce_bk)); + rt_memcpy(rx_fifo_end_ptr, rx_fifo_buf_cache_bk, sizeof(rx_fifo_buf_cache_bk)); +#endif + + if (dma_flag_get(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch, uart->uart_dma->rx_flag) != RESET) { + /* disable dma, stop receive data */ + dma_channel_disable(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch); + + recv_total_index = uart->uart_dma->setting_recv_len - + dma_transfer_number_get(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch); + + if (recv_total_index >= uart->uart_dma->last_recv_index) { + recv_len = recv_total_index - uart->uart_dma->last_recv_index; + } else { + recv_len = uart->uart_dma->setting_recv_len - uart->uart_dma->last_recv_index + recv_total_index; + uart->uart_dma->last_recv_index = recv_total_index; + } + uart->uart_dma->last_recv_index = recv_total_index; + + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8)); + + /* start receive data */ + dma_flag_clear(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch, uart->uart_dma->rx_flag); + dma_channel_enable(uart->uart_dma->dma_periph, uart->uart_dma->dma_ch); + } +} + +#endif /* RT_SERIAL_USING_DMA */ + + /** * Uart common interrupt process. This need add to uart ISR. * @@ -559,12 +1154,29 @@ static void GD32_UART_IRQHandler(struct rt_serial_device *serial) /* UART in mode Receiver -------------------------------------------------*/ if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_RBNE) != RESET) && - (usart_flag_get(uart->uart_periph, USART_FLAG_RBNE) != RESET)) + (usart_flag_get(uart->uart_periph, USART_FLAG_RBNE) != RESET)) { rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND); /* Clear RXNE interrupt flag */ usart_flag_clear(uart->uart_periph, USART_FLAG_RBNE); } +#ifdef RT_SERIAL_USING_DMA + if(usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_IDLE) != RESET) + { + dma_uart_rx_idle_isr(serial); + } +#endif + if (usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_TC) != RESET) + { + /* clear interrupt */ + usart_flag_clear(uart->uart_periph, USART_FLAG_TC); + usart_interrupt_disable(uart->uart_periph, USART_INT_TC); + rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DMADONE); + } + if (usart_flag_get(uart->uart_periph, USART_FLAG_ORERR) == SET) + { + usart_flag_clear(uart->uart_periph, USART_FLAG_ORERR); + } } static const struct rt_uart_ops gd32_uart_ops = @@ -573,7 +1185,11 @@ static const struct rt_uart_ops gd32_uart_ops = .control = gd32_uart_control, .putc = gd32_uart_putc, .getc = gd32_uart_getc, - RT_NULL, +#ifndef RT_SERIAL_USING_TX_DMA + NULL, +#else + .dma_transmit = gd32_dma_transmit, +#endif }; /** @@ -587,16 +1203,24 @@ int rt_hw_usart_init(void) int i; int result; + rt_uint32_t flag = 0; for (i = 0; i < sizeof(uart_obj) / sizeof(uart_obj[0]); i++) { uart_obj[i].serial->ops = &gd32_uart_ops; uart_obj[i].serial->config = config; + flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX; +#if defined(RT_SERIAL_USING_DMA) + flag |= RT_DEVICE_FLAG_DMA_RX; +#if defined(RT_SERIAL_USING_TX_DMA) + flag |= RT_DEVICE_FLAG_DMA_TX; +#endif +#endif /* register UART1 device */ result = rt_hw_serial_register(uart_obj[i].serial, uart_obj[i].device_name, - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, + flag, (void *)&uart_obj[i]); RT_ASSERT(result == RT_EOK); } @@ -605,4 +1229,3 @@ int rt_hw_usart_init(void) } #endif - diff --git a/bsp/gd32/arm/libraries/gd32_drivers/drv_usart.h b/bsp/gd32/arm/libraries/gd32_drivers/drv_usart.h index e2fcbe9ab27..774657b5818 100644 --- a/bsp/gd32/arm/libraries/gd32_drivers/drv_usart.h +++ b/bsp/gd32/arm/libraries/gd32_drivers/drv_usart.h @@ -19,10 +19,35 @@ extern "C" { #endif +#ifndef SOC_SERIES_GD32H7xx +#undef RT_SERIAL_USING_DMA +#endif #define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n)) #define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n)) +#ifdef RT_SERIAL_USING_DMA + +typedef struct +{ + /* dma peripheral */ + uint32_t dma_periph; + /* dma channel */ + dma_channel_enum dma_ch; +#ifdef SOC_SERIES_GD32H7xx + /* rx dma request */ + uint32_t dma_mux_req_rx; +#endif + /* dma flag */ + uint32_t rx_flag; + /* dma irq channel */ + uint8_t rx_irq_ch; + /* setting receive len */ + rt_size_t setting_recv_len; + /* last receive index */ + rt_size_t last_recv_index; +} gd32_uart_dma; +#endif /* GD32 uart driver */ /* Todo: compress uart info */ struct gd32_uart @@ -50,6 +75,13 @@ struct gd32_uart uint32_t uart_remap; /* remap */ #endif +#ifdef RT_SERIAL_USING_DMA + gd32_uart_dma *uart_dma; +#ifdef RT_SERIAL_USING_TX_DMA + gd32_uart_dma *uart_tx_dma; +#endif +#endif + struct rt_serial_device * serial; char *device_name; };