diff --git a/bsp/gd32/arm/gd32470i-eval/.config b/bsp/gd32/arm/gd32470i-eval/.config new file mode 100644 index 00000000000..59035d79355 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/.config @@ -0,0 +1,1445 @@ + +# +# RT-Thread Kernel +# + +# +# klibc options +# + +# +# rt_vsnprintf options +# +# CONFIG_RT_KLIBC_USING_LIBC_VSNPRINTF is not set +# CONFIG_RT_KLIBC_USING_VSNPRINTF_LONGLONG is not set +# CONFIG_RT_KLIBC_USING_VSNPRINTF_STANDARD is not set +# end of rt_vsnprintf options + +# +# rt_vsscanf options +# +# CONFIG_RT_KLIBC_USING_LIBC_VSSCANF is not set +# end of rt_vsscanf options + +# +# rt_memset options +# +# CONFIG_RT_KLIBC_USING_USER_MEMSET is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMSET is not set +# CONFIG_RT_KLIBC_USING_TINY_MEMSET is not set +# end of rt_memset options + +# +# rt_memcpy options +# +# CONFIG_RT_KLIBC_USING_USER_MEMCPY is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMCPY is not set +# CONFIG_RT_KLIBC_USING_TINY_MEMCPY is not set +# end of rt_memcpy options + +# +# rt_memmove options +# +# CONFIG_RT_KLIBC_USING_USER_MEMMOVE is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMMOVE is not set +# end of rt_memmove options + +# +# rt_memcmp options +# +# CONFIG_RT_KLIBC_USING_USER_MEMCMP is not set +# CONFIG_RT_KLIBC_USING_LIBC_MEMCMP is not set +# end of rt_memcmp options + +# +# rt_strstr options +# +# CONFIG_RT_KLIBC_USING_USER_STRSTR is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRSTR is not set +# end of rt_strstr options + +# +# rt_strcasecmp options +# +# CONFIG_RT_KLIBC_USING_USER_STRCASECMP is not set +# end of rt_strcasecmp options + +# +# rt_strncpy options +# +# CONFIG_RT_KLIBC_USING_USER_STRNCPY is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRNCPY is not set +# end of rt_strncpy options + +# +# rt_strcpy options +# +# CONFIG_RT_KLIBC_USING_USER_STRCPY is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRCPY is not set +# end of rt_strcpy options + +# +# rt_strncmp options +# +# CONFIG_RT_KLIBC_USING_USER_STRNCMP is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRNCMP is not set +# end of rt_strncmp options + +# +# rt_strcmp options +# +# CONFIG_RT_KLIBC_USING_USER_STRCMP is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRCMP is not set +# end of rt_strcmp options + +# +# rt_strlen options +# +# CONFIG_RT_KLIBC_USING_USER_STRLEN is not set +# CONFIG_RT_KLIBC_USING_LIBC_STRLEN is not set +# end of rt_strlen options + +# +# rt_strnlen options +# +# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set +# end of rt_strnlen options +# end of klibc options + +CONFIG_RT_NAME_MAX=8 +# CONFIG_RT_USING_ARCH_DATA_TYPE is not set +# CONFIG_RT_USING_NANO is not set +# CONFIG_RT_USING_SMART is not set +# CONFIG_RT_USING_AMP is not set +# CONFIG_RT_USING_SMP is not set +CONFIG_RT_CPUS_NR=1 +CONFIG_RT_ALIGN_SIZE=8 +# CONFIG_RT_THREAD_PRIORITY_8 is not set +CONFIG_RT_THREAD_PRIORITY_32=y +# CONFIG_RT_THREAD_PRIORITY_256 is not set +CONFIG_RT_THREAD_PRIORITY_MAX=32 +CONFIG_RT_TICK_PER_SECOND=1000 +CONFIG_RT_USING_OVERFLOW_CHECK=y +CONFIG_RT_USING_HOOK=y +CONFIG_RT_HOOK_USING_FUNC_PTR=y +# CONFIG_RT_USING_HOOKLIST is not set +CONFIG_RT_USING_IDLE_HOOK=y +CONFIG_RT_IDLE_HOOK_LIST_SIZE=4 +CONFIG_IDLE_THREAD_STACK_SIZE=256 +CONFIG_RT_USING_TIMER_SOFT=y +CONFIG_RT_TIMER_THREAD_PRIO=4 +CONFIG_RT_TIMER_THREAD_STACK_SIZE=512 +# CONFIG_RT_USING_TIMER_ALL_SOFT is not set +# CONFIG_RT_USING_CPU_USAGE_TRACER is not set + +# +# kservice options +# +# CONFIG_RT_USING_TINY_FFS is not set +# end of kservice options + +CONFIG_RT_USING_DEBUG=y +CONFIG_RT_DEBUGING_ASSERT=y +CONFIG_RT_DEBUGING_COLOR=y +CONFIG_RT_DEBUGING_CONTEXT=y +# CONFIG_RT_DEBUGING_AUTO_INIT is not set +# CONFIG_RT_USING_CI_ACTION is not set + +# +# Inter-Thread communication +# +CONFIG_RT_USING_SEMAPHORE=y +CONFIG_RT_USING_MUTEX=y +CONFIG_RT_USING_EVENT=y +CONFIG_RT_USING_MAILBOX=y +CONFIG_RT_USING_MESSAGEQUEUE=y +# CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set +# CONFIG_RT_USING_SIGNALS is not set +# end of Inter-Thread communication + +# +# Memory Management +# +CONFIG_RT_USING_MEMPOOL=y +CONFIG_RT_USING_SMALL_MEM=y +# CONFIG_RT_USING_SLAB is not set +# CONFIG_RT_USING_MEMHEAP is not set +CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y +# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set +# CONFIG_RT_USING_SLAB_AS_HEAP is not set +# CONFIG_RT_USING_USERHEAP is not set +# CONFIG_RT_USING_NOHEAP is not set +# CONFIG_RT_USING_MEMTRACE is not set +# CONFIG_RT_USING_HEAP_ISR is not set +CONFIG_RT_USING_HEAP=y +# end of Memory Management + +CONFIG_RT_USING_DEVICE=y +# CONFIG_RT_USING_DEVICE_OPS is not set +# CONFIG_RT_USING_INTERRUPT_INFO is not set +# CONFIG_RT_USING_THREADSAFE_PRINTF is not set +CONFIG_RT_USING_CONSOLE=y +CONFIG_RT_CONSOLEBUF_SIZE=128 +CONFIG_RT_CONSOLE_DEVICE_NAME="uart0" +CONFIG_RT_VER_NUM=0x50201 +# CONFIG_RT_USING_STDC_ATOMIC is not set +CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 +# end of RT-Thread Kernel + +CONFIG_RT_USING_HW_ATOMIC=y +CONFIG_RT_USING_CPU_FFS=y +CONFIG_ARCH_ARM=y +CONFIG_ARCH_ARM_CORTEX_M=y +CONFIG_ARCH_ARM_CORTEX_M4=y + +# +# RT-Thread Components +# +CONFIG_RT_USING_COMPONENTS_INIT=y +CONFIG_RT_USING_USER_MAIN=y +CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048 +CONFIG_RT_MAIN_THREAD_PRIORITY=10 +# CONFIG_RT_USING_LEGACY is not set +CONFIG_RT_USING_MSH=y +CONFIG_RT_USING_FINSH=y +CONFIG_FINSH_USING_MSH=y +CONFIG_FINSH_THREAD_NAME="tshell" +CONFIG_FINSH_THREAD_PRIORITY=20 +CONFIG_FINSH_THREAD_STACK_SIZE=4096 +CONFIG_FINSH_USING_HISTORY=y +CONFIG_FINSH_HISTORY_LINES=5 +# CONFIG_FINSH_USING_WORD_OPERATION is not set +CONFIG_FINSH_USING_SYMTAB=y +CONFIG_FINSH_CMD_SIZE=80 +CONFIG_MSH_USING_BUILT_IN_COMMANDS=y +CONFIG_FINSH_USING_DESCRIPTION=y +# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set +# CONFIG_FINSH_USING_AUTH is not set +CONFIG_FINSH_ARG_MAX=10 +CONFIG_FINSH_USING_OPTION_COMPLETION=y + +# +# DFS: device virtual file system +# +# CONFIG_RT_USING_DFS is not set +# end of DFS: device virtual file system + +# CONFIG_RT_USING_FAL is not set + +# +# Device Drivers +# +# CONFIG_RT_USING_DM is not set +# CONFIG_RT_USING_DEV_BUS is not set +CONFIG_RT_USING_DEVICE_IPC=y +CONFIG_RT_UNAMED_PIPE_NUMBER=64 +# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set +CONFIG_RT_USING_SERIAL=y +CONFIG_RT_USING_SERIAL_V1=y +# CONFIG_RT_USING_SERIAL_V2 is not set +CONFIG_RT_SERIAL_USING_DMA=y +CONFIG_RT_SERIAL_RB_BUFSZ=64 +# CONFIG_RT_USING_SERIAL_BYPASS is not set +# CONFIG_RT_USING_CAN is not set +# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_I2C is not set +# CONFIG_RT_USING_PHY is not set +# CONFIG_RT_USING_PHY_V2 is not set +# CONFIG_RT_USING_ADC is not set +# CONFIG_RT_USING_DAC is not set +# CONFIG_RT_USING_NULL is not set +# CONFIG_RT_USING_ZERO is not set +# CONFIG_RT_USING_RANDOM is not set +# CONFIG_RT_USING_PWM is not set +# CONFIG_RT_USING_PULSE_ENCODER is not set +# CONFIG_RT_USING_INPUT_CAPTURE is not set +# CONFIG_RT_USING_MTD_NOR is not set +# CONFIG_RT_USING_MTD_NAND is not set +# CONFIG_RT_USING_PM is not set +# CONFIG_RT_USING_RTC is not set +# CONFIG_RT_USING_SDIO is not set +# CONFIG_RT_USING_SPI is not set +# CONFIG_RT_USING_WDT is not set +# CONFIG_RT_USING_AUDIO is not set +# CONFIG_RT_USING_SENSOR is not set +# CONFIG_RT_USING_TOUCH is not set +# CONFIG_RT_USING_LCD is not set +# CONFIG_RT_USING_HWCRYPTO is not set +# CONFIG_RT_USING_WIFI is not set +# CONFIG_RT_USING_BLK is not set +# CONFIG_RT_USING_VIRTIO is not set +CONFIG_RT_USING_PIN=y +# CONFIG_RT_USING_KTIME is not set +# CONFIG_RT_USING_HWTIMER is not set +# CONFIG_RT_USING_CHERRYUSB is not set +# end of Device Drivers + +# +# C/C++ and POSIX layer +# + +# +# ISO-ANSI C layer +# + +# +# Timezone and Daylight Saving Time +# +# CONFIG_RT_LIBC_USING_FULL_TZ_DST is not set +CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y +CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8 +CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0 +CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 +# end of Timezone and Daylight Saving Time +# end of ISO-ANSI C layer + +# +# POSIX (Portable Operating System Interface) layer +# +# CONFIG_RT_USING_POSIX_FS is not set +# CONFIG_RT_USING_POSIX_DELAY is not set +# CONFIG_RT_USING_POSIX_CLOCK is not set +# CONFIG_RT_USING_POSIX_TIMER is not set +# CONFIG_RT_USING_PTHREADS is not set +# CONFIG_RT_USING_MODULE is not set + +# +# Interprocess Communication (IPC) +# +# CONFIG_RT_USING_POSIX_PIPE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set +# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set + +# +# Socket is in the 'Network' category +# +# end of Interprocess Communication (IPC) +# end of POSIX (Portable Operating System Interface) layer + +# CONFIG_RT_USING_CPLUSPLUS is not set +# end of C/C++ and POSIX layer + +# +# Network +# +# CONFIG_RT_USING_SAL is not set +# CONFIG_RT_USING_NETDEV is not set +# CONFIG_RT_USING_LWIP is not set +# CONFIG_RT_USING_AT is not set +# end of Network + +# +# Memory protection +# +# CONFIG_RT_USING_MEM_PROTECTION is not set +# CONFIG_RT_USING_HW_STACK_GUARD is not set +# end of Memory protection + +# +# Utilities +# +# CONFIG_RT_USING_RYM is not set +# CONFIG_RT_USING_ULOG is not set +# CONFIG_RT_USING_UTEST is not set +# CONFIG_RT_USING_VAR_EXPORT is not set +# CONFIG_RT_USING_RESOURCE_ID is not set +# CONFIG_RT_USING_ADT is not set +# CONFIG_RT_USING_RT_LINK is not set +# end of Utilities + +# CONFIG_RT_USING_VBUS is not set + +# +# Using USB legacy version +# +# CONFIG_RT_USING_USB_HOST is not set +# CONFIG_RT_USING_USB_DEVICE is not set +# end of Using USB legacy version + +# CONFIG_RT_USING_FDT is not set +# end of RT-Thread Components + +# +# RT-Thread Utestcases +# +# CONFIG_RT_USING_UTESTCASES is not set +# end of RT-Thread Utestcases + +# +# RT-Thread online packages +# + +# +# IoT - internet of things +# +# CONFIG_PKG_USING_LORAWAN_DRIVER is not set +# CONFIG_PKG_USING_PAHOMQTT is not set +# CONFIG_PKG_USING_UMQTT is not set +# CONFIG_PKG_USING_WEBCLIENT is not set +# CONFIG_PKG_USING_WEBNET is not set +# CONFIG_PKG_USING_MONGOOSE is not set +# CONFIG_PKG_USING_MYMQTT is not set +# CONFIG_PKG_USING_KAWAII_MQTT is not set +# CONFIG_PKG_USING_BC28_MQTT is not set +# CONFIG_PKG_USING_WEBTERMINAL is not set +# CONFIG_PKG_USING_FREEMODBUS is not set +# CONFIG_PKG_USING_NANOPB is not set +# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set +# CONFIG_PKG_USING_ESP_HOSTED is not set + +# +# Wi-Fi +# + +# +# Marvell WiFi +# +# CONFIG_PKG_USING_WLANMARVELL is not set +# end of Marvell WiFi + +# +# Wiced WiFi +# +# CONFIG_PKG_USING_WLAN_WICED is not set +# end of Wiced WiFi + +# CONFIG_PKG_USING_RW007 is not set + +# +# CYW43012 WiFi +# +# CONFIG_PKG_USING_WLAN_CYW43012 is not set +# end of CYW43012 WiFi + +# +# BL808 WiFi +# +# CONFIG_PKG_USING_WLAN_BL808 is not set +# end of BL808 WiFi + +# +# CYW43439 WiFi +# +# CONFIG_PKG_USING_WLAN_CYW43439 is not set +# end of CYW43439 WiFi +# end of Wi-Fi + +# CONFIG_PKG_USING_COAP is not set +# CONFIG_PKG_USING_NOPOLL is not set +# CONFIG_PKG_USING_NETUTILS is not set +# CONFIG_PKG_USING_CMUX is not set +# CONFIG_PKG_USING_PPP_DEVICE is not set +# CONFIG_PKG_USING_AT_DEVICE is not set +# CONFIG_PKG_USING_ATSRV_SOCKET is not set +# CONFIG_PKG_USING_WIZNET is not set +# CONFIG_PKG_USING_ZB_COORDINATOR is not set + +# +# IoT Cloud +# +# CONFIG_PKG_USING_ONENET is not set +# CONFIG_PKG_USING_GAGENT_CLOUD is not set +# CONFIG_PKG_USING_ALI_IOTKIT is not set +# CONFIG_PKG_USING_AZURE is not set +# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set +# CONFIG_PKG_USING_JIOT-C-SDK is not set +# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set +# CONFIG_PKG_USING_JOYLINK is not set +# CONFIG_PKG_USING_IOTSHARP_SDK is not set +# end of IoT Cloud + +# CONFIG_PKG_USING_NIMBLE is not set +# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set +# CONFIG_PKG_USING_OTA_DOWNLOADER is not set +# CONFIG_PKG_USING_IPMSG is not set +# CONFIG_PKG_USING_LSSDP is not set +# CONFIG_PKG_USING_AIRKISS_OPEN is not set +# CONFIG_PKG_USING_LIBRWS is not set +# CONFIG_PKG_USING_TCPSERVER is not set +# CONFIG_PKG_USING_PROTOBUF_C is not set +# CONFIG_PKG_USING_DLT645 is not set +# CONFIG_PKG_USING_QXWZ is not set +# CONFIG_PKG_USING_SMTP_CLIENT is not set +# CONFIG_PKG_USING_ABUP_FOTA is not set +# CONFIG_PKG_USING_LIBCURL2RTT is not set +# CONFIG_PKG_USING_CAPNP is not set +# CONFIG_PKG_USING_AGILE_TELNET is not set +# CONFIG_PKG_USING_NMEALIB is not set +# CONFIG_PKG_USING_PDULIB is not set +# CONFIG_PKG_USING_BTSTACK is not set +# CONFIG_PKG_USING_BT_CYW43012 is not set +# CONFIG_PKG_USING_CYW43XX is not set +# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set +# CONFIG_PKG_USING_WAYZ_IOTKIT is not set +# CONFIG_PKG_USING_MAVLINK is not set +# CONFIG_PKG_USING_BSAL is not set +# CONFIG_PKG_USING_AGILE_MODBUS is not set +# CONFIG_PKG_USING_AGILE_FTP is not set +# CONFIG_PKG_USING_EMBEDDEDPROTO is not set +# CONFIG_PKG_USING_RT_LINK_HW is not set +# CONFIG_PKG_USING_RYANMQTT is not set +# CONFIG_PKG_USING_RYANW5500 is not set +# CONFIG_PKG_USING_LORA_PKT_FWD is not set +# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set +# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set +# CONFIG_PKG_USING_HM is not set +# CONFIG_PKG_USING_SMALL_MODBUS is not set +# CONFIG_PKG_USING_NET_SERVER is not set +# CONFIG_PKG_USING_ZFTP is not set +# CONFIG_PKG_USING_WOL is not set +# CONFIG_PKG_USING_ZEPHYR_POLLING is not set +# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set +# CONFIG_PKG_USING_LHC_MODBUS is not set +# CONFIG_PKG_USING_QMODBUS is not set +# CONFIG_PKG_USING_PNET is not set +# CONFIG_PKG_USING_OPENER is not set +# CONFIG_PKG_USING_FREEMQTT is not set +# end of IoT - internet of things + +# +# security packages +# +# CONFIG_PKG_USING_MBEDTLS is not set +# CONFIG_PKG_USING_LIBSODIUM is not set +# CONFIG_PKG_USING_LIBHYDROGEN is not set +# CONFIG_PKG_USING_TINYCRYPT is not set +# CONFIG_PKG_USING_TFM is not set +# CONFIG_PKG_USING_YD_CRYPTO is not set +# end of security packages + +# +# language packages +# + +# +# JSON: JavaScript Object Notation, a lightweight data-interchange format +# +# CONFIG_PKG_USING_CJSON is not set +# CONFIG_PKG_USING_LJSON is not set +# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set +# CONFIG_PKG_USING_RAPIDJSON is not set +# CONFIG_PKG_USING_JSMN is not set +# CONFIG_PKG_USING_AGILE_JSMN is not set +# CONFIG_PKG_USING_PARSON is not set +# CONFIG_PKG_USING_RYAN_JSON is not set +# end of JSON: JavaScript Object Notation, a lightweight data-interchange format + +# +# XML: Extensible Markup Language +# +# CONFIG_PKG_USING_SIMPLE_XML is not set +# CONFIG_PKG_USING_EZXML is not set +# end of XML: Extensible Markup Language + +# CONFIG_PKG_USING_LUATOS_SOC is not set +# CONFIG_PKG_USING_LUA is not set +# CONFIG_PKG_USING_JERRYSCRIPT is not set +# CONFIG_PKG_USING_MICROPYTHON is not set +# CONFIG_PKG_USING_PIKASCRIPT is not set +# CONFIG_PKG_USING_RTT_RUST is not set +# end of language packages + +# +# multimedia packages +# + +# +# LVGL: powerful and easy-to-use embedded GUI library +# +# CONFIG_PKG_USING_LVGL is not set +# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set +# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set +# end of LVGL: powerful and easy-to-use embedded GUI library + +# +# u8g2: a monochrome graphic library +# +# CONFIG_PKG_USING_U8G2_OFFICIAL is not set +# CONFIG_PKG_USING_U8G2 is not set +# end of u8g2: a monochrome graphic library + +# CONFIG_PKG_USING_OPENMV is not set +# CONFIG_PKG_USING_MUPDF is not set +# CONFIG_PKG_USING_STEMWIN is not set +# CONFIG_PKG_USING_WAVPLAYER is not set +# CONFIG_PKG_USING_TJPGD is not set +# CONFIG_PKG_USING_PDFGEN is not set +# CONFIG_PKG_USING_HELIX is not set +# CONFIG_PKG_USING_AZUREGUIX is not set +# CONFIG_PKG_USING_TOUCHGFX2RTT is not set +# CONFIG_PKG_USING_NUEMWIN is not set +# CONFIG_PKG_USING_MP3PLAYER is not set +# CONFIG_PKG_USING_TINYJPEG is not set +# CONFIG_PKG_USING_UGUI is not set +# CONFIG_PKG_USING_MCURSES is not set +# CONFIG_PKG_USING_TERMBOX is not set +# CONFIG_PKG_USING_VT100 is not set +# CONFIG_PKG_USING_QRCODE is not set +# CONFIG_PKG_USING_GUIENGINE is not set +# CONFIG_PKG_USING_PERSIMMON is not set +# CONFIG_PKG_USING_3GPP_AMRNB is not set +# end of multimedia packages + +# +# tools packages +# +# CONFIG_PKG_USING_CMBACKTRACE is not set +# CONFIG_PKG_USING_EASYFLASH is not set +# CONFIG_PKG_USING_EASYLOGGER is not set +# CONFIG_PKG_USING_SYSTEMVIEW is not set +# CONFIG_PKG_USING_SEGGER_RTT is not set +# CONFIG_PKG_USING_RTT_AUTO_EXE_CMD is not set +# CONFIG_PKG_USING_RDB is not set +# CONFIG_PKG_USING_ULOG_EASYFLASH is not set +# CONFIG_PKG_USING_LOGMGR is not set +# CONFIG_PKG_USING_ADBD is not set +# CONFIG_PKG_USING_COREMARK is not set +# CONFIG_PKG_USING_DHRYSTONE is not set +# CONFIG_PKG_USING_MEMORYPERF is not set +# CONFIG_PKG_USING_NR_MICRO_SHELL is not set +# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set +# CONFIG_PKG_USING_LUNAR_CALENDAR is not set +# CONFIG_PKG_USING_BS8116A is not set +# CONFIG_PKG_USING_GPS_RMC is not set +# CONFIG_PKG_USING_URLENCODE is not set +# CONFIG_PKG_USING_UMCN is not set +# CONFIG_PKG_USING_LWRB2RTT is not set +# CONFIG_PKG_USING_CPU_USAGE is not set +# CONFIG_PKG_USING_GBK2UTF8 is not set +# CONFIG_PKG_USING_VCONSOLE is not set +# CONFIG_PKG_USING_KDB is not set +# CONFIG_PKG_USING_WAMR is not set +# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set +# CONFIG_PKG_USING_LWLOG is not set +# CONFIG_PKG_USING_ANV_TRACE is not set +# CONFIG_PKG_USING_ANV_MEMLEAK is not set +# CONFIG_PKG_USING_ANV_TESTSUIT is not set +# CONFIG_PKG_USING_ANV_BENCH is not set +# CONFIG_PKG_USING_DEVMEM is not set +# CONFIG_PKG_USING_REGEX is not set +# CONFIG_PKG_USING_MEM_SANDBOX is not set +# CONFIG_PKG_USING_SOLAR_TERMS is not set +# CONFIG_PKG_USING_GAN_ZHI is not set +# CONFIG_PKG_USING_FDT is not set +# CONFIG_PKG_USING_CBOX is not set +# CONFIG_PKG_USING_SNOWFLAKE is not set +# CONFIG_PKG_USING_HASH_MATCH is not set +# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set +# CONFIG_PKG_USING_VOFA_PLUS is not set +# CONFIG_PKG_USING_RT_TRACE is not set +# CONFIG_PKG_USING_ZDEBUG is not set +# CONFIG_PKG_USING_RVBACKTRACE is not set +# CONFIG_PKG_USING_HPATCHLITE is not set +# CONFIG_PKG_USING_THREAD_METRIC is not set +# end of tools packages + +# +# system packages +# + +# +# enhanced kernel services +# +# CONFIG_PKG_USING_RT_MEMCPY_CM is not set +# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set +# end of enhanced kernel services + +# CONFIG_PKG_USING_AUNITY is not set + +# +# acceleration: Assembly language or algorithmic acceleration packages +# +# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set +# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set +# CONFIG_PKG_USING_QFPLIB_M3 is not set +# end of acceleration: Assembly language or algorithmic acceleration packages + +# +# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard +# +# CONFIG_PKG_USING_CMSIS_5 is not set +# CONFIG_PKG_USING_CMSIS_CORE is not set +# CONFIG_PKG_USING_CMSIS_NN is not set +# CONFIG_PKG_USING_CMSIS_RTOS1 is not set +# CONFIG_PKG_USING_CMSIS_RTOS2 is not set +# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard + +# +# Micrium: Micrium software products porting for RT-Thread +# +# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set +# CONFIG_PKG_USING_UCOSII_WRAPPER is not set +# CONFIG_PKG_USING_UC_CRC is not set +# CONFIG_PKG_USING_UC_CLK is not set +# CONFIG_PKG_USING_UC_COMMON is not set +# CONFIG_PKG_USING_UC_MODBUS is not set +# end of Micrium: Micrium software products porting for RT-Thread + +# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set +# CONFIG_PKG_USING_LITEOS_SDK is not set +# CONFIG_PKG_USING_TZ_DATABASE is not set +# CONFIG_PKG_USING_CAIRO is not set +# CONFIG_PKG_USING_PIXMAN is not set +# CONFIG_PKG_USING_PARTITION is not set +# CONFIG_PKG_USING_PERF_COUNTER is not set +# CONFIG_PKG_USING_FILEX is not set +# CONFIG_PKG_USING_LEVELX is not set +# CONFIG_PKG_USING_FLASHDB is not set +# CONFIG_PKG_USING_SQLITE is not set +# CONFIG_PKG_USING_RTI is not set +# CONFIG_PKG_USING_DFS_YAFFS is not set +# CONFIG_PKG_USING_LITTLEFS is not set +# CONFIG_PKG_USING_DFS_JFFS2 is not set +# CONFIG_PKG_USING_DFS_UFFS is not set +# CONFIG_PKG_USING_LWEXT4 is not set +# CONFIG_PKG_USING_THREAD_POOL is not set +# CONFIG_PKG_USING_ROBOTS is not set +# CONFIG_PKG_USING_EV is not set +# CONFIG_PKG_USING_SYSWATCH is not set +# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set +# CONFIG_PKG_USING_PLCCORE is not set +# CONFIG_PKG_USING_RAMDISK is not set +# CONFIG_PKG_USING_MININI is not set +# CONFIG_PKG_USING_QBOOT is not set +# CONFIG_PKG_USING_PPOOL is not set +# CONFIG_PKG_USING_OPENAMP is not set +# CONFIG_PKG_USING_RPMSG_LITE is not set +# CONFIG_PKG_USING_LPM is not set +# CONFIG_PKG_USING_TLSF is not set +# CONFIG_PKG_USING_EVENT_RECORDER is not set +# CONFIG_PKG_USING_ARM_2D is not set +# CONFIG_PKG_USING_MCUBOOT is not set +# CONFIG_PKG_USING_TINYUSB is not set +# CONFIG_PKG_USING_KMULTI_RTIMER is not set +# CONFIG_PKG_USING_TFDB is not set +# CONFIG_PKG_USING_QPC is not set +# CONFIG_PKG_USING_AGILE_UPGRADE is not set +# CONFIG_PKG_USING_FLASH_BLOB is not set +# CONFIG_PKG_USING_MLIBC is not set +# CONFIG_PKG_USING_TASK_MSG_BUS is not set +# CONFIG_PKG_USING_UART_FRAMEWORK is not set +# CONFIG_PKG_USING_SFDB is not set +# CONFIG_PKG_USING_RTP is not set +# CONFIG_PKG_USING_REB is not set +# CONFIG_PKG_USING_RMP is not set +# CONFIG_PKG_USING_R_RHEALSTONE is not set +# CONFIG_PKG_USING_HEARTBEAT is not set +# CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set +# end of system packages + +# +# peripheral libraries and drivers +# + +# +# HAL & SDK Drivers +# + +# +# STM32 HAL & SDK Drivers +# +# CONFIG_PKG_USING_STM32F0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F0_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F1_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F1_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F2_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F2_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F3_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F3_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32F7_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32F7_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32G0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32G0_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32G4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32G4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H5_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H7_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H7_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32L0_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L0_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32L5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32L5_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32U5_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32U5_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32WB55_SDK is not set +# CONFIG_PKG_USING_STM32_SDIO is not set +# CONFIG_PKG_USING_STM32WL_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32WL_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32WB_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32WB_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_STM32MP1_M4_HAL_DRIVER is not set +# CONFIG_PKG_USING_STM32MP1_M4_CMSIS_DRIVER is not set +# end of STM32 HAL & SDK Drivers + +# +# Infineon HAL Packages +# +# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set +# CONFIG_PKG_USING_INFINEON_CMSIS is not set +# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set +# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set +# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set +# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set +# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set +# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set +# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set +# CONFIG_PKG_USING_INFINEON_USBDEV is not set +# end of Infineon HAL Packages + +# CONFIG_PKG_USING_BLUETRUM_SDK is not set +# CONFIG_PKG_USING_EMBARC_BSP is not set +# CONFIG_PKG_USING_ESP_IDF is not set + +# +# Kendryte SDK +# +# CONFIG_PKG_USING_K210_SDK is not set +# CONFIG_PKG_USING_KENDRYTE_SDK is not set +# end of Kendryte SDK + +# CONFIG_PKG_USING_NRF5X_SDK is not set +# CONFIG_PKG_USING_NRFX is not set +# CONFIG_PKG_USING_RASPBERRYPI_PICO_RP2350_SDK is not set +# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set +# CONFIG_PKG_USING_MM32 is not set + +# +# WCH HAL & SDK Drivers +# +# CONFIG_PKG_USING_CH32V20x_SDK is not set +# CONFIG_PKG_USING_CH32V307_SDK is not set +# end of WCH HAL & SDK Drivers + +# +# AT32 HAL & SDK Drivers +# +# CONFIG_PKG_USING_AT32A403A_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32A403A_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32A423_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32A423_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F45x_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F45x_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F402_405_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F402_405_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F403A_407_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F403A_407_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F413_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F413_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F415_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F415_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F421_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F421_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F423_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F423_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F425_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F425_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32F435_437_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32F435_437_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_AT32M412_416_HAL_DRIVER is not set +# CONFIG_PKG_USING_AT32M412_416_CMSIS_DRIVER is not set +# end of AT32 HAL & SDK Drivers + +# +# HC32 DDL Drivers +# +# CONFIG_PKG_USING_HC32F3_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_HC32F3_SERIES_DRIVER is not set +# CONFIG_PKG_USING_HC32F4_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_HC32F4_SERIES_DRIVER is not set +# end of HC32 DDL Drivers + +# +# NXP HAL & SDK Drivers +# +# CONFIG_PKG_USING_NXP_MCX_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_NXP_MCX_SERIES_DRIVER is not set +# CONFIG_PKG_USING_NXP_LPC_DRIVER is not set +# CONFIG_PKG_USING_NXP_LPC55S_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMX6SX_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMX6UL_DRIVER is not set +# CONFIG_PKG_USING_NXP_IMXRT_DRIVER is not set +# end of NXP HAL & SDK Drivers + +# +# NUVOTON Drivers +# +# CONFIG_PKG_USING_NUVOTON_CMSIS_DRIVER is not set +# CONFIG_PKG_USING_NUVOTON_SERIES_DRIVER is not set +# CONFIG_PKG_USING_NUVOTON_ARM926_LIB is not set +# end of NUVOTON Drivers + +# +# GD32 Drivers +# +CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER=y +CONFIG_PKG_GD32_ARM_CMSIS_DRIVER_PATH="/packages/peripherals/hal-sdk/gd32/gd32-arm-cmsis" +CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER_LATEST_VERSION=y +CONFIG_PKG_GD32_ARM_CMSIS_DRIVER_VER="latest" +CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER=y +CONFIG_PKG_GD32_ARM_SERIES_DRIVER_PATH="/packages/peripherals/hal-sdk/gd32/gd32-arm-series" +CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER_LATEST_VERSION=y +CONFIG_PKG_GD32_ARM_SERIES_DRIVER_VER="latest" +# end of GD32 Drivers +# end of HAL & SDK Drivers + +# +# sensors drivers +# +# CONFIG_PKG_USING_LSM6DSM is not set +# CONFIG_PKG_USING_LSM6DSL is not set +# CONFIG_PKG_USING_LPS22HB is not set +# CONFIG_PKG_USING_HTS221 is not set +# CONFIG_PKG_USING_LSM303AGR is not set +# CONFIG_PKG_USING_BME280 is not set +# CONFIG_PKG_USING_BME680 is not set +# CONFIG_PKG_USING_BMA400 is not set +# CONFIG_PKG_USING_BMI160_BMX160 is not set +# CONFIG_PKG_USING_SPL0601 is not set +# CONFIG_PKG_USING_MS5805 is not set +# CONFIG_PKG_USING_DA270 is not set +# CONFIG_PKG_USING_DF220 is not set +# CONFIG_PKG_USING_HSHCAL001 is not set +# CONFIG_PKG_USING_BH1750 is not set +# CONFIG_PKG_USING_MPU6XXX is not set +# CONFIG_PKG_USING_AHT10 is not set +# CONFIG_PKG_USING_AP3216C is not set +# CONFIG_PKG_USING_TSL4531 is not set +# CONFIG_PKG_USING_DS18B20 is not set +# CONFIG_PKG_USING_DHT11 is not set +# CONFIG_PKG_USING_DHTXX is not set +# CONFIG_PKG_USING_GY271 is not set +# CONFIG_PKG_USING_GP2Y10 is not set +# CONFIG_PKG_USING_SGP30 is not set +# CONFIG_PKG_USING_HDC1000 is not set +# CONFIG_PKG_USING_BMP180 is not set +# CONFIG_PKG_USING_BMP280 is not set +# CONFIG_PKG_USING_SHTC1 is not set +# CONFIG_PKG_USING_BMI088 is not set +# CONFIG_PKG_USING_HMC5883 is not set +# CONFIG_PKG_USING_MAX6675 is not set +# CONFIG_PKG_USING_MAX31855 is not set +# CONFIG_PKG_USING_TMP1075 is not set +# CONFIG_PKG_USING_SR04 is not set +# CONFIG_PKG_USING_CCS811 is not set +# CONFIG_PKG_USING_PMSXX is not set +# CONFIG_PKG_USING_RT3020 is not set +# CONFIG_PKG_USING_MLX90632 is not set +# CONFIG_PKG_USING_MLX90382 is not set +# CONFIG_PKG_USING_MLX90393 is not set +# CONFIG_PKG_USING_MLX90392 is not set +# CONFIG_PKG_USING_MLX90394 is not set +# CONFIG_PKG_USING_MLX90397 is not set +# CONFIG_PKG_USING_MS5611 is not set +# CONFIG_PKG_USING_MAX31865 is not set +# CONFIG_PKG_USING_VL53L0X is not set +# CONFIG_PKG_USING_INA260 is not set +# CONFIG_PKG_USING_MAX30102 is not set +# CONFIG_PKG_USING_INA226 is not set +# CONFIG_PKG_USING_LIS2DH12 is not set +# CONFIG_PKG_USING_HS300X is not set +# CONFIG_PKG_USING_ZMOD4410 is not set +# CONFIG_PKG_USING_ISL29035 is not set +# CONFIG_PKG_USING_MMC3680KJ is not set +# CONFIG_PKG_USING_QMP6989 is not set +# CONFIG_PKG_USING_BALANCE is not set +# CONFIG_PKG_USING_SHT2X is not set +# CONFIG_PKG_USING_SHT3X is not set +# CONFIG_PKG_USING_SHT4X is not set +# CONFIG_PKG_USING_AD7746 is not set +# CONFIG_PKG_USING_ADT74XX is not set +# CONFIG_PKG_USING_MAX17048 is not set +# CONFIG_PKG_USING_AS7341 is not set +# CONFIG_PKG_USING_CW2015 is not set +# CONFIG_PKG_USING_ICM20608 is not set +# CONFIG_PKG_USING_PAJ7620 is not set +# CONFIG_PKG_USING_STHS34PF80 is not set +# CONFIG_PKG_USING_P3T1755 is not set +# CONFIG_PKG_USING_QMI8658 is not set +# CONFIG_PKG_USING_ICM20948 is not set +# end of sensors drivers + +# +# touch drivers +# +# CONFIG_PKG_USING_GT9147 is not set +# CONFIG_PKG_USING_GT1151 is not set +# CONFIG_PKG_USING_GT917S is not set +# CONFIG_PKG_USING_GT911 is not set +# CONFIG_PKG_USING_FT6206 is not set +# CONFIG_PKG_USING_FT5426 is not set +# CONFIG_PKG_USING_FT6236 is not set +# CONFIG_PKG_USING_XPT2046_TOUCH is not set +# CONFIG_PKG_USING_CST816X is not set +# CONFIG_PKG_USING_CST812T is not set +# end of touch drivers + +# CONFIG_PKG_USING_REALTEK_AMEBA is not set +# CONFIG_PKG_USING_BUTTON is not set +# CONFIG_PKG_USING_PCF8574 is not set +# CONFIG_PKG_USING_SX12XX is not set +# CONFIG_PKG_USING_SIGNAL_LED is not set +# CONFIG_PKG_USING_LEDBLINK is not set +# CONFIG_PKG_USING_LITTLED is not set +# CONFIG_PKG_USING_LKDGUI is not set +# CONFIG_PKG_USING_INFRARED is not set +# CONFIG_PKG_USING_MULTI_INFRARED is not set +# CONFIG_PKG_USING_AGILE_BUTTON is not set +# CONFIG_PKG_USING_AGILE_LED is not set +# CONFIG_PKG_USING_AT24CXX is not set +# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set +# CONFIG_PKG_USING_PCA9685 is not set +# CONFIG_PKG_USING_ILI9341 is not set +# CONFIG_PKG_USING_I2C_TOOLS is not set +# CONFIG_PKG_USING_NRF24L01 is not set +# CONFIG_PKG_USING_RPLIDAR is not set +# CONFIG_PKG_USING_AS608 is not set +# CONFIG_PKG_USING_RC522 is not set +# CONFIG_PKG_USING_WS2812B is not set +# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set +# CONFIG_PKG_USING_MULTI_RTIMER is not set +# CONFIG_PKG_USING_MAX7219 is not set +# CONFIG_PKG_USING_BEEP is not set +# CONFIG_PKG_USING_EASYBLINK is not set +# CONFIG_PKG_USING_PMS_SERIES is not set +# CONFIG_PKG_USING_CAN_YMODEM is not set +# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set +# CONFIG_PKG_USING_QLED is not set +# CONFIG_PKG_USING_AGILE_CONSOLE is not set +# CONFIG_PKG_USING_LD3320 is not set +# CONFIG_PKG_USING_WK2124 is not set +# CONFIG_PKG_USING_LY68L6400 is not set +# CONFIG_PKG_USING_DM9051 is not set +# CONFIG_PKG_USING_SSD1306 is not set +# CONFIG_PKG_USING_QKEY is not set +# CONFIG_PKG_USING_RS485 is not set +# CONFIG_PKG_USING_RS232 is not set +# CONFIG_PKG_USING_NES is not set +# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set +# CONFIG_PKG_USING_VDEVICE is not set +# CONFIG_PKG_USING_SGM706 is not set +# CONFIG_PKG_USING_RDA58XX is not set +# CONFIG_PKG_USING_LIBNFC is not set +# CONFIG_PKG_USING_MFOC is not set +# CONFIG_PKG_USING_TMC51XX is not set +# CONFIG_PKG_USING_TCA9534 is not set +# CONFIG_PKG_USING_KOBUKI is not set +# CONFIG_PKG_USING_ROSSERIAL is not set +# CONFIG_PKG_USING_MICRO_ROS is not set +# CONFIG_PKG_USING_MCP23008 is not set +# CONFIG_PKG_USING_MISAKA_AT24CXX is not set +# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set +# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set +# CONFIG_PKG_USING_SOFT_SERIAL is not set +# CONFIG_PKG_USING_MB85RS16 is not set +# CONFIG_PKG_USING_RFM300 is not set +# CONFIG_PKG_USING_IO_INPUT_FILTER is not set +# CONFIG_PKG_USING_LRF_NV7LIDAR is not set +# CONFIG_PKG_USING_AIP650 is not set +# CONFIG_PKG_USING_FINGERPRINT is not set +# CONFIG_PKG_USING_BT_ECB02C is not set +# CONFIG_PKG_USING_UAT is not set +# CONFIG_PKG_USING_ST7789 is not set +# CONFIG_PKG_USING_VS1003 is not set +# CONFIG_PKG_USING_X9555 is not set +# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set +# CONFIG_PKG_USING_BT_MX01 is not set +# CONFIG_PKG_USING_RGPOWER is not set +# CONFIG_PKG_USING_BT_MX02 is not set +# CONFIG_PKG_USING_GC9A01 is not set +# CONFIG_PKG_USING_IK485 is not set +# CONFIG_PKG_USING_SERVO is not set +# CONFIG_PKG_USING_SEAN_WS2812B is not set +# CONFIG_PKG_USING_IC74HC165 is not set +# CONFIG_PKG_USING_IST8310 is not set +# CONFIG_PKG_USING_ST7789_SPI is not set +# CONFIG_PKG_USING_SPI_TOOLS is not set +# end of peripheral libraries and drivers + +# +# AI packages +# +# CONFIG_PKG_USING_LIBANN is not set +# CONFIG_PKG_USING_NNOM is not set +# CONFIG_PKG_USING_ONNX_BACKEND is not set +# CONFIG_PKG_USING_ONNX_PARSER is not set +# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set +# CONFIG_PKG_USING_ELAPACK is not set +# CONFIG_PKG_USING_ULAPACK is not set +# CONFIG_PKG_USING_QUEST is not set +# CONFIG_PKG_USING_NAXOS is not set +# CONFIG_PKG_USING_R_TINYMAIX is not set +# CONFIG_PKG_USING_LLMCHAT is not set +# end of AI packages + +# +# Signal Processing and Control Algorithm Packages +# +# CONFIG_PKG_USING_APID is not set +# CONFIG_PKG_USING_FIRE_PID_CURVE is not set +# CONFIG_PKG_USING_QPID is not set +# CONFIG_PKG_USING_UKAL is not set +# CONFIG_PKG_USING_DIGITALCTRL is not set +# CONFIG_PKG_USING_KISSFFT is not set +# CONFIG_PKG_USING_CMSIS_DSP is not set +# end of Signal Processing and Control Algorithm Packages + +# +# miscellaneous packages +# + +# +# project laboratory +# +# end of project laboratory + +# +# samples: kernel and components samples +# +# CONFIG_PKG_USING_KERNEL_SAMPLES is not set +# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set +# CONFIG_PKG_USING_NETWORK_SAMPLES is not set +# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set +# end of samples: kernel and components samples + +# +# entertainment: terminal games and other interesting software packages +# +# CONFIG_PKG_USING_CMATRIX is not set +# CONFIG_PKG_USING_SL is not set +# CONFIG_PKG_USING_CAL is not set +# CONFIG_PKG_USING_ACLOCK is not set +# CONFIG_PKG_USING_THREES is not set +# CONFIG_PKG_USING_2048 is not set +# CONFIG_PKG_USING_SNAKE is not set +# CONFIG_PKG_USING_TETRIS is not set +# CONFIG_PKG_USING_DONUT is not set +# CONFIG_PKG_USING_COWSAY is not set +# CONFIG_PKG_USING_MORSE is not set +# CONFIG_PKG_USING_TINYSQUARE is not set +# end of entertainment: terminal games and other interesting software packages + +# CONFIG_PKG_USING_LIBCSV is not set +# CONFIG_PKG_USING_OPTPARSE is not set +# CONFIG_PKG_USING_FASTLZ is not set +# CONFIG_PKG_USING_MINILZO is not set +# CONFIG_PKG_USING_QUICKLZ is not set +# CONFIG_PKG_USING_LZMA is not set +# CONFIG_PKG_USING_RALARAM is not set +# CONFIG_PKG_USING_MULTIBUTTON is not set +# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set +# CONFIG_PKG_USING_CANFESTIVAL is not set +# CONFIG_PKG_USING_ZLIB is not set +# CONFIG_PKG_USING_MINIZIP is not set +# CONFIG_PKG_USING_HEATSHRINK is not set +# CONFIG_PKG_USING_DSTR is not set +# CONFIG_PKG_USING_TINYFRAME is not set +# CONFIG_PKG_USING_KENDRYTE_DEMO is not set +# CONFIG_PKG_USING_UPACKER is not set +# CONFIG_PKG_USING_UPARAM is not set +# CONFIG_PKG_USING_HELLO is not set +# CONFIG_PKG_USING_VI is not set +# CONFIG_PKG_USING_KI is not set +# CONFIG_PKG_USING_ARMv7M_DWT is not set +# CONFIG_PKG_USING_CRCLIB is not set +# CONFIG_PKG_USING_LIBCRC is not set +# CONFIG_PKG_USING_LWGPS is not set +# CONFIG_PKG_USING_STATE_MACHINE is not set +# CONFIG_PKG_USING_DESIGN_PATTERN is not set +# CONFIG_PKG_USING_CONTROLLER is not set +# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set +# CONFIG_PKG_USING_MFBD is not set +# CONFIG_PKG_USING_SLCAN2RTT is not set +# CONFIG_PKG_USING_SOEM is not set +# CONFIG_PKG_USING_QPARAM is not set +# CONFIG_PKG_USING_CorevMCU_CLI is not set +# CONFIG_PKG_USING_DRMP is not set +# end of miscellaneous packages + +# +# Arduino libraries +# +# CONFIG_PKG_USING_RTDUINO is not set + +# +# Projects and Demos +# +# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set +# CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set +# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set +# CONFIG_PKG_USING_ARDUINO_RTDUINO_SENSORFUSION_SHIELD is not set +# CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set +# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set +# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set +# end of Projects and Demos + +# +# Sensors +# +# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31855 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MSA301 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_ITG3200 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MP503 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set +# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set +# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set +# end of Sensors + +# +# Display +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set +# CONFIG_PKG_USING_ARDUINO_U8G2 is not set +# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set +# CONFIG_PKG_USING_SEEED_TM1637 is not set +# end of Display + +# +# Timing +# +# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set +# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set +# CONFIG_PKG_USING_ARDUINO_TICKER is not set +# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set +# end of Timing + +# +# Data Processing +# +# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set +# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set +# CONFIG_PKG_USING_ARDUINO_TENSORFLOW_LITE_MICRO is not set +# CONFIG_PKG_USING_ARDUINO_RUNNINGMEDIAN is not set +# end of Data Processing + +# +# Data Storage +# + +# +# Communication +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set +# end of Communication + +# +# Device Control +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set +# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set +# end of Device Control + +# +# Other +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set +# end of Other + +# +# Signal IO +# +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set +# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set +# end of Signal IO + +# +# Uncategorized +# +# end of Arduino libraries +# end of RT-Thread online packages + +CONFIG_SOC_FAMILY_GD32=y +CONFIG_SOC_SERIES_GD32F4xx=y + +# +# Hardware Drivers Config +# +CONFIG_SOC_GD32470Z=y + +# +# Onboard Peripheral Drivers +# + +# +# On-chip Peripheral Drivers +# +CONFIG_BSP_USING_GPIO=y +CONFIG_BSP_USING_UART=y +CONFIG_BSP_USING_UART0=y +# CONFIG_BSP_UART0_RX_USING_DMA is not set +# CONFIG_BSP_UART0_TX_USING_DMA is not set +# CONFIG_BSP_USING_UART1 is not set +# CONFIG_BSP_USING_UART2 is not set +# CONFIG_BSP_USING_UART3 is not set +# CONFIG_BSP_USING_UART4 is not set +# CONFIG_BSP_USING_UART5 is not set +# CONFIG_BSP_USING_UART6 is not set +# CONFIG_BSP_USING_UART7 is not set +# CONFIG_BSP_USING_SPI is not set +# CONFIG_BSP_USING_ADC is not set +# CONFIG_BSP_USING_TIM is not set +# CONFIG_BSP_USING_ONCHIP_RTC is not set +# CONFIG_BSP_USING_WDT is not set +# CONFIG_BSP_USING_SDIO is not set +# CONFIG_BSP_USING_USBD is not set +# CONFIG_BSP_USING_USBH is not set +# CONFIG_BSP_USING_SDRAM is not set +# end of On-chip Peripheral Drivers + +# +# Board extended module Drivers +# +# CONFIG_BSP_USING_LCD is not set +# end of Board extended module Drivers +# end of Hardware Drivers Config diff --git a/bsp/gd32/arm/gd32470i-eval/Kconfig b/bsp/gd32/arm/gd32470i-eval/Kconfig new file mode 100644 index 00000000000..07edfefc341 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/Kconfig @@ -0,0 +1,12 @@ +mainmenu "RT-Thread Configuration" + +BSP_DIR := . + +RTT_DIR := ../../../.. + +PKGS_DIR := packages + +source "$(RTT_DIR)/Kconfig" +osource "$PKGS_DIR/Kconfig" +rsource "../libraries/Kconfig" +rsource "board/Kconfig" diff --git a/bsp/gd32/arm/gd32470i-eval/README.md b/bsp/gd32/arm/gd32470i-eval/README.md new file mode 100644 index 00000000000..5ee08f4df21 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/README.md @@ -0,0 +1,135 @@ +# GD32470I-EVAL评估板BSP说明 + +## 简介 + +GD32470I-EVAL评估板使用GD32F470IKH6作为主控制器。评估板使用Mini USB接口或者DC-005连接器提供5V电源。该评估板具有丰富的板载资源，提供包括扩展引脚在内的及SWD, Reset, Boot, User button key, LED, CAN, I2C, I2S, USART, RTC, LCD, SPI, ADC, DAC, EXMC, CTC, SDIO, DCI, ENET, USBFS, USBHS, GD-Link等外设资源，图片如下： + +![board](figures/board.jpg) + +> 更多关于开发板的资料可以查看GD32470I-EVAL-V1.0原理图。 + +该开发板常用 **板载资源** 如下： + +- GD32F470IKH6，主频 240MHz，CPU内核：ARM Cortex-M4，3072KB FLASH ，512KB RAM +- 常用外设 + + - 用户LED ：3个，LED1（PE2），LED2（PE3），LED3（PF10） + - 电源指示灯：一个红色LED + - 按键：4个，K1-Reset(NRST)，K2-Wakeup（PA0），K3-Tamper（PC13），K4-User key（PB14） + - General TM * 10、Advanced TM * 2、Basic TM * 2 + - SysTick * 1 + - 看门狗 * 2 + - RTC * 1 + - USART * 4、UART * 4 + - I2C * 3、I2S * 2 + - SPI * 6 + - SDIO * 1 + - CAN * 2 + - USBFS+HS + - 以太网 * 1 + - TFT-LCD + - EXMC/SDRAM * 1 + - EXMC/NAND Flash * 1 + - ADC * 3 + - DAC * 2 + - DCI摄像头接口 * 1 + - 最多支持176GPIOs +- 调试接口：GD-Link +- 支持RGB接口和MCU屏幕接口 +- 一路SDIO-TF卡 +- SPI Flash：板载Flash +- SDRAM：外扩SDRAM +- 一路Mini USB +- 调试接口引出了SWD和UART +- 丰富的扩展引脚 +- 开发板更多信息请查看GD32470I-EVAL原理图 + +## 外设支持 + +| **片上外设** | **支持情况** | **备注** | +|:------------|:------------:|:----------------------------------| +| GPIO | 支持 | PA0, PA1... ---> PIN: 0, 1...175 | +| UART | 支持 | UART0 - UART7 | +| SPI | 支持 | 支持 SPI0 ~ SPI5，可配置多个总线 | +| I2C | 支持 | 支持 I2C0 ~ I2C2 | + + +## 使用说明 + +使用说明分为如下两个章节： + +- 快速上手 + + 本章节是为刚接触 RT-Thread 的新手准备的使用说明，遵循简单的步骤即可将 RT-Thread 操作系统运行在该开发板上，看到实验效果 。 + +- 进阶使用 + + 本章节是为需要在 RT-Thread 操作系统上使用更多开发板资源的开发者准备的。通过使用 ENV 工具对 BSP 进行配置，可以开启更多板载资源，实现更多高级功能。 + +### 快速上手 + +本 BSP 为开发者提供 MDK5工程，支持 GCC 开发环境，也可使用RT-Thread Studio开发。下面以 MDK5 开发环境为例，介绍如何将系统运行起来。 + +#### 硬件连接 + +使用GD-Link调试器连接开发板到 PC，使用USB2TTL连接USART0，并给开发板供电（可使用Mini USB接口或DC-005连接器提供5V电源）。 + +#### 编译下载 + +双击 project.uvprojx 文件，打开 MDK5 工程，编译并下载程序到开发板。 + +> 工程默认配置使用 GD-Link 仿真器下载程序，在通过 GD-Link 连接开发板的基础上，点击下载按钮即可下载程序到开发板 + +#### 运行结果 + +下载程序成功之后，系统会自动运行，LED 闪烁。 + +连接开发板对应串口到 PC , 在终端工具里打开相应的串口（115200-8-1-N），复位设备后，可以看到 RT-Thread 的输出信息: + +```bash + \ | / +- RT - Thread Operating System + / | \ 5.0.0 build Mar 3 2023 00:43:44 + 2006 - 2022 Copyright by RT-Thread team +msh /> +``` + +### 进阶使用 + +此 BSP 默认只开启了 GPIO 和 串口0的功能，如果需使用高级功能，需要利用 ENV 工具对BSP 进行配置，步骤如下： + +1. 在 bsp 下打开 env 工具。 + +2. 输入`menuconfig`命令配置工程，配置好之后保存退出。 + +3. 输入`pkgs --update`命令更新软件包。 + +4. 输入`scons --target=mdk4/mdk5/iar` 命令重新生成工程。 + +## 注意事项 + +- 若需使用板载 SPI Flash，请在 `menuconfig` 中启用以下配置： + +``` +RT-Thread Components ---> + Device Drivers ---> + [*] Enable SPI BUS support (RT_USING_SPI) + [*] Enable SFUD for SPI Flash (RT_USING_SFUD) + +Hardware Drivers Config ---> + On-chip Peripheral Drivers ---> + [*] Enable SPI BUS (BSP_USING_SPI) + [*] Enable SPI5 BUS (BSP_USING_SPI5) +``` + +- 若需使用SDRAM功能，请在 `menuconfig` 中启用EXMC配置 +- 若需使用DCI摄像头功能，请在 `menuconfig` 中启用相应的DCI配置 +- 若需使用LCD显示功能，请在 `menuconfig` 中启用LCD相关配置 + + +## 联系人信息 + +维护人: + +- [godmial](https://github.com/godmial), 邮箱：<2633967641@qq.com> +- [yuanzihao](https://github.com/zihao-yuan/), 邮箱： diff --git a/bsp/gd32/arm/gd32470i-eval/SConscript b/bsp/gd32/arm/gd32470i-eval/SConscript new file mode 100644 index 00000000000..20f7689c53c --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/SConscript @@ -0,0 +1,15 @@ +# for module compiling +import os +Import('RTT_ROOT') +from building import * + +cwd = GetCurrentDir() +objs = [] +list = os.listdir(cwd) + +for d in list: + path = os.path.join(cwd, d) + if os.path.isfile(os.path.join(path, 'SConscript')): + objs = objs + SConscript(os.path.join(d, 'SConscript')) + +Return('objs') diff --git a/bsp/gd32/arm/gd32470i-eval/SConstruct b/bsp/gd32/arm/gd32470i-eval/SConstruct new file mode 100644 index 00000000000..68978ea7ece --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/SConstruct @@ -0,0 +1,77 @@ +import os +import sys +import rtconfig + +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') +else: + RTT_ROOT = os.path.normpath(os.getcwd() + '/../../../..') + +sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')] +try: + from building import * +except: + print('Cannot found RT-Thread root directory, please check RTT_ROOT') + print(RTT_ROOT) + exit(-1) + +def bsp_pkg_check(): + import subprocess + + check_paths = [ + os.path.join("packages", "gd32-arm-cmsis-latest"), + os.path.join("packages", "gd32-arm-series-latest") + ] + + need_update = not all(os.path.exists(p) for p in check_paths) + + if need_update: + print("\n===============================================================================") + print("Dependency packages missing, please running 'pkgs --update'...") + print("If no packages are fetched, run 'pkgs --upgrade' first, then 'pkgs --update'...") + print("===============================================================================") + exit(1) + +RegisterPreBuildingAction(bsp_pkg_check) + +TARGET = 'rtthread.' + rtconfig.TARGET_EXT + +DefaultEnvironment(tools=[]) +env = Environment(tools = ['mingw'], + AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS, + CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS, + AR = rtconfig.AR, ARFLAGS = '-rc', + CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS, + LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS) +env.PrependENVPath('PATH', rtconfig.EXEC_PATH) + +if rtconfig.PLATFORM in ['iccarm']: + env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES']) + env.Replace(ARFLAGS = ['']) + env.Replace(LINKCOM = env["LINKCOM"] + ' --map rtthread.map') + +Export('env') +Export('RTT_ROOT') +Export('rtconfig') + +SDK_ROOT = os.path.abspath('./') + +if os.path.exists(SDK_ROOT + '/libraries'): + libraries_path_prefix = SDK_ROOT + '/libraries' +else: + libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries' + +SDK_LIB = libraries_path_prefix +Export('SDK_LIB') + +# prepare building environment +objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False) + +# include drivers +objs.extend(SConscript(os.path.join(libraries_path_prefix, 'gd32_drivers', 'SConscript'))) + +# include lcd and drivers +objs.extend(SConscript(os.path.join(SDK_ROOT, 'board', 'ports', 'SConscript'))) + +# make a building +DoBuilding(TARGET, objs) diff --git a/bsp/gd32/arm/gd32470i-eval/applications/SConscript b/bsp/gd32/arm/gd32470i-eval/applications/SConscript new file mode 100644 index 00000000000..9bb9abae897 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/applications/SConscript @@ -0,0 +1,15 @@ +from building import * +import os + +cwd = GetCurrentDir() +src = Glob('*.c') +CPPPATH = [cwd] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH) + +list = os.listdir(cwd) +for item in list: + if os.path.isfile(os.path.join(cwd, item, 'SConscript')): + group = group + SConscript(os.path.join(item, 'SConscript')) + +Return('group') diff --git a/bsp/gd32/arm/gd32470i-eval/applications/main.c b/bsp/gd32/arm/gd32470i-eval/applications/main.c new file mode 100644 index 00000000000..a3adff8831a --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/applications/main.c @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2006-2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + * 2025-08-20 WangShun change the LED pins + */ + +#include +#include +#include +#include + +/* defined the LED1 pin: PF10 */ +#define LED1_PIN GET_PIN(F, 10) + +int main(void) +{ + int count = 1; + + /* set LED1 pin mode to output */ + rt_pin_mode(LED1_PIN, PIN_MODE_OUTPUT); + + while (count++) + { + rt_pin_write(LED1_PIN, PIN_HIGH); + rt_thread_mdelay(500); + rt_pin_write(LED1_PIN, PIN_LOW); + rt_thread_mdelay(500); + } + + return RT_EOK; +} + diff --git a/bsp/gd32/arm/gd32470i-eval/board/Kconfig b/bsp/gd32/arm/gd32470i-eval/board/Kconfig new file mode 100644 index 00000000000..b0637718668 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/Kconfig @@ -0,0 +1,445 @@ +menu "Hardware Drivers Config" + +config SOC_SERIES_GD32F4xx + bool + default y + +config SOC_GD32470Z + bool + select SOC_SERIES_GD32F4xx + select RT_USING_COMPONENTS_INIT + select RT_USING_USER_MAIN + default y + +menu "Onboard Peripheral Drivers" + +endmenu + +menu "On-chip Peripheral Drivers" + + config BSP_USING_GPIO + bool "Enable GPIO" + select RT_USING_PIN + default y + + menuconfig BSP_USING_UART + bool "Enable UART" + default y + select RT_USING_SERIAL + if BSP_USING_UART + config BSP_USING_UART0 + bool "Enable UART0" + default n + + config BSP_UART0_RX_USING_DMA + bool "Enable UART0 RX DMA" + depends on BSP_USING_UART0 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART0_TX_USING_DMA + bool "Enable UART0 TX DMA" + depends on BSP_USING_UART0 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART0_RX_BUFSIZE + int "Set UART0 RX buffer size" + range 64 65535 + depends on BSP_USING_UART0 && RT_USING_SERIAL_V2 + default 64 + + config BSP_UART0_TX_BUFSIZE + int "Set UART0 TX buffer size" + range 0 65535 + depends on BSP_USING_UART0 && RT_USING_SERIAL_V2 + default 0 + + config BSP_UART0_DMA_PING_BUFSIZE + int "Set UART0 RX DMA ping-pong buffer size" + range 32 65535 + depends on RT_USING_SERIAL_V2 && BSP_UART0_RX_USING_DMA + default 32 + + config BSP_USING_UART1 + bool "Enable UART1" + default y + + config BSP_UART1_RX_USING_DMA + bool "Enable UART1 RX DMA" + depends on BSP_USING_UART1 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART1_TX_USING_DMA + bool "Enable UART1 TX DMA" + depends on BSP_USING_UART1 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART1_RX_BUFSIZE + int "Set UART1 RX buffer size" + range 64 65535 + depends on BSP_USING_UART1 && RT_USING_SERIAL_V2 + default 64 + + config BSP_UART1_TX_BUFSIZE + int "Set UART1 TX buffer size" + range 0 65535 + depends on BSP_USING_UART1 && RT_USING_SERIAL_V2 + default 0 + + config BSP_UART1_DMA_PING_BUFSIZE + int "Set UART1 RX DMA ping-pong buffer size" + range 32 65535 + depends on RT_USING_SERIAL_V2 && BSP_UART1_RX_USING_DMA + default 32 + + config BSP_USING_UART2 + bool "Enable UART2" + default n + + config BSP_UART2_RX_USING_DMA + bool "Enable UART2 RX DMA" + depends on BSP_USING_UART2 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART2_TX_USING_DMA + bool "Enable UART2 TX DMA" + depends on BSP_USING_UART2 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART2_RX_BUFSIZE + int "Set UART2 RX buffer size" + range 64 65535 + depends on BSP_USING_UART2 && RT_USING_SERIAL_V2 + default 64 + + config BSP_UART2_TX_BUFSIZE + int "Set UART2 TX buffer size" + range 0 65535 + depends on BSP_USING_UART2 && RT_USING_SERIAL_V2 + default 0 + + config BSP_UART2_DMA_PING_BUFSIZE + int "Set UART2 RX DMA ping-pong buffer size" + range 32 65535 + depends on RT_USING_SERIAL_V2 && BSP_UART2_RX_USING_DMA + default 32 + + config BSP_USING_UART3 + bool "Enable UART3" + default n + + config BSP_UART3_RX_USING_DMA + bool "Enable UART3 RX DMA" + depends on BSP_USING_UART3 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART3_TX_USING_DMA + bool "Enable UART3 TX DMA" + depends on BSP_USING_UART3 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART3_RX_BUFSIZE + int "Set UART3 RX buffer size" + range 64 65535 + depends on BSP_USING_UART3 && RT_USING_SERIAL_V2 + default 64 + + config BSP_UART3_TX_BUFSIZE + int "Set UART3 TX buffer size" + range 0 65535 + depends on BSP_USING_UART3 && RT_USING_SERIAL_V2 + default 0 + + config BSP_UART3_DMA_PING_BUFSIZE + int "Set UART3 RX DMA ping-pong buffer size" + range 32 65535 + depends on RT_USING_SERIAL_V2 && BSP_UART3_RX_USING_DMA + default 32 + + config BSP_USING_UART4 + bool "Enable UART4" + default n + + config BSP_UART4_RX_USING_DMA + bool "Enable UART4 RX DMA" + depends on BSP_USING_UART4 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART4_TX_USING_DMA + bool "Enable UART4 TX DMA" + depends on BSP_USING_UART4 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART4_RX_BUFSIZE + int "Set UART4 RX buffer size" + range 64 65535 + depends on BSP_USING_UART4 && RT_USING_SERIAL_V2 + default 64 + + config BSP_UART4_TX_BUFSIZE + int "Set UART4 TX buffer size" + range 0 65535 + depends on BSP_USING_UART4 && RT_USING_SERIAL_V2 + default 0 + + config BSP_UART4_DMA_PING_BUFSIZE + int "Set UART4 RX DMA ping-pong buffer size" + range 32 65535 + depends on RT_USING_SERIAL_V2 && BSP_UART4_RX_USING_DMA + default 32 + + config BSP_USING_UART5 + bool "Enable UART5" + default n + + config BSP_UART5_RX_USING_DMA + bool "Enable UART5 RX DMA" + depends on BSP_USING_UART5 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART5_TX_USING_DMA + bool "Enable UART5 TX DMA" + depends on BSP_USING_UART5 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART5_RX_BUFSIZE + int "Set UART5 RX buffer size" + range 64 65535 + depends on BSP_USING_UART5 && RT_USING_SERIAL_V2 + default 64 + + config BSP_UART5_TX_BUFSIZE + int "Set UART5 TX buffer size" + range 0 65535 + depends on BSP_USING_UART5 && RT_USING_SERIAL_V2 + default 0 + + config BSP_UART5_DMA_PING_BUFSIZE + int "Set UART5 RX DMA ping-pong buffer size" + range 32 65535 + depends on RT_USING_SERIAL_V2 && BSP_UART5_RX_USING_DMA + default 32 + + config BSP_USING_UART6 + bool "Enable UART6" + default n + + config BSP_UART6_RX_USING_DMA + bool "Enable UART6 RX DMA" + depends on BSP_USING_UART6 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART6_TX_USING_DMA + bool "Enable UART6 TX DMA" + depends on BSP_USING_UART6 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART6_RX_BUFSIZE + int "Set UART6 RX buffer size" + range 64 65535 + depends on BSP_USING_UART6 && RT_USING_SERIAL_V2 + default 64 + + config BSP_UART6_TX_BUFSIZE + int "Set UART6 TX buffer size" + range 0 65535 + depends on BSP_USING_UART6 && RT_USING_SERIAL_V2 + default 0 + + config BSP_UART6_DMA_PING_BUFSIZE + int "Set UART6 RX DMA ping-pong buffer size" + range 32 65535 + depends on RT_USING_SERIAL_V2 && BSP_UART6_RX_USING_DMA + default 32 + + config BSP_USING_UART7 + bool "Enable UART7" + default n + + config BSP_UART7_RX_USING_DMA + bool "Enable UART7 RX DMA" + depends on BSP_USING_UART7 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART7_TX_USING_DMA + bool "Enable UART7 TX DMA" + depends on BSP_USING_UART7 + select RT_SERIAL_USING_DMA + default n + + config BSP_UART7_RX_BUFSIZE + int "Set UART7 RX buffer size" + range 64 65535 + depends on BSP_USING_UART7 && RT_USING_SERIAL_V2 + default 64 + + config BSP_UART7_TX_BUFSIZE + int "Set UART7 TX buffer size" + range 0 65535 + depends on BSP_USING_UART7 && RT_USING_SERIAL_V2 + default 0 + + config BSP_UART7_DMA_PING_BUFSIZE + int "Set UART7 RX DMA ping-pong buffer size" + range 32 65535 + depends on RT_USING_SERIAL_V2 && BSP_UART7_RX_USING_DMA + default 32 + endif + + menuconfig BSP_USING_SPI + bool "Enable SPI BUS" + default n + select RT_USING_SPI + if BSP_USING_SPI + config BSP_USING_SPI1 + bool "Enable SPI1 BUS" + default n + + config BSP_USING_SPI4 + bool "Enable SPI4 BUS" + default n + endif + + menuconfig BSP_USING_ADC + bool "Enable ADC" + default n + select RT_USING_ADC + if BSP_USING_ADC + config BSP_USING_ADC0 + bool "Enable ADC0" + default n + + config BSP_USING_ADC1 + bool "Enable ADC1" + default n + + config BSP_USING_ADC2 + bool "Enable ADC2" + default n + endif + + menuconfig BSP_USING_TIM + bool "Enable timer" + default n + select RT_USING_HWTIMER + if BSP_USING_TIM + config BSP_USING_TIM10 + bool "Enable TIM10" + default n + + config BSP_USING_TIM11 + bool "Enable TIM11" + default n + + config BSP_USING_TIM12 + bool "Enable TIM13" + default n + endif + + menuconfig BSP_USING_ONCHIP_RTC + bool "Enable RTC" + select RT_USING_RTC + default n + if BSP_USING_ONCHIP_RTC + choice + prompt "Select clock source" + default BSP_RTC_USING_LSE + + config BSP_RTC_USING_LSE + bool "RTC USING LSE" + + config BSP_RTC_USING_LSI + bool "RTC USING LSI" + endchoice + endif + + config BSP_USING_WDT + bool "Enable Watchdog Timer" + select RT_USING_WDT + default n + + config BSP_USING_SDIO + bool "Enable SDIO" + select RT_USING_SDIO + select RT_USING_DFS + default n + + config BSP_USING_USBD + bool "Enable USB Device" + select RT_USING_USB_DEVICE + default n + + menuconfig BSP_USING_USBH + bool "Enable USB Host" + select RT_USING_USB_HOST + default n + if BSP_USING_USBH + menuconfig RT_USBH_MSTORAGE + bool "Enable Udisk Drivers" + default n + if RT_USBH_MSTORAGE + config UDISK_MOUNTPOINT + string "Udisk mount dir" + default "/" + endif + endif + + config BSP_USING_SDRAM + bool "Enable SDRAM" + select RT_USING_SDRAM + default n + + source "$(BSP_DIR)/../libraries/gd32_drivers/Kconfig" + +endmenu + +menu "Board extended module Drivers" + + menuconfig BSP_USING_LCD + bool "Enable LCD" + select RT_USING_LCD + default n + if BSP_USING_LCD + + config BSP_USING_TLI + bool "Enable TLI" + default y + + config BSP_USING_SDRAM + bool "Enable SDRAM" + select RT_USING_SDRAM + default y + + config BSP_USING_TOUCH + bool "Enable TOUCH" + select RT_USING_TOUCH + default n + + config BSP_USING_GPU + bool "Enable GPU" + select RT_USING_GPU + default y + + config BSP_USING_DRAW_PANEL_EXAMPLE + bool "Enable DRAW PANEL EXAMPLE" + select RT_USING_DRAW_PANEL_EXAMPLE + default n + endif + +endmenu + +endmenu diff --git a/bsp/gd32/arm/gd32470i-eval/board/SConscript b/bsp/gd32/arm/gd32470i-eval/board/SConscript new file mode 100644 index 00000000000..492e70b63ae --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/SConscript @@ -0,0 +1,17 @@ +import os +import rtconfig +from building import * + +cwd = GetCurrentDir() + +# add general drivers +src = Split(''' +board.c +''') + +path = [cwd] + +CPPDEFINES = ['GD32F470'] +group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES) + +Return('group') diff --git a/bsp/gd32/arm/gd32470i-eval/board/board.c b/bsp/gd32/arm/gd32470i-eval/board/board.c new file mode 100644 index 00000000000..1c225a7ab2a --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/board.c @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2006-2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + * 2024-03-19 Evlers add serial supports + */ +#include +#include +#include +#include + +#ifdef RT_USING_SERIAL_V2 +#include "drv_usart_v2.h" +#else +#include "drv_usart.h" +#endif + +/** + * @brief This function is executed in case of error occurrence. + * @param None + * @retval None + */ +void Error_Handler(void) +{ + /* USER CODE BEGIN Error_Handler */ + /* User can add his own implementation to report the HAL error return state */ + while (1) + { + } + /* USER CODE END Error_Handler */ +} + +/** System Clock Configuration +*/ +void SystemClock_Config(void) +{ + SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND); + NVIC_SetPriority(SysTick_IRQn, 0); +} + +/** + * This is the timer interrupt service routine. + * + */ +void SysTick_Handler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + rt_tick_increase(); + + /* leave interrupt */ + rt_interrupt_leave(); +} + +/** + * This function will initial GD32 board. + */ +void rt_hw_board_init() +{ + /* NVIC Configuration */ +#define NVIC_VTOR_MASK 0x3FFFFF80 +#ifdef VECT_TAB_RAM + /* Set the Vector Table base location at 0x10000000 */ + SCB->VTOR = (0x10000000 & NVIC_VTOR_MASK); +#else /* VECT_TAB_FLASH */ + /* Set the Vector Table base location at 0x08000000 */ + SCB->VTOR = (0x08000000 & NVIC_VTOR_MASK); +#endif + + SystemClock_Config(); + +#ifdef RT_USING_SERIAL + rt_hw_usart_init(); +#endif + +#ifdef RT_USING_HEAP + rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END); +#endif + +#ifdef RT_USING_CONSOLE + rt_console_set_device(RT_CONSOLE_DEVICE_NAME); +#endif + +#ifdef RT_USING_COMPONENTS_INIT + rt_components_board_init(); +#endif +} + +/*@}*/ + diff --git a/bsp/gd32/arm/gd32470i-eval/board/board.h b/bsp/gd32/arm/gd32470i-eval/board/board.h new file mode 100644 index 00000000000..c3155a25992 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/board.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2006-2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-20 BruceOu first implementation + * 2024-03-19 Evlers remove the include of drv_usart.h + */ +#ifndef __BOARD_H__ +#define __BOARD_H__ + +#include "gd32f4xx.h" +#include "drv_gpio.h" + +#include "gd32f4xx_exti.h" + +#define EXT_SDRAM_BEGIN (0xC0000000U) /* the begining address of external SDRAM */ +#define EXT_SDRAM_END (EXT_SDRAM_BEGIN + (32U * 1024 * 1024)) /* the end address of external SDRAM */ + +/* Internal SRAM memory size[Kbytes] <8-256> */ +/* Default: 192 */ +#ifdef __ICCARM__ +/* Use *.icf ram symbal, to avoid hardcode. */ +extern char __ICFEDIT_region_RAM_end__; +#define GD32_SRAM_END &__ICFEDIT_region_RAM_end__ +#else +#define GD32_SRAM_SIZE 192 +#define GD32_SRAM_END (0x20000000 + GD32_SRAM_SIZE * 1024) +#endif + +#ifdef __ARMCC_VERSION +extern int Image$$RW_IRAM1$$ZI$$Limit; +#define HEAP_BEGIN (&Image$$RW_IRAM1$$ZI$$Limit) +#elif __ICCARM__ +#pragma section="HEAP" +#define HEAP_BEGIN (__segment_end("HEAP")) +#else +extern int __bss_end; +#define HEAP_BEGIN (&__bss_end) +#endif + +#define HEAP_END GD32_SRAM_END + +#endif + diff --git a/bsp/gd32/arm/gd32470i-eval/board/gd32f4xx_libopt.h b/bsp/gd32/arm/gd32470i-eval/board/gd32f4xx_libopt.h new file mode 100644 index 00000000000..ee150e5a01c --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/gd32f4xx_libopt.h @@ -0,0 +1,46 @@ +/*! + \file gd32f4xx_libopt.h + \brief library optional for gd32f4xx +*/ + +/* + Copyright (C) 2016 GigaDevice + + 2016-10-19, V1.0.0, firmware for GD32F4xx +*/ + +#ifndef GD32F4XX_LIBOPT_H +#define GD32F4XX_LIBOPT_H +#include "gd32f4xx_rcu.h" +#include "gd32f4xx_adc.h" +#include "gd32f4xx_can.h" +#include "gd32f4xx_crc.h" +#include "gd32f4xx_ctc.h" +#include "gd32f4xx_dac.h" +#include "gd32f4xx_dbg.h" +#include "gd32f4xx_dci.h" +#include "gd32f4xx_dma.h" +/* #include "gd32f4xx_enet.h" */ +#include "gd32f4xx_exmc.h" +#include "gd32f4xx_exti.h" +#include "gd32f4xx_fmc.h" +#include "gd32f4xx_fwdgt.h" +#include "gd32f4xx_gpio.h" +#include "gd32f4xx_syscfg.h" +#include "gd32f4xx_i2c.h" +#include "gd32f4xx_ipa.h" +#include "gd32f4xx_iref.h" +#include "gd32f4xx_pmu.h" +#include "gd32f4xx_rcu.h" +#include "gd32f4xx_rtc.h" +#include "gd32f4xx_sdio.h" +#include "gd32f4xx_spi.h" +#include "gd32f4xx_timer.h" +#include "gd32f4xx_tli.h" +#include "gd32f4xx_trng.h" +#include "gd32f4xx_usart.h" +#include "gd32f4xx_wwdgt.h" +#include "gd32f4xx_misc.h" + +#endif /* GD32F4XX_LIBOPT_H */ + diff --git a/bsp/gd32/arm/gd32470i-eval/board/linker_scripts/link.icf b/bsp/gd32/arm/gd32470i-eval/board/linker_scripts/link.icf new file mode 100644 index 00000000000..0c38c558970 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/linker_scripts/link.icf @@ -0,0 +1,40 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x080FFFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2006FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x2000; +define symbol __ICFEDIT_size_heap__ = 0x2000; +/**** End of ICF editor section. ###ICF###*/ + +export symbol __ICFEDIT_region_RAM_end__; + +define symbol __region_RAM1_start__ = 0x10000000; +define symbol __region_RAM1_end__ = 0x1000FFFF; + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; +define region RAM1_region = mem:[from __region_RAM1_start__ to __region_RAM1_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +keep { section FSymTab }; +keep { section VSymTab }; +keep { section .rti_fn* }; +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP }; +place in RAM1_region { section .sram }; diff --git a/bsp/gd32/arm/gd32470i-eval/board/linker_scripts/link.ld b/bsp/gd32/arm/gd32470i-eval/board/linker_scripts/link.ld new file mode 100644 index 00000000000..5bec095bfb6 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/linker_scripts/link.ld @@ -0,0 +1,142 @@ +/* + * linker script for GD32F4xx with GNU ld + * BruceOu 2021-12-14 + */ + +/* Program Entry, set to mark it as "used" and avoid gc */ +MEMORY +{ + CODE (rx) : ORIGIN = 0x08000000, LENGTH = 1024k /* 1024KB flash */ + DATA (rw) : ORIGIN = 0x20000000, LENGTH = 448k /* 448KB sram */ +} +ENTRY(Reset_Handler) +_system_stack_size = 0x200; + +SECTIONS +{ + .text : + { + . = ALIGN(4); + _stext = .; + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + *(.gnu.linkonce.t*) + + /* section information for finsh shell */ + . = ALIGN(4); + __fsymtab_start = .; + KEEP(*(FSymTab)) + __fsymtab_end = .; + . = ALIGN(4); + __vsymtab_start = .; + KEEP(*(VSymTab)) + __vsymtab_end = .; + . = ALIGN(4); + + /* section information for initial. */ + . = ALIGN(4); + __rt_init_start = .; + KEEP(*(SORT(.rti_fn*))) + __rt_init_end = .; + . = ALIGN(4); + + . = ALIGN(4); + _etext = .; + } > CODE = 0 + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + + /* This is used by the startup in order to initialize the .data secion */ + _sidata = .; + } > CODE + __exidx_end = .; + + /* .data section which is used for initialized data */ + + .data : AT (_sidata) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + *(.gnu.linkonce.d*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >DATA + + .stack : + { + . = . + _system_stack_size; + . = ALIGN(4); + _estack = .; + } >DATA + + __bss_start = .; + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(.bss.*) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + + *(.bss.init) + } > DATA + __bss_end = .; + + _end = .; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/bsp/gd32/arm/gd32470i-eval/board/linker_scripts/link.sct b/bsp/gd32/arm/gd32470i-eval/board/linker_scripts/link.sct new file mode 100644 index 00000000000..56a5b1213b3 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/linker_scripts/link.sct @@ -0,0 +1,15 @@ +; ************************************************************* +; *** Scatter-Loading Description File generated by uVision *** +; ************************************************************* + +LR_IROM1 0x08000000 0x00100000 { ; load region size_region + ER_IROM1 0x08000000 0x00100000 { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + RW_IRAM1 0x20000000 0x00070000 { ; RW data + .ANY (+RW +ZI) + } +} + diff --git a/bsp/gd32/arm/gd32470i-eval/board/ports/README.md b/bsp/gd32/arm/gd32470i-eval/board/ports/README.md new file mode 100644 index 00000000000..2570ca7875c --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/ports/README.md @@ -0,0 +1,44 @@ +#### 1. 简介 + +用于 GD32F470 立创开发板配套 RGB LCD 屏幕的驱动，支持触摸。 + +> **原作者：LCKFB** +> 本驱动最初由 LCKFB 开发，由 godmial 移植到本BSP。 + +#### 2. 在 ENV 中的开启 +ps：建议全部开启 +``` +Hardware Drivers Config ---> + Board extended module Drivers ---> + Enable LCD ---> + - [*]Enable TLI + - [*]Enable SDRAM + - [*]Enable TOUCH + - [*]Enable GPU + - [*]Enable DRAW PANEL EXAMPLE +``` + +#### 3. 注意事项 + +1. 如果屏幕出现刷新抖动，触摸屏出现连点的情况，可以尝试在 `libraries\GD32F4xx_Firmware_Library\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c` 将时钟值修改为 + `#define __SYSTEM_CLOCK_240M_PLL_25M_HXTAL (uint32_t)(240000000)` + 然后重新编译即可 + +2. 由于代码格式审查原因，本驱动未包含中文显示函数。但可直接移植官方源码中的中文显示函数进行使用。 + +3. 为避免 `scons` 命令编译不通过，代码使用了如下代码段以适配不同编译器： + ``` + #if defined(__CC_ARM) || defined(__ARMCC_VERSION) + // Keil MDK + uint16_t ltdc_lcd_framebuf0[800][480] __attribute__((at(LCD_FRAME_BUF_ADDR))); + #elif defined(__GNUC__) + // GCC (RT-Thread) + uint16_t ltdc_lcd_framebuf0[10][10]; // 此行为避免 scons 编译错误而添加 + #endif + + + +#### 4. 联系方式 + +- 维护：godmial +- 主页： diff --git a/bsp/gd32/arm/gd32470i-eval/board/ports/SConscript b/bsp/gd32/arm/gd32470i-eval/board/ports/SConscript new file mode 100644 index 00000000000..80273b4ffe8 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/ports/SConscript @@ -0,0 +1,25 @@ +Import('RTT_ROOT') +Import('rtconfig') +from building import * + +cwd = GetCurrentDir() + +# add the general drivers. +src = Split(""" +""") + +# add lcd drivers. +if GetDepend('BSP_USING_LCD'): + src += ['drv_lcd.c'] + +if GetDepend('BSP_USING_TOUCH'): + src += ['drv_touch.c'] + +if GetDepend('BSP_USING_DRAW_PANEL_EXAMPLE'): + src += ['draw_panel.c'] + +path = [cwd] + +group = DefineGroup('Applications', src, depend = [''], CPPPATH = path) + +Return('group') diff --git a/bsp/gd32/arm/gd32470i-eval/board/ports/draw_panel.c b/bsp/gd32/arm/gd32470i-eval/board/ports/draw_panel.c new file mode 100644 index 00000000000..4bd12bfd933 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/ports/draw_panel.c @@ -0,0 +1,190 @@ +/* + * Copyright (c) 2006-2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-05-23 godmial Refactor to conform to RT-Thread coding style. + */ + +#include +#include +#include +#include "drv_lcd.h" +#include "drv_touch.h" + +#define COLOR_MAX 14 + +/* Maximum magnification of pixels */ +#define PIXEL_SIZE_MAX 20 + +typedef struct button_struct +{ + uint16_t x; + uint16_t y; + uint16_t w; + uint16_t h; + uint16_t color; + uint16_t value; +} widget_object_t; + +uint16_t color_buf[COLOR_MAX] = {GRAYBLUE, BLACK, BLUE, BRED, GRED, GBLUE, RED, MAGENTA, GREEN, YELLOW, CYAN, BROWN, BRRED, GRAY}; +widget_object_t button_clear, button_color, button_pixel, button_eraser; + + +/** + * @brief Initialize a widget button with given properties. + * + * @param obj Pointer to the widget object. + * @param x X coordinate of the top-left corner. + * @param y Y coordinate of the top-left corner. + * @param w Width of the widget. + * @param h Height of the widget. + * @param color Color value of the widget. + * @param value Initial value of the widget. + * + * @return None. + */ +void widget_object_init(widget_object_t *obj, uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint16_t color, uint16_t value) +{ + obj->x = x; + obj->y = y; + obj->h = h; + obj->w = w; + obj->color = color; + obj->value = value; +} + + +/** + * @brief Initialize and display the user interface. + * + * This function draws the control buttons for clear, color, + * pixel size, and eraser on the screen. + * + * @return None. + */ +void ui_init(void) +{ + char temp_buf[20] = {0}; + + tli_show_button(button_clear.x, button_clear.y, button_clear.w, button_clear.h, 12, button_clear.color); + tli_show_string(button_clear.x + 20, button_clear.y + 20, WHITE, button_clear.color, 2, "clear", 0); + + tli_show_button(button_color.x, button_color.y, button_color.w, button_color.h, 12, button_color.color); + tli_show_string(button_color.x + 20, button_color.y + 20, WHITE, button_color.color, 2, "color", 0); + + tli_show_button(button_pixel.x, button_pixel.y, button_pixel.w, button_pixel.h, 12, button_pixel.color); + if (button_pixel.value == 0) + { + tli_show_string(button_pixel.x + 20, button_pixel.y + 20, WHITE, button_pixel.color, 2, "pixel", 0); + button_pixel.value = 1; + } + else + { + sprintf(temp_buf, "%d", button_pixel.value); + tli_show_string(button_pixel.x + (button_pixel.w / 2) - (strlen(temp_buf) / 2 * 16), button_pixel.y + 20, WHITE, button_pixel.color, 2, (uint8_t *)temp_buf, 0); + } + + tli_show_button(button_eraser.x, button_eraser.y, button_eraser.w, button_eraser.h, 12, button_eraser.color); + tli_show_string(button_eraser.x + (button_eraser.w / 2) - (strlen("eraser") / 2 * 16), button_eraser.y + 20, WHITE, button_eraser.color, 2, "eraser", 0); +} + +/** + * @brief Main routine to test the drawing panel with touch interaction. + * + * Initializes LCD and touch interface, sets up buttons and handles user input + * to draw or erase on the screen based on touch events. + * + * @return Always returns 0. + */ +int draw_panel_test(void) +{ + int touch_state = 0; + char color_num = 0; + char pixel_size = 0; + + lcd_disp_config(); + FT5206_Init(); + tli_draw_rectangle(0, 0, 800, 480, WHITE, 1); + + widget_object_init(&button_clear, 800 - 130, 480 - 80, 120, 70, BLUE, 0); + widget_object_init(&button_color, 10, 480 - 80, 120, 70, BLUE, 0); + widget_object_init(&button_pixel, 400 - 60, 480 - 80, 120, 70, BLUE, pixel_size); + widget_object_init(&button_eraser, 800 - 130 - 130, 480 - 80, 120, 70, BLUE, 0); + + ui_init(); + + while (1) + { + touch_state = FT5206_Scan(0); + if (touch_state == 1) + { + if (tp_dev.x[0] >= button_color.x && tp_dev.x[0] <= (button_color.x + button_color.w)) + { + if (tp_dev.y[0] >= button_color.y && tp_dev.y[0] <= (button_color.y + button_color.h)) + { + letgo_scan(0, button_color.x, button_color.y, (button_color.x + button_color.w), (button_color.y + button_color.h)); + color_num = (color_num + 1) % COLOR_MAX; + widget_object_init(&button_color, button_color.x, button_color.y, button_color.w, button_color.h, color_buf[color_num], 0); + ui_init(); + } + } + + if (tp_dev.x[0] >= button_clear.x && tp_dev.x[0] <= (button_clear.x + button_clear.w)) + { + if (tp_dev.y[0] >= button_clear.y && tp_dev.y[0] <= (button_clear.y + button_clear.h)) + { + letgo_scan(0, button_clear.x, button_clear.y, (button_clear.x + button_clear.w), (button_clear.y + button_clear.h)); + tli_draw_rectangle(0, 0, 800, 480, WHITE, 1); + ui_init(); + } + } + + if (tp_dev.x[0] >= button_pixel.x && tp_dev.x[0] <= (button_pixel.x + button_pixel.w)) + { + if (tp_dev.y[0] >= button_pixel.y && tp_dev.y[0] <= (button_pixel.y + button_pixel.h)) + { + letgo_scan(0, button_pixel.x, button_pixel.y, (button_pixel.x + button_pixel.w), (button_pixel.y + button_pixel.h)); + pixel_size++; + if (pixel_size > PIXEL_SIZE_MAX) pixel_size = 1; + widget_object_init(&button_pixel, button_pixel.x, button_pixel.y, button_pixel.w, button_pixel.h, button_pixel.color, pixel_size); + ui_init(); + } + } + + if (tp_dev.x[0] >= button_eraser.x && tp_dev.x[0] <= (button_eraser.x + button_eraser.w)) + { + if (tp_dev.y[0] >= button_eraser.y && tp_dev.y[0] <= (button_eraser.y + button_eraser.h)) + { + letgo_scan(0, button_eraser.x, button_eraser.y, (button_eraser.x + button_eraser.w), (button_eraser.y + button_eraser.h)); + button_eraser.value = !button_eraser.value; + if (button_eraser.value) + { + widget_object_init(&button_eraser, 800 - 130 - 130, 480 - 80, 120, 70, BLACK, button_eraser.value); + } + else + { + widget_object_init(&button_eraser, 800 - 130 - 130, 480 - 80, 120, 70, BLUE, button_eraser.value); + } + + ui_init(); + } + } + + + if (!button_eraser.value) + { + tli_point_enlarge(tp_dev.x[0], tp_dev.y[0], color_buf[color_num], button_pixel.value); + } + else + { + tli_point_enlarge(tp_dev.x[0], tp_dev.y[0], WHITE, button_pixel.value); + } + } + } +} + +INIT_COMPONENT_EXPORT(draw_panel_test); + diff --git a/bsp/gd32/arm/gd32470i-eval/board/ports/drv_lcd.c b/bsp/gd32/arm/gd32470i-eval/board/ports/drv_lcd.c new file mode 100644 index 00000000000..726e30d2a8b --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/ports/drv_lcd.c @@ -0,0 +1,839 @@ +/* + * Copyright (c) 2006-2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-05-23 godmial Refactor to conform to RT-Thread coding style. + */ + +#include +#include "gd32f4xx.h" +#include "gd32f4xx_tli.h" +#include "drv_lcd.h" +#include "font.h" + + +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) +/* Keil MDK Compiler */ +uint16_t ltdc_lcd_framebuf0[800][480] __attribute__((at(LCD_FRAME_BUF_ADDR))); +#elif defined(__GNUC__) +/* GCC Compiler (used by RT-Thread) */ +uint16_t ltdc_lcd_framebuf0[10][10]; +#endif + +static void tli_gpio_config(void); +static void tli_config(void); +static void ipa_config(void); +static void lcd_disp_en_config(void); +static void lcd_disp_off(void); +static void lcd_disp_on(void); + + +/** + * @brief Configure and initialize the LCD display. + * + * @note This function enables display power, initializes TLI GPIO and IPA, + * and sets up TLI and its layer configuration. + * + * @param None + * + * @return None + * + * @warning Should be called during system initialization phase. + */ +void lcd_disp_config(void) +{ + lcd_disp_en_config(); + lcd_disp_off(); + + /* configure the GPIO of TLI */ + tli_gpio_config(); + lcd_disp_on(); + + tli_config(); + tli_layer_enable(LAYER0); + tli_reload_config(TLI_FRAME_BLANK_RELOAD_EN); + tli_enable(); + ipa_config(); +} + +/** + * @brief Initialize the TLI peripheral and layer configuration. + * + * @note This function sets up the TLI clock, background color, timing parameters, + * and layer 0 settings including framebuffer and blending configuration. + * + * @param None + * + * @return None + * + * @warning Must be called after clock and GPIO initialization. + */ +static void tli_config(void) +{ + tli_parameter_struct tli_init_struct; + tli_layer_parameter_struct tli_layer_init_struct; + + rcu_periph_clock_enable(RCU_TLI); + tli_gpio_config(); + /* configure PLLSAI to generate TLI clock */ + /* if(ERROR == rcu_pllsai_config(216, 2, 3)) */ + { + if (ERROR == rcu_pllsai_config(192, 2, 3)) + { + while (1); + } + rcu_tli_clock_div_config(RCU_PLLSAIR_DIV2); + + rcu_osci_on(RCU_PLLSAI_CK); + + if (ERROR == rcu_osci_stab_wait(RCU_PLLSAI_CK)) + { + while (1); + } + + /* configure TLI parameter struct */ + tli_init_struct.signalpolarity_hs = TLI_HSYN_ACTLIVE_LOW; + tli_init_struct.signalpolarity_vs = TLI_VSYN_ACTLIVE_LOW; + tli_init_struct.signalpolarity_de = TLI_DE_ACTLIVE_LOW; + tli_init_struct.signalpolarity_pixelck = TLI_PIXEL_CLOCK_TLI; + /* LCD display timing configuration */ + tli_init_struct.synpsz_hpsz = HORIZONTAL_SYNCHRONOUS_PULSE - 1; + tli_init_struct.synpsz_vpsz = VERTICAL_SYNCHRONOUS_PULSE - 1; + tli_init_struct.backpsz_hbpsz = HORIZONTAL_SYNCHRONOUS_PULSE + HORIZONTAL_BACK_PORCH - 1; + tli_init_struct.backpsz_vbpsz = VERTICAL_SYNCHRONOUS_PULSE + VERTICAL_BACK_PORCH - 1; + tli_init_struct.activesz_hasz = HORIZONTAL_SYNCHRONOUS_PULSE + HORIZONTAL_BACK_PORCH + ACTIVE_WIDTH - 1; + tli_init_struct.activesz_vasz = VERTICAL_SYNCHRONOUS_PULSE + VERTICAL_BACK_PORCH + ACTIVE_HEIGHT - 1; + tli_init_struct.totalsz_htsz = HORIZONTAL_SYNCHRONOUS_PULSE + HORIZONTAL_BACK_PORCH + ACTIVE_WIDTH + HORIZONTAL_FRONT_PORCH - 1; + tli_init_struct.totalsz_vtsz = VERTICAL_SYNCHRONOUS_PULSE + VERTICAL_BACK_PORCH + ACTIVE_HEIGHT + VERTICAL_FRONT_PORCH - 1; + /* configure LCD background R,G,B values */ + tli_init_struct.backcolor_red = 0xFF; + tli_init_struct.backcolor_green = 0xFF; + tli_init_struct.backcolor_blue = 0xFF; + tli_init(&tli_init_struct); + +#if 1 + /* TLI layer0 configuration */ + /* TLI window size configuration */ + tli_layer_init_struct.layer_window_leftpos = HORIZONTAL_SYNCHRONOUS_PULSE + HORIZONTAL_BACK_PORCH; + tli_layer_init_struct.layer_window_rightpos = (ACTIVE_WIDTH + HORIZONTAL_SYNCHRONOUS_PULSE + HORIZONTAL_BACK_PORCH - 1); + tli_layer_init_struct.layer_window_toppos = VERTICAL_SYNCHRONOUS_PULSE + VERTICAL_BACK_PORCH; + tli_layer_init_struct.layer_window_bottompos = (ACTIVE_HEIGHT + VERTICAL_SYNCHRONOUS_PULSE + VERTICAL_BACK_PORCH - 1); + /* TLI window pixel format configuration */ + tli_layer_init_struct.layer_ppf = LAYER_PPF_RGB565; + /* TLI window specified alpha configuration */ + tli_layer_init_struct.layer_sa = 255; + /* TLI layer default alpha R,G,B value configuration */ + tli_layer_init_struct.layer_default_blue = 0x00; + tli_layer_init_struct.layer_default_green = 0x00; + tli_layer_init_struct.layer_default_red = 0x00; + tli_layer_init_struct.layer_default_alpha = 0x00; + /* TLI window blend configuration */ + tli_layer_init_struct.layer_acf1 = LAYER_ACF1_SA; + tli_layer_init_struct.layer_acf2 = LAYER_ACF2_SA; + /* TLI layer frame buffer base address configuration */ + tli_layer_init_struct.layer_frame_bufaddr = (uint32_t)ltdc_lcd_framebuf0; + tli_layer_init_struct.layer_frame_line_length = ((ACTIVE_WIDTH * 2) + 3); + tli_layer_init_struct.layer_frame_buf_stride_offset = (ACTIVE_WIDTH * 2); + tli_layer_init_struct.layer_frame_total_line_number = ACTIVE_HEIGHT; + tli_layer_init(LAYER0, &tli_layer_init_struct); + tli_dither_config(TLI_DITHER_ENABLE); +#endif +} + +/** + * @brief Initialize the IPA peripheral. + * + * @note Enable clock and interrupt for the IPA module. + * + * @param None + * + * @return None + */ +static void ipa_config(void) +{ + rcu_periph_clock_enable(RCU_IPA); + nvic_irq_enable(IPA_IRQn, 0, 2); +} + +/** + * @brief Configure the GPIO pins used for TLI display. + * + * @note Includes alternate function mapping and output mode setup + * for RGB and sync signals. + * + * @param None + * + * @return None + */ +static void tli_gpio_config(void) +{ + /* enable the periphral clock */ + rcu_periph_clock_enable(RCU_GPIOA); + rcu_periph_clock_enable(RCU_GPIOB); + rcu_periph_clock_enable(RCU_GPIOC); + rcu_periph_clock_enable(RCU_GPIOD); + rcu_periph_clock_enable(RCU_GPIOF); + rcu_periph_clock_enable(RCU_GPIOG); + + /* configure HSYNC(PC6), VSYNC(PA4), PCLK(PG7), DE(PF10) */ + /* configure LCD_R7(PG6), LCD_R6(PA8), LCD_R5(PA12), LCD_R4(PA11), LCD_R3(PB0), + LCD_G7(PD3), LCD_G6(PC7), LCD_G5(PB11), LCD_G4(PB10), LCD_G3(PG10), LCD_G2(PA6), + LCD_B7(PB9), LCD_B6(PB8), LCD_B5(PA3), LCD_B4(PG12), LCD_B3(PG11) */ + gpio_af_set(GPIOA, GPIO_AF_14, GPIO_PIN_3); + gpio_af_set(GPIOA, GPIO_AF_14, GPIO_PIN_4); + gpio_af_set(GPIOA, GPIO_AF_14, GPIO_PIN_6); + gpio_af_set(GPIOA, GPIO_AF_14, GPIO_PIN_8); + gpio_af_set(GPIOA, GPIO_AF_14, GPIO_PIN_11); + gpio_af_set(GPIOA, GPIO_AF_14, GPIO_PIN_12); + + gpio_af_set(GPIOB, GPIO_AF_9, GPIO_PIN_0); + gpio_af_set(GPIOB, GPIO_AF_14, GPIO_PIN_8); + gpio_af_set(GPIOB, GPIO_AF_14, GPIO_PIN_9); + gpio_af_set(GPIOB, GPIO_AF_14, GPIO_PIN_10); + gpio_af_set(GPIOB, GPIO_AF_14, GPIO_PIN_11); + + gpio_af_set(GPIOC, GPIO_AF_14, GPIO_PIN_6); + gpio_af_set(GPIOC, GPIO_AF_14, GPIO_PIN_7); + + gpio_af_set(GPIOD, GPIO_AF_14, GPIO_PIN_3); + + gpio_af_set(GPIOF, GPIO_AF_14, GPIO_PIN_10); + + gpio_af_set(GPIOG, GPIO_AF_14, GPIO_PIN_6); + gpio_af_set(GPIOG, GPIO_AF_14, GPIO_PIN_7); + gpio_af_set(GPIOG, GPIO_AF_9, GPIO_PIN_10); + gpio_af_set(GPIOG, GPIO_AF_14, GPIO_PIN_11); + gpio_af_set(GPIOG, GPIO_AF_9, GPIO_PIN_12); + + gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_6 | GPIO_PIN_8 | GPIO_PIN_11 | GPIO_PIN_12); + gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_6 | GPIO_PIN_8 | GPIO_PIN_11 | GPIO_PIN_12); + + gpio_mode_set(GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_0 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11); + gpio_output_options_set(GPIOB, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_0 | GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10 | GPIO_PIN_11); + + gpio_mode_set(GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_6 | GPIO_PIN_7); + gpio_output_options_set(GPIOC, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_6 | GPIO_PIN_7); + + gpio_mode_set(GPIOD, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_3); + gpio_output_options_set(GPIOD, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_3); + + gpio_mode_set(GPIOF, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_10); + gpio_output_options_set(GPIOF, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_10); + + gpio_mode_set(GPIOG, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12); + gpio_output_options_set(GPIOG, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_6 | GPIO_PIN_7 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12); +} + +/** + * @brief Configure the GPIO pin for DISP enable control. + * + * @note This function enables the clock for GPIOD and sets up pin 13 + * as push-pull output to control the display on/off signal. + * + * @param None + * + * @return None + * + * @warning Must be called before attempting to control the LCD display. + */ +static void lcd_disp_en_config(void) +{ + /* enable the periphral clock */ + rcu_periph_clock_enable(RCU_GPIOD); + gpio_mode_set(GPIOD, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO_PIN_13); + gpio_output_options_set(GPIOD, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, GPIO_PIN_13); +} + +/** + * @brief Turn off the LCD display by resetting the DISP GPIO. + * + * @note This function clears the DISP control pin to disable + * the LCD backlight or power depending on hardware design. + * + * @param None + * + * @return None + * + * @warning Only valid if the DISP GPIO has been previously configured. + */ +static void lcd_disp_off(void) +{ + gpio_bit_reset(GPIOD, GPIO_PIN_13); +} + +/** + * @brief Turn on the LCD display by setting the DISP GPIO. + * + * @note This function sets the DISP control pin to enable + * the LCD backlight or power depending on hardware design. + * + * @param None + * + * @return None + * + * @warning Only valid if the DISP GPIO has been previously configured. + */ +static void lcd_disp_on(void) +{ + gpio_bit_set(GPIOD, GPIO_PIN_13); +} + + +/** + * @brief Draw a pixel on the LCD at specified coordinates. + * + * @note This function writes a color value directly to the framebuffer. + * Coordinates must be within the valid LCD dimensions. + * + * @param x Horizontal coordinate of the pixel. + * @param y Vertical coordinate of the pixel. + * @param color Color of the pixel in RGB565 format. + * + * @return None + */ +void tli_draw_point(uint16_t x, uint16_t y, uint16_t color) +{ + *(ltdc_lcd_framebuf0[0] + (LCD_WIDTH * y + x)) = color; +} + +/** + * @brief Draw a straight line between two points. + * + * @note Uses Bresenham's line drawing algorithm to connect two points. + * Coordinates should be within LCD bounds. + * + * @param sx Start point X coordinate. + * @param sy Start point Y coordinate. + * @param ex End point X coordinate. + * @param ey End point Y coordinate. + * @param color Line color in RGB565 format. + * + * @return None + */ +void tli_draw_line(uint16_t sx, uint16_t sy, uint16_t ex, uint16_t ey, uint16_t color) +{ + uint16_t t; + int xerr = 0, yerr = 0, delta_x, delta_y, distance; + int incx, incy, uRow, uCol; + + delta_x = ex - sx; + delta_y = ey - sy; + uRow = sx; + uCol = sy; + if (delta_x > 0) + incx = 1; + else if (delta_x == 0) + incx = 0; + else + { + incx = -1; + delta_x = -delta_x; + } + + if (delta_y > 0) + incy = 1; + else if (delta_y == 0) + incy = 0; + else + { + incy = -1; + delta_y = -delta_y; + } + + if (delta_x > delta_y) + distance = delta_x; + else + distance = delta_y; + for (t = 0; t <= distance + 1; t++) + { + tli_draw_point(uRow, uCol, color); + xerr += delta_x; + yerr += delta_y; + if (xerr > distance) + { + xerr -= distance; + uRow += incx; + } + + if (yerr > distance) + { + yerr -= distance; + uCol += incy; + } + } +} +/** + * @brief Draw a rectangle on the screen, optionally filled. + * + * @note The rectangle is defined by top-left and bottom-right corners. + * If fill is set to 1, the rectangle will be filled with the color. + * + * @param sx X coordinate of the top-left corner. + * @param sy Y coordinate of the top-left corner. + * @param ex X coordinate of the bottom-right corner. + * @param ey Y coordinate of the bottom-right corner. + * @param color Color of the rectangle in RGB565 format. + * @param fill Fill mode: 1 = filled, 0 = only borders. + * + * @return None + */ +void tli_draw_rectangle(uint16_t sx, uint16_t sy, uint16_t ex, uint16_t ey, uint16_t color, uint16_t fill) +{ + int i = 0, j = 0; + if (fill) + { + for (i = sx; i < ex; i++) + { + for (j = sy; j < ey; j++) + { + tli_draw_point(i, j, color); + } + } + } + else + { + tli_draw_line(sx, sy, ex, sy, color); + tli_draw_line(sx, sy, sx, ey, color); + tli_draw_line(sx, ey, ex, ey, color); + tli_draw_line(ex, sy, ex, ey, color); + } +} + +/** + * @brief Draw eight symmetric points of a circle. + * + * @note This function is used internally to draw points in all eight + * symmetrical positions around a circle center. + * + * @param xc X coordinate of the circle center. + * @param yc Y coordinate of the circle center. + * @param x Relative X offset from the center. + * @param y Relative Y offset from the center. + * @param c Color of the point in RGB565 format. + * + * @return None + */ + +static void _draw_circle_8(int xc, int yc, int x, int y, uint16_t c) +{ + tli_draw_point(xc + x, yc + y, c); + + tli_draw_point(xc - x, yc + y, c); + + tli_draw_point(xc + x, yc - y, c); + + tli_draw_point(xc - x, yc - y, c); + + tli_draw_point(xc + y, yc + x, c); + + tli_draw_point(xc - y, yc + x, c); + + tli_draw_point(xc + y, yc - x, c); + + tli_draw_point(xc - y, yc - x, c); +} + +/** + * @brief Draw a circle on the screen with optional fill. + * + * @note Uses the midpoint circle algorithm to render the circle. + * When fill is enabled, the circle is drawn as a filled disk. + * + * @param xc X coordinate of the circle center. + * @param yc Y coordinate of the circle center. + * @param c Color of the circle in RGB565 format. + * @param r Radius of the circle. + * @param fill Fill mode: 1 = filled, 0 = outline only. + * + * @return None + */ +void tli_draw_circle(int xc, int yc, uint16_t c, int r, int fill) +{ + int x = 0, y = r, yi, d; + + d = 3 - 2 * r; + + if (fill) + { + while (x <= y) + { + for (yi = x; yi <= y; yi++) + _draw_circle_8(xc, yc, x, yi, c); + + if (d < 0) + { + d = d + 4 * x + 6; + } + else + { + d = d + 4 * (x - y) + 10; + y--; + } + x++; + } + } + else + { + while (x <= y) + { + _draw_circle_8(xc, yc, x, y, c); + if (d < 0) + { + d = d + 4 * x + 6; + } + else + { + d = d + 4 * (x - y) + 10; + y--; + } + x++; + } + } +} + +/** + * @brief Swap the values of two 16-bit unsigned integers. + * + * @note This utility function is used internally to simplify sorting + * or reordering logic, such as coordinate alignment. + * + * @param a Pointer to the first variable. + * @param b Pointer to the second variable. + * + * @return None + */ +static void _swap(uint16_t *a, uint16_t *b) +{ + uint16_t tmp; + tmp = *a; + *a = *b; + *b = tmp; +} + +/** + * @brief Draw a triangle with optional fill. + * + * @note The triangle is defined by three vertex points. When fill is set, + * it is rendered as a filled triangle using scan-line rasterization. + * + * @param x0 X coordinate of the first vertex. + * @param y0 Y coordinate of the first vertex. + * @param x1 X coordinate of the second vertex (typically the top). + * @param y1 Y coordinate of the second vertex. + * @param x2 X coordinate of the third vertex. + * @param y2 Y coordinate of the third vertex. + * @param color Color of the triangle in RGB565 format. + * @param fill Fill mode: 1 = filled, 0 = outline only. + * + * @return None + */ +void tli_draw_triangle(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t color, uint16_t fill) +{ + uint16_t a, b, y, last; + int dx01, dy01, dx02, dy02, dx12, dy12; + long sa = 0; + long sb = 0; + + if (fill == 0) + { + tli_draw_line(x0, y0, x1, y1, color); + tli_draw_line(x1, y1, x2, y2, color); + tli_draw_line(x2, y2, x0, y0, color); + } + else + { + if (y0 > y1) + { + _swap(&y0, &y1); + _swap(&x0, &x1); + } + + if (y1 > y2) + { + _swap(&y2, &y1); + _swap(&x2, &x1); + } + + if (y0 > y1) + { + _swap(&y0, &y1); + _swap(&x0, &x1); + } + + if (y0 == y2) + { + a = b = x0; + if (x1 < a) + { + a = x1; + } + else if (x1 > b) + { + b = x1; + } + + if (x2 < a) + { + a = x2; + } + else if (x2 > b) + { + b = x2; + } + tli_draw_rectangle(a, y0, b, y0, color, 0); + return; + } + dx01 = x1 - x0; + dy01 = y1 - y0; + dx02 = x2 - x0; + dy02 = y2 - y0; + dx12 = x2 - x1; + dy12 = y2 - y1; + + if (y1 == y2) + { + last = y1; + } + else + { + last = y1 - 1; + } + + for (y = y0; y <= last; y++) + { + a = x0 + sa / dy01; + b = x0 + sb / dy02; + sa += dx01; + sb += dx02; + if (a > b) + { + _swap(&a, &b); + } + tli_draw_rectangle(a, y, b, y, color, 0); + } + sa = dx12 * (y - y1); + sb = dx02 * (y - y0); + for (; y <= y2; y++) + { + a = x1 + sa / dy12; + b = x0 + sb / dy02; + sa += dx12; + sb += dx02; + if (a > b) + { + _swap(&a, &b); + } + + tli_draw_rectangle(a, y, b, y, color, 0); + } + } +} + + +/** + * @brief Enlarge a single point by drawing a square block. + * + * @note The enlarged point is drawn as a 2D cross pattern made of four + * rectangles centered at (x, y) with specified magnification. + * + * @param x X coordinate of the center point. + * @param y Y coordinate of the center point. + * @param color Color to fill the enlarged point. + * @param magnify Enlargement factor (minimum value is 1). + * + * @return None + */ +void tli_point_enlarge(uint16_t x, uint16_t y, uint16_t color, char magnify) +{ + tli_draw_rectangle(x - magnify, y - magnify, x, y, color, 1); + + tli_draw_rectangle(x, y - magnify, x + magnify, y, color, 1); + + tli_draw_rectangle(x - magnify, y, x, y + magnify, color, 1); + + tli_draw_rectangle(x, y, x + magnify, y + magnify, color, 1); +} + +/** + * @brief Display a single ASCII character at the specified position. + * + * @note Uses a fixed-size 16x8 font to render the character with optional + * enlargement and overlay mode. + * + * @param x X coordinate of the character start position. + * @param y Y coordinate of the character start position. + * @param fc Foreground color. + * @param bc Background color. + * @param num ASCII character to display. + * @param size Enlargement factor (minimum 1). + * @param mode Overlay mode: 0 = non-overlay, 1 = overlay. + * + * @return None + */ +void tli_show_char(uint16_t x, uint16_t y, uint16_t fc, uint16_t bc, uint8_t num, uint8_t size, uint8_t mode) +{ + uint8_t temp; + uint8_t pos, t; + uint16_t x0 = 0; + uint16_t y0 = 0; + num = num - ' '; + + for (pos = 0; pos < 16; pos++) + { + temp = asc2_1608[num][pos]; + for (t = 0; t < 16 / 2; t++) + { + if (!mode) + { + if (temp & 0x01) + tli_point_enlarge(x + x0, y + y0, fc, size); + else + tli_point_enlarge(x + x0, y + y0, bc, size); + } + else + { + if (temp & 0x01) tli_point_enlarge(x + x0, y + y0, fc, size); + } + temp >>= 1; + x0 = x0 + size; + } + x0 = 0; + y0 = y0 + size; + } +} + +/** + * @brief Display a null-terminated ASCII string on the screen. + * + * @note Automatically handles line boundaries and skips illegal characters. + * + * @param x X coordinate of the start position. + * @param y Y coordinate of the start position. + * @param fc Foreground color. + * @param bc Background color. + * @param size Font enlargement factor (base size is 16x8). + * @param p Pointer to the string. + * @param mode Overlay mode: 0 = non-overlay, 1 = overlay. + * + * @return None + */ +void tli_show_string(uint16_t x, uint16_t y, uint16_t fc, uint16_t bc, uint8_t size, uint8_t *p, uint8_t mode) +{ + while ((*p <= '~') && (*p >= ' ')) + { + if (x > (LCD_WIDTH - 1) || y > (LCD_HEIGHT - 1)) return; + + tli_show_char(x, y, fc, bc, *p, size, mode); + x += 16 * size / 2; + p++; + } +} + + +/** + * @brief Display a picture at a specified position on the screen. + * + * @note The image data is expected to be in RGB565 format, with each pixel + * occupying two consecutive bytes in the array. + * + * @param x X coordinate of the top-left corner. + * @param y Y coordinate of the top-left corner. + * @param w Width of the image in pixels. + * @param h Height of the image in pixels. + * @param pic Pointer to the image data array. + * + * @return None + */ +void tli_show_picture(uint16_t x, uint16_t y, uint16_t w, uint16_t h, const unsigned char pic[]) +{ + uint16_t i, j; + uint32_t k = 0; + uint16_t x0 = x, y0 = y; + for (i = y; i < h + y0; i++) + { + for (j = x; j < w + x0; j++) + { + tli_draw_point(j, i, pic[k * 2] << 8 | pic[k * 2 + 1]); + k++; + } + } +} + + +/** + * @brief Draw a filled rounded rectangle button. + * + * @note This function draws a button with four rounded corners and fills + * the background. The radius must be less than half of the height. + * + * @param x X coordinate of the top-left corner. + * @param y Y coordinate of the top-left corner. + * @param width Width of the button. + * @param height Height of the button. + * @param radius Radius of the corners. + * @param color Fill color of the button. + * + * @return None + */ +void tli_show_button(uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint16_t radius, uint16_t color) +{ + int i = 0; + int j = 0; + + + if (radius >= (height / 2)) return; + + + tli_draw_circle(x + radius, y + radius, color, radius, 1); + tli_draw_circle(x + width - radius - 1, y + radius, color, radius, 1); + tli_draw_circle(x + radius, y + height - radius - 1, color, radius, 1); + tli_draw_circle(x + width - radius - 1, y + height - radius - 1, color, radius, 1); + + tli_draw_line(x + radius, y, x + width - radius - 1, y, color); + tli_draw_line(x + radius, y + height - 1, x + width - radius - 1, y + height - 1, color); + tli_draw_line(x, y + radius, x, y + height - radius - 1, color); + tli_draw_line(x + width - 1, y + radius, x + width - 1, y + height - radius - 1, color); + + tli_draw_rectangle(x + radius, y + radius, x + width - radius, y + height - radius, color, 1); + tli_draw_rectangle(x + radius, y, x + width - radius, y + radius, color, 1); + tli_draw_rectangle(x, y + radius, x + width, y + height - radius, color, 1); + tli_draw_rectangle(x + radius, y + height - radius, x + width - radius, y + height, color, 1); +} + +/** + * @brief Draw a switch (toggle) component with visual state. + * + * @note The switch has a rounded rectangle base with a circular knob + * indicating on or off state. Automatically validates layout rules. + * + * @param x X coordinate of the top-left corner. + * @param y Y coordinate of the top-left corner. + * @param width Total width of the switch. + * @param height Total height of the switch. + * @param on_color Color of the switch when turned on. + * @param off_color Color of the switch when turned off. + * @param sw Switch state: 1 = on, 0 = off. + * + * @return None + */ +void tli_show_switch(uint16_t x, uint16_t y, uint16_t width, uint16_t height, uint16_t on_color, uint16_t off_color, char sw) +{ + int radius = height / 2 - 1; + + if (width < 2 * (radius + 1)) return; + + if (sw == 0) + { + tli_show_button(x, y, width, height, radius, off_color); + tli_draw_circle(x + radius, y + radius, WHITE, radius / 2, 1); + } + else + { + tli_show_button(x, y, width, height, radius, on_color); + tli_draw_circle(x + width - radius, y + radius, WHITE, radius / 2, 1); + } +} + diff --git a/bsp/gd32/arm/gd32470i-eval/board/ports/drv_lcd.h b/bsp/gd32/arm/gd32470i-eval/board/ports/drv_lcd.h new file mode 100644 index 00000000000..185e5044175 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/ports/drv_lcd.h @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2006-2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-05-23 godmial Refactor to conform to RT-Thread coding style. + */ + +#ifndef __DRV_LCD_H__ +#define __DRV_LCD_H__ + +#include +#include +#include +#ifdef BSP_USING_SDRAM +#include +#endif /* BSP_USING_SDRAM */ + +/******************************************************************************* + * Definitions + ******************************************************************************/ + +/* LCD resolution and pixel format */ +#define LCD_WIDTH 800 +#define LCD_HEIGHT 480 +#define LCD_FB_BYTE_PER_PIXEL 1 + +/* Timing parameters for horizontal synchronization */ +#define HORIZONTAL_SYNCHRONOUS_PULSE 10 +#define HORIZONTAL_BACK_PORCH 150 +#define ACTIVE_WIDTH 800 +#define HORIZONTAL_FRONT_PORCH 15 + +/* Timing parameters for vertical synchronization */ +#define VERTICAL_SYNCHRONOUS_PULSE 10 +#define VERTICAL_BACK_PORCH 140 +#define ACTIVE_HEIGHT 480 +#define VERTICAL_FRONT_PORCH 40 + +/* Framebuffer address in SDRAM */ +#define LCD_FRAME_BUF_ADDR 0xC0000000 /* SDRAM address for LCD frame buffer */ + +/* Pen color definitions (RGB565) */ +#define WHITE 0xFFFF /* White */ +#define BLACK 0x0000 /* Black */ +#define BLUE 0x001F /* Blue */ +#define BRED 0xF81F /* Blue-Red */ +#define GRED 0xFFE0 /* Green-Red */ +#define GBLUE 0x07FF /* Green-Blue */ +#define RED 0xF800 /* Red */ +#define MAGENTA 0xF81F /* Magenta */ +#define GREEN 0x07E0 /* Green */ +#define CYAN 0x7FFF /* Cyan */ +#define YELLOW 0xFFE0 /* Yellow */ +#define BROWN 0xBC40 /* Brown */ +#define BRRED 0xFC07 /* Brownish red */ +#define GRAY 0x8430 /* Gray */ + +/* GUI color definitions */ +#define DARKBLUE 0x01CF /* Dark blue */ +#define LIGHTBLUE 0x7D7C /* Light blue */ +#define GRAYBLUE 0x5458 /* Grayish blue */ +#define LIGHTGREEN 0x841F /* Light green */ +#define LGRAY 0xC618 /* Light gray (panel background) */ +#define LGRAYBLUE 0xA651 /* Light gray-blue (layer color) */ +#define LBBLUE 0x2B12 /* Light brown-blue (selected item reverse color) */ + +/* Frame buffer declaration based on compiler */ +#if defined(__CC_ARM) || defined(__ARMCC_VERSION) +/* Keil MDK Compiler */ +extern uint16_t ltdc_lcd_framebuf0[800][480] __attribute__((at(LCD_FRAME_BUF_ADDR))); +#elif defined(__GNUC__) +/* GCC Compiler (used by RT-Thread) */ +extern uint16_t ltdc_lcd_framebuf0[10][10]; /* Dummy for GCC compilation */ +#endif + +/******************************************************************************* + * API + ******************************************************************************/ + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @brief Configure the LCD display controller. + * + * @note This function initializes display timing and output settings. + */ +void lcd_disp_config(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __DRV_LCD_H__ */ + diff --git a/bsp/gd32/arm/gd32470i-eval/board/ports/drv_touch.c b/bsp/gd32/arm/gd32470i-eval/board/ports/drv_touch.c new file mode 100644 index 00000000000..69c638c0b99 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/ports/drv_touch.c @@ -0,0 +1,483 @@ +/* + * Copyright (c) 2006-2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-05-23 godmial Refactor to conform to RT-Thread coding style. + */ + +#include +#include +#include +#include "drv_touch.h" +#include "drv_lcd.h" + +#define DRV_DEBUG +#define LOG_TAG "drv.touch" +#include + +_m_tp_dev tp_dev; + +const uint16_t FT5206_TPX_TBL[5] = {FT_TP1_REG, FT_TP2_REG, FT_TP3_REG, FT_TP4_REG, FT_TP5_REG}; +uint8_t g_gt_tnum = 5; /**< Default number of supported touch points (5-point touch) */ + + +/** + * @brief Delay for a specified number of microseconds. + * + * @note This function uses the SysTick timer to implement microsecond delay by polling. + * + * @param _nus Number of microseconds to delay. + */ +void delay_us(uint32_t _nus) +{ + uint8_t fac_us = 0; + uint32_t ticks; + uint32_t t_old, t_now, t_cnt = 0; + uint32_t reload = SysTick->LOAD; + + fac_us = SystemCoreClock / 1000000; + ticks = _nus * fac_us - fac_us * 7 / 20; + t_old = SysTick->VAL; + + while (1) + { + t_now = SysTick->VAL; + + if (t_now < t_old) + { + t_cnt += t_old - t_now; + } + else + { + t_cnt += t_old + (reload - t_now); + } + + if (t_cnt >= ticks) + { + break; + } + + t_old = t_now; + }; +} + + +/** + * @brief Delay function wrapper for touch operations. + * + * @param us Number of microseconds to delay. + */ +void touch_delay_1us(uint16_t us) +{ + delay_us(us); +} + +/** + * @brief Delay to control I2C speed. + * + * @note Used between I2C signal toggles to ensure proper timing. + */ +void CT_Delay(void) +{ + touch_delay_1us(2); +} + +/** + * @brief Initialize the I2C interface for the capacitive touch chip. + * + * @note Configures GPIO ports for SCL and SDA lines as outputs with pull-up resistors. + */ +void CT_IIC_Init(void) +{ + /* enable the led clock */ + rcu_periph_clock_enable(SCL_RCU); + /* configure led GPIO port */ + gpio_mode_set(SCL_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, SCL_PIN); + gpio_output_options_set(SCL_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, SCL_PIN); + + rcu_periph_clock_enable(SDA_RCU); + gpio_mode_set(SDA_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, SDA_PIN); + gpio_output_options_set(SDA_PORT, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, SDA_PIN); +} + +/** + * @brief Generate I2C start condition. + * + * @note Starts communication by pulling SDA low while SCL is high. + */ +void CT_IIC_Start(void) +{ + CT_SDA_OUT(); + SDA_ON; + SCL_ON; + touch_delay_1us(30); + SDA_OFF; + CT_Delay(); + SCL_OFF; +} + +/** + * @brief Generate I2C stop condition. + * + * @note Ends communication by pulling SDA high while SCL is high. + */ +void CT_IIC_Stop(void) +{ + CT_SDA_OUT(); + SCL_ON; + touch_delay_1us(30); + SDA_OFF; + CT_Delay(); + SDA_ON; +} + +/** + * @brief Wait for I2C ACK signal. + * + * @return 0 if ACK received successfully, 1 if timeout occurred. + * + * @warning If ACK is not received within 250 iterations, a stop condition is generated. + */ +uint8_t CT_IIC_Wait_Ack(void) +{ + uint8_t ucErrTime = 0; + CT_SDA_IN(); + SDA_ON; + SCL_ON; + CT_Delay(); + while (CT_READ_SDA) + { + ucErrTime++; + if (ucErrTime > 250) + { + CT_IIC_Stop(); + return 1; + } + CT_Delay(); + } + SCL_OFF; + return 0; +} + +/** + * @brief Generate I2C ACK signal. + * + * @note This is used to acknowledge receipt of a byte in I2C communication. + */ +void CT_IIC_Ack(void) +{ + SCL_OFF; + CT_SDA_OUT(); + CT_Delay(); + SDA_OFF; + CT_Delay(); + SCL_ON; + CT_Delay(); + SCL_OFF; +} + +/** + * @brief Generate I2C NACK signal. + * + * @note This is used to indicate the end of reading in I2C communication. + */ +void CT_IIC_NAck(void) +{ + SCL_OFF; + CT_SDA_OUT(); + CT_Delay(); + SDA_ON; + CT_Delay(); + SCL_ON; + CT_Delay(); + SCL_OFF; +} + + +/** + * @brief Send a byte over I2C. + * + * @param txd Byte to send. + * + * @note Sends 8 bits starting from the MSB over the SDA line. + */ +void CT_IIC_Send_Byte(uint8_t txd) +{ + uint8_t t; + CT_SDA_OUT(); + SCL_OFF; + CT_Delay(); + for (t = 0; t < 8; t++) + { + if ((txd & 0x80) >> 7) + { + gpio_bit_set(SDA_PORT, SDA_PIN); + } + else + { + gpio_bit_reset(SDA_PORT, SDA_PIN); + } + + txd <<= 1; + SCL_ON; + CT_Delay(); + SCL_OFF; + CT_Delay(); + } +} + +/** + * @brief Read a byte over I2C. + * + * @param ack If 1, send ACK after receiving; if 0, send NACK. + * + * @return The received byte. + */ +uint8_t CT_IIC_Read_Byte(unsigned char ack) +{ + volatile uint8_t i, receive = 0; + CT_SDA_IN(); + touch_delay_1us(30); + for (i = 0; i < 8; i++) + { + SCL_OFF; + CT_Delay(); + SCL_ON; + receive <<= 1; + + if (CT_READ_SDA) + receive++; + } + + if (!ack) + CT_IIC_NAck(); + else + CT_IIC_Ack(); + return receive; +} + +/** + * @brief Write data to FT5206 register. + * + * @param reg Register address. + * @param buf Pointer to data buffer. + * @param len Length of data to write. + * + * @return 0 if successful, non-zero if any write fails. + */ +uint8_t FT5206_WR_Reg(uint16_t reg, uint8_t *buf, uint8_t len) +{ + uint8_t i; + uint8_t ret = 0; + CT_IIC_Start(); + CT_IIC_Send_Byte(FT_CMD_WR); + CT_IIC_Wait_Ack(); + CT_IIC_Send_Byte(reg & 0XFF); + CT_IIC_Wait_Ack(); + for (i = 0; i < len; i++) + { + CT_IIC_Send_Byte(buf[i]); + ret = CT_IIC_Wait_Ack(); + if (ret) + break; + } + CT_IIC_Stop(); + return ret; +} + +/** + * @brief Read data from FT5206 register. + * + * @param reg Register address. + * @param buf Pointer to buffer to store read data. + * @param len Number of bytes to read. + */ +void FT5206_RD_Reg(uint16_t reg, uint8_t *buf, uint8_t len) +{ + uint8_t i; + CT_IIC_Start(); + CT_IIC_Send_Byte(FT_CMD_WR); + CT_IIC_Wait_Ack(); + CT_IIC_Send_Byte(reg & 0XFF); + CT_IIC_Wait_Ack(); + CT_IIC_Start(); + CT_IIC_Send_Byte(FT_CMD_RD); + CT_IIC_Wait_Ack(); + for (i = 0; i < len; i++) + { + buf[i] = CT_IIC_Read_Byte(i == (len - 1) ? 0 : 1); + } + CT_IIC_Stop(); +} + +/** + * @brief Initialize the FT5206 touch screen controller. + * + * @note Initializes I2C, sets operational modes and touch sensitivity. + * + * @return 0 if initialization is successful. + */ +uint8_t FT5206_Init(void) +{ + uint8_t temp[5]; + /* enable the led clock */ + rcu_periph_clock_enable(INT_RCU); + /* configure led GPIO port */ + gpio_mode_set(INT_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, INT_PIN); + + + CT_IIC_Init(); + + FT5206_WR_Reg(FT_DEVIDE_MODE, temp, 1); + FT5206_WR_Reg(FT_ID_G_MODE, temp, 1); + temp[0] = 22; + FT5206_WR_Reg(FT_ID_G_THGROUP, temp, 1); + temp[0] = 12; + FT5206_WR_Reg(FT_ID_G_PERIODACTIVE, temp, 1); + + FT5206_RD_Reg(FT_ID_G_LIB_VERSION, &temp[0], 2); + printf("CTP ID:%x\r\n", ((uint16_t)temp[0] << 8) + temp[1]); + return 0; +} + +/** + * @brief Scan the touch screen using polling. + * + * @param mode 0 for normal scan mode. + * + * @return 1 if a touch is detected, 0 otherwise. + */ +uint8_t FT5206_Scan(uint8_t mode) +{ + uint8_t buf[4]; + uint8_t i = 0; + uint8_t res = 0; + uint8_t temp; + uint16_t tempsta; + static uint8_t t = 0; + t++; + if ((t % 10) == 0 || t < 10) + { + FT5206_RD_Reg(FT_REG_NUM_FINGER, &mode, 1); + if ((mode & 0XF) && ((mode & 0XF) <= g_gt_tnum)) + { + temp = 0XFF << (mode & 0XF); + tempsta = tp_dev.sta; + tp_dev.sta = (~temp) | TP_PRES_DOWN | TP_CATH_PRES; + tp_dev.x[g_gt_tnum - 1] = tp_dev.x[0]; + tp_dev.y[g_gt_tnum - 1] = tp_dev.y[0]; + + for (i = 0; i < g_gt_tnum; i++) + { + if (tp_dev.sta & (1 << i)) + { + FT5206_RD_Reg(FT5206_TPX_TBL[i], buf, 4); + if (tp_dev.touchtype & 0X01) + { + tp_dev.y[i] = ((uint16_t)(buf[0] & 0X0F) << 8) + buf[1]; + tp_dev.x[i] = ((uint16_t)(buf[2] & 0X0F) << 8) + buf[3]; + } + else + { + tp_dev.x[i] = (((uint16_t)(buf[0] & 0X0F) << 8) + buf[1]); + tp_dev.y[i] = ((uint16_t)(buf[2] & 0X0F) << 8) + buf[3]; + } + } + } + res = 1; + if (tp_dev.x[0] > ACTIVE_WIDTH || tp_dev.y[0] > ACTIVE_HEIGHT) + { + if ((mode & 0XF) > 1) + { + tp_dev.x[0] = tp_dev.x[1]; + tp_dev.y[0] = tp_dev.y[1]; + t = 0; + } + else + { + tp_dev.x[0] = tp_dev.x[g_gt_tnum - 1]; + tp_dev.y[0] = tp_dev.y[g_gt_tnum - 1]; + mode = 0X80; + tp_dev.sta = tempsta; + } + } + else + t = 0; + } + } + + if ((mode & 0X1F) == 0) + { + if (tp_dev.sta & TP_PRES_DOWN) + { + tp_dev.sta &= ~TP_PRES_DOWN; + } + else + { + tp_dev.x[0] = 0xffff; + tp_dev.y[0] = 0xffff; + tp_dev.sta &= 0XE0; + } + } + + if (t > 240) + t = 10; + return res; +} + +/** + * @brief Detect touch release by monitoring a specific touch point. + * + * @param contact Index of touch contact to check. + * @param sx Start X coordinate. + * @param sy Start Y coordinate. + * @param ex End X coordinate. + * @param ey End Y coordinate. + * + * @note Returns when the touch point leaves the specified rectangle. + */ +void letgo_scan(uint16_t contact, uint16_t sx, uint16_t sy, uint16_t ex, uint16_t ey) +{ + while (FT5206_Scan(0)) + { + if (tp_dev.x[contact] <= sx || tp_dev.x[contact] >= ex) + { + return; + } + + if (tp_dev.y[contact] <= sy && tp_dev.y[contact] >= ey) + { + return; + } + } +} + +/** + * @brief Example application to test the touch screen functionality. + * + * @return Always returns 0. + * + * @warning This function runs an infinite loop and is intended for manual test only. + */ +int touch_test(void) +{ + int touch_state = 0; + FT5206_Init(); + + while (1) + { + touch_state = FT5206_Scan(0); + + if (touch_state == 1) + { + rt_kprintf("touch\r\n"); + } + rt_thread_mdelay(10); + } +} + +MSH_CMD_EXPORT(touch_test, touch test) + diff --git a/bsp/gd32/arm/gd32470i-eval/board/ports/drv_touch.h b/bsp/gd32/arm/gd32470i-eval/board/ports/drv_touch.h new file mode 100644 index 00000000000..24784e0eece --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/ports/drv_touch.h @@ -0,0 +1,188 @@ +/* + * Copyright (c) 2006-2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-05-23 godmial Refactor to conform to RT-Thread coding style. + */ + +#ifndef __TOUCH_H__ +#define __TOUCH_H__ + +#include "stdio.h" +#include "string.h" +#include "gd32f4xx.h" + + +#define SCL_RCU RCU_GPIOB +#define SCL_PORT GPIOB +#define SCL_PIN GPIO_PIN_6 +#define SCL_ON gpio_bit_set(SCL_PORT, SCL_PIN) +#define SCL_OFF gpio_bit_reset(SCL_PORT, SCL_PIN) +#define SCL_TOGGLE gpio_bit_toggle(SCL_PORT, SCL_PIN) + +#define SDA_RCU RCU_GPIOB +#define SDA_PORT GPIOB +#define SDA_PIN GPIO_PIN_7 +#define SDA_ON gpio_bit_set(SDA_PORT, SDA_PIN) +#define SDA_OFF gpio_bit_reset(SDA_PORT, SDA_PIN) +#define SDA_TOGGLE gpio_bit_toggle(SDA_PORT, SDA_PIN) + +/* IO direction settings */ +#define CT_SDA_IN() gpio_mode_set(SCL_PORT, GPIO_MODE_INPUT, GPIO_PUPD_PULLUP, SDA_PIN); /* {GPIOF->MODER&=~(3<<(2*11));GPIOF->MODER|=0<<2*11;} //PF11输入模式 */ +#define CT_SDA_OUT() gpio_mode_set(SCL_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_PULLUP, SDA_PIN); /* {GPIOF->MODER&=~(3<<(2*11));GPIOF->MODER|=1<<2*11;} //PF11输出模式 */ +/* IO operations */ +#define CT_IIC_SCL /* PBout(0) //SCL */ +#define CT_IIC_SDA(val) ((val) == 1 ? SDA_ON : SDA_OFF) /* PFout(11) //SDA */ +#define CT_READ_SDA gpio_input_bit_get(SDA_PORT, SDA_PIN) /* PFin(11) //输入SDA */ +/* Reset and interrupt pin definitions */ +#define RST_RCU RCU_GPIOD +#define RST_PORT GPIOD +#define RST_PIN GPIO_PIN_12 +#define RST_ON gpio_bit_set(RST_PORT, RST_PIN); +#define RST_OFF gpio_bit_reset(RST_PORT, RST_PIN); +#define RST_TOGGLE gpio_bit_toggle(RST_PORT, RST_PIN); + +#define INT_RCU RCU_GPIOD +#define INT_PORT GPIOD +#define INT_PIN GPIO_PIN_11 +#define INT_ON gpio_bit_set(INT_PORT, INT_PIN); +#define INT_OFF gpio_bit_reset(INT_PORT, INT_PIN); +#define INT_TOGGLE gpio_bit_toggle(INT_PORT, INT_PIN); + +/* I2C command definitions */ +#define FT_CMD_WR 0X70 /**< FT5206 write command */ +#define FT_CMD_RD 0X71 /**< FT5206 read command */ +/* FT5206 register definitions */ +#define FT_DEVIDE_MODE 0x00 /**< Mode control register */ +#define FT_REG_NUM_FINGER 0x02 /**< Touch status register */ +#define FT_TP1_REG 0x03 /**< Touch point 1 data */ +#define FT_TP2_REG 0x09 /**< Touch point 2 data */ +#define FT_TP3_REG 0x0F /**< Touch point 3 data */ +#define FT_TP4_REG 0x15 /**< Touch point 4 data */ +#define FT_TP5_REG 0x1B /**< Touch point 5 data */ +#define FT_ID_G_LIB_VERSION 0xA1 /**< Firmware version */ +#define FT_ID_G_MODE 0xA4 /**< Interrupt mode control */ +#define FT_ID_G_THGROUP 0x80 /**< Touch sensitivity */ +#define FT_ID_G_PERIODACTIVE 0x88 /**< Active period register */ + +#define TP_PRES_DOWN 0x80 /**< Touch pressed flag */ +#define TP_CATH_PRES 0x40 /**< Key press detected flag */ +#define CT_MAX_TOUCH 5 /**< Maximum number of supported touch points */ +/** + * @brief Touch point device structure. + */ +typedef struct +{ + uint16_t x[CT_MAX_TOUCH]; /**< X coordinates of touch points */ + uint16_t y[CT_MAX_TOUCH]; /**< Y coordinates of touch points */ + uint8_t sta; /**< Touch status flag */ + float xfac; /**< X axis scaling factor */ + float yfac; /**< Y axis scaling factor */ + short xoff; /**< X axis offset */ + short yoff; /**< Y axis offset */ + uint8_t touchtype; /**< Touch type flag */ +} _m_tp_dev; + +extern _m_tp_dev tp_dev; + +/** + * @brief Initialize I2C GPIO lines. + */ +void CT_IIC_Init(void); + +/** + * @brief Generate I2C start condition. + */ +void CT_IIC_Start(void); + +/** + * @brief Generate I2C stop condition. + */ +void CT_IIC_Stop(void); + +/** + * @brief Send a byte over I2C. + * + * @param txd Byte to send. + */ +void CT_IIC_Send_Byte(uint8_t txd); + +/** + * @brief Read a byte over I2C. + * + * @param ack 1 to send ACK after read, 0 for NACK. + * + * @return The received byte. + */ +uint8_t CT_IIC_Read_Byte(unsigned char ack); + +/** + * @brief Wait for I2C ACK. + * + * @return 0 on success, non-zero on timeout. + */ +uint8_t CT_IIC_Wait_Ack(void); + +/** + * @brief Generate I2C ACK. + */ +void CT_IIC_Ack(void); + +/** + * @brief Generate I2C NACK. + */ +void CT_IIC_NAck(void); + +/** + * @brief Write data to FT5206 register. + * + * @param reg Register address. + * @param buf Pointer to data. + * @param len Number of bytes to write. + * + * @return 0 if success, non-zero otherwise. + */ +uint8_t FT5206_WR_Reg(uint16_t reg, uint8_t *buf, uint8_t len); + +/** + * @brief Read data from FT5206 register. + * + * @param reg Register address. + * @param buf Buffer to store data. + * @param len Number of bytes to read. + */ +void FT5206_RD_Reg(uint16_t reg, uint8_t *buf, uint8_t len); + +/** + * @brief Initialize the FT5206 touch controller. + * + * @return 0 if successful. + */ +uint8_t FT5206_Init(void); + +/** + * @brief Poll the FT5206 for touch input. + * + * @param mode Scan mode. + * + * @return 1 if touch detected, 0 otherwise. + */ +uint8_t FT5206_Scan(uint8_t mode); + +/** + * @brief Wait until touch contact leaves specified area. + * + * @param contact Touch point index. + * @param sx Start X coordinate. + * @param sy Start Y coordinate. + * @param ex End X coordinate. + * @param ey End Y coordinate. + */ +void letgo_scan(uint16_t contact, uint16_t sx, uint16_t sy, uint16_t ex, uint16_t ey); + + +#endif + diff --git a/bsp/gd32/arm/gd32470i-eval/board/ports/font.h b/bsp/gd32/arm/gd32470i-eval/board/ports/font.h new file mode 100644 index 00000000000..cdb2f9ec8b4 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/board/ports/font.h @@ -0,0 +1,113 @@ +/* + * Copyright (c) 2006-2025, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-05-23 godmial Refactor to conform to RT-Thread coding style. + */ + +#ifndef __FONT_H__ +#define __FONT_H__ + +const unsigned char asc2_1608[95][16] = { + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*" ",0*/ + {0x00, 0x00, 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00}, /*"!",1*/ + {0x00, 0x48, 0x6C, 0x24, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*""",2*/ + {0x00, 0x00, 0x00, 0x24, 0x24, 0x24, 0x7F, 0x12, 0x12, 0x12, 0x7F, 0x12, 0x12, 0x12, 0x00, 0x00}, /*"#",3*/ + {0x00, 0x00, 0x08, 0x1C, 0x2A, 0x2A, 0x0A, 0x0C, 0x18, 0x28, 0x28, 0x2A, 0x2A, 0x1C, 0x08, 0x08}, /*"$",4*/ + {0x00, 0x00, 0x00, 0x22, 0x25, 0x15, 0x15, 0x15, 0x2A, 0x58, 0x54, 0x54, 0x54, 0x22, 0x00, 0x00}, /*"%",5*/ + {0x00, 0x00, 0x00, 0x0C, 0x12, 0x12, 0x12, 0x0A, 0x76, 0x25, 0x29, 0x11, 0x91, 0x6E, 0x00, 0x00}, /*"&",6*/ + {0x00, 0x06, 0x06, 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"'",7*/ + {0x00, 0x40, 0x20, 0x10, 0x10, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x10, 0x10, 0x20, 0x40, 0x00}, /*"(",8*/ + {0x00, 0x02, 0x04, 0x08, 0x08, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x08, 0x08, 0x04, 0x02, 0x00}, /*")",9*/ + {0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x6B, 0x1C, 0x1C, 0x6B, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00}, /*"*",10*/ + {0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x08, 0x08, 0x7F, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00, 0x00}, /*"+",11*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x06, 0x04, 0x03}, /*",",12*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"-",13*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x06, 0x00, 0x00}, /*".",14*/ + {0x00, 0x00, 0x80, 0x40, 0x40, 0x20, 0x20, 0x10, 0x10, 0x08, 0x08, 0x04, 0x04, 0x02, 0x02, 0x00}, /*"/",15*/ + {0x00, 0x00, 0x00, 0x18, 0x24, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x24, 0x18, 0x00, 0x00}, /*"0",16*/ + {0x00, 0x00, 0x00, 0x08, 0x0E, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x3E, 0x00, 0x00}, /*"1",17*/ + {0x00, 0x00, 0x00, 0x3C, 0x42, 0x42, 0x42, 0x20, 0x20, 0x10, 0x08, 0x04, 0x42, 0x7E, 0x00, 0x00}, /*"2",18*/ + {0x00, 0x00, 0x00, 0x3C, 0x42, 0x42, 0x20, 0x18, 0x20, 0x40, 0x40, 0x42, 0x22, 0x1C, 0x00, 0x00}, /*"3",19*/ + {0x00, 0x00, 0x00, 0x20, 0x30, 0x28, 0x24, 0x24, 0x22, 0x22, 0x7E, 0x20, 0x20, 0x78, 0x00, 0x00}, /*"4",20*/ + {0x00, 0x00, 0x00, 0x7E, 0x02, 0x02, 0x02, 0x1A, 0x26, 0x40, 0x40, 0x42, 0x22, 0x1C, 0x00, 0x00}, /*"5",21*/ + {0x00, 0x00, 0x00, 0x38, 0x24, 0x02, 0x02, 0x1A, 0x26, 0x42, 0x42, 0x42, 0x24, 0x18, 0x00, 0x00}, /*"6",22*/ + {0x00, 0x00, 0x00, 0x7E, 0x22, 0x22, 0x10, 0x10, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00}, /*"7",23*/ + {0x00, 0x00, 0x00, 0x3C, 0x42, 0x42, 0x42, 0x24, 0x18, 0x24, 0x42, 0x42, 0x42, 0x3C, 0x00, 0x00}, /*"8",24*/ + {0x00, 0x00, 0x00, 0x18, 0x24, 0x42, 0x42, 0x42, 0x64, 0x58, 0x40, 0x40, 0x24, 0x1C, 0x00, 0x00}, /*"9",25*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00}, /*":",26*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x04}, /*";",27*/ + {0x00, 0x00, 0x00, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x00, 0x00}, /*"<",28*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"=",29*/ + {0x00, 0x00, 0x00, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x00, 0x00}, /*">",30*/ + {0x00, 0x00, 0x00, 0x3C, 0x42, 0x42, 0x46, 0x40, 0x20, 0x10, 0x10, 0x00, 0x18, 0x18, 0x00, 0x00}, /*"?",31*/ + {0x00, 0x00, 0x00, 0x1C, 0x22, 0x5A, 0x55, 0x55, 0x55, 0x55, 0x2D, 0x42, 0x22, 0x1C, 0x00, 0x00}, /*"@",32*/ + {0x00, 0x00, 0x00, 0x08, 0x08, 0x18, 0x14, 0x14, 0x24, 0x3C, 0x22, 0x42, 0x42, 0xE7, 0x00, 0x00}, /*"A",33*/ + {0x00, 0x00, 0x00, 0x1F, 0x22, 0x22, 0x22, 0x1E, 0x22, 0x42, 0x42, 0x42, 0x22, 0x1F, 0x00, 0x00}, /*"B",34*/ + {0x00, 0x00, 0x00, 0x7C, 0x42, 0x42, 0x01, 0x01, 0x01, 0x01, 0x01, 0x42, 0x22, 0x1C, 0x00, 0x00}, /*"C",35*/ + {0x00, 0x00, 0x00, 0x1F, 0x22, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x22, 0x1F, 0x00, 0x00}, /*"D",36*/ + {0x00, 0x00, 0x00, 0x3F, 0x42, 0x12, 0x12, 0x1E, 0x12, 0x12, 0x02, 0x42, 0x42, 0x3F, 0x00, 0x00}, /*"E",37*/ + {0x00, 0x00, 0x00, 0x3F, 0x42, 0x12, 0x12, 0x1E, 0x12, 0x12, 0x02, 0x02, 0x02, 0x07, 0x00, 0x00}, /*"F",38*/ + {0x00, 0x00, 0x00, 0x3C, 0x22, 0x22, 0x01, 0x01, 0x01, 0x71, 0x21, 0x22, 0x22, 0x1C, 0x00, 0x00}, /*"G",39*/ + {0x00, 0x00, 0x00, 0xE7, 0x42, 0x42, 0x42, 0x42, 0x7E, 0x42, 0x42, 0x42, 0x42, 0xE7, 0x00, 0x00}, /*"H",40*/ + {0x00, 0x00, 0x00, 0x3E, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x3E, 0x00, 0x00}, /*"I",41*/ + {0x00, 0x00, 0x00, 0x7C, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x11, 0x0F}, /*"J",42*/ + {0x00, 0x00, 0x00, 0x77, 0x22, 0x12, 0x0A, 0x0E, 0x0A, 0x12, 0x12, 0x22, 0x22, 0x77, 0x00, 0x00}, /*"K",43*/ + {0x00, 0x00, 0x00, 0x07, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x42, 0x7F, 0x00, 0x00}, /*"L",44*/ + {0x00, 0x00, 0x00, 0x77, 0x36, 0x36, 0x36, 0x36, 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x6B, 0x00, 0x00}, /*"M",45*/ + {0x00, 0x00, 0x00, 0xE3, 0x46, 0x46, 0x4A, 0x4A, 0x52, 0x52, 0x52, 0x62, 0x62, 0x47, 0x00, 0x00}, /*"N",46*/ + {0x00, 0x00, 0x00, 0x1C, 0x22, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x41, 0x22, 0x1C, 0x00, 0x00}, /*"O",47*/ + {0x00, 0x00, 0x00, 0x3F, 0x42, 0x42, 0x42, 0x42, 0x3E, 0x02, 0x02, 0x02, 0x02, 0x07, 0x00, 0x00}, /*"P",48*/ + {0x00, 0x00, 0x00, 0x1C, 0x22, 0x41, 0x41, 0x41, 0x41, 0x41, 0x4D, 0x53, 0x32, 0x1C, 0x60, 0x00}, /*"Q",49*/ + {0x00, 0x00, 0x00, 0x3F, 0x42, 0x42, 0x42, 0x3E, 0x12, 0x12, 0x22, 0x22, 0x42, 0xC7, 0x00, 0x00}, /*"R",50*/ + {0x00, 0x00, 0x00, 0x7C, 0x42, 0x42, 0x02, 0x04, 0x18, 0x20, 0x40, 0x42, 0x42, 0x3E, 0x00, 0x00}, /*"S",51*/ + {0x00, 0x00, 0x00, 0x7F, 0x49, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x1C, 0x00, 0x00}, /*"T",52*/ + {0x00, 0x00, 0x00, 0xE7, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x3C, 0x00, 0x00}, /*"U",53*/ + {0x00, 0x00, 0x00, 0xE7, 0x42, 0x42, 0x22, 0x24, 0x24, 0x14, 0x14, 0x18, 0x08, 0x08, 0x00, 0x00}, /*"V",54*/ + {0x00, 0x00, 0x00, 0x6B, 0x49, 0x49, 0x49, 0x49, 0x55, 0x55, 0x36, 0x22, 0x22, 0x22, 0x00, 0x00}, /*"W",55*/ + {0x00, 0x00, 0x00, 0xE7, 0x42, 0x24, 0x24, 0x18, 0x18, 0x18, 0x24, 0x24, 0x42, 0xE7, 0x00, 0x00}, /*"X",56*/ + {0x00, 0x00, 0x00, 0x77, 0x22, 0x22, 0x14, 0x14, 0x08, 0x08, 0x08, 0x08, 0x08, 0x1C, 0x00, 0x00}, /*"Y",57*/ + {0x00, 0x00, 0x00, 0x7E, 0x21, 0x20, 0x10, 0x10, 0x08, 0x04, 0x04, 0x42, 0x42, 0x3F, 0x00, 0x00}, /*"Z",58*/ + {0x00, 0x78, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x78, 0x00}, /*"[",59*/ + {0x00, 0x00, 0x02, 0x02, 0x04, 0x04, 0x08, 0x08, 0x08, 0x10, 0x10, 0x20, 0x20, 0x20, 0x40, 0x40}, /*"\",60*/ + {0x00, 0x1E, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x1E, 0x00}, /*"]",61*/ + {0x00, 0x38, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"^",62*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF}, /*"_",63*/ + {0x00, 0x06, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"`",64*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x42, 0x78, 0x44, 0x42, 0x42, 0xFC, 0x00, 0x00}, /*"a",65*/ + {0x00, 0x00, 0x00, 0x03, 0x02, 0x02, 0x02, 0x1A, 0x26, 0x42, 0x42, 0x42, 0x26, 0x1A, 0x00, 0x00}, /*"b",66*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x44, 0x02, 0x02, 0x02, 0x44, 0x38, 0x00, 0x00}, /*"c",67*/ + {0x00, 0x00, 0x00, 0x60, 0x40, 0x40, 0x40, 0x78, 0x44, 0x42, 0x42, 0x42, 0x64, 0xD8, 0x00, 0x00}, /*"d",68*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x42, 0x7E, 0x02, 0x02, 0x42, 0x3C, 0x00, 0x00}, /*"e",69*/ + {0x00, 0x00, 0x00, 0xF0, 0x88, 0x08, 0x08, 0x7E, 0x08, 0x08, 0x08, 0x08, 0x08, 0x3E, 0x00, 0x00}, /*"f",70*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x22, 0x22, 0x1C, 0x02, 0x3C, 0x42, 0x42, 0x3C}, /*"g",71*/ + {0x00, 0x00, 0x00, 0x03, 0x02, 0x02, 0x02, 0x3A, 0x46, 0x42, 0x42, 0x42, 0x42, 0xE7, 0x00, 0x00}, /*"h",72*/ + {0x00, 0x00, 0x00, 0x0C, 0x0C, 0x00, 0x00, 0x0E, 0x08, 0x08, 0x08, 0x08, 0x08, 0x3E, 0x00, 0x00}, /*"i",73*/ + {0x00, 0x00, 0x00, 0x30, 0x30, 0x00, 0x00, 0x38, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x22, 0x1E}, /*"j",74*/ + {0x00, 0x00, 0x00, 0x03, 0x02, 0x02, 0x02, 0x72, 0x12, 0x0A, 0x16, 0x12, 0x22, 0x77, 0x00, 0x00}, /*"k",75*/ + {0x00, 0x00, 0x00, 0x0E, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x3E, 0x00, 0x00}, /*"l",76*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x92, 0x92, 0x92, 0x92, 0x92, 0xB7, 0x00, 0x00}, /*"m",77*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3B, 0x46, 0x42, 0x42, 0x42, 0x42, 0xE7, 0x00, 0x00}, /*"n",78*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x42, 0x42, 0x42, 0x42, 0x42, 0x3C, 0x00, 0x00}, /*"o",79*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1B, 0x26, 0x42, 0x42, 0x42, 0x22, 0x1E, 0x02, 0x07}, /*"p",80*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x44, 0x42, 0x42, 0x42, 0x44, 0x78, 0x40, 0xE0}, /*"q",81*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x77, 0x4C, 0x04, 0x04, 0x04, 0x04, 0x1F, 0x00, 0x00}, /*"r",82*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0x42, 0x02, 0x3C, 0x40, 0x42, 0x3E, 0x00, 0x00}, /*"s",83*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x3E, 0x08, 0x08, 0x08, 0x08, 0x08, 0x30, 0x00, 0x00}, /*"t",84*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x63, 0x42, 0x42, 0x42, 0x42, 0x62, 0xDC, 0x00, 0x00}, /*"u",85*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE7, 0x42, 0x24, 0x24, 0x14, 0x08, 0x08, 0x00, 0x00}, /*"v",86*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xEB, 0x49, 0x49, 0x55, 0x55, 0x22, 0x22, 0x00, 0x00}, /*"w",87*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0x24, 0x18, 0x18, 0x18, 0x24, 0x6E, 0x00, 0x00}, /*"x",88*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE7, 0x42, 0x24, 0x24, 0x14, 0x18, 0x08, 0x08, 0x07}, /*"y",89*/ + {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x22, 0x10, 0x08, 0x08, 0x44, 0x7E, 0x00, 0x00}, /*"z",90*/ + {0x00, 0xC0, 0x20, 0x20, 0x20, 0x20, 0x20, 0x10, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0xC0, 0x00}, /*"{",91*/ + {0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10}, /*"|",92*/ + {0x00, 0x06, 0x08, 0x08, 0x08, 0x08, 0x08, 0x10, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x06, 0x00}, /*"}",93*/ + {0x0C, 0x32, 0xC2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /*"~",94*/ +}; + +#endif + diff --git a/bsp/gd32/arm/gd32470i-eval/figures/board.jpg b/bsp/gd32/arm/gd32470i-eval/figures/board.jpg new file mode 100644 index 00000000000..faf219179db Binary files /dev/null and b/bsp/gd32/arm/gd32470i-eval/figures/board.jpg differ diff --git a/bsp/gd32/arm/gd32470i-eval/project.ewp b/bsp/gd32/arm/gd32470i-eval/project.ewp new file mode 100644 index 00000000000..cc2f18ae629 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/project.ewp @@ -0,0 +1,2208 @@ + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 22 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 31 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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$PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscall_read.c + + + $PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscall_remove.c + + + $PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscall_write.c + + + $PROJ_DIR$\..\..\..\..\components\libc\compilers\dlib\syscalls.c + + + + DeviceDrivers + + $PROJ_DIR$\..\..\..\..\components\drivers\core\device.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\completion_comm.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\completion_up.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\condvar.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\dataqueue.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\pipe.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\ringblk_buf.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\ringbuffer.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\waitqueue.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\ipc\workqueue.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\pin\dev_pin.c + + + $PROJ_DIR$\..\..\..\..\components\drivers\serial\dev_serial.c + + + + Drivers + + $PROJ_DIR$\board\board.c + + + $PROJ_DIR$\..\libraries\GD32F4xx_Firmware_Library\CMSIS\GD\GD32F4xx\Source\IAR\startup_gd32f4xx.s + + + $PROJ_DIR$\..\libraries\gd32_drivers\drv_gpio.c + + + $PROJ_DIR$\..\libraries\gd32_drivers\drv_usart.c + + + + Filesystem + + $PROJ_DIR$\..\..\..\..\components\dfs\dfs_v1\src\dfs.c + + + $PROJ_DIR$\..\..\..\..\components\dfs\dfs_v1\src\dfs_posix.c + + + $PROJ_DIR$\..\..\..\..\components\dfs\dfs_v1\src\dfs_fs.c + + + $PROJ_DIR$\..\..\..\..\components\dfs\dfs_v1\src\dfs_file.c + + + + Finsh + + $PROJ_DIR$\..\..\..\..\components\finsh\msh_file.c + + + $PROJ_DIR$\..\..\..\..\components\finsh\shell.c + + + $PROJ_DIR$\..\..\..\..\components\finsh\cmd.c + + + $PROJ_DIR$\..\..\..\..\components\finsh\msh_parse.c + + + $PROJ_DIR$\..\..\..\..\components\finsh\msh.c + + + + Kernel + + $PROJ_DIR$\..\..\..\..\src\clock.c + + + $PROJ_DIR$\..\..\..\..\src\components.c + + + $PROJ_DIR$\..\..\..\..\src\cpu_up.c + + + $PROJ_DIR$\..\..\..\..\src\defunct.c + + + $PROJ_DIR$\..\..\..\..\src\idle.c + + + $PROJ_DIR$\..\..\..\..\src\ipc.c + + + $PROJ_DIR$\..\..\..\..\src\irq.c + + + $PROJ_DIR$\..\..\..\..\src\kservice.c + + + $PROJ_DIR$\..\..\..\..\src\mem.c + + + $PROJ_DIR$\..\..\..\..\src\mempool.c + + + $PROJ_DIR$\..\..\..\..\src\object.c + + + $PROJ_DIR$\..\..\..\..\src\scheduler_comm.c + + + $PROJ_DIR$\..\..\..\..\src\scheduler_up.c + + + $PROJ_DIR$\..\..\..\..\src\thread.c + + + $PROJ_DIR$\..\..\..\..\src\timer.c + + + + klibc + + $PROJ_DIR$\..\..\..\..\src\klibc\kstdio.c + + + $PROJ_DIR$\..\..\..\..\src\klibc\rt_vsscanf.c + + + $PROJ_DIR$\..\..\..\..\src\klibc\rt_vsnprintf_tiny.c + + + $PROJ_DIR$\..\..\..\..\src\klibc\kerrno.c + + + $PROJ_DIR$\..\..\..\..\src\klibc\kstring.c + + + + libcpu + + $PROJ_DIR$\..\..\..\..\libcpu\arm\common\div0.c + + + $PROJ_DIR$\..\..\..\..\libcpu\arm\common\showmem.c + + + $PROJ_DIR$\..\..\..\..\libcpu\arm\cortex-m4\context_iar.S + + + $PROJ_DIR$\..\..\..\..\libcpu\arm\cortex-m4\cpuport.c + + + + Libraries + + $PROJ_DIR$\..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_exti.c + + + $PROJ_DIR$\..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c + + + $PROJ_DIR$\..\libraries\GD32F4xx_Firmware_Library\CMSIS\GD\GD32F4xx\Source\system_gd32f4xx.c + + + $PROJ_DIR$\..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c + + + $PROJ_DIR$\..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_misc.c + + + $PROJ_DIR$\..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c + + + $PROJ_DIR$\..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_gpio.c + + + $PROJ_DIR$\..\libraries\GD32F4xx_Firmware_Library\GD32F4xx_standard_peripheral\Source\gd32f4xx_dma.c + + + + POSIX + + + utestcases + + diff --git a/bsp/gd32/arm/gd32470i-eval/project.eww b/bsp/gd32/arm/gd32470i-eval/project.eww new file mode 100644 index 00000000000..c2cb02eb1e8 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/project.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\project.ewp + + + + + diff --git a/bsp/gd32/arm/gd32470i-eval/project.uvguix.RTT b/bsp/gd32/arm/gd32470i-eval/project.uvguix.RTT new file mode 100644 index 00000000000..9440344e622 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/project.uvguix.RTT @@ -0,0 +1,1896 @@ + + + + -6.1 + +
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
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__RT_KERNEL_SOURCE__ + + + + + + + + + + + klibc + + + rt_vsscanf.c + 1 + ..\..\..\..\src\klibc\rt_vsscanf.c + + + kstring.c + 1 + ..\..\..\..\src\klibc\kstring.c + + + rt_vsnprintf_tiny.c + 1 + ..\..\..\..\src\klibc\rt_vsnprintf_tiny.c + + + kerrno.c + 1 + ..\..\..\..\src\klibc\kerrno.c + + + kstdio.c + 1 + ..\..\..\..\src\klibc\kstdio.c + + + + + libcpu + + + atomic_arm.c + 1 + ..\..\..\..\libcpu\arm\common\atomic_arm.c + + + div0.c + 1 + ..\..\..\..\libcpu\arm\common\div0.c + + + showmem.c + 1 + ..\..\..\..\libcpu\arm\common\showmem.c + + + context_rvds.S + 2 + ..\..\..\..\libcpu\arm\cortex-m4\context_rvds.S + + + cpuport.c + 1 + ..\..\..\..\libcpu\arm\cortex-m4\cpuport.c + + + + + Libraries + + + startup_gd32f4xx.s + 2 + packages\gd32-arm-cmsis-latest\GD32F4xx\GD\GD32F4xx\Source\ARM\startup_gd32f4xx.s + + + system_gd32f4xx.c + 1 + packages\gd32-arm-cmsis-latest\GD32F4xx\GD\GD32F4xx\Source\system_gd32f4xx.c + + + gd32f4xx_dma.c + 1 + packages\gd32-arm-series-latest\GD32F4xx\GD32F4xx_standard_peripheral\Source\gd32f4xx_dma.c + + + gd32f4xx_exti.c + 1 + packages\gd32-arm-series-latest\GD32F4xx\GD32F4xx_standard_peripheral\Source\gd32f4xx_exti.c + + + gd32f4xx_gpio.c + 1 + packages\gd32-arm-series-latest\GD32F4xx\GD32F4xx_standard_peripheral\Source\gd32f4xx_gpio.c + + + gd32f4xx_misc.c + 1 + packages\gd32-arm-series-latest\GD32F4xx\GD32F4xx_standard_peripheral\Source\gd32f4xx_misc.c + + + gd32f4xx_rcu.c + 1 + packages\gd32-arm-series-latest\GD32F4xx\GD32F4xx_standard_peripheral\Source\gd32f4xx_rcu.c + + + gd32f4xx_syscfg.c + 1 + packages\gd32-arm-series-latest\GD32F4xx\GD32F4xx_standard_peripheral\Source\gd32f4xx_syscfg.c + + + gd32f4xx_usart.c + 1 + packages\gd32-arm-series-latest\GD32F4xx\GD32F4xx_standard_peripheral\Source\gd32f4xx_usart.c + + + + + ::CMSIS + + + + + + + + + + + + + + + + + + + + + + <Project Info> + 0 + 1 + + + + + diff --git a/bsp/gd32/arm/gd32470i-eval/rtconfig.h b/bsp/gd32/arm/gd32470i-eval/rtconfig.h new file mode 100644 index 00000000000..857595f8c52 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/rtconfig.h @@ -0,0 +1,425 @@ +#ifndef RT_CONFIG_H__ +#define RT_CONFIG_H__ + +/* RT-Thread Kernel */ + +/* klibc options */ + +/* rt_vsnprintf options */ + +/* end of rt_vsnprintf options */ + +/* rt_vsscanf options */ + +/* end of rt_vsscanf options */ + +/* rt_memset options */ + +/* end of rt_memset options */ + +/* rt_memcpy options */ + +/* end of rt_memcpy options */ + +/* rt_memmove options */ + +/* end of rt_memmove options */ + +/* rt_memcmp options */ + +/* end of rt_memcmp options */ + +/* rt_strstr options */ + +/* end of rt_strstr options */ + +/* rt_strcasecmp options */ + +/* end of rt_strcasecmp options */ + +/* rt_strncpy options */ + +/* end of rt_strncpy options */ + +/* rt_strcpy options */ + +/* end of rt_strcpy options */ + +/* rt_strncmp options */ + +/* end of rt_strncmp options */ + +/* rt_strcmp options */ + +/* end of rt_strcmp options */ + +/* rt_strlen options */ + +/* end of rt_strlen options */ + +/* rt_strnlen options */ + +/* end of rt_strnlen options */ +/* end of klibc options */ +#define RT_NAME_MAX 8 +#define RT_CPUS_NR 1 +#define RT_ALIGN_SIZE 8 +#define RT_THREAD_PRIORITY_32 +#define RT_THREAD_PRIORITY_MAX 32 +#define RT_TICK_PER_SECOND 1000 +#define RT_USING_OVERFLOW_CHECK +#define RT_USING_HOOK +#define RT_HOOK_USING_FUNC_PTR +#define RT_USING_IDLE_HOOK +#define RT_IDLE_HOOK_LIST_SIZE 4 +#define IDLE_THREAD_STACK_SIZE 256 +#define RT_USING_TIMER_SOFT +#define RT_TIMER_THREAD_PRIO 4 +#define RT_TIMER_THREAD_STACK_SIZE 512 + +/* kservice options */ + +/* end of kservice options */ +#define RT_USING_DEBUG +#define RT_DEBUGING_ASSERT +#define RT_DEBUGING_COLOR +#define RT_DEBUGING_CONTEXT + +/* Inter-Thread communication */ + +#define RT_USING_SEMAPHORE +#define RT_USING_MUTEX +#define RT_USING_EVENT +#define RT_USING_MAILBOX +#define RT_USING_MESSAGEQUEUE +/* end of Inter-Thread communication */ + +/* Memory Management */ + +#define RT_USING_MEMPOOL +#define RT_USING_SMALL_MEM +#define RT_USING_SMALL_MEM_AS_HEAP +#define RT_USING_HEAP +/* end of Memory Management */ +#define RT_USING_DEVICE +#define RT_USING_CONSOLE +#define RT_CONSOLEBUF_SIZE 128 +#define RT_CONSOLE_DEVICE_NAME "uart0" +#define RT_VER_NUM 0x50201 +#define RT_BACKTRACE_LEVEL_MAX_NR 32 +/* end of RT-Thread Kernel */ +#define RT_USING_HW_ATOMIC +#define RT_USING_CPU_FFS +#define ARCH_ARM +#define ARCH_ARM_CORTEX_M +#define ARCH_ARM_CORTEX_M4 + +/* RT-Thread Components */ + +#define RT_USING_COMPONENTS_INIT +#define RT_USING_USER_MAIN +#define RT_MAIN_THREAD_STACK_SIZE 2048 +#define RT_MAIN_THREAD_PRIORITY 10 +#define RT_USING_MSH +#define RT_USING_FINSH +#define FINSH_USING_MSH +#define FINSH_THREAD_NAME "tshell" +#define FINSH_THREAD_PRIORITY 20 +#define FINSH_THREAD_STACK_SIZE 4096 +#define FINSH_USING_HISTORY +#define FINSH_HISTORY_LINES 5 +#define FINSH_USING_SYMTAB +#define FINSH_CMD_SIZE 80 +#define MSH_USING_BUILT_IN_COMMANDS +#define FINSH_USING_DESCRIPTION +#define FINSH_ARG_MAX 10 +#define FINSH_USING_OPTION_COMPLETION + +/* DFS: device virtual file system */ + +/* end of DFS: device virtual file system */ + +/* Device Drivers */ + +#define RT_USING_DEVICE_IPC +#define RT_UNAMED_PIPE_NUMBER 64 +#define RT_USING_SERIAL +#define RT_USING_SERIAL_V1 +#define RT_SERIAL_USING_DMA +#define RT_SERIAL_RB_BUFSZ 64 +#define RT_USING_PIN +/* end of Device Drivers */ + +/* C/C++ and POSIX layer */ + +/* ISO-ANSI C layer */ + +/* Timezone and Daylight Saving Time */ + +#define RT_LIBC_USING_LIGHT_TZ_DST +#define RT_LIBC_TZ_DEFAULT_HOUR 8 +#define RT_LIBC_TZ_DEFAULT_MIN 0 +#define RT_LIBC_TZ_DEFAULT_SEC 0 +/* end of Timezone and Daylight Saving Time */ +/* end of ISO-ANSI C layer */ + +/* POSIX (Portable Operating System Interface) layer */ + + +/* Interprocess Communication (IPC) */ + + +/* Socket is in the 'Network' category */ + +/* end of Interprocess Communication (IPC) */ +/* end of POSIX (Portable Operating System Interface) layer */ +/* end of C/C++ and POSIX layer */ + +/* Network */ + +/* end of Network */ + +/* Memory protection */ + +/* end of Memory protection */ + +/* Utilities */ + +/* end of Utilities */ + +/* Using USB legacy version */ + +/* end of Using USB legacy version */ +/* end of RT-Thread Components */ + +/* RT-Thread Utestcases */ + +/* end of RT-Thread Utestcases */ + +/* RT-Thread online packages */ + +/* IoT - internet of things */ + + +/* Wi-Fi */ + +/* Marvell WiFi */ + +/* end of Marvell WiFi */ + +/* Wiced WiFi */ + +/* end of Wiced WiFi */ + +/* CYW43012 WiFi */ + +/* end of CYW43012 WiFi */ + +/* BL808 WiFi */ + +/* end of BL808 WiFi */ + +/* CYW43439 WiFi */ + +/* end of CYW43439 WiFi */ +/* end of Wi-Fi */ + +/* IoT Cloud */ + +/* end of IoT Cloud */ +/* end of IoT - internet of things */ + +/* security packages */ + +/* end of security packages */ + +/* language packages */ + +/* JSON: JavaScript Object Notation, a lightweight data-interchange format */ + +/* end of JSON: JavaScript Object Notation, a lightweight data-interchange format */ + +/* XML: Extensible Markup Language */ + +/* end of XML: Extensible Markup Language */ +/* end of language packages */ + +/* multimedia packages */ + +/* LVGL: powerful and easy-to-use embedded GUI library */ + +/* end of LVGL: powerful and easy-to-use embedded GUI library */ + +/* u8g2: a monochrome graphic library */ + +/* end of u8g2: a monochrome graphic library */ +/* end of multimedia packages */ + +/* tools packages */ + +/* end of tools packages */ + +/* system packages */ + +/* enhanced kernel services */ + +/* end of enhanced kernel services */ + +/* acceleration: Assembly language or algorithmic acceleration packages */ + +/* end of acceleration: Assembly language or algorithmic acceleration packages */ + +/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + +/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */ + +/* Micrium: Micrium software products porting for RT-Thread */ + +/* end of Micrium: Micrium software products porting for RT-Thread */ +/* end of system packages */ + +/* peripheral libraries and drivers */ + +/* HAL & SDK Drivers */ + +/* STM32 HAL & SDK Drivers */ + +/* end of STM32 HAL & SDK Drivers */ + +/* Infineon HAL Packages */ + +/* end of Infineon HAL Packages */ + +/* Kendryte SDK */ + +/* end of Kendryte SDK */ + +/* WCH HAL & SDK Drivers */ + +/* end of WCH HAL & SDK Drivers */ + +/* AT32 HAL & SDK Drivers */ + +/* end of AT32 HAL & SDK Drivers */ + +/* HC32 DDL Drivers */ + +/* end of HC32 DDL Drivers */ + +/* NXP HAL & SDK Drivers */ + +/* end of NXP HAL & SDK Drivers */ + +/* NUVOTON Drivers */ + +/* end of NUVOTON Drivers */ + +/* GD32 Drivers */ + +#define PKG_USING_GD32_ARM_CMSIS_DRIVER +#define PKG_USING_GD32_ARM_CMSIS_DRIVER_LATEST_VERSION +#define PKG_USING_GD32_ARM_SERIES_DRIVER +#define PKG_USING_GD32_ARM_SERIES_DRIVER_LATEST_VERSION +/* end of GD32 Drivers */ +/* end of HAL & SDK Drivers */ + +/* sensors drivers */ + +/* end of sensors drivers */ + +/* touch drivers */ + +/* end of touch drivers */ +/* end of peripheral libraries and drivers */ + +/* AI packages */ + +/* end of AI packages */ + +/* Signal Processing and Control Algorithm Packages */ + +/* end of Signal Processing and Control Algorithm Packages */ + +/* miscellaneous packages */ + +/* project laboratory */ + +/* end of project laboratory */ + +/* samples: kernel and components samples */ + +/* end of samples: kernel and components samples */ + +/* entertainment: terminal games and other interesting software packages */ + +/* end of entertainment: terminal games and other interesting software packages */ +/* end of miscellaneous packages */ + +/* Arduino libraries */ + + +/* Projects and Demos */ + +/* end of Projects and Demos */ + +/* Sensors */ + +/* end of Sensors */ + +/* Display */ + +/* end of Display */ + +/* Timing */ + +/* end of Timing */ + +/* Data Processing */ + +/* end of Data Processing */ + +/* Data Storage */ + +/* Communication */ + +/* end of Communication */ + +/* Device Control */ + +/* end of Device Control */ + +/* Other */ + +/* end of Other */ + +/* Signal IO */ + +/* end of Signal IO */ + +/* Uncategorized */ + +/* end of Arduino libraries */ +/* end of RT-Thread online packages */ +#define SOC_FAMILY_GD32 +#define SOC_SERIES_GD32F4xx + +/* Hardware Drivers Config */ + +#define SOC_GD32470Z + +/* Onboard Peripheral Drivers */ + +/* On-chip Peripheral Drivers */ + +#define BSP_USING_GPIO +#define BSP_USING_UART +#define BSP_USING_UART0 +/* end of On-chip Peripheral Drivers */ + +/* Board extended module Drivers */ + +/* end of Board extended module Drivers */ +/* end of Hardware Drivers Config */ + +#endif + diff --git a/bsp/gd32/arm/gd32470i-eval/rtconfig.py b/bsp/gd32/arm/gd32470i-eval/rtconfig.py new file mode 100644 index 00000000000..b2361d10520 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/rtconfig.py @@ -0,0 +1,149 @@ +import os + +# toolchains options +ARCH='arm' +CPU='cortex-m4' +CROSS_TOOL='gcc' + +# bsp lib config +BSP_LIBRARY_TYPE = None + +if os.getenv('RTT_CC'): + CROSS_TOOL = os.getenv('RTT_CC') +if os.getenv('RTT_ROOT'): + RTT_ROOT = os.getenv('RTT_ROOT') + +# cross_tool provides the cross compiler +# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR +if CROSS_TOOL == 'gcc': + PLATFORM = 'gcc' + EXEC_PATH = r'C:\Users\XXYYZZ' +elif CROSS_TOOL == 'keil': + PLATFORM = 'armclang' + EXEC_PATH = r'C:/Keil_v5' +elif CROSS_TOOL == 'iar': + PLATFORM = 'iccarm' + EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.3' + +if os.getenv('RTT_EXEC_PATH'): + EXEC_PATH = os.getenv('RTT_EXEC_PATH') + +BUILD = 'debug' + +if PLATFORM == 'gcc': + # toolchains + PREFIX = 'arm-none-eabi-' + CC = PREFIX + 'gcc' + AS = PREFIX + 'gcc' + AR = PREFIX + 'ar' + CXX = PREFIX + 'g++' + LINK = PREFIX + 'gcc' + TARGET_EXT = 'elf' + SIZE = PREFIX + 'size' + OBJDUMP = PREFIX + 'objdump' + OBJCPY = PREFIX + 'objcopy' + + DEVICE = ' -mcpu=cortex-m4 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections -DGD32F470' + CFLAGS = DEVICE + ' -Dgcc' + AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb ' + LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.ld' + + CPATH = '' + LPATH = '' + + if BUILD == 'debug': + CFLAGS += ' -O0 -gdwarf-2 -g' + AFLAGS += ' -gdwarf-2' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n' + +elif PLATFORM == 'armclang': + # toolchains + CC = 'armclang' + CXX = 'armclang' + AS = 'armasm' + AR = 'armar' + LINK = 'armlink' + TARGET_EXT = 'axf' + + DEVICE = ' --cpu Cortex-M4.fp ' + CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99' + AFLAGS = DEVICE + ' --apcs=interwork ' + LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict' + CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include' + LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib' + + CFLAGS += ' -D__MICROLIB ' + AFLAGS += ' --pd "__MICROLIB SETA 1" ' + LFLAGS += ' --library_type=microlib ' + EXEC_PATH += '/ARM/ARMCC/bin/' + + if BUILD == 'debug': + CFLAGS += ' -g -O0' + AFLAGS += ' -g' + else: + CFLAGS += ' -O2' + + CXXFLAGS = CFLAGS + + POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET' + +elif PLATFORM == 'iccarm': + # toolchains + CC = 'iccarm' + CXX = 'iccarm' + AS = 'iasmarm' + AR = 'iarchive' + LINK = 'ilinkarm' + TARGET_EXT = 'out' + + DEVICE = '-Dewarm' + + CFLAGS = DEVICE + CFLAGS += ' --diag_suppress Pa050' + CFLAGS += ' --no_cse' + CFLAGS += ' --no_unroll' + CFLAGS += ' --no_inline' + CFLAGS += ' --no_code_motion' + CFLAGS += ' --no_tbaa' + CFLAGS += ' --no_clustering' + CFLAGS += ' --no_scheduling' + CFLAGS += ' --endian=little' + CFLAGS += ' --cpu=Cortex-M4' + CFLAGS += ' -e' + CFLAGS += ' --fpu=VFPv4_sp' + CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"' + CFLAGS += ' --silent' + + AFLAGS = DEVICE + AFLAGS += ' -s+' + AFLAGS += ' -w+' + AFLAGS += ' -r' + AFLAGS += ' --cpu Cortex-M4' + AFLAGS += ' --fpu VFPv4_sp' + AFLAGS += ' -S' + + if BUILD == 'debug': + CFLAGS += ' --debug' + CFLAGS += ' -On' + else: + CFLAGS += ' -Oh' + + LFLAGS = ' --config "board/linker_scripts/link.icf"' + LFLAGS += ' --entry __iar_program_start' + + CXXFLAGS = CFLAGS + + EXEC_PATH = EXEC_PATH + '/arm/bin/' + POST_ACTION = 'ielftool --bin $TARGET rtthread.bin' + +def dist_handle(BSP_ROOT, dist_dir): + import sys + cwd_path = os.getcwd() + sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools')) + from sdk_dist import dist_do_building + dist_do_building(BSP_ROOT, dist_dir) diff --git a/bsp/gd32/arm/gd32470i-eval/template.ewp b/bsp/gd32/arm/gd32470i-eval/template.ewp new file mode 100644 index 00000000000..963857b281f --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/template.ewp @@ -0,0 +1,1892 @@ + + + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 22 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 31 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 9 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 16 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 22 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 31 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 9 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + 0 + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 16 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + + diff --git a/bsp/gd32/arm/gd32470i-eval/template.uvoptx b/bsp/gd32/arm/gd32470i-eval/template.uvoptx new file mode 100644 index 00000000000..14dde5e4db2 --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/template.uvoptx @@ -0,0 +1,185 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
+ + + *.c + *.s*; *.src; *.a* + *.obj; *.o + *.lib + *.txt; *.h; *.inc; *.md + *.plm + *.cpp + 0 + + + + 0 + 0 + + + + rt-thread + 0x4 + ARM-ADS + + 12000000 + + 1 + 1 + 0 + 1 + 0 + + + 1 + 65535 + 0 + 0 + 0 + + + 79 + 66 + 8 + .\build\ + + + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 0 + 0 + 0 + 0 + + + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + + + 1 + 0 + 1 + + 255 + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 1 + 1 + 0 + 0 + 1 + 0 + 0 + 3 + + + + + + + + + + + BIN\CMSIS_AGDI.dll + + + + 0 + UL2CM3 + UL2CM3(-S0 -C0 -P0 ) -FN1 -FC1000 -FD20000000 -FF0GD32F4xx_1MB -FL0100000 -FS08000000 -FP0($$Device:GD32F470ZG$Flash\GD32F4xx_1MB.FLM) + + + 0 + CMSIS_AGDI + -X"Any" -UAny -O206 -S0 -C0 -P00000000 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO65554 -TC10000000 -TT10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO15 -FD20000000 -FC1000 -FN1 -FF0GD32F4xx_1MB.FLM -FS08000000 -FL0100000 -FP0($$Device:GD32F470ZG$Flash\GD32F4xx_1MB.FLM) + + + + + 0 + + + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + + 0 + 0 + 0 + + + + + + + + + + + + + ::CMSIS + 0 + 0 + 0 + 1 + + + diff --git a/bsp/gd32/arm/gd32470i-eval/template.uvprojx b/bsp/gd32/arm/gd32470i-eval/template.uvprojx new file mode 100644 index 00000000000..6b18f2e8f2a --- /dev/null +++ b/bsp/gd32/arm/gd32470i-eval/template.uvprojx @@ -0,0 +1,412 @@ + + + + 2.1 + +
### uVision Project, (C) Keil Software
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