From ed30404b507ca36415df0e9af028aa6206d71c73 Mon Sep 17 00:00:00 2001 From: bernard Date: Wed, 31 Dec 2025 13:39:56 +0800 Subject: [PATCH 01/25] [components][clock_time] Refactor time subsystem around clock_time Introduce the clock_time core with clock source/event separation, high-resolution scheduling, and boot-time helpers, plus clock_timer adapters for timer peripherals. Remove legacy ktime/cputime/hwtimer implementations and migrate arch and BSP time paths to the new subsystem while keeping POSIX time integration functional. Update drivers, Kconfig/SConscript wiring, documentation, and tests; add clock_time overview docs and align naming to clock_boottime/clock_hrtimer/clock_timer. --- bsp/ESP32_C3/README.md | 2 +- bsp/ESP32_C3/README_ZH.md | 2 +- bsp/ESP32_C3/drivers/Kconfig | 10 +- bsp/ESP32_C3/drivers/SConscript | 4 +- .../drivers/{drv_hwtimer.c => drv_timer.c} | 76 +-- .../drivers/{drv_hwtimer.h => drv_timer.h} | 10 +- bsp/Infineon/libraries/HAL_Drivers/SConscript | 2 +- .../{drv_hwtimer.c => drv_timer.c} | 76 +-- .../{drv_hwtimer.h => drv_timer.h} | 8 +- .../libraries/templates/PSOC62/board/Kconfig | 2 +- .../psoc6-cy8ckit-062-BLE/board/Kconfig | 2 +- .../psoc6-cy8ckit-062-WIFI-BT/board/Kconfig | 2 +- .../psoc6-cy8ckit-062S2-43012/board/Kconfig | 2 +- .../psoc6-cy8ckit-062s4/board/Kconfig | 2 +- .../psoc6-cy8cproto-062S3-4343W/board/Kconfig | 2 +- .../psoc6-evaluationkit-062S2/board/Kconfig | 2 +- bsp/Vango/v85xx/Kconfig | 40 +- bsp/Vango/v85xx/README.md | 2 +- bsp/Vango/v85xx/drivers/SConscript | 4 +- bsp/Vango/v85xx/drivers/drv_comm.h | 2 +- bsp/Vango/v85xxp/Kconfig | 24 +- bsp/Vango/v85xxp/README.md | 2 +- bsp/Vango/v85xxp/drivers/SConscript | 4 +- bsp/Vango/v85xxp/drivers/drv_comm.h | 2 +- bsp/acm32/acm32f0x0-nucleo/drivers/Kconfig | 14 +- .../drivers/{drv_hwtimer.c => drv_timer.c} | 60 +- .../acm32f0x0-nucleo/drivers/tim_config.h | 2 +- bsp/acm32/acm32f0x0-nucleo/project.ewp | 4 +- bsp/acm32/acm32f0x0-nucleo/project.uvprojx | 8 +- bsp/acm32/acm32f4xx-nucleo/drivers/Kconfig | 20 +- .../air105/libraries/HAL_Driver/Inc/app_inc.h | 2 +- .../{core_hwtimer.h => core_clock_timer.h} | 4 +- .../libraries/HAL_Driver/Inc/resource_map.h | 2 +- .../{core_hwtimer.c => core_clock_timer.c} | 8 +- bsp/airm2m/air32f103/board/Kconfig | 2 +- bsp/airm2m/air32f103/board/board.c | 28 +- bsp/airm2m/air32f103/board/board.h | 2 +- bsp/airm2m/air32f103/libraries/SConscript | 2 +- .../libraries/rt_drivers/drv_hwtimer.c | 329 ---------- .../libraries/rt_drivers/drv_timer.c | 329 ++++++++++ .../rt_drivers/{drv_hwtimer.h => drv_timer.h} | 20 +- bsp/apm32/apm32e103ze-evalboard/board/Kconfig | 2 +- bsp/apm32/apm32e103ze-evalboard/board/board.h | 2 +- bsp/apm32/apm32e103ze-tinyboard/board/Kconfig | 2 +- bsp/apm32/apm32e103ze-tinyboard/board/board.h | 2 +- bsp/apm32/apm32f030r8-miniboard/board/Kconfig | 2 +- bsp/apm32/apm32f030r8-miniboard/board/board.h | 2 +- bsp/apm32/apm32f051r8-evalboard/board/Kconfig | 2 +- bsp/apm32/apm32f051r8-evalboard/board/board.h | 2 +- bsp/apm32/apm32f072vb-miniboard/board/Kconfig | 2 +- bsp/apm32/apm32f072vb-miniboard/board/board.h | 2 +- bsp/apm32/apm32f091vc-miniboard/board/Kconfig | 2 +- bsp/apm32/apm32f091vc-miniboard/board/board.h | 2 +- bsp/apm32/apm32f103vb-miniboard/board/Kconfig | 2 +- bsp/apm32/apm32f103vb-miniboard/board/board.h | 2 +- .../apm32f103xe-minibroard/board/Kconfig | 2 +- .../apm32f103xe-minibroard/board/board.h | 2 +- bsp/apm32/apm32f107vc-evalboard/board/Kconfig | 2 +- bsp/apm32/apm32f107vc-evalboard/board/board.h | 2 +- .../apm32f407ig-minibroard/board/Kconfig | 2 +- .../apm32f407ig-minibroard/board/board.h | 2 +- bsp/apm32/apm32f407zg-evalboard/board/Kconfig | 2 +- bsp/apm32/apm32f407zg-evalboard/board/board.h | 2 +- bsp/apm32/apm32s103vb-miniboard/board/Kconfig | 2 +- bsp/apm32/apm32s103vb-miniboard/board/board.h | 2 +- .../libraries/APM32E10x_Library/SConscript | 2 +- .../libraries/APM32F0xx_Library/SConscript | 2 +- .../libraries/APM32F10x_Library/SConscript | 2 +- .../libraries/APM32F4xx_Library/SConscript | 2 +- .../libraries/APM32S10x_Library/SConscript | 2 +- bsp/apm32/libraries/Drivers/SConscript | 4 +- .../Drivers/{drv_hwtimer.c => drv_timer.c} | 100 +-- bsp/at32/at32a403a-start/README.md | 2 +- bsp/at32/at32a403a-start/board/Kconfig | 8 +- bsp/at32/at32a403a-start/board/src/at32_msp.c | 2 +- bsp/at32/at32a423-start/README.md | 2 +- bsp/at32/at32a423-start/board/Kconfig | 8 +- bsp/at32/at32a423-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f402-start/README.md | 2 +- bsp/at32/at32f402-start/board/Kconfig | 8 +- bsp/at32/at32f402-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f403a-start/README.md | 2 +- bsp/at32/at32f403a-start/board/Kconfig | 8 +- bsp/at32/at32f403a-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f405-start/README.md | 2 +- bsp/at32/at32f405-start/board/Kconfig | 8 +- bsp/at32/at32f405-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f407-start/README.md | 2 +- bsp/at32/at32f407-start/board/Kconfig | 8 +- bsp/at32/at32f407-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f413-start/README.md | 2 +- bsp/at32/at32f413-start/board/Kconfig | 8 +- bsp/at32/at32f413-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f415-start/README.md | 2 +- bsp/at32/at32f415-start/board/Kconfig | 8 +- bsp/at32/at32f415-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f421-start/README.md | 2 +- bsp/at32/at32f421-start/board/Kconfig | 8 +- bsp/at32/at32f421-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f423-start/README.md | 2 +- bsp/at32/at32f423-start/board/Kconfig | 8 +- bsp/at32/at32f423-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f425-start/README.md | 2 +- bsp/at32/at32f425-start/board/Kconfig | 8 +- bsp/at32/at32f425-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f435-start/README.md | 2 +- bsp/at32/at32f435-start/board/Kconfig | 8 +- bsp/at32/at32f435-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f437-start/README.md | 2 +- bsp/at32/at32f437-start/board/Kconfig | 8 +- bsp/at32/at32f437-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f455-start/README.md | 2 +- bsp/at32/at32f455-start/board/Kconfig | 8 +- bsp/at32/at32f455-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f456-start/README.md | 2 +- bsp/at32/at32f456-start/board/Kconfig | 8 +- bsp/at32/at32f456-start/board/src/at32_msp.c | 2 +- bsp/at32/at32f457-start/README.md | 2 +- bsp/at32/at32f457-start/board/Kconfig | 8 +- bsp/at32/at32f457-start/board/src/at32_msp.c | 2 +- bsp/at32/at32m412-start/README.md | 2 +- bsp/at32/at32m412-start/board/Kconfig | 8 +- bsp/at32/at32m412-start/board/src/at32_msp.c | 2 +- bsp/at32/at32m416-start/README.md | 2 +- bsp/at32/at32m416-start/board/Kconfig | 8 +- bsp/at32/at32m416-start/board/src/at32_msp.c | 2 +- bsp/at32/libraries/rt_drivers/SConscript | 4 +- .../rt_drivers/{drv_hwtimer.c => drv_timer.c} | 62 +- .../rt_drivers/{drv_hwtimer.h => drv_timer.h} | 4 +- bsp/at91/at91sam9g45/project.ewp | 16 +- bsp/at91/at91sam9g45/project.uvproj | 16 +- bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig | 2 +- bsp/bluetrum/libraries/hal_drivers/SConscript | 4 +- .../libraries/hal_drivers/config/tim_config.h | 2 +- .../{drv_hwtimer.c => drv_timer.c} | 88 +-- bsp/bouffalo_lab/README.md | 2 +- bsp/bouffalo_lab/README_en.md | 2 +- bsp/bouffalo_lab/libraries/Kconfig | 8 +- .../libraries/rt_drivers/SConscript | 6 +- .../rt_drivers/{drv_hwtimer.c => drv_timer.c} | 70 +- .../rt_drivers/{drv_hwtimer.h => drv_timer.h} | 8 +- ...{hwtimer_sample.c => clock_timer_sample.c} | 36 +- bsp/cvitek/c906_little/board/Kconfig | 2 +- bsp/cvitek/cv18xx_risc-v/board/Kconfig | 2 +- bsp/cvitek/drivers/drv_timer.c | 44 +- bsp/essemi/es32f0654/drivers/ES/Kconfig | 32 +- .../drivers/ES/es_conf_info_clock_timer.h | 103 +++ .../drivers/ES/es_conf_info_hwtimer.h | 103 --- bsp/essemi/es32f0654/drivers/Kconfig | 4 +- bsp/essemi/es32f0654/drivers/SConscript | 22 +- bsp/essemi/es32f0654/drivers/drv_hwtimer.c | 453 ------------- bsp/essemi/es32f0654/drivers/drv_timer.c | 453 +++++++++++++ .../drivers/drv_timer.h} | 8 +- bsp/essemi/es32f365x/drivers/ES/Kconfig | 62 +- .../drivers/ES/es_conf_info_clock_timer.h | 102 +++ .../drivers/ES/es_conf_info_hwtimer.h | 102 --- bsp/essemi/es32f365x/drivers/Kconfig | 4 +- bsp/essemi/es32f365x/drivers/SConscript | 16 +- .../drivers/drv_timer.h} | 8 +- bsp/essemi/es32f369x/drivers/ES/Kconfig | 62 +- .../drivers/ES/es_conf_info_clock_timer.h | 102 +++ .../drivers/ES/es_conf_info_hwtimer.h | 102 --- bsp/essemi/es32f369x/drivers/Kconfig | 4 +- bsp/essemi/es32f369x/drivers/SConscript | 16 +- bsp/essemi/es32f369x/drivers/drv_hwtimer.c | 448 ------------- bsp/essemi/es32f369x/drivers/drv_timer.c | 448 +++++++++++++ .../drivers/drv_timer.h} | 8 +- bsp/essemi/es32vf2264/drivers/ES/Kconfig | 40 +- .../drivers/ES/es_conf_info_clock_timer.h | 103 +++ .../drivers/ES/es_conf_info_hwtimer.h | 103 --- bsp/essemi/es32vf2264/drivers/SConscript | 18 +- bsp/essemi/es32vf2264/drivers/board.h | 2 +- bsp/essemi/es32vf2264/drivers/drv_hwtimer.c | 354 ---------- bsp/essemi/es32vf2264/drivers/drv_timer.c | 354 ++++++++++ .../drivers/drv_timer.h} | 8 +- .../libraries/FM33LC0xx_FL_Driver/SConscript | 2 +- .../libraries/HAL_Drivers/SConscript | 4 +- bsp/ft2004/libraries/SConscript | 2 +- bsp/gd32/arm/gd32103c-eval/board/Kconfig | 2 +- bsp/gd32/arm/gd32105c-eval/board/Kconfig | 2 +- bsp/gd32/arm/gd32105r-start/board/Kconfig | 2 +- bsp/gd32/arm/gd32107c-eval/board/Kconfig | 2 +- bsp/gd32/arm/gd32205r-start/board/Kconfig | 2 +- bsp/gd32/arm/gd32207i-eval/board/Kconfig | 2 +- bsp/gd32/arm/gd32303e-eval/board/Kconfig | 2 +- bsp/gd32/arm/gd32305r-start/board/Kconfig | 2 +- bsp/gd32/arm/gd32307e-start/board/Kconfig | 2 +- bsp/gd32/arm/gd32407v-lckfb/board/Kconfig | 2 +- bsp/gd32/arm/gd32407v-start/board/Kconfig | 2 +- bsp/gd32/arm/gd32450z-eval/board/Kconfig | 2 +- bsp/gd32/arm/gd32470i-eval/board/Kconfig | 2 +- bsp/gd32/arm/gd32470z-lckfb/board/Kconfig | 2 +- bsp/gd32/arm/gd32527I-eval/board/Kconfig | 2 +- bsp/gd32/arm/gd32e230-lckfb/board/Kconfig | 2 +- bsp/gd32/arm/gd32e503v-eval/board/Kconfig | 2 +- .../arm/libraries/gd32_drivers/SConscript | 4 +- .../{drv_hwtimer.c => drv_timer.c} | 178 +++--- .../risc-v/gd32vf103r-start/board/Kconfig | 2 +- bsp/gd32/risc-v/gd32vf103v-eval/board/Kconfig | 2 +- .../GD32VF103_Firmware_Library/SConscript | 2 +- .../risc-v/libraries/gd32_drivers/SConscript | 4 +- bsp/hc32/ev_hc32f334_lqfp64/board/Kconfig | 6 +- .../ev_hc32f334_lqfp64/bsp_compile_ci.bat | 2 +- bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig | 8 +- .../ev_hc32f448_lqfp80/bsp_compile_ci.bat | 2 +- bsp/hc32/ev_hc32f460_lqfp100_v2/board/Kconfig | 6 +- .../ev_hc32f460_lqfp100_v2/bsp_compile_ci.bat | 2 +- bsp/hc32/ev_hc32f472_lqfp100/board/Kconfig | 8 +- .../ev_hc32f472_lqfp100/bsp_compile_ci.bat | 2 +- bsp/hc32/ev_hc32f4a0_lqfp176/board/Kconfig | 6 +- .../ev_hc32f4a0_lqfp176/bsp_compile_ci.bat | 2 +- bsp/hc32/ev_hc32f4a8_lqfp176/board/Kconfig | 6 +- .../ev_hc32f4a8_lqfp176/bsp_compile_ci.bat | 2 +- bsp/hc32/lckfb-hc32f4a0-lqfp100/board/Kconfig | 6 +- bsp/hc32/libraries/hc32_drivers/SConscript | 4 +- .../{drv_hwtimer.c => drv_timer.c} | 140 ++-- bsp/hc32/tests/SConscript | 4 +- .../{test_hwtimer.c => test_clock_timer.c} | 46 +- bsp/hk32/hk32f030c8-mini/README.md | 2 +- bsp/hk32/hk32f030c8-mini/board/Kconfig | 8 +- bsp/hk32/libraries/rt_drivers/SConscript | 4 +- bsp/hpmicro/hpm5300evk/board/Kconfig | 2 +- bsp/hpmicro/hpm5301evklite/board/Kconfig | 2 +- bsp/hpmicro/hpm5e00evk/board/Kconfig | 2 +- bsp/hpmicro/hpm6200evk/board/Kconfig | 2 +- bsp/hpmicro/hpm6300evk/board/Kconfig | 2 +- bsp/hpmicro/hpm6750evk/board/Kconfig | 2 +- bsp/hpmicro/hpm6750evk2/board/Kconfig | 2 +- bsp/hpmicro/hpm6750evkmini/board/Kconfig | 2 +- bsp/hpmicro/hpm6800evk/board/Kconfig | 2 +- bsp/hpmicro/hpm6e00evk/board/Kconfig | 2 +- bsp/hpmicro/hpm6p00evk/board/Kconfig | 2 +- bsp/hpmicro/libraries/drivers/SConscript | 3 +- bsp/hpmicro/libraries/drivers/drv_hwtimer.h | 14 - .../drivers/{drv_hwtimer.c => drv_timer.c} | 64 +- bsp/hpmicro/libraries/drivers/drv_timer.h | 14 + bsp/k210/drivers/SConscript | 5 +- bsp/k230/board/Kconfig | 2 +- .../{hwtimer => clock_timer}/SConscript | 0 .../{hwtimer => clock_timer}/drv_timer.c | 62 +- .../{hwtimer => clock_timer}/drv_timer.h | 4 +- bsp/k230/drivers/utest/test_timer.c | 32 +- bsp/mm32/libraries/MM32F3270_HAL/SConscript | 2 +- .../N32G43x_Firmware_Library/SConscript | 2 +- .../N32G45x_Firmware_Library/SConscript | 2 +- .../N32G4FR_Firmware_Library/SConscript | 2 +- .../N32L40x_Firmware_Library/SConscript | 2 +- .../N32L43x_Firmware_Library/SConscript | 2 +- .../N32WB452_Firmware_Library/SConscript | 2 +- bsp/n32/libraries/n32_drivers/SConscript | 4 +- .../{drv_hwtimer.c => drv_timer.c} | 196 +++--- .../{drv_hwtimer.h => drv_timer.h} | 16 +- bsp/n32/n32g43xcl-stb/README.md | 2 +- bsp/n32/n32g43xcl-stb/board/Kconfig | 44 +- bsp/n32/n32g43xcl-stb/project.ewp | 4 +- bsp/n32/n32g43xcl-stb/project.uvprojx | 8 +- bsp/n32/n32g457qel-stb/README.md | 2 +- bsp/n32/n32g457qel-stb/board/Kconfig | 40 +- bsp/n32/n32g457qel-stb/project.ewp | 4 +- bsp/n32/n32g457qel-stb/project.uvprojx | 8 +- bsp/n32/n32g45xcl-stb/README.md | 2 +- bsp/n32/n32g45xcl-stb/board/Kconfig | 40 +- bsp/n32/n32g45xcl-stb/project.ewp | 4 +- bsp/n32/n32g45xcl-stb/project.uvprojx | 8 +- bsp/n32/n32g45xml-stb/README.md | 2 +- bsp/n32/n32g45xml-stb/board/Kconfig | 40 +- bsp/n32/n32g45xml-stb/project.ewp | 4 +- bsp/n32/n32g45xml-stb/project.uvprojx | 8 +- bsp/n32/n32g45xrl-stb/README.md | 2 +- bsp/n32/n32g45xrl-stb/board/Kconfig | 40 +- bsp/n32/n32g45xrl-stb/project.ewp | 4 +- bsp/n32/n32g45xrl-stb/project.uvprojx | 8 +- bsp/n32/n32g45xvl-stb/README.md | 2 +- bsp/n32/n32g45xvl-stb/board/Kconfig | 40 +- bsp/n32/n32g45xvl-stb/project.ewp | 4 +- bsp/n32/n32g45xvl-stb/project.uvprojx | 8 +- bsp/n32/n32g4frml-stb/board/Kconfig | 40 +- bsp/n32/n32g4frml-stb/project.ewp | 4 +- bsp/n32/n32g4frml-stb/project.uvprojx | 8 +- bsp/n32/n32l40xcl-stb/README.md | 2 +- bsp/n32/n32l40xcl-stb/board/Kconfig | 44 +- bsp/n32/n32l40xcl-stb/project.ewp | 4 +- bsp/n32/n32l40xcl-stb/project.uvprojx | 8 +- bsp/n32/n32l436-evb/README.md | 2 +- bsp/n32/n32l436-evb/board/Kconfig | 44 +- bsp/n32/n32l436-evb/project.ewp | 4 +- bsp/n32/n32l436-evb/project.uvprojx | 8 +- bsp/n32/n32l43xml-stb/README.md | 2 +- bsp/n32/n32l43xml-stb/board/Kconfig | 44 +- bsp/n32/n32l43xml-stb/project.ewp | 4 +- bsp/n32/n32l43xml-stb/project.uvprojx | 8 +- bsp/n32/n32l43xrl-stb/README.md | 2 +- bsp/n32/n32l43xrl-stb/board/Kconfig | 44 +- bsp/n32/n32l43xrl-stb/project.ewp | 4 +- bsp/n32/n32l43xrl-stb/project.uvprojx | 8 +- bsp/n32/n32wb45xl-evb/README.md | 2 +- bsp/n32/n32wb45xl-evb/board/Kconfig | 40 +- bsp/n32/n32wb45xl-evb/project.ewp | 4 +- bsp/n32/n32wb45xl-evb/project.uvprojx | 8 +- bsp/n32g452xx/Libraries/rt_drivers/SConscript | 4 +- .../rt_drivers/{drv_hwtimer.c => drv_timer.c} | 66 +- .../rt_drivers/{drv_hwtimer.h => drv_timer.h} | 4 +- bsp/n32g452xx/n32g452xx-mini-system/README.md | 2 +- .../n32g452xx-mini-system/board/Kconfig | 8 +- .../n32g452xx-mini-system/board/msp/n32_msp.c | 26 +- bsp/nrf5x/libraries/drivers/SConscript | 2 +- .../drivers/{drv_hwtimer.c => drv_timer.c} | 54 +- bsp/nrf5x/nrf52832/board/Kconfig | 2 +- bsp/nrf5x/nrf52840/board/Kconfig | 2 +- bsp/nrf5x/nrf5340/board/Kconfig | 2 +- bsp/nuclei/gd32vf103_rvstar/README.md | 4 +- bsp/nuclei/gd32vf103_rvstar/board/Kconfig | 20 +- bsp/nuclei/gd32vf103_rvstar/board/board.c | 8 +- .../gd32vf103/HAL_Drivers/SConscript | 4 +- .../gd32vf103/HAL_Drivers/drv_hwtimer.c | 315 --------- .../gd32vf103/HAL_Drivers/drv_timer.c | 315 +++++++++ .../{drv_hwtimer.h => drv_timer.h} | 12 +- bsp/nuvoton/libraries/m031/rtt_port/Kconfig | 8 +- .../libraries/m031/rtt_port/drv_timer.c | 58 +- bsp/nuvoton/libraries/m2354/rtt_port/Kconfig | 12 +- .../libraries/m2354/rtt_port/drv_timer.c | 66 +- bsp/nuvoton/libraries/m460/rtt_port/Kconfig | 8 +- .../libraries/m460/rtt_port/drv_timer.c | 48 +- bsp/nuvoton/libraries/m480/rtt_port/Kconfig | 8 +- .../libraries/m480/rtt_port/drv_timer.c | 58 +- bsp/nuvoton/libraries/ma35/rtt_port/Kconfig | 24 +- .../libraries/ma35/rtt_port/drv_timer.c | 48 +- bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig | 16 +- .../libraries/n9h30/rtt_port/drv_etimer.c | 48 +- .../libraries/n9h30/rtt_port/drv_timer.c | 48 +- bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig | 10 +- .../libraries/nuc980/rtt_port/drv_etimer.c | 48 +- bsp/nuvoton/nk-980iot/config_lvgl | 5 +- bsp/nuvoton/nk-980iot/project.uvopt | 12 +- bsp/nuvoton/nk-980iot/project.uvoptx | 12 +- bsp/nuvoton/nk-980iot/project.uvproj | 12 +- bsp/nuvoton/nk-980iot/project.uvprojx | 12 +- bsp/nuvoton/nk-980iot/spinor.config | 5 +- bsp/nuvoton/nk-n9h30/project.uvopt | 4 +- bsp/nuvoton/nk-n9h30/project.uvproj | 4 +- bsp/nuvoton/nk-rtu980/project.uvopt | 12 +- bsp/nuvoton/nk-rtu980/project.uvproj | 12 +- bsp/nuvoton/numaker-iot-m467/config_lvgl | 3 +- bsp/nuvoton/numaker-iot-m467/project.ewp | 2 +- bsp/nuvoton/numaker-iot-m467/project.uvoptx | 4 +- bsp/nuvoton/numaker-iot-m467/project.uvprojx | 4 +- bsp/nuvoton/numaker-iot-m487/config_lvgl | 3 +- bsp/nuvoton/numaker-iot-m487/project.ewp | 2 +- bsp/nuvoton/numaker-iot-m487/project.uvoptx | 4 +- bsp/nuvoton/numaker-iot-m487/project.uvproj | 4 +- bsp/nuvoton/numaker-iot-m487/project.uvprojx | 4 +- bsp/nuvoton/numaker-m032ki/config_lvgl | 3 +- bsp/nuvoton/numaker-m032ki/project.ewp | 2 +- bsp/nuvoton/numaker-m032ki/project.uvoptx | 4 +- bsp/nuvoton/numaker-m032ki/project.uvprojx | 4 +- bsp/nuvoton/numaker-m2354/config_lvgl | 5 +- bsp/nuvoton/numaker-m2354/project.ewp | 2 +- bsp/nuvoton/numaker-m2354/project.uvoptx | 4 +- bsp/nuvoton/numaker-m2354/project.uvprojx | 4 +- bsp/nuvoton/numaker-m467hj/config_lvgl | 3 +- bsp/nuvoton/numaker-m467hj/project.ewp | 2 +- bsp/nuvoton/numaker-m467hj/project.uvoptx | 4 +- bsp/nuvoton/numaker-m467hj/project.uvprojx | 4 +- bsp/nuvoton/numaker-pfm-m487/config_lvgl | 3 +- bsp/nuvoton/numaker-pfm-m487/project.ewp | 2 +- bsp/nuvoton/numaker-pfm-m487/project.uvoptx | 4 +- bsp/nuvoton/numaker-pfm-m487/project.uvproj | 4 +- bsp/nuvoton/numaker-pfm-m487/project.uvprojx | 4 +- .../imx/imxrt/imxrt1021-nxp-evk/board/Kconfig | 8 +- .../imxrt/imxrt1052-fire-pro/board/Kconfig | 8 +- .../imx/imxrt/imxrt1052-fire-pro/project.ewt | 2 +- .../imx/imxrt/libraries/drivers/SConscript | 4 +- .../drivers/{drv_hwtimer.c => drv_timer.c} | 122 ++-- .../drivers/{drv_hwtimer.h => drv_timer.h} | 4 +- .../templates/imxrt1050xxx/board/Kconfig | 8 +- .../templates/imxrt1050xxx/project.ewp | 2 +- .../templates/imxrt1050xxx/project.uvoptx | 4 +- .../templates/imxrt1050xxx/project.uvprojx | 4 +- .../templates/imxrt1064xxx/project.ewp | 2 +- .../templates/imxrt1064xxx/project.uvoptx | 4 +- .../templates/imxrt1064xxx/project.uvprojx | 4 +- bsp/nxp/lpc/lpc408x/drivers/Kconfig | 4 +- bsp/nxp/lpc/lpc408x/drivers/SConscript | 4 +- .../drivers/{drv_hwtimer.c => drv_timer.c} | 36 +- .../drivers/{drv_hwtimer.h => drv_timer.h} | 8 +- bsp/nxp/lpc/lpc408x/project.uvproj | 16 +- bsp/nxp/lpc/lpc408x/project.uvprojx | 16 +- .../lpc/lpc54608-LPCXpresso/project.uvprojx | 16 +- .../lpc/lpc55sxx/Libraries/drivers/SConscript | 4 +- .../drivers/{drv_hwtimer.c => drv_timer.c} | 110 ++-- .../drivers/{drv_hwtimer.h => drv_timer.h} | 8 +- .../template/lpc55s6xxxx/board/Kconfig | 8 +- .../template/lpc55s6xxxx/project.ewp | 4 +- .../template/lpc55s6xxxx/project.uvoptx | 8 +- .../template/lpc55s6xxxx/project.uvprojx | 8 +- .../lpc55sxx/lpc55s06_nxp_evk/board/Kconfig | 8 +- .../lpc55sxx/lpc55s16_nxp_evk/board/Kconfig | 8 +- .../lpc55sxx/lpc55s28_nxp_evk/board/Kconfig | 8 +- .../lpc55sxx/lpc55s36_nxp_evk/board/Kconfig | 8 +- .../lpc55sxx/lpc55s69_nxp_evk/board/Kconfig | 8 +- bsp/nxp/mcx/mcxa/Libraries/drivers/SConscript | 4 +- .../drivers/{drv_hwtimer.c => drv_timer.c} | 108 ++-- bsp/nxp/mcx/mcxa/frdm-mcxa153/board/Kconfig | 8 +- bsp/nxp/mcx/mcxa/frdm-mcxa153/project.uvprojx | 4 +- bsp/nxp/mcx/mcxa/frdm-mcxa156/board/Kconfig | 8 +- bsp/nxp/mcx/mcxa/frdm-mcxa156/project.uvoptx | 4 +- bsp/nxp/mcx/mcxa/frdm-mcxa156/project.uvprojx | 4 +- bsp/nxp/mcx/mcxa/frdm-mcxa346/board/Kconfig | 8 +- bsp/nxp/mcx/mcxa/frdm-mcxa346/project.uvoptx | 4 +- bsp/nxp/mcx/mcxa/frdm-mcxa346/project.uvprojx | 4 +- bsp/nxp/mcx/mcxc/Libraries/drivers/SConscript | 4 +- bsp/nxp/mcx/mcxc/frdm-mcxc444/board/Kconfig | 6 +- bsp/nxp/mcx/mcxc/frdm-mcxc444/project.ewp | 2 +- bsp/nxp/mcx/mcxc/frdm-mcxc444/project.uvprojx | 4 +- bsp/nxp/mcx/mcxe/Libraries/drivers/SConscript | 4 +- bsp/nxp/mcx/mcxe/frdm-mcxe247/board/Kconfig | 8 +- bsp/nxp/mcx/mcxe/frdm-mcxe247/project.uvoptx | 4 +- bsp/nxp/mcx/mcxe/frdm-mcxe247/project.uvprojx | 4 +- bsp/nxp/mcx/mcxn/Libraries/drivers/SConscript | 4 +- .../drivers/{drv_hwtimer.c => drv_timer.c} | 80 +-- .../drivers/{drv_hwtimer.h => drv_timer.h} | 8 +- bsp/nxp/mcx/mcxn/frdm-mcxn236/board/Kconfig | 6 +- bsp/nxp/mcx/mcxn/frdm-mcxn236/project.ewp | 2 +- bsp/nxp/mcx/mcxn/frdm-mcxn236/project.uvoptx | 4 +- bsp/nxp/mcx/mcxn/frdm-mcxn236/project.uvprojx | 4 +- bsp/nxp/mcx/mcxn/frdm-mcxn947/board/Kconfig | 6 +- bsp/nxp/mcx/mcxn/frdm-mcxn947/project.ewp | 2 +- bsp/nxp/mcx/mcxn/frdm-mcxn947/project.uvprojx | 4 +- .../raspi3-32/applications/test_device.c | 26 +- bsp/raspberry-pi/raspi3-32/driver/Kconfig | 2 +- bsp/raspberry-pi/raspi3-32/driver/drv_timer.c | 50 +- bsp/raspberry-pi/raspi3-64/driver/drv_timer.c | 50 +- bsp/raspberry-pico/Drivers/SConscript | 4 +- .../Drivers/{drv_hwtimer.c => drv_timer.c} | 76 +-- .../Drivers/{drv_hwtimer.h => drv_timer.h} | 8 +- bsp/raspberry-pico/RP2040/board/Kconfig | 16 +- bsp/raspberry-pico/RP2350/board/Kconfig | 16 +- .../libraries/HAL_Drivers/drivers/SConscript | 2 +- .../drivers/config/ra6e2/timer_config.h | 2 +- .../drivers/config/ra6m3/timer_config.h | 2 +- .../drivers/config/ra8/timer_config.h | 2 +- .../drivers/config/rzt/timer_config.h | 2 +- .../drivers/{drv_hwtimer.c => drv_timer.c} | 92 +-- .../drivers/{drv_hwtimer.h => drv_timer.h} | 6 +- bsp/renesas/ra4m1-ek/board/Kconfig | 2 +- bsp/renesas/ra6m3-ek/board/Kconfig | 2 +- bsp/renesas/ra8p1-titan-board/README.md | 2 +- bsp/renesas/ra8p1-titan-board/README_zh.md | 2 +- bsp/renesas/ra8p1-titan-board/board/Kconfig | 2 +- bsp/renesas/rzn2l_etherkit/board/Kconfig | 2 +- bsp/renesas/rzn2l_rsk/board/Kconfig | 2 +- bsp/renesas/rzt2m_rsk/board/Kconfig | 2 +- bsp/rockchip/rk3500/driver/Kconfig | 2 +- .../driver/{hwtimer => clock_timer}/Kconfig | 4 +- .../{hwtimer => clock_timer}/SConscript | 4 +- .../clock_timer-rockchip_timer.c} | 60 +- .../drivers/config/f0/tim_config.h | 2 +- .../drivers/config/f1/tim_config.h | 2 +- .../drivers/config/f2/tim_config.h | 2 +- .../drivers/config/f3/tim_config.h | 2 +- .../drivers/config/f4/tim_config.h | 2 +- .../drivers/config/f7/tim_config.h | 2 +- .../drivers/config/g0/tim_config.h | 2 +- .../drivers/config/g4/tim_config.h | 2 +- .../drivers/config/h7/lptim_config.h | 2 +- .../drivers/config/h7/tim_config.h | 2 +- .../drivers/config/l1/tim_config.h | 2 +- .../drivers/config/l4/tim_config.h | 2 +- .../drivers/config/l5/tim_config.h | 2 +- .../drivers/config/mp1/tim_config.h | 2 +- .../drivers/config/u5/tim_config.h | 2 +- .../drivers/config/wb/tim_config.h | 2 +- .../drivers/config/wl/tim_config.h | 4 +- .../libraries/HAL_Drivers/drivers/drv_lptim.c | 22 +- .../libraries/HAL_Drivers/drivers/drv_lptim.h | 2 +- .../libraries/HAL_Drivers/drivers/drv_pm.c | 2 +- .../libraries/HAL_Drivers/drivers/drv_tim.c | 104 +-- bsp/stm32/libraries/STM32L1xx_HAL/SConscript | 2 +- .../templates/stm32f3xx/project.uvoptx | 8 +- .../templates/stm32l1xx/board/Kconfig | 2 +- .../templates/stm32wbxx/board/Kconfig | 2 +- .../libraries/templates/stm32xx_board_Kconfig | 2 +- bsp/stm32/stm32f072-st-nucleo/board/Kconfig | 2 +- bsp/stm32/stm32f091-st-nucleo/board/Kconfig | 2 +- bsp/stm32/stm32f103-100ask-pro/board/Kconfig | 2 +- bsp/stm32/stm32f103-atk-nano/board/Kconfig | 2 +- .../stm32f103-atk-warshipv3/board/Kconfig | 2 +- .../stm32f103-fire-arbitrary/board/Kconfig | 2 +- .../arduino_pinout/pins_arduino.h | 2 +- bsp/stm32/stm32f401-st-nucleo/board/Kconfig | 2 +- .../stm32f405zg-mini-template/board/Kconfig | 2 +- bsp/stm32/stm32f407-armfly-v5/board/Kconfig | 2 +- .../stm32f407-atk-explorer/board/Kconfig | 2 +- .../stm32f407-fk407m2-zgt6/board/Kconfig | 2 +- .../stm32f407-lckfb-skystar/board/Kconfig | 2 +- bsp/stm32/stm32f407-micu/board/Kconfig | 2 +- bsp/stm32/stm32f407-rt-spark/board/Kconfig | 2 +- bsp/stm32/stm32f411-atk-nano/board/Kconfig | 2 +- .../arduino_pinout/pins_arduino.h | 2 +- bsp/stm32/stm32f411-st-nucleo/board/Kconfig | 2 +- .../stm32f411-weact-blackpill/board/Kconfig | 2 +- .../arduino_pinout/pins_arduino.h | 2 +- bsp/stm32/stm32f412-st-nucleo/board/Kconfig | 2 +- bsp/stm32/stm32f413-st-nucleo/board/Kconfig | 2 +- bsp/stm32/stm32f429-armfly-v6/board/Kconfig | 2 +- bsp/stm32/stm32f429-atk-apollo/board/Kconfig | 2 +- .../stm32f429-fire-challenger/board/Kconfig | 2 +- .../arduino_pinout/pins_arduino.h | 2 +- bsp/stm32/stm32f469-st-disco/board/Kconfig | 2 +- bsp/stm32/stm32f723-st-disco/project.ewp | 2 +- bsp/stm32/stm32f723-st-disco/project.uvprojx | 4 +- bsp/stm32/stm32f746-st-disco/board/Kconfig | 2 +- bsp/stm32/stm32f746-st-disco/project.ewp | 2 +- bsp/stm32/stm32f746-st-disco/project.uvprojx | 4 +- bsp/stm32/stm32f746-st-nucleo/board/Kconfig | 2 +- bsp/stm32/stm32f767-atk-apollo/board/Kconfig | 2 +- bsp/stm32/stm32g070-st-nucleo/board/Kconfig | 2 +- bsp/stm32/stm32g071-st-nucleo/board/Kconfig | 2 +- bsp/stm32/stm32g491-st-nucleo/board/Kconfig | 2 +- bsp/stm32/stm32h743-openmv-h7plus/project.ewp | 2 +- .../stm32h743-openmv-h7plus/project.uvprojx | 4 +- bsp/stm32/stm32h750-artpi/board/Kconfig | 2 +- .../stm32l433-ali-startkit/board/Kconfig | 2 +- .../arduino_pinout/pins_arduino.h | 2 +- bsp/stm32/stm32l475-atk-pandora/board/Kconfig | 2 +- .../arduino_pinout/pins_arduino.h | 2 +- bsp/stm32/stm32l476-st-nucleo/board/Kconfig | 2 +- .../stm32l496-ali-developer/board/Kconfig | 2 +- bsp/stm32/stm32l496-st-nucleo/board/Kconfig | 2 +- bsp/stm32/stm32l4r5-st-nucleo/board/Kconfig | 2 +- .../stm32mp157a-st-discovery/board/Kconfig | 2 +- .../board/ports/timer_sample.c | 32 +- bsp/stm32/stm32mp157a-st-ev1/board/Kconfig | 2 +- .../board/ports/timer_sample.c | 32 +- bsp/stm32/stm32wb55-st-nucleo/board/Kconfig | 2 +- .../libraries/SWM320_drivers/SConscript | 4 +- .../{drv_hwtimer.c => drv_timer.c} | 114 ++-- .../{drv_hwtimer.h => drv_timer.h} | 6 +- .../libraries/SWM341_drivers/SConscript | 4 +- .../{drv_hwtimer.c => drv_timer.c} | 136 ++-- .../{drv_hwtimer.h => drv_timer.h} | 6 +- bsp/synwit/swm320-mini/applications/main.c | 30 +- bsp/synwit/swm320-mini/board/Kconfig | 4 +- bsp/synwit/swm341-mini/applications/main.c | 24 +- bsp/synwit/swm341-mini/board/Kconfig | 4 +- bsp/tae32f5300/Libraries/SConscript | 2 +- bsp/tae32f5300/drivers/Kconfig | 2 +- bsp/tkm32F499/drivers/Kconfig | 2 +- bsp/tm4c123bsp/board/Kconfig | 2 +- bsp/tm4c123bsp/libraries/Drivers/SConscript | 4 +- .../libraries/TivaWare_C_series/SConscript | 2 +- bsp/w60x/drivers/Kconfig | 8 +- bsp/w60x/drivers/SConscript | 2 +- bsp/w60x/drivers/drv_hw_timer.c | 54 +- bsp/w60x/drivers/drv_hw_timer.h | 4 +- bsp/w60x/project.ewp | 2 +- bsp/w60x/project.uvprojx | 4 +- bsp/wch/arm/Libraries/ch32_drivers/SConscript | 8 +- .../ch32_drivers/drv_hwtimer_ch32f10x.c | 368 ----------- .../ch32_drivers/drv_hwtimer_ch32f20x.c | 602 ------------------ .../ch32_drivers/drv_timer_ch32f10x.c | 368 +++++++++++ .../ch32_drivers/drv_timer_ch32f20x.c | 602 ++++++++++++++++++ bsp/wch/arm/ch32f103c8-core/board/Kconfig | 44 +- bsp/wch/arm/ch32f103c8-core/board/board.c | 28 +- bsp/wch/arm/ch32f103c8-core/board/board.h | 4 +- bsp/wch/arm/ch32f10x_port_cn.md | 20 +- bsp/wch/arm/ch32f203r-evt/README.md | 2 +- bsp/wch/arm/ch32f203r-evt/board/Kconfig | 96 +-- bsp/wch/arm/ch32f203r-evt/board/board.c | 68 +- bsp/wch/arm/ch32f203r-evt/board/board.h | 4 +- bsp/wch/arm/ch32f203r-evt/project.uvprojx | 8 +- .../risc-v/Libraries/ch32_drivers/SConscript | 4 +- .../risc-v/Libraries/ch32_drivers/drv_pwm.h | 2 +- .../{drv_hwtimer.c => drv_timer.c} | 100 +-- .../{drv_hwtimer.h => drv_timer.h} | 16 +- .../risc-v/Libraries/ch56x_drivers/SConscript | 2 +- .../Libraries/ch56x_drivers/ch56x_timer.c | 154 ++--- bsp/wch/risc-v/ch32v208w-r0/board/Kconfig | 104 +-- bsp/wch/risc-v/ch32v307v-r1/board/Kconfig | 98 +-- bsp/wch/risc-v/ch569w-evt/applications/test.c | 30 +- bsp/wch/risc-v/ch569w-evt/board/Kconfig | 2 +- bsp/wch/risc-v/yd-ch32v307vct6/board/Kconfig | 96 +-- components/drivers/Kconfig | 4 +- components/drivers/clock_time/Kconfig | 18 + components/drivers/clock_time/README.md | 39 ++ components/drivers/clock_time/README_zh.md | 28 + components/drivers/clock_time/SConscript | 42 ++ .../clock_time/arch/aarch64/cputimer.c | 59 ++ .../clock_time/arch/risc-v/virt64/cputimer.c | 61 ++ .../drivers/clock_time/clock_boottime.c | 78 +++ .../hrtimer.c => clock_time/clock_hrtimer.c} | 166 ++--- .../clock_time_arm_arch.c} | 0 .../drivers/clock_time/clock_time_core.c | 232 +++++++ .../hwtimer.c => clock_time/clock_timer.c} | 232 +++++-- components/drivers/cputime/Kconfig | 34 - components/drivers/cputime/SConscript | 18 - components/drivers/cputime/cputime.c | 116 ---- components/drivers/cputime/cputime_cortexm.c | 69 -- components/drivers/cputime/cputime_riscv.c | 37 -- components/drivers/cputime/cputimer.c | 339 ---------- components/drivers/hwtimer/Kconfig | 14 - components/drivers/hwtimer/SConscript | 18 - .../drivers/include/drivers/clock_time.h | 184 ++++++ .../drivers/include/drivers/core/master_id.h | 2 +- components/drivers/include/drivers/cputime.h | 38 -- components/drivers/include/drivers/cputimer.h | 48 -- components/drivers/include/drivers/hwtimer.h | 89 --- components/drivers/include/rtdevice.h | 10 +- components/drivers/input/Kconfig | 2 +- components/drivers/input/input_uapi.c | 4 +- components/drivers/ktime/Kconfig | 3 - components/drivers/ktime/README.md | 63 -- components/drivers/ktime/SConscript | 24 - components/drivers/ktime/inc/ktime.h | 169 ----- .../drivers/ktime/src/aarch64/cputimer.c | 34 - components/drivers/ktime/src/boottime.c | 48 -- components/drivers/ktime/src/cputimer.c | 31 - .../ktime/src/risc-v/virt64/cputimer.c | 35 - components/drivers/pic/Kconfig | 2 +- components/drivers/pic/pic.c | 6 +- components/drivers/rtc/dev_soft_rtc.c | 22 +- components/libc/compilers/common/ctime.c | 76 +-- components/libc/posix/Kconfig | 4 +- .../lwp/arch/aarch64/common/vdso_data.c | 6 +- components/lwp/arch/risc-v/common/vdso_data.c | 6 +- .../6.components/device-driver/INDEX.md | 2 +- .../hwtimer.md => clock_timer/clock_timer.md} | 104 +-- .../{hwtimer_test.c => clock_timer_test.c} | 24 +- libcpu/Kconfig | 2 +- libcpu/aarch64/common/SConscript | 2 +- libcpu/aarch64/common/gtimer.c | 8 +- libcpu/aarch64/common/setup.c | 24 +- libcpu/risc-v/common64/tick.c | 36 +- src/Kconfig | 2 +- src/utest/perf/Kconfig | 6 +- src/utest/perf/irq_latency_tc.c | 11 +- src/utest/perf/perf_tc.c | 19 +- src/utest/perf/perf_tc.h | 2 +- 638 files changed, 7942 insertions(+), 8308 deletions(-) rename bsp/ESP32_C3/drivers/{drv_hwtimer.c => drv_timer.c} (53%) rename bsp/ESP32_C3/drivers/{drv_hwtimer.h => drv_timer.h} (61%) rename bsp/Infineon/libraries/HAL_Drivers/{drv_hwtimer.c => drv_timer.c} (74%) rename bsp/Infineon/libraries/HAL_Drivers/{drv_hwtimer.h => drv_timer.h} (89%) rename bsp/acm32/acm32f0x0-nucleo/drivers/{drv_hwtimer.c => drv_timer.c} (77%) rename bsp/airm2m/air105/libraries/HAL_Driver/Inc/{core_hwtimer.h => core_clock_timer.h} (98%) rename bsp/airm2m/air105/libraries/HAL_Driver/Src/{core_hwtimer.c => core_clock_timer.c} (98%) delete mode 100644 bsp/airm2m/air32f103/libraries/rt_drivers/drv_hwtimer.c create mode 100644 bsp/airm2m/air32f103/libraries/rt_drivers/drv_timer.c rename bsp/airm2m/air32f103/libraries/rt_drivers/{drv_hwtimer.h => drv_timer.h} (67%) rename bsp/apm32/libraries/Drivers/{drv_hwtimer.c => drv_timer.c} (84%) rename bsp/at32/libraries/rt_drivers/{drv_hwtimer.c => drv_timer.c} (80%) rename bsp/at32/libraries/rt_drivers/{drv_hwtimer.h => drv_timer.h} (95%) rename bsp/bluetrum/libraries/hal_drivers/{drv_hwtimer.c => drv_timer.c} (60%) rename bsp/bouffalo_lab/libraries/rt_drivers/{drv_hwtimer.c => drv_timer.c} (66%) rename bsp/bouffalo_lab/libraries/rt_drivers/{drv_hwtimer.h => drv_timer.h} (71%) rename bsp/bouffalo_lab/libraries/rt_drivers/sample/{hwtimer_sample.c => clock_timer_sample.c} (65%) create mode 100644 bsp/essemi/es32f0654/drivers/ES/es_conf_info_clock_timer.h delete mode 100644 bsp/essemi/es32f0654/drivers/ES/es_conf_info_hwtimer.h delete mode 100644 bsp/essemi/es32f0654/drivers/drv_hwtimer.c create mode 100644 bsp/essemi/es32f0654/drivers/drv_timer.c rename bsp/essemi/{es32vf2264/drivers/drv_hwtimer.h => es32f0654/drivers/drv_timer.h} (86%) create mode 100644 bsp/essemi/es32f365x/drivers/ES/es_conf_info_clock_timer.h delete mode 100644 bsp/essemi/es32f365x/drivers/ES/es_conf_info_hwtimer.h rename bsp/essemi/{es32f0654/drivers/drv_hwtimer.h => es32f365x/drivers/drv_timer.h} (86%) create mode 100644 bsp/essemi/es32f369x/drivers/ES/es_conf_info_clock_timer.h delete mode 100644 bsp/essemi/es32f369x/drivers/ES/es_conf_info_hwtimer.h delete mode 100644 bsp/essemi/es32f369x/drivers/drv_hwtimer.c create mode 100644 bsp/essemi/es32f369x/drivers/drv_timer.c rename bsp/essemi/{es32f365x/drivers/drv_hwtimer.h => es32f369x/drivers/drv_timer.h} (86%) create mode 100644 bsp/essemi/es32vf2264/drivers/ES/es_conf_info_clock_timer.h delete mode 100644 bsp/essemi/es32vf2264/drivers/ES/es_conf_info_hwtimer.h delete mode 100644 bsp/essemi/es32vf2264/drivers/drv_hwtimer.c create mode 100644 bsp/essemi/es32vf2264/drivers/drv_timer.c rename bsp/essemi/{es32f369x/drivers/drv_hwtimer.h => es32vf2264/drivers/drv_timer.h} (86%) rename bsp/gd32/arm/libraries/gd32_drivers/{drv_hwtimer.c => drv_timer.c} (63%) rename bsp/hc32/libraries/hc32_drivers/{drv_hwtimer.c => drv_timer.c} (58%) rename bsp/hc32/tests/{test_hwtimer.c => test_clock_timer.c} (75%) delete mode 100644 bsp/hpmicro/libraries/drivers/drv_hwtimer.h rename bsp/hpmicro/libraries/drivers/{drv_hwtimer.c => drv_timer.c} (79%) create mode 100644 bsp/hpmicro/libraries/drivers/drv_timer.h rename bsp/k230/drivers/interdrv/{hwtimer => clock_timer}/SConscript (100%) rename bsp/k230/drivers/interdrv/{hwtimer => clock_timer}/drv_timer.c (84%) rename bsp/k230/drivers/interdrv/{hwtimer => clock_timer}/drv_timer.h (98%) rename bsp/n32/libraries/n32_drivers/{drv_hwtimer.c => drv_timer.c} (66%) rename bsp/n32/libraries/n32_drivers/{drv_hwtimer.h => drv_timer.h} (64%) rename bsp/n32g452xx/Libraries/rt_drivers/{drv_hwtimer.c => drv_timer.c} (77%) rename bsp/n32g452xx/Libraries/rt_drivers/{drv_hwtimer.h => drv_timer.h} (96%) rename bsp/nrf5x/libraries/drivers/{drv_hwtimer.c => drv_timer.c} (80%) delete mode 100644 bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_hwtimer.c create mode 100644 bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_timer.c rename bsp/nuclei/libraries/gd32vf103/HAL_Drivers/{drv_hwtimer.h => drv_timer.h} (68%) rename bsp/nxp/imx/imxrt/libraries/drivers/{drv_hwtimer.c => drv_timer.c} (58%) rename bsp/nxp/imx/imxrt/libraries/drivers/{drv_hwtimer.h => drv_timer.h} (83%) rename bsp/nxp/lpc/lpc408x/drivers/{drv_hwtimer.c => drv_timer.c} (70%) rename bsp/nxp/lpc/lpc408x/drivers/{drv_hwtimer.h => drv_timer.h} (63%) rename bsp/nxp/lpc/lpc55sxx/Libraries/drivers/{drv_hwtimer.c => drv_timer.c} (52%) rename bsp/nxp/lpc/lpc55sxx/Libraries/drivers/{drv_hwtimer.h => drv_timer.h} (91%) rename bsp/nxp/mcx/mcxa/Libraries/drivers/{drv_hwtimer.c => drv_timer.c} (59%) rename bsp/nxp/mcx/mcxn/Libraries/drivers/{drv_hwtimer.c => drv_timer.c} (50%) rename bsp/nxp/mcx/mcxn/Libraries/drivers/{drv_hwtimer.h => drv_timer.h} (66%) rename bsp/raspberry-pico/Drivers/{drv_hwtimer.c => drv_timer.c} (57%) rename bsp/raspberry-pico/Drivers/{drv_hwtimer.h => drv_timer.h} (67%) rename bsp/renesas/libraries/HAL_Drivers/drivers/{drv_hwtimer.c => drv_timer.c} (69%) rename bsp/renesas/libraries/HAL_Drivers/drivers/{drv_hwtimer.h => drv_timer.h} (85%) rename bsp/rockchip/rk3500/driver/{hwtimer => clock_timer}/Kconfig (50%) rename bsp/rockchip/rk3500/driver/{hwtimer => clock_timer}/SConscript (65%) rename bsp/rockchip/rk3500/driver/{hwtimer/hwtimer-rockchip_timer.c => clock_timer/clock_timer-rockchip_timer.c} (83%) rename bsp/synwit/libraries/SWM320_drivers/{drv_hwtimer.c => drv_timer.c} (59%) rename bsp/synwit/libraries/SWM320_drivers/{drv_hwtimer.h => drv_timer.h} (75%) rename bsp/synwit/libraries/SWM341_drivers/{drv_hwtimer.c => drv_timer.c} (70%) rename bsp/synwit/libraries/SWM341_drivers/{drv_hwtimer.h => drv_timer.h} (72%) delete mode 100644 bsp/wch/arm/Libraries/ch32_drivers/drv_hwtimer_ch32f10x.c delete mode 100644 bsp/wch/arm/Libraries/ch32_drivers/drv_hwtimer_ch32f20x.c create mode 100644 bsp/wch/arm/Libraries/ch32_drivers/drv_timer_ch32f10x.c create mode 100644 bsp/wch/arm/Libraries/ch32_drivers/drv_timer_ch32f20x.c rename bsp/wch/risc-v/Libraries/ch32_drivers/{drv_hwtimer.c => drv_timer.c} (76%) rename bsp/wch/risc-v/Libraries/ch32_drivers/{drv_hwtimer.h => drv_timer.h} (94%) create mode 100644 components/drivers/clock_time/Kconfig create mode 100644 components/drivers/clock_time/README.md create mode 100644 components/drivers/clock_time/README_zh.md create mode 100644 components/drivers/clock_time/SConscript create mode 100644 components/drivers/clock_time/arch/aarch64/cputimer.c create mode 100644 components/drivers/clock_time/arch/risc-v/virt64/cputimer.c create mode 100644 components/drivers/clock_time/clock_boottime.c rename components/drivers/{ktime/src/hrtimer.c => clock_time/clock_hrtimer.c} (64%) rename components/drivers/{hwtimer/hwtimer-arm_arch.c => clock_time/clock_time_arm_arch.c} (100%) create mode 100644 components/drivers/clock_time/clock_time_core.c rename components/drivers/{hwtimer/hwtimer.c => clock_time/clock_timer.c} (52%) delete mode 100644 components/drivers/cputime/Kconfig delete mode 100644 components/drivers/cputime/SConscript delete mode 100644 components/drivers/cputime/cputime.c delete mode 100644 components/drivers/cputime/cputime_cortexm.c delete mode 100644 components/drivers/cputime/cputime_riscv.c delete mode 100644 components/drivers/cputime/cputimer.c delete mode 100644 components/drivers/hwtimer/Kconfig delete mode 100644 components/drivers/hwtimer/SConscript create mode 100644 components/drivers/include/drivers/clock_time.h delete mode 100644 components/drivers/include/drivers/cputime.h delete mode 100644 components/drivers/include/drivers/cputimer.h delete mode 100644 components/drivers/include/drivers/hwtimer.h delete mode 100644 components/drivers/ktime/Kconfig delete mode 100644 components/drivers/ktime/README.md delete mode 100644 components/drivers/ktime/SConscript delete mode 100644 components/drivers/ktime/inc/ktime.h delete mode 100644 components/drivers/ktime/src/aarch64/cputimer.c delete mode 100644 components/drivers/ktime/src/boottime.c delete mode 100644 components/drivers/ktime/src/cputimer.c delete mode 100644 components/drivers/ktime/src/risc-v/virt64/cputimer.c rename documentation/6.components/device-driver/{hwtimer/hwtimer.md => clock_timer/clock_timer.md} (80%) rename examples/test/{hwtimer_test.c => clock_timer_test.c} (80%) diff --git a/bsp/ESP32_C3/README.md b/bsp/ESP32_C3/README.md index 474f5da46b4..5f61eff7d45 100644 --- a/bsp/ESP32_C3/README.md +++ b/bsp/ESP32_C3/README.md @@ -47,7 +47,7 @@ Each peripheral supporting condition for this BSP is as follows: | WIFI | Partial support | There are currently some problems, such as `rt_mq_recive` cannot be used in ISR, etc. | | BLE | Partially supported | There are currently some problems, such as `NimBLE` running errors after starting for a while | | GDBStub | Support | You can use the GDB provided by ESP-IDF by turning on the `BSP_ENABLE_GDBSTUB` switch, which will enter GDB mode after a chip error | -| HWTIMER | Support | +| CLOCK_TIMER | Support | Note: 1. WIFI and BLE cannot be enabled at the same time. When using the BLE driver, be sure to turn off the `RT_USING_WIFI` and `LWIP` switches in `menuconfig`. In addition, due to limited capabilities and lack of debugging equipment, there are problems with WIFI and BLE driver operation. If it can be solved, please contact [timwcx@qq.com](mailto:timwcx@qq.com). diff --git a/bsp/ESP32_C3/README_ZH.md b/bsp/ESP32_C3/README_ZH.md index 967d82baa35..c0014ac86fc 100644 --- a/bsp/ESP32_C3/README_ZH.md +++ b/bsp/ESP32_C3/README_ZH.md @@ -54,7 +54,7 @@ | WIFI | 部分支持 | 目前存在一些问题，例如不能在ISR中使用`rt_mq_recive`等 | | BLE | 部分支持 | 目前存在一些问题，例如`NimBLE`启动一段时间后运行错误 | | GDBStub | 支持 | 通过开启`BSP_ENABLE_GDBSTUB`开关即可使用ESP-IDF所提供的GDB，其会在芯片出错后进入GDB模式 | -| HWTIMER | 支持 | +| CLOCK_TIMER | 支持 | 注： 1、WIFI和BLE不能同时启用，在使用BLE驱动时注意在`menuconfig`中关闭`RT_USING_WIFI`和`LWIP`开关。另外由于能力有限且缺乏调试设备，WIFI和BLE驱动运行都有问题，如果可以解决联系[timwcx@qq.com](mailto:timwcx@qq.com)。 diff --git a/bsp/ESP32_C3/drivers/Kconfig b/bsp/ESP32_C3/drivers/Kconfig index 2d6c4326e94..b7cb8f1275d 100644 --- a/bsp/ESP32_C3/drivers/Kconfig +++ b/bsp/ESP32_C3/drivers/Kconfig @@ -115,13 +115,13 @@ menu "On-chip Peripheral Drivers" bool "Enable BLE" default n - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" - select RT_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" + select RT_USING_CLOCK_TIME default n - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config BSP_USING_TIMER0 - bool "Enable HWTIMER0" + bool "Enable CLOCK_TIMER0" default n endif diff --git a/bsp/ESP32_C3/drivers/SConscript b/bsp/ESP32_C3/drivers/SConscript index 55e9a09d1d4..74d91cca657 100644 --- a/bsp/ESP32_C3/drivers/SConscript +++ b/bsp/ESP32_C3/drivers/SConscript @@ -24,8 +24,8 @@ if GetDepend('BSP_USING_SW_I2C'): if GetDepend('BSP_USING_PWM'): src += ['drv_pwm.c'] -if GetDepend('BSP_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('BSP_USING_CLOCK_TIMER'): + src += ['drv_timer.c'] if GetDepend('BSP_USING_WIFI'): src += ['drv_wifi.c'] diff --git a/bsp/ESP32_C3/drivers/drv_hwtimer.c b/bsp/ESP32_C3/drivers/drv_timer.c similarity index 53% rename from bsp/ESP32_C3/drivers/drv_hwtimer.c rename to bsp/ESP32_C3/drivers/drv_timer.c index 63d33d9a914..7c0766e6090 100644 --- a/bsp/ESP32_C3/drivers/drv_hwtimer.c +++ b/bsp/ESP32_C3/drivers/drv_timer.c @@ -8,24 +8,24 @@ * 2023-11-15 BetMul first version */ -#include "drv_hwtimer.h" +#include "drv_timer.h" #include #include #include "driver/gptimer.h" #include "sdkconfig.h" -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME /** - * handle interrupt for hwtimer. + * handle interrupt for clock_timer. */ -static bool mcu_hwtimer_intr_handler(gptimer_handle_t gptimer, const gptimer_alarm_event_data_t *edata, void *user_ctx) +static bool mcu_clock_timer_intr_handler(gptimer_handle_t gptimer, const gptimer_alarm_event_data_t *edata, void *user_ctx) { rt_interrupt_enter(); - rt_hwtimer_t *hwtimer = (rt_hwtimer_t *)user_ctx; - rt_device_hwtimer_isr(hwtimer); + rt_clock_timer_t *clock_timer = (rt_clock_timer_t *)user_ctx; + rt_clock_timer_isr(clock_timer); rt_interrupt_leave(); @@ -33,9 +33,9 @@ static bool mcu_hwtimer_intr_handler(gptimer_handle_t gptimer, const gptimer_ala } /** - * init the hwtimer + * init the clock_timer */ -static void mcu_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void mcu_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { gptimer_handle_t gptimer = (gptimer_handle_t)timer->parent.user_data; @@ -44,15 +44,15 @@ static void mcu_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) } /** - * start the hwtimer, change status into running + * start the clock_timer, change status into running */ -static rt_err_t mcu_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t mcu_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { gptimer_handle_t gptimer = (gptimer_handle_t)timer->parent.user_data; gptimer_alarm_config_t alarm_config = { .alarm_count = cnt, }; - if (mode == HWTIMER_MODE_ONESHOT) + if (mode == CLOCK_TIMER_MODE_ONESHOT) { } @@ -68,9 +68,9 @@ static rt_err_t mcu_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtim } /** - * stop the hwtimer, change the status from running into enable + * stop the clock_timer, change the status from running into enable */ -static void mcu_hwtimer_stop(rt_hwtimer_t *timer) +static void mcu_clock_timer_stop(rt_clock_timer_t *timer) { gptimer_handle_t gptimer = (gptimer_handle_t)timer->parent.user_data; @@ -80,7 +80,7 @@ static void mcu_hwtimer_stop(rt_hwtimer_t *timer) /** * get count */ -static rt_uint32_t mcu_hwtimer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t mcu_clock_timer_count_get(rt_clock_timer_t *timer) { gptimer_handle_t gptimer = (gptimer_handle_t)timer->parent.user_data; // get count number @@ -90,53 +90,53 @@ static rt_uint32_t mcu_hwtimer_count_get(rt_hwtimer_t *timer) } /** - * control the hwtimer + * control the clock_timer */ -static rt_err_t mcu_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t mcu_clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t err = RT_EOK; switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: err = -RT_ERROR; break; - case HWTIMER_CTRL_INFO_GET: + case CLOCK_TIMER_CTRL_INFO_GET: err = -RT_ERROR; break; - case HWTIMER_CTRL_MODE_SET: + case CLOCK_TIMER_CTRL_MODE_SET: timer->mode = *(rt_uint32_t *)args; break; - case HWTIMER_CTRL_STOP: - mcu_hwtimer_stop(timer); + case CLOCK_TIMER_CTRL_STOP: + mcu_clock_timer_stop(timer); break; } return err; } -static struct rt_hwtimer_device _hwtimer; -static const struct rt_hwtimer_ops _hwtimer_ops = +static struct rt_clock_timer_device _clock_timer; +static const struct rt_clock_timer_ops _clock_timer_ops = { - .init = mcu_hwtimer_init, - .start = mcu_hwtimer_start, - .stop = mcu_hwtimer_stop, - .count_get = mcu_hwtimer_count_get, - .control = mcu_hwtimer_control}; + .init = mcu_clock_timer_init, + .start = mcu_clock_timer_start, + .stop = mcu_clock_timer_stop, + .count_get = mcu_clock_timer_count_get, + .control = mcu_clock_timer_control}; -static const struct rt_hwtimer_info _hwtimer_info = +static const struct rt_clock_timer_info _clock_timer_info = { // TODO:what is the true max and min? .maxfreq = 1000000UL, .minfreq = 1000000UL, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_MODE_ONESHOT}; + .cntmode = CLOCK_TIMER_MODE_ONESHOT}; -int rt_hw_hwtimer_init(void) +int rt_hw_clock_timer_init(void) { char *name = "timer0"; @@ -149,18 +149,18 @@ int rt_hw_hwtimer_init(void) }; gptimer_event_callbacks_t cbs = { - .on_alarm = mcu_hwtimer_intr_handler, + .on_alarm = mcu_clock_timer_intr_handler, }; ESP_ERROR_CHECK(gptimer_new_timer(&timer_config, &gptimer)); - ESP_ERROR_CHECK(gptimer_register_event_callbacks(gptimer, &cbs, &_hwtimer)); + ESP_ERROR_CHECK(gptimer_register_event_callbacks(gptimer, &cbs, &_clock_timer)); - _hwtimer.info = &_hwtimer_info; - _hwtimer.ops = &_hwtimer_ops; + _clock_timer.info = &_clock_timer_info; + _clock_timer.ops = &_clock_timer_ops; - return rt_device_hwtimer_register(&_hwtimer, name, (void *)gptimer); + return rt_clock_timer_register(&_clock_timer, name, (void *)gptimer); } -INIT_DEVICE_EXPORT(rt_hw_hwtimer_init); -#endif /* RT_USING_HWTIMER */ +INIT_DEVICE_EXPORT(rt_hw_clock_timer_init); +#endif /* RT_USING_CLOCK_TIME */ diff --git a/bsp/ESP32_C3/drivers/drv_hwtimer.h b/bsp/ESP32_C3/drivers/drv_timer.h similarity index 61% rename from bsp/ESP32_C3/drivers/drv_hwtimer.h rename to bsp/ESP32_C3/drivers/drv_timer.h index a5a62fe0032..87a1ee495c7 100644 --- a/bsp/ESP32_C3/drivers/drv_hwtimer.h +++ b/bsp/ESP32_C3/drivers/drv_timer.h @@ -7,14 +7,14 @@ * Date Author Notes * 2023-11-15 BetMul first version */ -#ifndef __DRV_HWTIMER_H__ -#define __DRV_HWTIMER_H__ +#ifndef __DRV_CLOCK_TIMER_H__ +#define __DRV_CLOCK_TIMER_H__ #include -#ifdef RT_USING_HWTIMER -int rt_hw_hwtimer_init(void); +#ifdef RT_USING_CLOCK_TIME +int rt_hw_clock_timer_init(void); #endif -#endif /* __DRV_HWTIMER_H__ */ +#endif /* __DRV_CLOCK_TIMER_H__ */ diff --git a/bsp/Infineon/libraries/HAL_Drivers/SConscript b/bsp/Infineon/libraries/HAL_Drivers/SConscript index 2b7bb6f2e72..017b3cb4d77 100644 --- a/bsp/Infineon/libraries/HAL_Drivers/SConscript +++ b/bsp/Infineon/libraries/HAL_Drivers/SConscript @@ -57,7 +57,7 @@ if GetDepend(['RT_USING_DAC']): src += ['drv_dac.c'] if GetDepend(['BSP_USING_TIM']): - src += ['drv_hwtimer.c'] + src += ['drv_timer.c'] if GetDepend(['BSP_USING_ETH']): src += ['drv_eth.c'] diff --git a/bsp/Infineon/libraries/HAL_Drivers/drv_hwtimer.c b/bsp/Infineon/libraries/HAL_Drivers/drv_timer.c similarity index 74% rename from bsp/Infineon/libraries/HAL_Drivers/drv_hwtimer.c rename to bsp/Infineon/libraries/HAL_Drivers/drv_timer.c index 722c420cc5a..946885686f0 100644 --- a/bsp/Infineon/libraries/HAL_Drivers/drv_hwtimer.c +++ b/bsp/Infineon/libraries/HAL_Drivers/drv_timer.c @@ -8,18 +8,18 @@ * 2022-07-29 rtthread qiu first version */ #include "drv_common.h" -#include "drv_hwtimer.h" +#include "drv_timer.h" #include #ifdef BSP_USING_TIM /*#define DRV_DEBUG*/ -#define LOG_TAG "drv.hwtimer" +#define LOG_TAG "drv.clock_timer" #include static void isr_timer(void *callback_arg, cyhal_timer_event_t event); -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME enum { #ifdef BSP_USING_TIM1 @@ -30,15 +30,15 @@ enum #endif }; -struct cyp_hwtimer +struct cyp_clock_timer { - rt_hwtimer_t time_device; + rt_clock_timer_t time_device; cyhal_timer_t tim_handle; IRQn_Type tim_irqn; char *name; }; -static struct cyp_hwtimer cyp_hwtimer_obj[] = +static struct cyp_clock_timer cyp_clock_timer_obj[] = { #ifdef BSP_USING_TIM1 TIM1_CONFIG, @@ -48,7 +48,7 @@ static struct cyp_hwtimer cyp_hwtimer_obj[] = #endif }; -static void timer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { RT_ASSERT(timer != RT_NULL); @@ -98,7 +98,7 @@ static void timer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode) { RT_ASSERT(timer != RT_NULL); RT_ASSERT(opmode != RT_NULL); @@ -122,7 +122,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ duration */ cyhal_timer_configure(tim, &init_timer_cfg); - if (opmode == HWTIMER_MODE_ONESHOT) + if (opmode == CLOCK_TIMER_MODE_ONESHOT) { /* set timer to single mode */ cyhal_timer_stop(tim); @@ -148,7 +148,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ return result; } -static void timer_stop(rt_hwtimer_t *timer) +static void timer_stop(rt_clock_timer_t *timer) { RT_ASSERT(timer != RT_NULL); @@ -160,7 +160,7 @@ static void timer_stop(rt_hwtimer_t *timer) cyhal_timer_stop(tim); } -static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t timer_counter_get(rt_clock_timer_t *timer) { cyhal_timer_t *tim = RT_NULL; @@ -175,7 +175,7 @@ static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) return count; } -static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { RT_ASSERT(timer != RT_NULL); RT_ASSERT(arg != RT_NULL); @@ -188,7 +188,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { rt_uint32_t freq; rt_uint16_t val; @@ -213,9 +213,9 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) return result; } -static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG; +static const struct rt_clock_timer_info _info = TIM_DEV_INFO_CONFIG; -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_ops _ops = { .init = timer_init, .start = timer_start, @@ -232,79 +232,79 @@ static void isr_timer(void *callback_arg, cyhal_timer_event_t event) (void)callback_arg; (void)event; #ifdef BSP_USING_TIM1 - rt_device_hwtimer_isr(&cyp_hwtimer_obj[TIM1_INDEX].time_device); + rt_clock_timer_isr(&cyp_clock_timer_obj[TIM1_INDEX].time_device); #endif #ifdef BSP_USING_TIM2 - rt_device_hwtimer_isr(&cyp_hwtimer_obj[TIM2_INDEX].time_device); + rt_clock_timer_isr(&cyp_clock_timer_obj[TIM2_INDEX].time_device); #endif /* leave interrupt */ rt_interrupt_leave(); } -int cyp_hwtimer_init(void) +int cyp_clock_timer_init(void) { int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(cyp_hwtimer_obj) / sizeof(cyp_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(cyp_clock_timer_obj) / sizeof(cyp_clock_timer_obj[0]); i++) { - cyp_hwtimer_obj[i].time_device.info = &_info; - cyp_hwtimer_obj[i].time_device.ops = &_ops; - if (rt_device_hwtimer_register(&cyp_hwtimer_obj[i].time_device, cyp_hwtimer_obj[i].name, &cyp_hwtimer_obj[i].tim_handle) != RT_EOK) + cyp_clock_timer_obj[i].time_device.info = &_info; + cyp_clock_timer_obj[i].time_device.ops = &_ops; + if (rt_clock_timer_register(&cyp_clock_timer_obj[i].time_device, cyp_clock_timer_obj[i].name, &cyp_clock_timer_obj[i].tim_handle) != RT_EOK) { - LOG_E("%s register failed", cyp_hwtimer_obj[i].name); + LOG_E("%s register failed", cyp_clock_timer_obj[i].name); result = -RT_ERROR; } } return result; } -INIT_BOARD_EXPORT(cyp_hwtimer_init); +INIT_BOARD_EXPORT(cyp_clock_timer_init); -#endif /*RT_USING_HWTIMER*/ +#endif /*RT_USING_CLOCK_TIME*/ #endif /*BSP_USING_TIM*/ -/* this is a hwtimer test demo*/ +/* this is a clock_timer test demo*/ #include #include -#define HWTIMER_DEV_NAME "time2" /* device name */ +#define CLOCK_TIMER_DEV_NAME "time2" /* device name */ static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) { - rt_kprintf("this is hwtimer timeout callback fucntion!\n"); + rt_kprintf("this is clock_timer timeout callback fucntion!\n"); rt_kprintf("tick is :%d !\n", rt_tick_get()); return 0; } -int hwtimer_sample() +int clock_timer_sample() { rt_err_t ret = RT_EOK; - rt_hwtimerval_t timeout_s; + rt_clock_timerval_t timeout_s; rt_device_t hw_dev = RT_NULL; - rt_hwtimer_mode_t mode; + rt_clock_timer_mode_t mode; rt_uint32_t freq = 10000; - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); return -RT_ERROR; } ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); if (ret != RT_EOK) { - rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME); + rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME); return ret; } rt_device_set_rx_indicate(hw_dev, timeout_cb); - rt_device_control(hw_dev, HWTIMER_CTRL_FREQ_SET, &freq); + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_FREQ_SET, &freq); - mode = HWTIMER_MODE_PERIOD; - ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); if (ret != RT_EOK) { rt_kprintf("set mode failed! ret is :%d\n", ret); @@ -329,4 +329,4 @@ int hwtimer_sample() } return ret; } -MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample); +MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample); diff --git a/bsp/Infineon/libraries/HAL_Drivers/drv_hwtimer.h b/bsp/Infineon/libraries/HAL_Drivers/drv_timer.h similarity index 89% rename from bsp/Infineon/libraries/HAL_Drivers/drv_hwtimer.h rename to bsp/Infineon/libraries/HAL_Drivers/drv_timer.h index a94447bdc99..68016814e75 100644 --- a/bsp/Infineon/libraries/HAL_Drivers/drv_hwtimer.h +++ b/bsp/Infineon/libraries/HAL_Drivers/drv_timer.h @@ -8,8 +8,8 @@ * 2022-07-29 rtthread qiu first version */ -#ifndef __DRV_HWTIMER_H__ -#define __DRV_HWTIMER_H__ +#ifndef __DRV_CLOCK_TIMER_H__ +#define __DRV_CLOCK_TIMER_H__ #include @@ -24,7 +24,7 @@ .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ @@ -48,4 +48,4 @@ #endif /*TIM2_CONFIG*/ #endif /* BSP_USING_TIM2 */ -#endif /* __DRV_HWTIMER_H__ */ +#endif /* __DRV_CLOCK_TIMER_H__ */ diff --git a/bsp/Infineon/libraries/templates/PSOC62/board/Kconfig b/bsp/Infineon/libraries/templates/PSOC62/board/Kconfig index a8951998f09..07a230d7969 100644 --- a/bsp/Infineon/libraries/templates/PSOC62/board/Kconfig +++ b/bsp/Infineon/libraries/templates/PSOC62/board/Kconfig @@ -239,7 +239,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM1 bool "Enable TIM1" diff --git a/bsp/Infineon/psoc6-cy8ckit-062-BLE/board/Kconfig b/bsp/Infineon/psoc6-cy8ckit-062-BLE/board/Kconfig index 90781dde3af..77a4380e4a9 100644 --- a/bsp/Infineon/psoc6-cy8ckit-062-BLE/board/Kconfig +++ b/bsp/Infineon/psoc6-cy8ckit-062-BLE/board/Kconfig @@ -239,7 +239,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM1 bool "Enable TIM1" diff --git a/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/board/Kconfig b/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/board/Kconfig index 21baa70b2c9..6b199514566 100644 --- a/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/board/Kconfig +++ b/bsp/Infineon/psoc6-cy8ckit-062-WIFI-BT/board/Kconfig @@ -247,7 +247,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM1 bool "Enable TIM1" diff --git a/bsp/Infineon/psoc6-cy8ckit-062S2-43012/board/Kconfig b/bsp/Infineon/psoc6-cy8ckit-062S2-43012/board/Kconfig index 1fa9c5dcc63..0a5cec3667d 100644 --- a/bsp/Infineon/psoc6-cy8ckit-062S2-43012/board/Kconfig +++ b/bsp/Infineon/psoc6-cy8ckit-062S2-43012/board/Kconfig @@ -251,7 +251,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM1 bool "Enable TIM1" diff --git a/bsp/Infineon/psoc6-cy8ckit-062s4/board/Kconfig b/bsp/Infineon/psoc6-cy8ckit-062s4/board/Kconfig index baf6aa1bc16..bfe1fd8b864 100644 --- a/bsp/Infineon/psoc6-cy8ckit-062s4/board/Kconfig +++ b/bsp/Infineon/psoc6-cy8ckit-062s4/board/Kconfig @@ -239,7 +239,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM1 bool "Enable TIM1" diff --git a/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/board/Kconfig b/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/board/Kconfig index 34f66f7e847..6006e7e97d5 100644 --- a/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/board/Kconfig +++ b/bsp/Infineon/psoc6-cy8cproto-062S3-4343W/board/Kconfig @@ -251,7 +251,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM1 bool "Enable TIM1" diff --git a/bsp/Infineon/psoc6-evaluationkit-062S2/board/Kconfig b/bsp/Infineon/psoc6-evaluationkit-062S2/board/Kconfig index f528ce37697..ef00b67eba1 100644 --- a/bsp/Infineon/psoc6-evaluationkit-062S2/board/Kconfig +++ b/bsp/Infineon/psoc6-evaluationkit-062S2/board/Kconfig @@ -295,7 +295,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM1 bool "Enable TIM1" diff --git a/bsp/Vango/v85xx/Kconfig b/bsp/Vango/v85xx/Kconfig index a479feb3d57..2f98c8961ef 100644 --- a/bsp/Vango/v85xx/Kconfig +++ b/bsp/Vango/v85xx/Kconfig @@ -57,34 +57,34 @@ menu "On-chip Peripheral Drivers" bool "using adc1" default n endif - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER0 - bool "using hwtimer0" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER0 + bool "using clock_timer0" default n - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n endif config BSP_USING_WDT diff --git a/bsp/Vango/v85xx/README.md b/bsp/Vango/v85xx/README.md index 6790ed6af4e..8d2840776c6 100644 --- a/bsp/Vango/v85xx/README.md +++ b/bsp/Vango/v85xx/README.md @@ -51,7 +51,7 @@ msh /> | UART | 支持 | UART0~4 | | GPIO | 支持 | GPIOB~F | | ADC | 未支持 | ADC0~7 | -| HWTIMER | 未支持 | TIMER0~3 | +| CLOCK_TIMER | 未支持 | TIMER0~3 | | RTC | 未支持 | RTC | | WDT | 未支持 | Free watchdog timer | | IIC | 未支持 | I2C0 | diff --git a/bsp/Vango/v85xx/drivers/SConscript b/bsp/Vango/v85xx/drivers/SConscript index c6cf664e493..1b26f5d7853 100644 --- a/bsp/Vango/v85xx/drivers/SConscript +++ b/bsp/Vango/v85xx/drivers/SConscript @@ -21,8 +21,8 @@ if GetDepend('RT_USING_PIN'): if GetDepend('RT_USING_ADC'): src += ['drv_adc.c'] -if GetDepend('RT_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('RT_USING_CLOCK_TIME'): + src += ['drv_timer.c'] if GetDepend('RT_USING_RTC'): src += ['drv_rtc.c'] diff --git a/bsp/Vango/v85xx/drivers/drv_comm.h b/bsp/Vango/v85xx/drivers/drv_comm.h index 78724c7e18a..ea6bb51f2ab 100644 --- a/bsp/Vango/v85xx/drivers/drv_comm.h +++ b/bsp/Vango/v85xx/drivers/drv_comm.h @@ -23,5 +23,5 @@ extern "C" { } #endif -#endif /* __DRV_HWTIMER_H__ */ +#endif /* __DRV_CLOCK_TIMER_H__ */ diff --git a/bsp/Vango/v85xxp/Kconfig b/bsp/Vango/v85xxp/Kconfig index 0c9ea2319aa..509ec780635 100644 --- a/bsp/Vango/v85xxp/Kconfig +++ b/bsp/Vango/v85xxp/Kconfig @@ -57,22 +57,22 @@ menu "On-chip Peripheral Drivers" bool "using adc0" default n endif - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER0 - bool "using hwtimer0" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER0 + bool "using clock_timer0" default n - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n endif config BSP_USING_WDT diff --git a/bsp/Vango/v85xxp/README.md b/bsp/Vango/v85xxp/README.md index f22b7e4f425..996b7ac8e25 100644 --- a/bsp/Vango/v85xxp/README.md +++ b/bsp/Vango/v85xxp/README.md @@ -51,7 +51,7 @@ msh /> | UART | 支持 | UART0~5 | | GPIO | 支持 | GPIOA~F | | ADC | 未支持 | ADC0~7 | -| HWTIMER | 未支持 | TIMER0~3 | +| CLOCK_TIMER | 未支持 | TIMER0~3 | | RTC | 未支持 | RTC | | WDT | 未支持 | Free watchdog timer | | IIC | 未支持 | I2C0 | diff --git a/bsp/Vango/v85xxp/drivers/SConscript b/bsp/Vango/v85xxp/drivers/SConscript index 30a1a338d07..4979b8969ea 100644 --- a/bsp/Vango/v85xxp/drivers/SConscript +++ b/bsp/Vango/v85xxp/drivers/SConscript @@ -21,8 +21,8 @@ if GetDepend('RT_USING_PIN'): if GetDepend('RT_USING_ADC'): src += ['drv_adc.c'] -if GetDepend('RT_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('RT_USING_CLOCK_TIME'): + src += ['drv_timer.c'] if GetDepend('RT_USING_RTC'): src += ['drv_rtc.c'] diff --git a/bsp/Vango/v85xxp/drivers/drv_comm.h b/bsp/Vango/v85xxp/drivers/drv_comm.h index 78724c7e18a..ea6bb51f2ab 100644 --- a/bsp/Vango/v85xxp/drivers/drv_comm.h +++ b/bsp/Vango/v85xxp/drivers/drv_comm.h @@ -23,5 +23,5 @@ extern "C" { } #endif -#endif /* __DRV_HWTIMER_H__ */ +#endif /* __DRV_CLOCK_TIMER_H__ */ diff --git a/bsp/acm32/acm32f0x0-nucleo/drivers/Kconfig b/bsp/acm32/acm32f0x0-nucleo/drivers/Kconfig index 2b263f5e329..e112183e2b4 100644 --- a/bsp/acm32/acm32f0x0-nucleo/drivers/Kconfig +++ b/bsp/acm32/acm32f0x0-nucleo/drivers/Kconfig @@ -139,31 +139,31 @@ menu "On-chip Peripheral Drivers" config BSP_USING_TIM1 bool "Enable Timer1" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM3 bool "Enable Timer3" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM6 bool "Enable Timer6" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM14 bool "Enable Timer14" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM15 bool "Enable Timer15" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM16 bool "Enable Timer16" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM17 bool "Enable Timer17" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME endmenu menu "Hardware WDT" diff --git a/bsp/acm32/acm32f0x0-nucleo/drivers/drv_hwtimer.c b/bsp/acm32/acm32f0x0-nucleo/drivers/drv_timer.c similarity index 77% rename from bsp/acm32/acm32f0x0-nucleo/drivers/drv_hwtimer.c rename to bsp/acm32/acm32f0x0-nucleo/drivers/drv_timer.c index 9b34ef869b7..0060b5f795a 100644 --- a/bsp/acm32/acm32f0x0-nucleo/drivers/drv_hwtimer.c +++ b/bsp/acm32/acm32f0x0-nucleo/drivers/drv_timer.c @@ -12,7 +12,7 @@ #include #include -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME #include "tim_config.h" enum @@ -40,15 +40,15 @@ enum #endif }; -struct acm32_hwtimer +struct acm32_clock_timer { - rt_hwtimer_t time_device; + rt_clock_timer_t time_device; TIM_HandleTypeDef tim_handle; IRQn_Type tim_irqn; char *name; }; -static struct acm32_hwtimer acm32_hwtimer_obj[] = +static struct acm32_clock_timer acm32_clock_timer_obj[] = { #ifdef BSP_USING_TIM1 TIM1_CONFIG, @@ -79,7 +79,7 @@ static struct acm32_hwtimer acm32_hwtimer_obj[] = #endif }; -static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { rt_uint32_t timer_clock = 0; TIM_HandleTypeDef *tim = RT_NULL; @@ -100,7 +100,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) tim->Init.Prescaler = (timer_clock / timer->freq) - 1 ; tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - if (timer->info->cntmode == HWTIMER_CNTMODE_UP) + if (timer->info->cntmode == CLOCK_TIMER_CNTMODE_UP) { tim->Init.CounterMode = TIM_COUNTERMODE_UP; } @@ -116,7 +116,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) } } -static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode) { TIM_HandleTypeDef *tim = RT_NULL; @@ -129,7 +129,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ /* set tim arr */ tim->Instance->ARR = t - 1; - if (opmode == HWTIMER_MODE_ONESHOT) + if (opmode == CLOCK_TIMER_MODE_ONESHOT) { /* set timer to single mode */ SET_BIT(tim->Instance->CR1, BIT3); @@ -149,7 +149,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ return RT_EOK; } -static void timer_stop(rt_hwtimer_t *timer) +static void timer_stop(rt_clock_timer_t *timer) { TIM_HandleTypeDef *tim = RT_NULL; @@ -161,7 +161,7 @@ static void timer_stop(rt_hwtimer_t *timer) HAL_TIMER_Base_Stop(tim->Instance); } -static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { TIM_HandleTypeDef *tim = RT_NULL; rt_err_t result = RT_EOK; @@ -173,7 +173,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { rt_uint32_t freq; rt_uint32_t timer_clock; @@ -206,16 +206,16 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) return result; } -static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t timer_counter_get(rt_clock_timer_t *timer) { RT_ASSERT(timer != RT_NULL); return ((TIM_HandleTypeDef *)timer->parent.user_data)->Instance->CNT; } -static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG; +static const struct rt_clock_timer_info _info = TIM_DEV_INFO_CONFIG; -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_ops _ops = { .init = timer_init, .start = timer_start, @@ -233,7 +233,7 @@ void TIM1_BRK_UP_TRG_COM_IRQHandler(void) /* interrupt service routine */ if (TIM1->SR & TIMER_SR_UIF) { - rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM1_INDEX].time_device); + rt_clock_timer_isr(&acm32_clock_timer_obj[TIM1_INDEX].time_device); } TIM1->SR = 0; /* write 0 to clear hardware flag */ @@ -251,7 +251,7 @@ void TIM3_IRQHandler(void) if (TIM3->SR & TIMER_SR_UIF) { - rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM3_INDEX].time_device); + rt_clock_timer_isr(&acm32_clock_timer_obj[TIM3_INDEX].time_device); } TIM3->SR = 0; /* write 0 to clear hardware flag */ @@ -269,7 +269,7 @@ void TIM6_IRQHandler(void) /* interrupt service routine */ if (TIM6->SR & TIMER_SR_UIF) { - rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM6_INDEX].time_device); + rt_clock_timer_isr(&acm32_clock_timer_obj[TIM6_INDEX].time_device); } TIM6->SR = 0; /* write 0 to clear hardware flag */ @@ -285,7 +285,7 @@ void TIM14_IRQHandler(void) /* interrupt service routine */ if (TIM14->SR & TIMER_SR_UIF) { - rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM14_INDEX].time_device); + rt_clock_timer_isr(&acm32_clock_timer_obj[TIM14_INDEX].time_device); } TIM14->SR = 0; /* write 0 to clear hardware flag */ /* leave interrupt */ @@ -300,7 +300,7 @@ void TIM15_IRQHandler(void) /* interrupt service routine */ if (TIM15->SR & TIMER_SR_UIF) { - rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM15_INDEX].time_device); + rt_clock_timer_isr(&acm32_clock_timer_obj[TIM15_INDEX].time_device); } TIM15->SR = 0; /* write 0 to clear hardware flag */ /* leave interrupt */ @@ -314,7 +314,7 @@ void TIM16_IRQHandler(void) rt_interrupt_enter(); if (TIM16->SR & TIMER_SR_UIF) { - rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM16_INDEX].time_device); + rt_clock_timer_isr(&acm32_clock_timer_obj[TIM16_INDEX].time_device); } TIM16->SR = 0; /* write 0 to clear hardware flag */ /* leave interrupt */ @@ -328,7 +328,7 @@ void TIM17_IRQHandler(void) rt_interrupt_enter(); if (TIM17->SR & TIMER_SR_UIF) { - rt_device_hwtimer_isr(&acm32_hwtimer_obj[TIM17_INDEX].time_device); + rt_clock_timer_isr(&acm32_clock_timer_obj[TIM17_INDEX].time_device); } TIM17->SR = 0; /* write 0 to clear hardware flag */ /* leave interrupt */ @@ -336,18 +336,18 @@ void TIM17_IRQHandler(void) } #endif -static int acm32_hwtimer_init(void) +static int acm32_clock_timer_init(void) { int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(acm32_hwtimer_obj) / sizeof(acm32_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(acm32_clock_timer_obj) / sizeof(acm32_clock_timer_obj[0]); i++) { - acm32_hwtimer_obj[i].time_device.info = &_info; - acm32_hwtimer_obj[i].time_device.ops = &_ops; - result = rt_device_hwtimer_register(&acm32_hwtimer_obj[i].time_device, - acm32_hwtimer_obj[i].name, - &acm32_hwtimer_obj[i].tim_handle); + acm32_clock_timer_obj[i].time_device.info = &_info; + acm32_clock_timer_obj[i].time_device.ops = &_ops; + result = rt_clock_timer_register(&acm32_clock_timer_obj[i].time_device, + acm32_clock_timer_obj[i].name, + &acm32_clock_timer_obj[i].tim_handle); if (result != RT_EOK) { result = -RT_ERROR; @@ -357,7 +357,7 @@ static int acm32_hwtimer_init(void) return result; } -INIT_BOARD_EXPORT(acm32_hwtimer_init); +INIT_BOARD_EXPORT(acm32_clock_timer_init); -#endif /* RT_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME */ diff --git a/bsp/acm32/acm32f0x0-nucleo/drivers/tim_config.h b/bsp/acm32/acm32f0x0-nucleo/drivers/tim_config.h index c22487df595..14f12fa68b6 100644 --- a/bsp/acm32/acm32f0x0-nucleo/drivers/tim_config.h +++ b/bsp/acm32/acm32f0x0-nucleo/drivers/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/acm32/acm32f0x0-nucleo/project.ewp b/bsp/acm32/acm32f0x0-nucleo/project.ewp index 598abdb63c2..76200b3b3b1 100644 --- a/bsp/acm32/acm32f0x0-nucleo/project.ewp +++ b/bsp/acm32/acm32f0x0-nucleo/project.ewp @@ -2229,7 +2229,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\ipc\completion_comm.c @@ -2298,7 +2298,7 @@ $PROJ_DIR$\drivers\drv_pm.c - $PROJ_DIR$\drivers\drv_hwtimer.c + $PROJ_DIR$\drivers\drv_timer.c $PROJ_DIR$\drivers\drv_i2c.c diff --git a/bsp/acm32/acm32f0x0-nucleo/project.uvprojx b/bsp/acm32/acm32f0x0-nucleo/project.uvprojx index 516695465c2..83290ed87a8 100644 --- a/bsp/acm32/acm32f0x0-nucleo/project.uvprojx +++ b/bsp/acm32/acm32f0x0-nucleo/project.uvprojx @@ -570,9 +570,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -853,9 +853,9 @@ - drv_hwtimer.c + drv_timer.c 1 - drivers\drv_hwtimer.c + drivers\drv_timer.c diff --git a/bsp/acm32/acm32f4xx-nucleo/drivers/Kconfig b/bsp/acm32/acm32f4xx-nucleo/drivers/Kconfig index a760743f7bd..837134e99f6 100644 --- a/bsp/acm32/acm32f4xx-nucleo/drivers/Kconfig +++ b/bsp/acm32/acm32f4xx-nucleo/drivers/Kconfig @@ -219,43 +219,43 @@ menu "On-chip Peripheral Drivers" config BSP_USING_TIM1 bool "Enable Timer1" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM2 bool "Enable Timer2" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM3 bool "Enable Timer3" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM4 bool "Enable Timer4" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM6 bool "Enable Timer6" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM7 bool "Enable Timer7" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM14 bool "Enable Timer14" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM15 bool "Enable Timer15" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM16 bool "Enable Timer16" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME config BSP_USING_TIM17 bool "Enable Timer17" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME endmenu menu "Hardware WDT" diff --git a/bsp/airm2m/air105/libraries/HAL_Driver/Inc/app_inc.h b/bsp/airm2m/air105/libraries/HAL_Driver/Inc/app_inc.h index 6edd151571d..b5e4c5d37d2 100644 --- a/bsp/airm2m/air105/libraries/HAL_Driver/Inc/app_inc.h +++ b/bsp/airm2m/air105/libraries/HAL_Driver/Inc/app_inc.h @@ -23,7 +23,7 @@ #define __APP_INC_H__ #include "bl_inc.h" -#include "core_hwtimer.h" +#include "core_clock_timer.h" #include "core_spi.h" #include "core_adc.h" #include "core_dac.h" diff --git a/bsp/airm2m/air105/libraries/HAL_Driver/Inc/core_hwtimer.h b/bsp/airm2m/air105/libraries/HAL_Driver/Inc/core_clock_timer.h similarity index 98% rename from bsp/airm2m/air105/libraries/HAL_Driver/Inc/core_hwtimer.h rename to bsp/airm2m/air105/libraries/HAL_Driver/Inc/core_clock_timer.h index 1261da425cf..5226965367e 100644 --- a/bsp/airm2m/air105/libraries/HAL_Driver/Inc/core_hwtimer.h +++ b/bsp/airm2m/air105/libraries/HAL_Driver/Inc/core_clock_timer.h @@ -19,8 +19,8 @@ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#ifndef __CORE_HWTIMER_H__ -#define __CORE_HWTIMER_H__ +#ifndef __CORE_CLOCK_TIMER_H__ +#define __CORE_CLOCK_TIMER_H__ /** diff --git a/bsp/airm2m/air105/libraries/HAL_Driver/Inc/resource_map.h b/bsp/airm2m/air105/libraries/HAL_Driver/Inc/resource_map.h index 21fc95e68f5..18fde16974c 100644 --- a/bsp/airm2m/air105/libraries/HAL_Driver/Inc/resource_map.h +++ b/bsp/airm2m/air105/libraries/HAL_Driver/Inc/resource_map.h @@ -28,7 +28,7 @@ #define CORE_TICK_1MS (48000) #define CORE_TICK_1S (48000000) #define CORE_TICK_IRQ_LEVEL 1 -#define HWTIMER_IRQ_LEVEL 0 +#define CLOCK_TIMER_IRQ_LEVEL 0 #define SYS_TIMER_TIM 6 #define SYS_TIMER_IRQ TIM0_6_IRQn diff --git a/bsp/airm2m/air105/libraries/HAL_Driver/Src/core_hwtimer.c b/bsp/airm2m/air105/libraries/HAL_Driver/Src/core_clock_timer.c similarity index 98% rename from bsp/airm2m/air105/libraries/HAL_Driver/Src/core_hwtimer.c rename to bsp/airm2m/air105/libraries/HAL_Driver/Src/core_clock_timer.c index 1383d1cf94c..da63318e25c 100644 --- a/bsp/airm2m/air105/libraries/HAL_Driver/Src/core_hwtimer.c +++ b/bsp/airm2m/air105/libraries/HAL_Driver/Src/core_clock_timer.c @@ -142,7 +142,7 @@ static void __FUNC_IN_RAM__ prvHWTimer_StartOperationQueue(uint8_t HWTimerID, HW break; case OP_QUEUE_CMD_ONE_TIME_DELAY: HWTimer->ContinueDelay = 0; - goto START_HWTIMER; + goto START_CLOCK_TIMER; break; case OP_QUEUE_CMD_REPEAT_DELAY: HWTimer->CurCount++; @@ -166,7 +166,7 @@ static void __FUNC_IN_RAM__ prvHWTimer_StartOperationQueue(uint8_t HWTimerID, HW break; case OP_QUEUE_CMD_CONTINUE_DELAY: HWTimer->ContinueDelay = 1; - goto START_HWTIMER; + goto START_CLOCK_TIMER; break; case OP_QUEUE_CMD_SET_GPIO_DIR_OUT: @@ -235,7 +235,7 @@ static void __FUNC_IN_RAM__ prvHWTimer_StartOperationQueue(uint8_t HWTimerID, HW } } return ; -START_HWTIMER: +START_CLOCK_TIMER: TIMM0->TIM[HWTimerID].ControlReg = 0; Period = HWTimer->Cmd[HWTimer->CurCount].uArg.Time; Period = Period * SYS_TIMER_1US + HWTimer->Cmd[HWTimer->CurCount].Arg1; @@ -404,7 +404,7 @@ void HWTimer_StartOperationQueue(uint8_t HWTimerID) HWTimer_Stop(HWTimerID); } ISR_SetHandler(prvHWTimer[HWTimerID].IrqLine, prvHWTimer_IrqHandlerOperationQueue, HWTimerID); - ISR_SetPriority(prvHWTimer[HWTimerID].IrqLine, HWTIMER_IRQ_LEVEL); + ISR_SetPriority(prvHWTimer[HWTimerID].IrqLine, CLOCK_TIMER_IRQ_LEVEL); prvHWTimer[HWTimerID].Cmd[prvHWTimer[HWTimerID].CmdQueuePos].Operation = OP_QUEUE_CMD_END; HWTimer_ResetOperationQueue(HWTimerID); diff --git a/bsp/airm2m/air32f103/board/Kconfig b/bsp/airm2m/air32f103/board/Kconfig index dd74fdd571a..65f1c9b152c 100644 --- a/bsp/airm2m/air32f103/board/Kconfig +++ b/bsp/airm2m/air32f103/board/Kconfig @@ -105,7 +105,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM2 bool "Enable TIM2" diff --git a/bsp/airm2m/air32f103/board/board.c b/bsp/airm2m/air32f103/board/board.c index 38e7c702a30..611082ce420 100644 --- a/bsp/airm2m/air32f103/board/board.c +++ b/bsp/airm2m/air32f103/board/board.c @@ -175,61 +175,61 @@ rt_uint32_t air32_tim_clock_get(TIM_TypeDef *timx) return RCC_Clocks.HCLK_Frequency; } -struct rt_hwtimer_info hwtimer_info1 = +struct rt_clock_timer_info clock_timer_info1 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info2 = +struct rt_clock_timer_info clock_timer_info2 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info3 = +struct rt_clock_timer_info clock_timer_info3 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info4 = +struct rt_clock_timer_info clock_timer_info4 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info *air32_hwtimer_info_config_get(TIM_TypeDef *timx) +struct rt_clock_timer_info *air32_clock_timer_info_config_get(TIM_TypeDef *timx) { - struct rt_hwtimer_info *info = RT_NULL; + struct rt_clock_timer_info *info = RT_NULL; if (timx == TIM1) { - info = &hwtimer_info1; + info = &clock_timer_info1; } else if (timx == TIM2) { - info = &hwtimer_info2; + info = &clock_timer_info2; } else if (timx == TIM3) { - info = &hwtimer_info3; + info = &clock_timer_info3; } else if (timx == TIM4) { - info = &hwtimer_info4; + info = &clock_timer_info4; } return info; diff --git a/bsp/airm2m/air32f103/board/board.h b/bsp/airm2m/air32f103/board/board.h index e21f907aa6f..74aa58d0e5d 100644 --- a/bsp/airm2m/air32f103/board/board.h +++ b/bsp/airm2m/air32f103/board/board.h @@ -58,7 +58,7 @@ rt_uint32_t air32_tim_clock_get(TIM_TypeDef *timx); #endif #ifdef BSP_USING_TIM -struct rt_hwtimer_info* air32_hwtimer_info_config_get(TIM_TypeDef *timx); +struct rt_clock_timer_info* air32_clock_timer_info_config_get(TIM_TypeDef *timx); #endif #ifdef BSP_USING_PWM diff --git a/bsp/airm2m/air32f103/libraries/SConscript b/bsp/airm2m/air32f103/libraries/SConscript index b0c12a04539..8848f19239a 100644 --- a/bsp/airm2m/air32f103/libraries/SConscript +++ b/bsp/airm2m/air32f103/libraries/SConscript @@ -64,7 +64,7 @@ if GetDepend('BSP_USING_PWM'): src += ['rt_drivers/drv_pwm.c'] if GetDepend('BSP_USING_TIM'): - src += ['rt_drivers/drv_hwtimer.c'] + src += ['rt_drivers/drv_timer.c'] if GetDepend('BSP_USING_WDT'): src += ['rt_drivers/drv_wdt.c'] diff --git a/bsp/airm2m/air32f103/libraries/rt_drivers/drv_hwtimer.c b/bsp/airm2m/air32f103/libraries/rt_drivers/drv_hwtimer.c deleted file mode 100644 index 8f7415fd5a1..00000000000 --- a/bsp/airm2m/air32f103/libraries/rt_drivers/drv_hwtimer.c +++ /dev/null @@ -1,329 +0,0 @@ -/* - * Copyright (c) 2006-2022, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2022-02-22 airm2m first version - */ - -#include -#include -#include -#include "drv_hwtimer.h" - -#ifdef BSP_USING_TIM - -#define LOG_TAG "drv.hwtimer" -#include - -static void air32_hwtimer_init(struct rt_hwtimer_device *device, rt_uint32_t state) -{ - struct hwtimer_device *hwtimer_dev; - struct rt_hwtimer_info *hwtimer_info; - rt_uint32_t clk = 0; - rt_uint16_t prescaler_value = 0; - - TIM_TimeBaseInitTypeDef TIM_TimeBaseInitType; - NVIC_InitTypeDef NVIC_InitStructure; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - if (state) - { - air32_tim_clock_init(hwtimer_dev->periph); - - hwtimer_info = air32_hwtimer_info_config_get(hwtimer_dev->periph); - - clk = air32_tim_clock_get(hwtimer_dev->periph); - - prescaler_value = (rt_uint16_t)(clk / hwtimer_info->minfreq) - 1; - - /* - * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) - */ - - TIM_TimeBaseInitType.TIM_Period = hwtimer_info->maxcnt - 1; - TIM_TimeBaseInitType.TIM_Prescaler = prescaler_value; - TIM_TimeBaseInitType.TIM_ClockDivision = TIM_CKD_DIV1; - TIM_TimeBaseInitType.TIM_RepetitionCounter = 0; - - if (hwtimer_info == RT_NULL) - { - TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; - } - else - { - if (hwtimer_info->cntmode == HWTIMER_CNTMODE_UP) - { - TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; - } - else - { - TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Down; - } - } - - TIM_TimeBaseInit(hwtimer_dev->periph, &TIM_TimeBaseInitType); - - NVIC_InitStructure.NVIC_IRQChannel = hwtimer_dev->irqn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - TIM_ITConfig(hwtimer_dev->periph, TIM_IT_Update, ENABLE); - TIM_ClearITPendingBit(hwtimer_dev->periph, TIM_IT_Update); - - LOG_D("%s init success", hwtimer_dev->name); - } -} - -static rt_err_t air32_hwtimer_start(struct rt_hwtimer_device *device, rt_uint32_t cnt, rt_hwtimer_mode_t mode) -{ - - struct hwtimer_device *hwtimer_dev; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - /* - * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) - */ - - TIM_SetCounter(hwtimer_dev->periph, 0); - TIM_SetAutoreload(hwtimer_dev->periph, cnt - 1); - - if (mode == HWTIMER_MODE_ONESHOT) - { - TIM_SelectOnePulseMode(hwtimer_dev->periph, TIM_OPMode_Single); - } - else - { - TIM_SelectOnePulseMode(hwtimer_dev->periph, TIM_OPMode_Repetitive); - } - - TIM_Cmd(hwtimer_dev->periph, ENABLE); - - LOG_D("%s start, cnt = %d", hwtimer_dev->name, cnt); - - return RT_EOK; -} - -static void air32_hwtimer_stop(struct rt_hwtimer_device *device) -{ - struct hwtimer_device *hwtimer_dev; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - TIM_Cmd(hwtimer_dev->periph, DISABLE); - - TIM_SetCounter(hwtimer_dev->periph, 0); -} - -static rt_uint32_t air32_hwtimer_counter_get(struct rt_hwtimer_device *device) -{ - struct hwtimer_device *hwtimer_dev; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - return hwtimer_dev->periph->CNT; -} - -static rt_err_t air32_hwtimer_control(struct rt_hwtimer_device *device, rt_uint32_t cmd, void *arg) -{ - struct hwtimer_device *hwtimer_dev; - rt_err_t result = RT_EOK; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - switch (cmd) - { - case HWTIMER_CTRL_FREQ_SET: - { - rt_uint32_t freq = 0; - rt_uint32_t clk = 0; - rt_uint16_t prescaler_value = 0; - - /* - * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) - */ - if (arg != RT_NULL) - { - - freq = *((rt_uint32_t *)arg); - - clk = air32_tim_clock_get(hwtimer_dev->periph); - - prescaler_value = (rt_uint16_t)(clk / freq) - 1; - - TIM_PrescalerConfig(hwtimer_dev->periph, prescaler_value, TIM_PSCReloadMode_Immediate); - } - else - { - result = -RT_EINVAL; - } - } - break; - - default: - result = -RT_EINVAL; - break; - } - - return result; -} - -static const struct rt_hwtimer_ops hwtimer_ops = - { - .init = air32_hwtimer_init, - .start = air32_hwtimer_start, - .stop = air32_hwtimer_stop, - .count_get = air32_hwtimer_counter_get, - .control = air32_hwtimer_control, -}; - -static int rt_hw_hwtimer_init(void) -{ - rt_err_t ret; - struct rt_hwtimer_info *hwtimer_info; - -#ifdef BSP_USING_TIM1 - hwtimer_info = air32_hwtimer_info_config_get(hwtimer_device1.periph); - hwtimer_device1.parent.info = hwtimer_info; - hwtimer_device1.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device1.parent, hwtimer_device1.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device1.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device1.name); - } -#endif - -#ifdef BSP_USING_TIM2 - hwtimer_info = air32_hwtimer_info_config_get(hwtimer_device2.periph); - hwtimer_device2.parent.info = hwtimer_info; - hwtimer_device2.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device2.parent, hwtimer_device2.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device2.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device2.name); - } -#endif - -#ifdef BSP_USING_TIM3 - hwtimer_info = air32_hwtimer_info_config_get(hwtimer_device3.periph); - hwtimer_device3.parent.info = hwtimer_info; - hwtimer_device3.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device3.parent, hwtimer_device3.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device3.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device3.name); - } -#endif - -#ifdef BSP_USING_TIM4 - hwtimer_info = air32_hwtimer_info_config_get(hwtimer_device4.periph); - hwtimer_device4.parent.info = hwtimer_info; - hwtimer_device4.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device4.parent, hwtimer_device4.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device4.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device4.name); - } -#endif - - return RT_EOK; -} -INIT_DEVICE_EXPORT(rt_hw_hwtimer_init); - -#ifdef BSP_USING_TIM1 -void TIM1_UP_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device1.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device1.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device1.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM2 -void TIM2_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device2.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device2.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device2.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM3 -void TIM3_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device3.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device3.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device3.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM4 -void TIM4_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device4.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device4.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device4.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#endif /* BSP_USING_HWTIMER */ diff --git a/bsp/airm2m/air32f103/libraries/rt_drivers/drv_timer.c b/bsp/airm2m/air32f103/libraries/rt_drivers/drv_timer.c new file mode 100644 index 00000000000..f1b4e7d6557 --- /dev/null +++ b/bsp/airm2m/air32f103/libraries/rt_drivers/drv_timer.c @@ -0,0 +1,329 @@ +/* + * Copyright (c) 2006-2022, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-02-22 airm2m first version + */ + +#include +#include +#include +#include "drv_timer.h" + +#ifdef BSP_USING_TIM + +#define LOG_TAG "drv.clock_timer" +#include + +static void air32_clock_timer_init(struct rt_clock_timer_device *device, rt_uint32_t state) +{ + struct clock_timer_device *clock_timer_dev; + struct rt_clock_timer_info *clock_timer_info; + rt_uint32_t clk = 0; + rt_uint16_t prescaler_value = 0; + + TIM_TimeBaseInitTypeDef TIM_TimeBaseInitType; + NVIC_InitTypeDef NVIC_InitStructure; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + if (state) + { + air32_tim_clock_init(clock_timer_dev->periph); + + clock_timer_info = air32_clock_timer_info_config_get(clock_timer_dev->periph); + + clk = air32_tim_clock_get(clock_timer_dev->periph); + + prescaler_value = (rt_uint16_t)(clk / clock_timer_info->minfreq) - 1; + + /* + * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) + */ + + TIM_TimeBaseInitType.TIM_Period = clock_timer_info->maxcnt - 1; + TIM_TimeBaseInitType.TIM_Prescaler = prescaler_value; + TIM_TimeBaseInitType.TIM_ClockDivision = TIM_CKD_DIV1; + TIM_TimeBaseInitType.TIM_RepetitionCounter = 0; + + if (clock_timer_info == RT_NULL) + { + TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; + } + else + { + if (clock_timer_info->cntmode == CLOCK_TIMER_CNTMODE_UP) + { + TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; + } + else + { + TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Down; + } + } + + TIM_TimeBaseInit(clock_timer_dev->periph, &TIM_TimeBaseInitType); + + NVIC_InitStructure.NVIC_IRQChannel = clock_timer_dev->irqn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + TIM_ITConfig(clock_timer_dev->periph, TIM_IT_Update, ENABLE); + TIM_ClearITPendingBit(clock_timer_dev->periph, TIM_IT_Update); + + LOG_D("%s init success", clock_timer_dev->name); + } +} + +static rt_err_t air32_clock_timer_start(struct rt_clock_timer_device *device, rt_uint32_t cnt, rt_clock_timer_mode_t mode) +{ + + struct clock_timer_device *clock_timer_dev; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + /* + * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) + */ + + TIM_SetCounter(clock_timer_dev->periph, 0); + TIM_SetAutoreload(clock_timer_dev->periph, cnt - 1); + + if (mode == CLOCK_TIMER_MODE_ONESHOT) + { + TIM_SelectOnePulseMode(clock_timer_dev->periph, TIM_OPMode_Single); + } + else + { + TIM_SelectOnePulseMode(clock_timer_dev->periph, TIM_OPMode_Repetitive); + } + + TIM_Cmd(clock_timer_dev->periph, ENABLE); + + LOG_D("%s start, cnt = %d", clock_timer_dev->name, cnt); + + return RT_EOK; +} + +static void air32_clock_timer_stop(struct rt_clock_timer_device *device) +{ + struct clock_timer_device *clock_timer_dev; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + TIM_Cmd(clock_timer_dev->periph, DISABLE); + + TIM_SetCounter(clock_timer_dev->periph, 0); +} + +static rt_uint32_t air32_clock_timer_counter_get(struct rt_clock_timer_device *device) +{ + struct clock_timer_device *clock_timer_dev; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + return clock_timer_dev->periph->CNT; +} + +static rt_err_t air32_clock_timer_control(struct rt_clock_timer_device *device, rt_uint32_t cmd, void *arg) +{ + struct clock_timer_device *clock_timer_dev; + rt_err_t result = RT_EOK; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + switch (cmd) + { + case CLOCK_TIMER_CTRL_FREQ_SET: + { + rt_uint32_t freq = 0; + rt_uint32_t clk = 0; + rt_uint16_t prescaler_value = 0; + + /* + * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) + */ + if (arg != RT_NULL) + { + + freq = *((rt_uint32_t *)arg); + + clk = air32_tim_clock_get(clock_timer_dev->periph); + + prescaler_value = (rt_uint16_t)(clk / freq) - 1; + + TIM_PrescalerConfig(clock_timer_dev->periph, prescaler_value, TIM_PSCReloadMode_Immediate); + } + else + { + result = -RT_EINVAL; + } + } + break; + + default: + result = -RT_EINVAL; + break; + } + + return result; +} + +static const struct rt_clock_timer_ops clock_timer_ops = + { + .init = air32_clock_timer_init, + .start = air32_clock_timer_start, + .stop = air32_clock_timer_stop, + .count_get = air32_clock_timer_counter_get, + .control = air32_clock_timer_control, +}; + +static int rt_hw_clock_timer_init(void) +{ + rt_err_t ret; + struct rt_clock_timer_info *clock_timer_info; + +#ifdef BSP_USING_TIM1 + clock_timer_info = air32_clock_timer_info_config_get(clock_timer_device1.periph); + clock_timer_device1.parent.info = clock_timer_info; + clock_timer_device1.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device1.parent, clock_timer_device1.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device1.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device1.name); + } +#endif + +#ifdef BSP_USING_TIM2 + clock_timer_info = air32_clock_timer_info_config_get(clock_timer_device2.periph); + clock_timer_device2.parent.info = clock_timer_info; + clock_timer_device2.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device2.parent, clock_timer_device2.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device2.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device2.name); + } +#endif + +#ifdef BSP_USING_TIM3 + clock_timer_info = air32_clock_timer_info_config_get(clock_timer_device3.periph); + clock_timer_device3.parent.info = clock_timer_info; + clock_timer_device3.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device3.parent, clock_timer_device3.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device3.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device3.name); + } +#endif + +#ifdef BSP_USING_TIM4 + clock_timer_info = air32_clock_timer_info_config_get(clock_timer_device4.periph); + clock_timer_device4.parent.info = clock_timer_info; + clock_timer_device4.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device4.parent, clock_timer_device4.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device4.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device4.name); + } +#endif + + return RT_EOK; +} +INIT_DEVICE_EXPORT(rt_hw_clock_timer_init); + +#ifdef BSP_USING_TIM1 +void TIM1_UP_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device1.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device1.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device1.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM2 +void TIM2_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device2.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device2.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device2.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM3 +void TIM3_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device3.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device3.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device3.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM4 +void TIM4_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device4.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device4.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device4.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/airm2m/air32f103/libraries/rt_drivers/drv_hwtimer.h b/bsp/airm2m/air32f103/libraries/rt_drivers/drv_timer.h similarity index 67% rename from bsp/airm2m/air32f103/libraries/rt_drivers/drv_hwtimer.h rename to bsp/airm2m/air32f103/libraries/rt_drivers/drv_timer.h index a3457ee3db1..d7de7c915e3 100644 --- a/bsp/airm2m/air32f103/libraries/rt_drivers/drv_hwtimer.h +++ b/bsp/airm2m/air32f103/libraries/rt_drivers/drv_timer.h @@ -8,24 +8,24 @@ * 2022-02-22 airm2m first version */ -#ifndef __DRV_HWTIMER_H__ -#define __DRV_HWTIMER_H__ +#ifndef __DRV_CLOCK_TIMER_H__ +#define __DRV_CLOCK_TIMER_H__ #include #ifdef BSP_USING_TIM #include -struct hwtimer_device +struct clock_timer_device { - struct rt_hwtimer_device parent; + struct rt_clock_timer_device parent; TIM_TypeDef *periph; IRQn_Type irqn; char *name; }; #ifdef BSP_USING_TIM1 -struct hwtimer_device hwtimer_device1 = +struct clock_timer_device clock_timer_device1 = { .periph = TIM1, .irqn = TIM1_UP_IRQn, @@ -33,7 +33,7 @@ struct hwtimer_device hwtimer_device1 = #endif #ifdef BSP_USING_TIM2 -struct hwtimer_device hwtimer_device2 = +struct clock_timer_device clock_timer_device2 = { .periph = TIM2, .irqn = TIM2_IRQn, @@ -41,7 +41,7 @@ struct hwtimer_device hwtimer_device2 = #endif #ifdef BSP_USING_TIM3 -struct hwtimer_device hwtimer_device3 = +struct clock_timer_device clock_timer_device3 = { .periph = TIM3, .irqn = TIM3_IRQn, @@ -49,12 +49,12 @@ struct hwtimer_device hwtimer_device3 = #endif #ifdef BSP_USING_TIM4 -struct hwtimer_device hwtimer_device4 = +struct clock_timer_device clock_timer_device4 = { .periph = TIM4, .irqn = TIM4_IRQn, .name = "timer4"}; #endif -#endif /* BSP_USING_HWTIMER */ -#endif /* __DRV_HWTIMER_H__ */ +#endif /* BSP_USING_CLOCK_TIMER */ +#endif /* __DRV_CLOCK_TIMER_H__ */ diff --git a/bsp/apm32/apm32e103ze-evalboard/board/Kconfig b/bsp/apm32/apm32e103ze-evalboard/board/Kconfig index 5be25544e8c..c8c59dee476 100644 --- a/bsp/apm32/apm32e103ze-evalboard/board/Kconfig +++ b/bsp/apm32/apm32e103ze-evalboard/board/Kconfig @@ -175,7 +175,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32e103ze-evalboard/board/board.h b/bsp/apm32/apm32e103ze-evalboard/board/board.h index 2274bb453b5..7cee8931a79 100644 --- a/bsp/apm32/apm32e103ze-evalboard/board/board.h +++ b/bsp/apm32/apm32e103ze-evalboard/board/board.h @@ -35,7 +35,7 @@ #if defined(RT_USING_SPI) #include "apm32e10x_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32e10x_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/apm32e103ze-tinyboard/board/Kconfig b/bsp/apm32/apm32e103ze-tinyboard/board/Kconfig index a76b738cefd..4ff30f548e6 100644 --- a/bsp/apm32/apm32e103ze-tinyboard/board/Kconfig +++ b/bsp/apm32/apm32e103ze-tinyboard/board/Kconfig @@ -156,7 +156,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32e103ze-tinyboard/board/board.h b/bsp/apm32/apm32e103ze-tinyboard/board/board.h index 2274bb453b5..7cee8931a79 100644 --- a/bsp/apm32/apm32e103ze-tinyboard/board/board.h +++ b/bsp/apm32/apm32e103ze-tinyboard/board/board.h @@ -35,7 +35,7 @@ #if defined(RT_USING_SPI) #include "apm32e10x_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32e10x_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/apm32f030r8-miniboard/board/Kconfig b/bsp/apm32/apm32f030r8-miniboard/board/Kconfig index 7d0f93b3e47..c583254b835 100644 --- a/bsp/apm32/apm32f030r8-miniboard/board/Kconfig +++ b/bsp/apm32/apm32f030r8-miniboard/board/Kconfig @@ -120,7 +120,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32f030r8-miniboard/board/board.h b/bsp/apm32/apm32f030r8-miniboard/board/board.h index 3435a9478bb..c431a210bc3 100644 --- a/bsp/apm32/apm32f030r8-miniboard/board/board.h +++ b/bsp/apm32/apm32f030r8-miniboard/board/board.h @@ -34,7 +34,7 @@ #if defined(RT_USING_SPI) #include "apm32f0xx_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32f0xx_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/apm32f051r8-evalboard/board/Kconfig b/bsp/apm32/apm32f051r8-evalboard/board/Kconfig index 66b9f17f4e4..aef90aa40b3 100644 --- a/bsp/apm32/apm32f051r8-evalboard/board/Kconfig +++ b/bsp/apm32/apm32f051r8-evalboard/board/Kconfig @@ -132,7 +132,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32f051r8-evalboard/board/board.h b/bsp/apm32/apm32f051r8-evalboard/board/board.h index 5ec31a3c81d..2c43d2079b6 100644 --- a/bsp/apm32/apm32f051r8-evalboard/board/board.h +++ b/bsp/apm32/apm32f051r8-evalboard/board/board.h @@ -34,7 +34,7 @@ #if defined(RT_USING_SPI) #include "apm32f0xx_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32f0xx_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/apm32f072vb-miniboard/board/Kconfig b/bsp/apm32/apm32f072vb-miniboard/board/Kconfig index 528e8731947..cae05eae10e 100644 --- a/bsp/apm32/apm32f072vb-miniboard/board/Kconfig +++ b/bsp/apm32/apm32f072vb-miniboard/board/Kconfig @@ -133,7 +133,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32f072vb-miniboard/board/board.h b/bsp/apm32/apm32f072vb-miniboard/board/board.h index 70aab08c055..200f529e70e 100644 --- a/bsp/apm32/apm32f072vb-miniboard/board/board.h +++ b/bsp/apm32/apm32f072vb-miniboard/board/board.h @@ -34,7 +34,7 @@ #if defined(RT_USING_SPI) #include "apm32f0xx_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32f0xx_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/apm32f091vc-miniboard/board/Kconfig b/bsp/apm32/apm32f091vc-miniboard/board/Kconfig index b8a7b84f158..757ecc8b85e 100644 --- a/bsp/apm32/apm32f091vc-miniboard/board/Kconfig +++ b/bsp/apm32/apm32f091vc-miniboard/board/Kconfig @@ -133,7 +133,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32f091vc-miniboard/board/board.h b/bsp/apm32/apm32f091vc-miniboard/board/board.h index d741eb22373..90df8c8250a 100644 --- a/bsp/apm32/apm32f091vc-miniboard/board/board.h +++ b/bsp/apm32/apm32f091vc-miniboard/board/board.h @@ -34,7 +34,7 @@ #if defined(RT_USING_SPI) #include "apm32f0xx_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32f0xx_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/apm32f103vb-miniboard/board/Kconfig b/bsp/apm32/apm32f103vb-miniboard/board/Kconfig index 5fd89856078..6abbc344154 100644 --- a/bsp/apm32/apm32f103vb-miniboard/board/Kconfig +++ b/bsp/apm32/apm32f103vb-miniboard/board/Kconfig @@ -126,7 +126,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32f103vb-miniboard/board/board.h b/bsp/apm32/apm32f103vb-miniboard/board/board.h index 4e69fcf5f46..54f663e8774 100644 --- a/bsp/apm32/apm32f103vb-miniboard/board/board.h +++ b/bsp/apm32/apm32f103vb-miniboard/board/board.h @@ -34,7 +34,7 @@ #if defined(RT_USING_SPI) #include "apm32f10x_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32f10x_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/apm32f103xe-minibroard/board/Kconfig b/bsp/apm32/apm32f103xe-minibroard/board/Kconfig index beace4e5964..12182a2c48c 100644 --- a/bsp/apm32/apm32f103xe-minibroard/board/Kconfig +++ b/bsp/apm32/apm32f103xe-minibroard/board/Kconfig @@ -119,7 +119,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32f103xe-minibroard/board/board.h b/bsp/apm32/apm32f103xe-minibroard/board/board.h index 8e75b5b6433..e2f20297235 100644 --- a/bsp/apm32/apm32f103xe-minibroard/board/board.h +++ b/bsp/apm32/apm32f103xe-minibroard/board/board.h @@ -36,7 +36,7 @@ #if defined(RT_USING_SPI) #include "apm32f10x_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32f10x_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/apm32f107vc-evalboard/board/Kconfig b/bsp/apm32/apm32f107vc-evalboard/board/Kconfig index bc4840e39ee..31d7d7113a8 100644 --- a/bsp/apm32/apm32f107vc-evalboard/board/Kconfig +++ b/bsp/apm32/apm32f107vc-evalboard/board/Kconfig @@ -156,7 +156,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32f107vc-evalboard/board/board.h b/bsp/apm32/apm32f107vc-evalboard/board/board.h index a57504c15ed..88d86b59494 100644 --- a/bsp/apm32/apm32f107vc-evalboard/board/board.h +++ b/bsp/apm32/apm32f107vc-evalboard/board/board.h @@ -34,7 +34,7 @@ #if defined(RT_USING_SPI) #include "apm32f10x_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32f10x_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/apm32f407ig-minibroard/board/Kconfig b/bsp/apm32/apm32f407ig-minibroard/board/Kconfig index b8eac74c77c..d14dafe814c 100644 --- a/bsp/apm32/apm32f407ig-minibroard/board/Kconfig +++ b/bsp/apm32/apm32f407ig-minibroard/board/Kconfig @@ -108,7 +108,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32f407ig-minibroard/board/board.h b/bsp/apm32/apm32f407ig-minibroard/board/board.h index 15d8abcd5cd..242b27bf43c 100644 --- a/bsp/apm32/apm32f407ig-minibroard/board/board.h +++ b/bsp/apm32/apm32f407ig-minibroard/board/board.h @@ -35,7 +35,7 @@ #if defined(RT_USING_SPI) #include "apm32f4xx_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32f4xx_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/apm32f407zg-evalboard/board/Kconfig b/bsp/apm32/apm32f407zg-evalboard/board/Kconfig index d7cc13ec8a6..3d933499a04 100644 --- a/bsp/apm32/apm32f407zg-evalboard/board/Kconfig +++ b/bsp/apm32/apm32f407zg-evalboard/board/Kconfig @@ -168,7 +168,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32f407zg-evalboard/board/board.h b/bsp/apm32/apm32f407zg-evalboard/board/board.h index c9f49f9c18f..5d5e23a34c5 100644 --- a/bsp/apm32/apm32f407zg-evalboard/board/board.h +++ b/bsp/apm32/apm32f407zg-evalboard/board/board.h @@ -36,7 +36,7 @@ #if defined(RT_USING_SPI) #include "apm32f4xx_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32f4xx_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/apm32s103vb-miniboard/board/Kconfig b/bsp/apm32/apm32s103vb-miniboard/board/Kconfig index 8f19663d003..af6d754f8dd 100644 --- a/bsp/apm32/apm32s103vb-miniboard/board/Kconfig +++ b/bsp/apm32/apm32s103vb-miniboard/board/Kconfig @@ -140,7 +140,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TMR bool "Enable Timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TMR config BSP_USING_TMR1 bool "Enable TMR1" diff --git a/bsp/apm32/apm32s103vb-miniboard/board/board.h b/bsp/apm32/apm32s103vb-miniboard/board/board.h index d1906e71890..e7683ccf98e 100644 --- a/bsp/apm32/apm32s103vb-miniboard/board/board.h +++ b/bsp/apm32/apm32s103vb-miniboard/board/board.h @@ -35,7 +35,7 @@ #if defined(RT_USING_SPI) #include "apm32s10x_spi.h" #endif -#if defined(RT_USING_HWTIMER) || defined(RT_USING_PWM) +#if defined(RT_USING_CLOCK_TIME) || defined(RT_USING_PWM) #include "apm32s10x_tmr.h" #endif #if defined(RT_USING_WDT) diff --git a/bsp/apm32/libraries/APM32E10x_Library/SConscript b/bsp/apm32/libraries/APM32E10x_Library/SConscript index c8c453079e9..87eba829cd3 100644 --- a/bsp/apm32/libraries/APM32E10x_Library/SConscript +++ b/bsp/apm32/libraries/APM32E10x_Library/SConscript @@ -29,7 +29,7 @@ if GetDepend(['RT_USING_RTC']): if GetDepend(['RT_USING_SPI']): src += ['APM32E10x_StdPeriphDriver/src/apm32e10x_spi.c'] -if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']): +if GetDepend(['RT_USING_CLOCK_TIME']) or GetDepend(['RT_USING_PWM']): src += ['APM32E10x_StdPeriphDriver/src/apm32e10x_tmr.c'] if GetDepend(['RT_USING_WDT']): diff --git a/bsp/apm32/libraries/APM32F0xx_Library/SConscript b/bsp/apm32/libraries/APM32F0xx_Library/SConscript index a1e0d9b76eb..994a67d8347 100644 --- a/bsp/apm32/libraries/APM32F0xx_Library/SConscript +++ b/bsp/apm32/libraries/APM32F0xx_Library/SConscript @@ -29,7 +29,7 @@ if GetDepend(['RT_USING_RTC']): if GetDepend(['RT_USING_SPI']): src += ['APM32F0xx_StdPeriphDriver/src/apm32f0xx_spi.c'] -if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']): +if GetDepend(['RT_USING_CLOCK_TIME']) or GetDepend(['RT_USING_PWM']): src += ['APM32F0xx_StdPeriphDriver/src/apm32f0xx_tmr.c'] if GetDepend(['RT_USING_WDT']): diff --git a/bsp/apm32/libraries/APM32F10x_Library/SConscript b/bsp/apm32/libraries/APM32F10x_Library/SConscript index 7bfa61779ef..060b2c74f87 100644 --- a/bsp/apm32/libraries/APM32F10x_Library/SConscript +++ b/bsp/apm32/libraries/APM32F10x_Library/SConscript @@ -29,7 +29,7 @@ if GetDepend(['RT_USING_RTC']): if GetDepend(['RT_USING_SPI']): src += ['APM32F10x_StdPeriphDriver/src/apm32f10x_spi.c'] -if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']): +if GetDepend(['RT_USING_CLOCK_TIME']) or GetDepend(['RT_USING_PWM']): src += ['APM32F10x_StdPeriphDriver/src/apm32f10x_tmr.c'] if GetDepend(['RT_USING_WDT']): diff --git a/bsp/apm32/libraries/APM32F4xx_Library/SConscript b/bsp/apm32/libraries/APM32F4xx_Library/SConscript index 0e6ef2a4877..dfdbb2aa30e 100644 --- a/bsp/apm32/libraries/APM32F4xx_Library/SConscript +++ b/bsp/apm32/libraries/APM32F4xx_Library/SConscript @@ -30,7 +30,7 @@ if GetDepend(['RT_USING_RTC']): if GetDepend(['RT_USING_SPI']): src += ['APM32F4xx_StdPeriphDriver/src/apm32f4xx_spi.c'] -if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']): +if GetDepend(['RT_USING_CLOCK_TIME']) or GetDepend(['RT_USING_PWM']): src += ['APM32F4xx_StdPeriphDriver/src/apm32f4xx_tmr.c'] if GetDepend(['RT_USING_WDT']): diff --git a/bsp/apm32/libraries/APM32S10x_Library/SConscript b/bsp/apm32/libraries/APM32S10x_Library/SConscript index edc3a8e2801..7ca9ceff321 100644 --- a/bsp/apm32/libraries/APM32S10x_Library/SConscript +++ b/bsp/apm32/libraries/APM32S10x_Library/SConscript @@ -29,7 +29,7 @@ if GetDepend(['RT_USING_RTC']): if GetDepend(['RT_USING_SPI']): src += ['APM32S10x_StdPeriphDriver/src/apm32s10x_spi.c'] -if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']): +if GetDepend(['RT_USING_CLOCK_TIME']) or GetDepend(['RT_USING_PWM']): src += ['APM32S10x_StdPeriphDriver/src/apm32s10x_tmr.c'] if GetDepend(['RT_USING_WDT']): diff --git a/bsp/apm32/libraries/Drivers/SConscript b/bsp/apm32/libraries/Drivers/SConscript index 30015b32407..a5d05ad8151 100644 --- a/bsp/apm32/libraries/Drivers/SConscript +++ b/bsp/apm32/libraries/Drivers/SConscript @@ -33,8 +33,8 @@ if GetDepend(['RT_USING_I2C']): if GetDepend(['RT_USING_SPI']): src += ['drv_spi.c'] -if GetDepend(['RT_USING_HWTIMER']): - src += ['drv_hwtimer.c'] +if GetDepend(['RT_USING_CLOCK_TIME']): + src += ['drv_timer.c'] if GetDepend(['RT_USING_PWM']): src += ['drv_pwm.c'] diff --git a/bsp/apm32/libraries/Drivers/drv_hwtimer.c b/bsp/apm32/libraries/Drivers/drv_timer.c similarity index 84% rename from bsp/apm32/libraries/Drivers/drv_hwtimer.c rename to bsp/apm32/libraries/Drivers/drv_timer.c index e9f4561bfdc..c13377db839 100644 --- a/bsp/apm32/libraries/Drivers/drv_hwtimer.c +++ b/bsp/apm32/libraries/Drivers/drv_timer.c @@ -13,18 +13,18 @@ #include -#define DBG_TAG "drv.hwtimer" +#define DBG_TAG "drv.clock_timer" #define DBG_LVL DBG_INFO #include -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME -static const struct rt_hwtimer_info apm32_timer_info = +static const struct rt_clock_timer_info apm32_timer_info = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; /* apm32 config class */ @@ -33,7 +33,7 @@ struct apm32_timer char *name; TMR_T *tmr; IRQn_Type irqn; - rt_hwtimer_t device; + rt_clock_timer_t device; }; enum @@ -234,7 +234,7 @@ static struct apm32_timer tmr_config[] = #endif }; -static rt_uint32_t apm32_hwtimer_clock_get(TMR_T *tmr) +static rt_uint32_t apm32_clock_timer_clock_get(TMR_T *tmr) { #if defined(SOC_SERIES_APM32F0) uint32_t pclk1; @@ -265,7 +265,7 @@ static rt_uint32_t apm32_hwtimer_clock_get(TMR_T *tmr) #endif } -static void apm32_hwtimer_enable_clock(void) +static void apm32_clock_timer_enable_clock(void) { #ifdef BSP_USING_TMR1 RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_TMR1); @@ -320,7 +320,7 @@ static void apm32_hwtimer_enable_clock(void) #endif } -static void apm32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void apm32_clock_timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { #if defined(SOC_SERIES_APM32F0) TMR_TimeBase_T base_config; @@ -337,15 +337,15 @@ static void apm32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t stat { timer_config = (struct apm32_timer *)timer->parent.user_data; - apm32_hwtimer_enable_clock(); + apm32_clock_timer_enable_clock(); - prescaler = (uint32_t)(apm32_hwtimer_clock_get(timer_config->tmr) / 10000) - 1; + prescaler = (uint32_t)(apm32_clock_timer_clock_get(timer_config->tmr) / 10000) - 1; base_config.period = 10000 - 1; #if defined(SOC_SERIES_APM32F0) base_config.div = prescaler; base_config.clockDivision = TMR_CKD_DIV1; - if (timer->info->cntmode == HWTIMER_CNTMODE_UP) + if (timer->info->cntmode == CLOCK_TIMER_CNTMODE_UP) { base_config.counterMode = TMR_COUNTER_MODE_UP; } @@ -357,7 +357,7 @@ static void apm32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t stat || defined(SOC_SERIES_APM32F4) base_config.division = prescaler; base_config.clockDivision = TMR_CLOCK_DIV_1; - if (timer->info->cntmode == HWTIMER_CNTMODE_UP) + if (timer->info->cntmode == CLOCK_TIMER_CNTMODE_UP) { base_config.countMode = TMR_COUNTER_MODE_UP; } @@ -391,7 +391,7 @@ static void apm32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t stat } } -static rt_err_t apm32_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t apm32_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode) { rt_err_t result = RT_EOK; struct apm32_timer *timer_config = RT_NULL; @@ -405,7 +405,7 @@ static rt_err_t apm32_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtim /* set timer_config autoReload */ timer_config->tmr->AUTORLD = t - 1; - if (opmode == HWTIMER_MODE_ONESHOT) + if (opmode == CLOCK_TIMER_MODE_ONESHOT) { /* set timer to single mode */ timer_config->tmr->CTRL1_B.SPMEN = 1; @@ -442,7 +442,7 @@ static rt_err_t apm32_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtim return result; } -static void apm32_hwtimer_stop(rt_hwtimer_t *timer) +static void apm32_clock_timer_stop(rt_clock_timer_t *timer) { struct apm32_timer *timer_config = RT_NULL; RT_ASSERT(timer != RT_NULL); @@ -453,7 +453,7 @@ static void apm32_hwtimer_stop(rt_hwtimer_t *timer) timer_config->tmr->CNT = 0; } -static rt_err_t apm32_hwtimer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t apm32_clock_timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { struct apm32_timer *timer_config = RT_NULL; rt_err_t result = RT_EOK; @@ -467,11 +467,11 @@ static rt_err_t apm32_hwtimer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *a switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: /* set timer frequence */ freq = *((rt_uint32_t *)arg); - val = apm32_hwtimer_clock_get(timer_config->tmr) / freq; + val = apm32_clock_timer_clock_get(timer_config->tmr) / freq; /* Configures the timer prescaler */ timer_config->tmr->PSC_B.PSC = val - 1; @@ -485,7 +485,7 @@ static rt_err_t apm32_hwtimer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *a return result; } -static rt_uint32_t apm32_hwtimer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t apm32_clock_timer_counter_get(rt_clock_timer_t *timer) { struct apm32_timer *timer_config = RT_NULL; RT_ASSERT(timer != RT_NULL); @@ -494,13 +494,13 @@ static rt_uint32_t apm32_hwtimer_counter_get(rt_hwtimer_t *timer) return timer_config->tmr->CNT; } -static const struct rt_hwtimer_ops apm32_hwtimer_ops = +static const struct rt_clock_timer_ops apm32_clock_timer_ops = { - .init = apm32_hwtimer_init, - .start = apm32_hwtimer_start, - .stop = apm32_hwtimer_stop, - .count_get = apm32_hwtimer_counter_get, - .control = apm32_hwtimer_ctrl, + .init = apm32_clock_timer_init, + .start = apm32_clock_timer_start, + .stop = apm32_clock_timer_stop, + .count_get = apm32_clock_timer_counter_get, + .control = apm32_clock_timer_ctrl, }; @@ -509,7 +509,7 @@ static const struct rt_hwtimer_ops apm32_hwtimer_ops = void TMR1_BRK_UP_TRG_COM_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR1_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR1_INDEX].device); TMR_ClearIntFlag(TMR1, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -519,7 +519,7 @@ void TMR1_BRK_UP_TRG_COM_IRQHandler(void) void TMR1_UP_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR1_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR1_INDEX].device); TMR_ClearIntFlag(TMR1, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -531,12 +531,12 @@ void TMR1_UP_TMR10_IRQHandler(void) rt_interrupt_enter(); if (TMR_ReadIntFlag(TMR1, TMR_INT_UPDATE)) { - rt_device_hwtimer_isr(&tmr_config[TMR1_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR1_INDEX].device); TMR_ClearIntFlag(TMR1, TMR_INT_UPDATE); } if (TMR_ReadIntFlag(TMR10, TMR_INT_UPDATE)) { - rt_device_hwtimer_isr(&tmr_config[TMR10_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR10_INDEX].device); TMR_ClearIntFlag(TMR10, TMR_INT_UPDATE); } rt_interrupt_leave(); @@ -548,7 +548,7 @@ void TMR1_UP_TMR10_IRQHandler(void) void TMR2_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR2_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR2_INDEX].device); TMR_ClearIntFlag(TMR2, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -558,7 +558,7 @@ void TMR2_IRQHandler(void) void TMR3_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR3_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR3_INDEX].device); TMR_ClearIntFlag(TMR3, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -568,7 +568,7 @@ void TMR3_IRQHandler(void) void TMR4_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR4_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR4_INDEX].device); TMR_ClearIntFlag(TMR4, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -578,7 +578,7 @@ void TMR4_IRQHandler(void) void TMR5_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR5_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR5_INDEX].device); TMR_ClearIntFlag(TMR5, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -594,7 +594,7 @@ void TMR5_IRQHandler(void) #endif { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR6_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR6_INDEX].device); TMR_ClearIntFlag(TMR6, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -604,7 +604,7 @@ void TMR5_IRQHandler(void) void TMR7_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR7_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR7_INDEX].device); TMR_ClearIntFlag(TMR7, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -615,7 +615,7 @@ void TMR7_IRQHandler(void) void TMR8_UP_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR8_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR8_INDEX].device); TMR_ClearIntFlag(TMR8, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -627,12 +627,12 @@ void TMR8_UP_TMR13_IRQHandler(void) rt_interrupt_enter(); if (TMR_ReadIntFlag(TMR8, TMR_INT_UPDATE)) { - rt_device_hwtimer_isr(&tmr_config[TMR8_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR8_INDEX].device); TMR_ClearIntFlag(TMR8, TMR_INT_UPDATE); } if (TMR_ReadIntFlag(TMR13, TMR_INT_UPDATE)) { - rt_device_hwtimer_isr(&tmr_config[TMR13_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR13_INDEX].device); TMR_ClearIntFlag(TMR13, TMR_INT_UPDATE); } rt_interrupt_leave(); @@ -644,7 +644,7 @@ void TMR8_UP_TMR13_IRQHandler(void) void TMR1_BRK_TMR9_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR9_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR9_INDEX].device); TMR_ClearIntFlag(TMR9, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -654,7 +654,7 @@ void TMR1_BRK_TMR9_IRQHandler(void) void TMR1_TRG_COM_TMR11_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR11_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR11_INDEX].device); TMR_ClearIntFlag(TMR11, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -664,7 +664,7 @@ void TMR1_TRG_COM_TMR11_IRQHandler(void) void TMR8_BRK_TMR12_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR12_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR12_INDEX].device); TMR_ClearIntFlag(TMR12, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -678,7 +678,7 @@ void TMR8_BRK_TMR12_IRQHandler(void) #endif { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR14_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR14_INDEX].device); TMR_ClearIntFlag(TMR14, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -688,7 +688,7 @@ void TMR8_BRK_TMR12_IRQHandler(void) void TMR15_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR15_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR15_INDEX].device); TMR_ClearIntFlag(TMR15, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -698,7 +698,7 @@ void TMR15_IRQHandler(void) void TMR16_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR16_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR16_INDEX].device); TMR_ClearIntFlag(TMR16, TMR_INT_UPDATE); rt_interrupt_leave(); } @@ -708,13 +708,13 @@ void TMR16_IRQHandler(void) void TMR17_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&tmr_config[TMR17_INDEX].device); + rt_clock_timer_isr(&tmr_config[TMR17_INDEX].device); TMR_ClearIntFlag(TMR17, TMR_INT_UPDATE); rt_interrupt_leave(); } #endif -static int rt_hw_hwtimer_init(void) +static int rt_hw_clock_timer_init(void) { int i = 0; int result = RT_EOK; @@ -722,8 +722,8 @@ static int rt_hw_hwtimer_init(void) for (i = 0; i < sizeof(tmr_config) / sizeof(tmr_config[0]); i++) { tmr_config[i].device.info = &apm32_timer_info; - tmr_config[i].device.ops = &apm32_hwtimer_ops; - if (rt_device_hwtimer_register(&tmr_config[i].device, tmr_config[i].name, &tmr_config[i]) == RT_EOK) + tmr_config[i].device.ops = &apm32_clock_timer_ops; + if (rt_clock_timer_register(&tmr_config[i].device, tmr_config[i].name, &tmr_config[i]) == RT_EOK) { LOG_D("%s register success", tmr_config[i].name); } @@ -736,6 +736,6 @@ static int rt_hw_hwtimer_init(void) return result; } -INIT_BOARD_EXPORT(rt_hw_hwtimer_init); +INIT_BOARD_EXPORT(rt_hw_clock_timer_init); -#endif /* RT_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME */ diff --git a/bsp/at32/at32a403a-start/README.md b/bsp/at32/at32a403a-start/README.md index 1ada75f085b..bfa6a2d0139 100644 --- a/bsp/at32/at32a403a-start/README.md +++ b/bsp/at32/at32a403a-start/README.md @@ -46,7 +46,7 @@ AT32A403A-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1/2 | | DAC | 支持 | DAC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4/5 | +| CLOCK_TIMER | 支持 | TMR3/4/5 | | SDIO | 支持 | SDIO1 | | CAN | 支持 | CAN1/2 | | WDT | 支持 | | diff --git a/bsp/at32/at32a403a-start/board/Kconfig b/bsp/at32/at32a403a-start/board/Kconfig index bae96053cc0..b7d8486d273 100644 --- a/bsp/at32/at32a403a-start/board/Kconfig +++ b/bsp/at32/at32a403a-start/board/Kconfig @@ -186,11 +186,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32a403a-start/board/src/at32_msp.c b/bsp/at32/at32a403a-start/board/src/at32_msp.c index 7011c578d2a..2876eebdbaf 100644 --- a/bsp/at32/at32a403a-start/board/src/at32_msp.c +++ b/bsp/at32/at32a403a-start/board/src/at32_msp.c @@ -290,7 +290,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32a423-start/README.md b/bsp/at32/at32a423-start/README.md index ba2f349bd42..6f378267a9e 100644 --- a/bsp/at32/at32a423-start/README.md +++ b/bsp/at32/at32a423-start/README.md @@ -46,7 +46,7 @@ AT32A423-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1 | | DAC | 支持 | DAC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3 | +| CLOCK_TIMER | 支持 | TMR3 | | CAN | 支持 | CAN1/2 | | WDT | 支持 | | | RTC | 支持 | | diff --git a/bsp/at32/at32a423-start/board/Kconfig b/bsp/at32/at32a423-start/board/Kconfig index 29d51887585..6da7a57f63e 100644 --- a/bsp/at32/at32a423-start/board/Kconfig +++ b/bsp/at32/at32a423-start/board/Kconfig @@ -201,11 +201,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32a423-start/board/src/at32_msp.c b/bsp/at32/at32a423-start/board/src/at32_msp.c index 3a81f5585c1..8e6ce1ae498 100644 --- a/bsp/at32/at32a423-start/board/src/at32_msp.c +++ b/bsp/at32/at32a423-start/board/src/at32_msp.c @@ -268,7 +268,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f402-start/README.md b/bsp/at32/at32f402-start/README.md index af52939a66e..caf42a77f00 100644 --- a/bsp/at32/at32f402-start/README.md +++ b/bsp/at32/at32f402-start/README.md @@ -45,7 +45,7 @@ AT32F402-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | SPI | 支持 | SPI1/2 | | ADC | 支持 | ADC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4 | +| CLOCK_TIMER | 支持 | TMR3/4 | | CAN | 支持 | CAN1 | | QSPI | 支持 | QSPI1/2 | | WDT | 支持 | | diff --git a/bsp/at32/at32f402-start/board/Kconfig b/bsp/at32/at32f402-start/board/Kconfig index ae21e7e68e6..58d9aa1a640 100644 --- a/bsp/at32/at32f402-start/board/Kconfig +++ b/bsp/at32/at32f402-start/board/Kconfig @@ -212,11 +212,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f402-start/board/src/at32_msp.c b/bsp/at32/at32f402-start/board/src/at32_msp.c index 9afbb74cfcc..9f22f260bf3 100644 --- a/bsp/at32/at32f402-start/board/src/at32_msp.c +++ b/bsp/at32/at32f402-start/board/src/at32_msp.c @@ -261,7 +261,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f403a-start/README.md b/bsp/at32/at32f403a-start/README.md index 2b9504a6f52..53d307caa01 100644 --- a/bsp/at32/at32f403a-start/README.md +++ b/bsp/at32/at32f403a-start/README.md @@ -46,7 +46,7 @@ AT32F403A-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1/2 | | DAC | 支持 | DAC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4/5 | +| CLOCK_TIMER | 支持 | TMR3/4/5 | | SDIO | 支持 | SDIO1 | | CAN | 支持 | CAN1/2 | | WDT | 支持 | | diff --git a/bsp/at32/at32f403a-start/board/Kconfig b/bsp/at32/at32f403a-start/board/Kconfig index b905e52b7c8..a12ff97a970 100644 --- a/bsp/at32/at32f403a-start/board/Kconfig +++ b/bsp/at32/at32f403a-start/board/Kconfig @@ -186,11 +186,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f403a-start/board/src/at32_msp.c b/bsp/at32/at32f403a-start/board/src/at32_msp.c index 848ff32cddb..e947bcdcab3 100644 --- a/bsp/at32/at32f403a-start/board/src/at32_msp.c +++ b/bsp/at32/at32f403a-start/board/src/at32_msp.c @@ -290,7 +290,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f405-start/README.md b/bsp/at32/at32f405-start/README.md index 533158aa2c3..45beb431f7a 100644 --- a/bsp/at32/at32f405-start/README.md +++ b/bsp/at32/at32f405-start/README.md @@ -45,7 +45,7 @@ AT32F405-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | SPI | 支持 | SPI1/2 | | ADC | 支持 | ADC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4 | +| CLOCK_TIMER | 支持 | TMR3/4 | | CAN | 支持 | CAN1 | | QSPI | 支持 | QSPI1/2 | | WDT | 支持 | | diff --git a/bsp/at32/at32f405-start/board/Kconfig b/bsp/at32/at32f405-start/board/Kconfig index edd92e93208..50f523cd4cf 100644 --- a/bsp/at32/at32f405-start/board/Kconfig +++ b/bsp/at32/at32f405-start/board/Kconfig @@ -231,11 +231,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f405-start/board/src/at32_msp.c b/bsp/at32/at32f405-start/board/src/at32_msp.c index da12e07a502..b9ee6778883 100644 --- a/bsp/at32/at32f405-start/board/src/at32_msp.c +++ b/bsp/at32/at32f405-start/board/src/at32_msp.c @@ -261,7 +261,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f407-start/README.md b/bsp/at32/at32f407-start/README.md index 9a1eb589655..cf03582eb30 100644 --- a/bsp/at32/at32f407-start/README.md +++ b/bsp/at32/at32f407-start/README.md @@ -46,7 +46,7 @@ AT32F407-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1/2 | | DAC | 支持 | DAC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4/5 | +| CLOCK_TIMER | 支持 | TMR3/4/5 | | SDIO | 支持 | SDIO1 | | CAN | 支持 | CAN1/2 | | WDT | 支持 | | diff --git a/bsp/at32/at32f407-start/board/Kconfig b/bsp/at32/at32f407-start/board/Kconfig index 037d736049a..c4c7e650488 100644 --- a/bsp/at32/at32f407-start/board/Kconfig +++ b/bsp/at32/at32f407-start/board/Kconfig @@ -209,11 +209,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f407-start/board/src/at32_msp.c b/bsp/at32/at32f407-start/board/src/at32_msp.c index 63ef0c2dee1..58a90aa37df 100644 --- a/bsp/at32/at32f407-start/board/src/at32_msp.c +++ b/bsp/at32/at32f407-start/board/src/at32_msp.c @@ -292,7 +292,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f413-start/README.md b/bsp/at32/at32f413-start/README.md index 4eee25d4889..437eb51c73e 100644 --- a/bsp/at32/at32f413-start/README.md +++ b/bsp/at32/at32f413-start/README.md @@ -45,7 +45,7 @@ AT32F413-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | SPI | 支持 | SPI1/2 | | ADC | 支持 | ADC1/2 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4/5 | +| CLOCK_TIMER | 支持 | TMR3/4/5 | | SDIO | 支持 | SDIO1 | | CAN | 支持 | CAN1/2 | | WDT | 支持 | | diff --git a/bsp/at32/at32f413-start/board/Kconfig b/bsp/at32/at32f413-start/board/Kconfig index eb784abc99d..b809dd5702e 100644 --- a/bsp/at32/at32f413-start/board/Kconfig +++ b/bsp/at32/at32f413-start/board/Kconfig @@ -186,11 +186,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f413-start/board/src/at32_msp.c b/bsp/at32/at32f413-start/board/src/at32_msp.c index fc0498c4087..fa6276028d9 100644 --- a/bsp/at32/at32f413-start/board/src/at32_msp.c +++ b/bsp/at32/at32f413-start/board/src/at32_msp.c @@ -274,7 +274,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f415-start/README.md b/bsp/at32/at32f415-start/README.md index 7863aeba8f6..9f42d4637e9 100644 --- a/bsp/at32/at32f415-start/README.md +++ b/bsp/at32/at32f415-start/README.md @@ -45,7 +45,7 @@ AT32F415-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | SPI | 支持 | SPI1/2 | | ADC | 支持 | ADC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4/5 | +| CLOCK_TIMER | 支持 | TMR3/4/5 | | SDIO | 支持 | SDIO1 | | CAN | 支持 | CAN1 | | WDT | 支持 | | diff --git a/bsp/at32/at32f415-start/board/Kconfig b/bsp/at32/at32f415-start/board/Kconfig index b6f1375c83e..fd29cc332e7 100644 --- a/bsp/at32/at32f415-start/board/Kconfig +++ b/bsp/at32/at32f415-start/board/Kconfig @@ -201,11 +201,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f415-start/board/src/at32_msp.c b/bsp/at32/at32f415-start/board/src/at32_msp.c index 64db65da7ae..85228209318 100644 --- a/bsp/at32/at32f415-start/board/src/at32_msp.c +++ b/bsp/at32/at32f415-start/board/src/at32_msp.c @@ -260,7 +260,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f421-start/README.md b/bsp/at32/at32f421-start/README.md index e7abaf68b26..7407728e9ee 100644 --- a/bsp/at32/at32f421-start/README.md +++ b/bsp/at32/at32f421-start/README.md @@ -45,7 +45,7 @@ AT32F421-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | SPI | 支持 | SPI1/2 | | ADC | 支持 | ADC1 | | PWM | 支持 | TMR1 | -| HWTIMER | 支持 | TMR3 | +| CLOCK_TIMER | 支持 | TMR3 | | WDT | 支持 | | | RTC | 支持 | | | FLASH | 支持 | | diff --git a/bsp/at32/at32f421-start/board/Kconfig b/bsp/at32/at32f421-start/board/Kconfig index 982750fdbdf..a3e4f931c21 100644 --- a/bsp/at32/at32f421-start/board/Kconfig +++ b/bsp/at32/at32f421-start/board/Kconfig @@ -135,11 +135,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f421-start/board/src/at32_msp.c b/bsp/at32/at32f421-start/board/src/at32_msp.c index a5221a799de..2b0b1b299d5 100644 --- a/bsp/at32/at32f421-start/board/src/at32_msp.c +++ b/bsp/at32/at32f421-start/board/src/at32_msp.c @@ -213,7 +213,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f423-start/README.md b/bsp/at32/at32f423-start/README.md index 281074e5f8c..4f9698fd76f 100644 --- a/bsp/at32/at32f423-start/README.md +++ b/bsp/at32/at32f423-start/README.md @@ -46,7 +46,7 @@ AT32F423-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1 | | DAC | 支持 | DAC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3 | +| CLOCK_TIMER | 支持 | TMR3 | | CAN | 支持 | CAN1/2 | | WDT | 支持 | | | RTC | 支持 | | diff --git a/bsp/at32/at32f423-start/board/Kconfig b/bsp/at32/at32f423-start/board/Kconfig index a272271c690..51da2462ab5 100644 --- a/bsp/at32/at32f423-start/board/Kconfig +++ b/bsp/at32/at32f423-start/board/Kconfig @@ -201,11 +201,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f423-start/board/src/at32_msp.c b/bsp/at32/at32f423-start/board/src/at32_msp.c index 396e8622e86..9216209e3c3 100644 --- a/bsp/at32/at32f423-start/board/src/at32_msp.c +++ b/bsp/at32/at32f423-start/board/src/at32_msp.c @@ -269,7 +269,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f425-start/README.md b/bsp/at32/at32f425-start/README.md index 51e063ec2b3..aa08bdec06a 100644 --- a/bsp/at32/at32f425-start/README.md +++ b/bsp/at32/at32f425-start/README.md @@ -45,7 +45,7 @@ AT32F425-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | SPI | 支持 | SPI1/2 | | ADC | 支持 | ADC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3 | +| CLOCK_TIMER | 支持 | TMR3 | | CAN | 支持 | CAN1 | | WDT | 支持 | | | RTC | 支持 | | diff --git a/bsp/at32/at32f425-start/board/Kconfig b/bsp/at32/at32f425-start/board/Kconfig index 2aa0bd44306..cc47c543293 100644 --- a/bsp/at32/at32f425-start/board/Kconfig +++ b/bsp/at32/at32f425-start/board/Kconfig @@ -201,11 +201,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f425-start/board/src/at32_msp.c b/bsp/at32/at32f425-start/board/src/at32_msp.c index 4f0ba769551..b9ad73631f1 100644 --- a/bsp/at32/at32f425-start/board/src/at32_msp.c +++ b/bsp/at32/at32f425-start/board/src/at32_msp.c @@ -250,7 +250,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f435-start/README.md b/bsp/at32/at32f435-start/README.md index c9d2261fef1..a9e64eb3e9a 100644 --- a/bsp/at32/at32f435-start/README.md +++ b/bsp/at32/at32f435-start/README.md @@ -46,7 +46,7 @@ AT32F437-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1/2 | | DAC | 支持 | DAC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4/5 | +| CLOCK_TIMER | 支持 | TMR3/4/5 | | SDIO | 支持 | SDIO1 | | CAN | 支持 | CAN1/2 | | QSPI | 支持 | QSPI1/2 | diff --git a/bsp/at32/at32f435-start/board/Kconfig b/bsp/at32/at32f435-start/board/Kconfig index 25a75ce5305..f00c2718f45 100644 --- a/bsp/at32/at32f435-start/board/Kconfig +++ b/bsp/at32/at32f435-start/board/Kconfig @@ -235,11 +235,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f435-start/board/src/at32_msp.c b/bsp/at32/at32f435-start/board/src/at32_msp.c index dcd558ae8cd..acd87d52bb4 100644 --- a/bsp/at32/at32f435-start/board/src/at32_msp.c +++ b/bsp/at32/at32f435-start/board/src/at32_msp.c @@ -310,7 +310,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f437-start/README.md b/bsp/at32/at32f437-start/README.md index 9e6b73b89f1..c8f7a83a01d 100644 --- a/bsp/at32/at32f437-start/README.md +++ b/bsp/at32/at32f437-start/README.md @@ -46,7 +46,7 @@ AT32F437-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1/2 | | DAC | 支持 | DAC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4/5 | +| CLOCK_TIMER | 支持 | TMR3/4/5 | | SDIO | 支持 | SDIO1 | | CAN | 支持 | CAN1/2 | | QSPI | 支持 | QSPI1/2 | diff --git a/bsp/at32/at32f437-start/board/Kconfig b/bsp/at32/at32f437-start/board/Kconfig index 5e215329fc6..da90f3c231e 100644 --- a/bsp/at32/at32f437-start/board/Kconfig +++ b/bsp/at32/at32f437-start/board/Kconfig @@ -258,11 +258,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f437-start/board/src/at32_msp.c b/bsp/at32/at32f437-start/board/src/at32_msp.c index 1a22f367f11..29a4cc9baf1 100644 --- a/bsp/at32/at32f437-start/board/src/at32_msp.c +++ b/bsp/at32/at32f437-start/board/src/at32_msp.c @@ -311,7 +311,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f455-start/README.md b/bsp/at32/at32f455-start/README.md index 0770b763d6b..6e02fe3b643 100644 --- a/bsp/at32/at32f455-start/README.md +++ b/bsp/at32/at32f455-start/README.md @@ -46,7 +46,7 @@ AT32F455-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1/2 | | DAC | 支持 | DAC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4/5 | +| CLOCK_TIMER | 支持 | TMR3/4/5 | | SDIO | 支持 | SDIO1 | | CAN | 支持 | CAN1/2 | | QSPI | 支持 | QSPI1 | diff --git a/bsp/at32/at32f455-start/board/Kconfig b/bsp/at32/at32f455-start/board/Kconfig index 83202f14fe4..c8f39b0b807 100644 --- a/bsp/at32/at32f455-start/board/Kconfig +++ b/bsp/at32/at32f455-start/board/Kconfig @@ -221,11 +221,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f455-start/board/src/at32_msp.c b/bsp/at32/at32f455-start/board/src/at32_msp.c index fe9d78816f9..b61a2c93f32 100644 --- a/bsp/at32/at32f455-start/board/src/at32_msp.c +++ b/bsp/at32/at32f455-start/board/src/at32_msp.c @@ -310,7 +310,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f456-start/README.md b/bsp/at32/at32f456-start/README.md index 6679f455d37..c9c46312a87 100644 --- a/bsp/at32/at32f456-start/README.md +++ b/bsp/at32/at32f456-start/README.md @@ -46,7 +46,7 @@ AT32F456-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1/2 | | DAC | 支持 | DAC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4/5 | +| CLOCK_TIMER | 支持 | TMR3/4/5 | | SDIO | 支持 | SDIO1 | | CAN | 支持 | CAN1/2 | | QSPI | 支持 | QSPI1 | diff --git a/bsp/at32/at32f456-start/board/Kconfig b/bsp/at32/at32f456-start/board/Kconfig index 2bbbca1d38d..b474dba7710 100644 --- a/bsp/at32/at32f456-start/board/Kconfig +++ b/bsp/at32/at32f456-start/board/Kconfig @@ -221,11 +221,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f456-start/board/src/at32_msp.c b/bsp/at32/at32f456-start/board/src/at32_msp.c index fe9d78816f9..b61a2c93f32 100644 --- a/bsp/at32/at32f456-start/board/src/at32_msp.c +++ b/bsp/at32/at32f456-start/board/src/at32_msp.c @@ -310,7 +310,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32f457-start/README.md b/bsp/at32/at32f457-start/README.md index d230bc61272..5e9742b6396 100644 --- a/bsp/at32/at32f457-start/README.md +++ b/bsp/at32/at32f457-start/README.md @@ -46,7 +46,7 @@ AT32F457-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1/2 | | DAC | 支持 | DAC1 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3/4/5 | +| CLOCK_TIMER | 支持 | TMR3/4/5 | | SDIO | 支持 | SDIO1 | | CAN | 支持 | CAN1/2 | | QSPI | 支持 | QSPI1 | diff --git a/bsp/at32/at32f457-start/board/Kconfig b/bsp/at32/at32f457-start/board/Kconfig index 73334123df0..2fce389a827 100644 --- a/bsp/at32/at32f457-start/board/Kconfig +++ b/bsp/at32/at32f457-start/board/Kconfig @@ -221,11 +221,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32f457-start/board/src/at32_msp.c b/bsp/at32/at32f457-start/board/src/at32_msp.c index f37fac2f43d..d665681eda1 100644 --- a/bsp/at32/at32f457-start/board/src/at32_msp.c +++ b/bsp/at32/at32f457-start/board/src/at32_msp.c @@ -310,7 +310,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32m412-start/README.md b/bsp/at32/at32m412-start/README.md index 094e6394043..9b17cc05e63 100644 --- a/bsp/at32/at32m412-start/README.md +++ b/bsp/at32/at32m412-start/README.md @@ -46,7 +46,7 @@ AT32M412-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1/2 | | DAC | 支持 | DAC1/2 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3 | +| CLOCK_TIMER | 支持 | TMR3 | | CAN | 支持 | CAN1 | | WDT | 支持 | | | RTC | 支持 | | diff --git a/bsp/at32/at32m412-start/board/Kconfig b/bsp/at32/at32m412-start/board/Kconfig index 4bb310d92b8..dd541b01458 100644 --- a/bsp/at32/at32m412-start/board/Kconfig +++ b/bsp/at32/at32m412-start/board/Kconfig @@ -135,11 +135,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32m412-start/board/src/at32_msp.c b/bsp/at32/at32m412-start/board/src/at32_msp.c index 30e70be4ac2..51d3e07c8ca 100644 --- a/bsp/at32/at32m412-start/board/src/at32_msp.c +++ b/bsp/at32/at32m412-start/board/src/at32_msp.c @@ -208,7 +208,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/at32m416-start/README.md b/bsp/at32/at32m416-start/README.md index 9f0243f69ca..fd5f19d16f2 100644 --- a/bsp/at32/at32m416-start/README.md +++ b/bsp/at32/at32m416-start/README.md @@ -46,7 +46,7 @@ AT32M416-START板级包支持MDK4﹑MDK5﹑IAR开发环境和GCC编译器，以 | ADC | 支持 | ADC1/2 | | DAC | 支持 | DAC1/2 | | PWM | 支持 | TMR1/2 | -| HWTIMER | 支持 | TMR3 | +| CLOCK_TIMER | 支持 | TMR3 | | CAN | 支持 | CAN1 | | WDT | 支持 | | | RTC | 支持 | | diff --git a/bsp/at32/at32m416-start/board/Kconfig b/bsp/at32/at32m416-start/board/Kconfig index 1601313f4a0..8414740adf6 100644 --- a/bsp/at32/at32m416-start/board/Kconfig +++ b/bsp/at32/at32m416-start/board/Kconfig @@ -135,11 +135,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTMR3 bool "Enable hardware timer3" default n diff --git a/bsp/at32/at32m416-start/board/src/at32_msp.c b/bsp/at32/at32m416-start/board/src/at32_msp.c index 30e70be4ac2..51d3e07c8ca 100644 --- a/bsp/at32/at32m416-start/board/src/at32_msp.c +++ b/bsp/at32/at32m416-start/board/src/at32_msp.c @@ -208,7 +208,7 @@ void at32_msp_adc_init(void *instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void at32_msp_hwtmr_init(void *instance) { tmr_type *tmr_x = (tmr_type *)instance; diff --git a/bsp/at32/libraries/rt_drivers/SConscript b/bsp/at32/libraries/rt_drivers/SConscript index 1a0d17c1aea..090fde5febe 100644 --- a/bsp/at32/libraries/rt_drivers/SConscript +++ b/bsp/at32/libraries/rt_drivers/SConscript @@ -25,8 +25,8 @@ if GetDepend(['RT_USING_SERIAL']): if GetDepend(['BSP_USING_PWM']): src += ['drv_pwm.c'] -if GetDepend(['BSP_USING_HWTIMER']): - src += ['drv_hwtimer.c'] +if GetDepend(['BSP_USING_CLOCK_TIMER']): + src += ['drv_timer.c'] if GetDepend(['BSP_USING_SPI']): src += ['drv_spi.c'] diff --git a/bsp/at32/libraries/rt_drivers/drv_hwtimer.c b/bsp/at32/libraries/rt_drivers/drv_timer.c similarity index 80% rename from bsp/at32/libraries/rt_drivers/drv_hwtimer.c rename to bsp/at32/libraries/rt_drivers/drv_timer.c index 345638a3229..55ff0ed5d0c 100644 --- a/bsp/at32/libraries/rt_drivers/drv_hwtimer.c +++ b/bsp/at32/libraries/rt_drivers/drv_timer.c @@ -9,13 +9,13 @@ */ #include "board.h" -#include "drv_hwtimer.h" +#include "drv_timer.h" //#define DRV_DEBUG -#define LOG_TAG "drv.hwtimer" +#define LOG_TAG "drv.clock_timer" #include -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER enum { @@ -80,15 +80,15 @@ enum #endif }; -struct at32_hwtimer +struct at32_clock_timer { - rt_hwtimer_t tmr_device; + rt_clock_timer_t tmr_device; tmr_type* tmr_x; IRQn_Type tmr_irqn; char *name; }; -static struct at32_hwtimer at32_hwtimer_obj[] = +static struct at32_clock_timer at32_clock_timer_obj[] = { #ifdef BSP_USING_HWTMR1 TMR1_CONFIG, @@ -171,19 +171,19 @@ static void tmr_pclk_get(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_doubler) } } -static void at32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void at32_timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { crm_clocks_freq_type clocks_struct; rt_uint32_t pclk1_doubler = 0, pclk2_doubler = 0; rt_uint32_t prescaler_value = 0, tmr_clock = 0; tmr_type *tmr_x = RT_NULL; - struct at32_hwtimer *tmr_device = RT_NULL; + struct at32_clock_timer *tmr_device = RT_NULL; RT_ASSERT(timer != RT_NULL); if (state) { tmr_x = (tmr_type *)timer->parent.user_data; - tmr_device = (struct at32_hwtimer *)timer; + tmr_device = (struct at32_clock_timer *)timer; /* timer clock enable */ at32_msp_hwtmr_init(tmr_x); @@ -222,7 +222,7 @@ static void at32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) tmr_clock_source_div_set(tmr_x, TMR_CLOCK_DIV1); tmr_repetition_counter_set(tmr_x, 0); - if (timer->info->cntmode == HWTIMER_CNTMODE_UP) + if (timer->info->cntmode == CLOCK_TIMER_CNTMODE_UP) { tmr_cnt_dir_set(tmr_x, TMR_COUNT_UP); } @@ -241,7 +241,7 @@ static void at32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) } } -static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t pr, rt_hwtimer_mode_t opmode) +static rt_err_t at32_timer_start(rt_clock_timer_t *timer, rt_uint32_t pr, rt_clock_timer_mode_t opmode) { rt_err_t result = RT_EOK; tmr_type *tmr_x = RT_NULL; @@ -254,7 +254,7 @@ static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t pr, rt_hwtimer /* set tmr_x period register */ tmr_period_value_set(tmr_x, pr - 1); - if (opmode == HWTIMER_MODE_ONESHOT) + if (opmode == CLOCK_TIMER_MODE_ONESHOT) { /* set timer to one cycle mode */ tmr_one_cycle_mode_enable(tmr_x, TRUE); @@ -271,7 +271,7 @@ static rt_err_t at32_timer_start(rt_hwtimer_t *timer, rt_uint32_t pr, rt_hwtimer return result; } -static void at32_timer_stop(rt_hwtimer_t *timer) +static void at32_timer_stop(rt_clock_timer_t *timer) { tmr_type *tmr_x = RT_NULL; @@ -285,7 +285,7 @@ static void at32_timer_stop(rt_hwtimer_t *timer) tmr_counter_value_set(tmr_x, 0); } -static rt_uint32_t at32_timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t at32_timer_counter_get(rt_clock_timer_t *timer) { tmr_type *tmr_x = RT_NULL; @@ -296,7 +296,7 @@ static rt_uint32_t at32_timer_counter_get(rt_hwtimer_t *timer) return tmr_counter_value_get(tmr_x); } -static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t at32_timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { crm_clocks_freq_type clocks_struct; tmr_type *tmr_x = RT_NULL; @@ -310,7 +310,7 @@ static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) switch(cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { rt_uint32_t freq; rt_uint16_t val; @@ -362,8 +362,8 @@ static rt_err_t at32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) return result; } -static const struct rt_hwtimer_info _info = TMR_DEV_INFO_CONFIG; -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_info _info = TMR_DEV_INFO_CONFIG; +static const struct rt_clock_timer_ops _ops = { .init = at32_timer_init, .start = at32_timer_start, @@ -380,7 +380,7 @@ void TMR2_GLOBAL_IRQHandler(void) if(tmr_flag_get(TMR2, TMR_OVF_FLAG) == SET) { - rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR2_INDEX].tmr_device); + rt_clock_timer_isr(&at32_clock_timer_obj[TMR2_INDEX].tmr_device); tmr_flag_clear(TMR2, TMR_OVF_FLAG); } /* leave interrupt */ @@ -396,7 +396,7 @@ void TMR3_GLOBAL_IRQHandler(void) if(tmr_flag_get(TMR3, TMR_OVF_FLAG) == SET) { - rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR3_INDEX].tmr_device); + rt_clock_timer_isr(&at32_clock_timer_obj[TMR3_INDEX].tmr_device); tmr_flag_clear(TMR3, TMR_OVF_FLAG); } /* leave interrupt */ @@ -412,7 +412,7 @@ void TMR4_GLOBAL_IRQHandler(void) if(tmr_flag_get(TMR4, TMR_OVF_FLAG) == SET) { - rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR4_INDEX].tmr_device); + rt_clock_timer_isr(&at32_clock_timer_obj[TMR4_INDEX].tmr_device); tmr_flag_clear(TMR4, TMR_OVF_FLAG); } /* leave interrupt */ @@ -428,7 +428,7 @@ void TMR5_GLOBAL_IRQHandler(void) if(tmr_flag_get(TMR5, TMR_OVF_FLAG) == SET) { - rt_device_hwtimer_isr(&at32_hwtimer_obj[TMR5_INDEX].tmr_device); + rt_clock_timer_isr(&at32_clock_timer_obj[TMR5_INDEX].tmr_device); tmr_flag_clear(TMR5, TMR_OVF_FLAG); } /* leave interrupt */ @@ -436,22 +436,22 @@ void TMR5_GLOBAL_IRQHandler(void) } #endif -static int rt_hw_hwtimer_init(void) +static int rt_hw_clock_timer_init(void) { int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(at32_hwtimer_obj) / sizeof(at32_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(at32_clock_timer_obj) / sizeof(at32_clock_timer_obj[0]); i++) { - at32_hwtimer_obj[i].tmr_device.info = &_info; - at32_hwtimer_obj[i].tmr_device.ops = &_ops; - if (rt_device_hwtimer_register(&at32_hwtimer_obj[i].tmr_device, at32_hwtimer_obj[i].name, at32_hwtimer_obj[i].tmr_x) == RT_EOK) + at32_clock_timer_obj[i].tmr_device.info = &_info; + at32_clock_timer_obj[i].tmr_device.ops = &_ops; + if (rt_clock_timer_register(&at32_clock_timer_obj[i].tmr_device, at32_clock_timer_obj[i].name, at32_clock_timer_obj[i].tmr_x) == RT_EOK) { - LOG_D("%s register success", at32_hwtimer_obj[i].name); + LOG_D("%s register success", at32_clock_timer_obj[i].name); } else { - LOG_E("%s register failed", at32_hwtimer_obj[i].name); + LOG_E("%s register failed", at32_clock_timer_obj[i].name); result = -RT_ERROR; } } @@ -459,6 +459,6 @@ static int rt_hw_hwtimer_init(void) return result; } -INIT_BOARD_EXPORT(rt_hw_hwtimer_init); +INIT_BOARD_EXPORT(rt_hw_clock_timer_init); -#endif /* BSP_USING_HWTIMER */ +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/at32/libraries/rt_drivers/drv_hwtimer.h b/bsp/at32/libraries/rt_drivers/drv_timer.h similarity index 95% rename from bsp/at32/libraries/rt_drivers/drv_hwtimer.h rename to bsp/at32/libraries/rt_drivers/drv_timer.h index 624437f559b..fac966bf244 100644 --- a/bsp/at32/libraries/rt_drivers/drv_hwtimer.h +++ b/bsp/at32/libraries/rt_drivers/drv_timer.h @@ -12,7 +12,7 @@ #define __TMR_CONFIG_H__ #include -#include +#include #ifdef __cplusplus extern "C" { @@ -24,7 +24,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 4000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/at91/at91sam9g45/project.ewp b/bsp/at91/at91sam9g45/project.ewp index a3b12ade7f2..6282b32b53d 100644 --- a/bsp/at91/at91sam9g45/project.ewp +++ b/bsp/at91/at91sam9g45/project.ewp @@ -329,7 +329,7 @@ $PROJ_DIR$\..\..\..\components\drivers\include $PROJ_DIR$\drivers $PROJ_DIR$\..\..\..\components\libc\compilers\common\extension - $PROJ_DIR$\..\..\..\components\drivers\ktime + $PROJ_DIR$\..\..\..\components\drivers\clock_time $PROJ_DIR$\. $PROJ_DIR$\..\..\..\include $PROJ_DIR$\..\..\..\components\libc\posix\delay @@ -340,7 +340,7 @@ $PROJ_DIR$\..\..\..\components\drivers\phy $PROJ_DIR$\..\..\..\components\dfs\dfs_v1\filesystems\devfs $PROJ_DIR$\..\..\..\components\dfs\dfs_v1\include - $PROJ_DIR$\..\..\..\components\drivers\ktime\inc + $PROJ_DIR$\..\..\..\components\drivers\clock_time\inc - ktime + clock_time - $PROJ_DIR$\..\..\..\components\drivers\ktime\src\cputimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_time_core.c - $PROJ_DIR$\..\..\..\components\drivers\ktime\src\boottime.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_boottime.c - $PROJ_DIR$\..\..\..\components\drivers\ktime\src\hrtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_hrtimer.c diff --git a/bsp/at91/at91sam9g45/project.uvproj b/bsp/at91/at91sam9g45/project.uvproj index 7f2d6930775..7368f3098bf 100644 --- a/bsp/at91/at91sam9g45/project.uvproj +++ b/bsp/at91/at91sam9g45/project.uvproj @@ -359,7 +359,7 @@ __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND, RT_USING_LIBC, RT_USING_ARMLIBC, __STDC_LIMIT_MACROS - ..\..\..\components\libc\posix\io\poll;..\..\..\include;..\..\..\libcpu\arm\common;..\..\..\components\drivers\ktime\inc;..\..\..\libcpu\arm\arm926;applications;..\..\..\components\libc\posix\tls;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\eventfd;..\..\..\components\dfs\dfs_v1\include;..\..\..\components\drivers\phy;.;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\cplusplus;platform;..\..\..\components\libc\posix\pthreads;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\posix\io\epoll;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;..\..\..\components\dfs\dfs_v1\filesystems\devfs;..\..\..\components\drivers\ktime;..\..\..\components\drivers\smp_call;drivers;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\posix\delay + ..\..\..\components\libc\posix\io\poll;..\..\..\include;..\..\..\libcpu\arm\common;..\..\..\components\drivers\clock_time\inc;..\..\..\libcpu\arm\arm926;applications;..\..\..\components\libc\posix\tls;..\..\..\components\drivers\include;..\..\..\components\libc\posix\io\eventfd;..\..\..\components\dfs\dfs_v1\include;..\..\..\components\drivers\phy;.;..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\components\libc\cplusplus;platform;..\..\..\components\libc\posix\pthreads;..\..\..\components\drivers\include;..\..\..\components\finsh;..\..\..\components\libc\posix\io\epoll;..\..\..\components\libc\compilers\common\include;..\..\..\components\libc\posix\ipc;..\..\..\components\drivers\include;..\..\..\components\dfs\dfs_v1\filesystems\devfs;..\..\..\components\drivers\clock_time;..\..\..\components\drivers\smp_call;drivers;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\drivers\include;..\..\..\components\libc\compilers\common\extension;..\..\..\components\libc\posix\delay @@ -1222,12 +1222,12 @@ - ktime + clock_time - boottime.c + clock_boottime.c 1 - ..\..\..\components\drivers\ktime\src\boottime.c + ..\..\..\components\drivers\clock_time\clock_boottime.c @@ -1244,9 +1244,9 @@ - cputimer.c + clock_time_core.c 1 - ..\..\..\components\drivers\ktime\src\cputimer.c + ..\..\..\components\drivers\clock_time\clock_time_core.c @@ -1263,9 +1263,9 @@ - hrtimer.c + clock_hrtimer.c 1 - ..\..\..\components\drivers\ktime\src\hrtimer.c + ..\..\..\components\drivers\clock_time\clock_hrtimer.c diff --git a/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig b/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig index fec93e4e685..670a59980cc 100644 --- a/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig +++ b/bsp/bluetrum/ab32vg1-ab-prougen/board/Kconfig @@ -178,7 +178,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM1 bool "Enable TIM1" diff --git a/bsp/bluetrum/libraries/hal_drivers/SConscript b/bsp/bluetrum/libraries/hal_drivers/SConscript index b35a6e89ccb..0a6dd7e0cd2 100644 --- a/bsp/bluetrum/libraries/hal_drivers/SConscript +++ b/bsp/bluetrum/libraries/hal_drivers/SConscript @@ -23,8 +23,8 @@ if GetDepend('RT_USING_I2C'): if GetDepend('RT_USING_WDT'): src += ['drv_wdt.c'] -if GetDepend('RT_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('RT_USING_CLOCK_TIME'): + src += ['drv_timer.c'] if GetDepend('RT_USING_PWM'): src += ['drv_pwm.c'] diff --git a/bsp/bluetrum/libraries/hal_drivers/config/tim_config.h b/bsp/bluetrum/libraries/hal_drivers/config/tim_config.h index b1c29ae1e80..ae67d24172d 100644 --- a/bsp/bluetrum/libraries/hal_drivers/config/tim_config.h +++ b/bsp/bluetrum/libraries/hal_drivers/config/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 3000, \ .maxcnt = 0xFFFFFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/bluetrum/libraries/hal_drivers/drv_hwtimer.c b/bsp/bluetrum/libraries/hal_drivers/drv_timer.c similarity index 60% rename from bsp/bluetrum/libraries/hal_drivers/drv_hwtimer.c rename to bsp/bluetrum/libraries/hal_drivers/drv_timer.c index ef925fa037f..b79116a2385 100644 --- a/bsp/bluetrum/libraries/hal_drivers/drv_hwtimer.c +++ b/bsp/bluetrum/libraries/hal_drivers/drv_timer.c @@ -13,10 +13,10 @@ #include "tim_config.h" //#define DRV_DEBUG -#define LOG_TAG "drv.hwtimer" +#define LOG_TAG "drv.clock_timer" #include -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME enum { @@ -37,15 +37,15 @@ enum #endif }; -struct ab32_hwtimer +struct ab32_clock_timer { - rt_hwtimer_t time_device; + rt_clock_timer_t time_device; hal_sfr_t tim_handle; char *name; irq_type tim_irqn; }; -static struct ab32_hwtimer ab32_hwtimer_obj[] = +static struct ab32_clock_timer ab32_clock_timer_obj[] = { #ifdef BSP_USING_TIM1 TIM1_CONFIG, @@ -69,7 +69,7 @@ static struct ab32_hwtimer ab32_hwtimer_obj[] = }; rt_section(".irq.timer") -static void _rt_device_hwtimer_isr(rt_hwtimer_t *timer) +static void _rt_clock_timer_isr(rt_clock_timer_t *timer) { RT_ASSERT(timer != RT_NULL); @@ -84,7 +84,7 @@ static void _rt_device_hwtimer_isr(rt_hwtimer_t *timer) { timer->cycles = timer->reload; - if (timer->mode == HWTIMER_MODE_ONESHOT) + if (timer->mode == CLOCK_TIMER_MODE_ONESHOT) { if (timer->ops->stop != RT_NULL) { @@ -94,27 +94,27 @@ static void _rt_device_hwtimer_isr(rt_hwtimer_t *timer) if (timer->parent.rx_indicate != RT_NULL) { - timer->parent.rx_indicate(&timer->parent, sizeof(struct rt_hwtimerval)); + timer->parent.rx_indicate(&timer->parent, sizeof(struct rt_clock_timerval)); } } } -static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { rt_uint32_t prescaler_value = 0; hal_sfr_t tim = RT_NULL; - struct ab32_hwtimer *tim_device = RT_NULL; + struct ab32_clock_timer *tim_device = RT_NULL; RT_ASSERT(timer != RT_NULL); tim = (hal_sfr_t)timer->parent.user_data; if (state) { - tim_device = (struct ab32_hwtimer *)timer; + tim_device = (struct ab32_clock_timer *)timer; - if (timer->info->cntmode != HWTIMER_CNTMODE_UP) + if (timer->info->cntmode != CLOCK_TIMER_CNTMODE_UP) { - LOG_E("Only support HWTIMER_CNTMODE_UP!"); + LOG_E("Only support CLOCK_TIMER_CNTMODE_UP!"); } /* set tim int */ @@ -127,7 +127,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) } } -static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode) { rt_err_t result = RT_EOK; hal_sfr_t tim = RT_NULL; @@ -140,9 +140,9 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ tim[TMRxCNT] = 0; tim[TMRxPR] = t * (get_sysclk_nhz() / timer->freq) - 1; - if (opmode != HWTIMER_MODE_PERIOD) + if (opmode != CLOCK_TIMER_MODE_PERIOD) { - LOG_E("Opmode only support HWTIMER_MODE_PERIOD!"); + LOG_E("Opmode only support CLOCK_TIMER_MODE_PERIOD!"); return -RT_EINVAL; } @@ -152,7 +152,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ return result; } -static void timer_stop(rt_hwtimer_t *timer) +static void timer_stop(rt_clock_timer_t *timer) { hal_sfr_t tim = RT_NULL; @@ -167,7 +167,7 @@ static void timer_stop(rt_hwtimer_t *timer) tim[TMRxCNT] = 0; } -static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { hal_sfr_t tim = RT_NULL; rt_err_t result = RT_EOK; @@ -179,7 +179,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { } break; @@ -193,7 +193,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) return result; } -static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t timer_counter_get(rt_clock_timer_t *timer) { hal_sfr_t tim = RT_NULL; @@ -204,9 +204,9 @@ static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) return tim[TMRxCNT] / (get_sysclk_nhz() / timer->freq); } -static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG; +static const struct rt_clock_timer_info _info = TIM_DEV_INFO_CONFIG; -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_ops _ops = { .init = timer_init, .start = timer_start, @@ -221,21 +221,21 @@ void timer2_4_5_isr(int vector, void *param) { rt_interrupt_enter(); #ifdef BSP_USING_TIM2 - if (ab32_hwtimer_obj[TIM2_INDEX].tim_handle[TMRxCON] != 0) { - ab32_hwtimer_obj[TIM2_INDEX].tim_handle[TMRxCPND] = BIT(9); - _rt_device_hwtimer_isr(&ab32_hwtimer_obj[TIM2_INDEX].time_device); + if (ab32_clock_timer_obj[TIM2_INDEX].tim_handle[TMRxCON] != 0) { + ab32_clock_timer_obj[TIM2_INDEX].tim_handle[TMRxCPND] = BIT(9); + _rt_clock_timer_isr(&ab32_clock_timer_obj[TIM2_INDEX].time_device); } #endif #ifdef BSP_USING_TIM4 - if (ab32_hwtimer_obj[TIM4_INDEX].tim_handle[TMRxCON] != 0) { - ab32_hwtimer_obj[TIM4_INDEX].tim_handle[TMRxCPND] = BIT(9); - _rt_device_hwtimer_isr(&ab32_hwtimer_obj[TIM4_INDEX].time_device); + if (ab32_clock_timer_obj[TIM4_INDEX].tim_handle[TMRxCON] != 0) { + ab32_clock_timer_obj[TIM4_INDEX].tim_handle[TMRxCPND] = BIT(9); + _rt_clock_timer_isr(&ab32_clock_timer_obj[TIM4_INDEX].time_device); } #endif #ifdef BSP_USING_TIM5 - if (ab32_hwtimer_obj[TIM5_INDEX].tim_handle[TMRxCON] != 0) { - ab32_hwtimer_obj[TIM5_INDEX].tim_handle[TMRxCPND] = BIT(9); - _rt_device_hwtimer_isr(&ab32_hwtimer_obj[TIM5_INDEX].time_device); + if (ab32_clock_timer_obj[TIM5_INDEX].tim_handle[TMRxCON] != 0) { + ab32_clock_timer_obj[TIM5_INDEX].tim_handle[TMRxCPND] = BIT(9); + _rt_clock_timer_isr(&ab32_clock_timer_obj[TIM5_INDEX].time_device); } #endif rt_interrupt_leave(); @@ -247,8 +247,8 @@ rt_section(".irq.timer") void timer3_isr(int vector, void *param) { rt_interrupt_enter(); - ab32_hwtimer_obj[TIM3_INDEX].tim_handle[TMRxCPND] = BIT(9); - _rt_device_hwtimer_isr(&ab32_hwtimer_obj[TIM3_INDEX].time_device); + ab32_clock_timer_obj[TIM3_INDEX].tim_handle[TMRxCPND] = BIT(9); + _rt_clock_timer_isr(&ab32_clock_timer_obj[TIM3_INDEX].time_device); rt_interrupt_leave(); } #endif @@ -258,28 +258,28 @@ rt_section(".irq.timer") void timer1_isr(int vector, void *param) { rt_interrupt_enter(); - ab32_hwtimer_obj[TIM1_INDEX].tim_handle[TMRxCPND] = BIT(9); - _rt_device_hwtimer_isr(&ab32_hwtimer_obj[TIM1_INDEX].time_device); + ab32_clock_timer_obj[TIM1_INDEX].tim_handle[TMRxCPND] = BIT(9); + _rt_clock_timer_isr(&ab32_clock_timer_obj[TIM1_INDEX].time_device); rt_interrupt_leave(); } #endif -static int ab32_hwtimer_init(void) +static int ab32_clock_timer_init(void) { int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(ab32_hwtimer_obj) / sizeof(ab32_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(ab32_clock_timer_obj) / sizeof(ab32_clock_timer_obj[0]); i++) { - ab32_hwtimer_obj[i].time_device.info = &_info; - ab32_hwtimer_obj[i].time_device.ops = &_ops; - if (rt_device_hwtimer_register(&ab32_hwtimer_obj[i].time_device, ab32_hwtimer_obj[i].name, (void *)ab32_hwtimer_obj[i].tim_handle) == RT_EOK) + ab32_clock_timer_obj[i].time_device.info = &_info; + ab32_clock_timer_obj[i].time_device.ops = &_ops; + if (rt_clock_timer_register(&ab32_clock_timer_obj[i].time_device, ab32_clock_timer_obj[i].name, (void *)ab32_clock_timer_obj[i].tim_handle) == RT_EOK) { - LOG_D("%s register success", ab32_hwtimer_obj[i].name); + LOG_D("%s register success", ab32_clock_timer_obj[i].name); } else { - LOG_E("%s register failed", ab32_hwtimer_obj[i].name); + LOG_E("%s register failed", ab32_clock_timer_obj[i].name); result = -RT_ERROR; } } @@ -296,7 +296,7 @@ static int ab32_hwtimer_init(void) return result; } -INIT_BOARD_EXPORT(ab32_hwtimer_init); +INIT_BOARD_EXPORT(ab32_clock_timer_init); -#endif /* RT_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME */ #endif /* BSP_USING_TIM */ diff --git a/bsp/bouffalo_lab/README.md b/bsp/bouffalo_lab/README.md index 2628406a662..c22fa5fabe2 100755 --- a/bsp/bouffalo_lab/README.md +++ b/bsp/bouffalo_lab/README.md @@ -198,7 +198,7 @@ Windows下推荐使用[env工具][1]，在console下进入bsp/bouffalo_lab/bl61x | ADC | 支持 | | | RTC | 支持 | | | WDT | 支持 | | -| HWTIMER | 支持 | | +| CLOCK_TIMER | 支持 | | | FLASH | 支持 | | | SDCARD | 支持 | | | Wi-Fi | 支持 | 仅 BL808 支持 | diff --git a/bsp/bouffalo_lab/README_en.md b/bsp/bouffalo_lab/README_en.md index bb73ed8bf7a..6aa5e9bc6a4 100644 --- a/bsp/bouffalo_lab/README_en.md +++ b/bsp/bouffalo_lab/README_en.md @@ -180,7 +180,7 @@ If the compilation and flashing are successful, when you reset the device, you w | ADC | Supported | | | RTC | Supported | | | WDT | Supported | | -| HWTIMER | Supported | | +| CLOCK_TIMER | Supported | | | FLASH | Supported | | | SDCARD | Supported | | diff --git a/bsp/bouffalo_lab/libraries/Kconfig b/bsp/bouffalo_lab/libraries/Kconfig index 62737d7920c..c12477ca803 100755 --- a/bsp/bouffalo_lab/libraries/Kconfig +++ b/bsp/bouffalo_lab/libraries/Kconfig @@ -791,11 +791,11 @@ menu "General Drivers Configuration" default n endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_TIMER0 bool "Enable TIMER0" default n diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/SConscript b/bsp/bouffalo_lab/libraries/rt_drivers/SConscript index c3b16c8deaa..39396ad7a71 100755 --- a/bsp/bouffalo_lab/libraries/rt_drivers/SConscript +++ b/bsp/bouffalo_lab/libraries/rt_drivers/SConscript @@ -29,9 +29,9 @@ if GetDepend('BSP_USING_WDT'): src += ['drv_wdt.c'] src += ['sample/wdt_sample.c'] -if GetDepend('BSP_USING_HWTIMER'): - src += ['drv_hwtimer.c'] - src += ['sample/hwtimer_sample.c'] +if GetDepend('BSP_USING_CLOCK_TIMER'): + src += ['drv_timer.c'] + src += ['sample/clock_timer_sample.c'] if GetDepend('BSP_USING_SPI'): src += ['drv_spi.c'] diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/drv_hwtimer.c b/bsp/bouffalo_lab/libraries/rt_drivers/drv_timer.c similarity index 66% rename from bsp/bouffalo_lab/libraries/rt_drivers/drv_hwtimer.c rename to bsp/bouffalo_lab/libraries/rt_drivers/drv_timer.c index 8256e226bdd..c2ed973f693 100644 --- a/bsp/bouffalo_lab/libraries/rt_drivers/drv_hwtimer.c +++ b/bsp/bouffalo_lab/libraries/rt_drivers/drv_timer.c @@ -8,45 +8,45 @@ * 2023-04-01 wcx1024979076 first version */ -#include "drv_hwtimer.h" +#include "drv_timer.h" #include #include -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER #define DBG_LEVEL DBG_LOG #include -#define LOG_TAG "DRV.HWTIMER" +#define LOG_TAG "DRV.CLOCK_TIMER" typedef struct _gptimer { const char *name; - rt_hwtimer_t timer; + rt_clock_timer_t timer; struct bflb_device_s *bflb_timer; } _gptimer_t; -static void _hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t _hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode); -static void _hwtimer_stop(rt_hwtimer_t *timer); -static rt_uint32_t _hwtimer_count_get(rt_hwtimer_t *timer); -static rt_err_t _hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void _clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t _clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode); +static void _clock_timer_stop(rt_clock_timer_t *timer); +static rt_uint32_t _clock_timer_count_get(rt_clock_timer_t *timer); +static rt_err_t _clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); static void _hwtmr_isr(_gptimer_t *gptmr); -static const struct rt_hwtimer_ops _hwtimer_ops = { - .init = _hwtimer_init, - .start = _hwtimer_start, - .stop = _hwtimer_stop, - .count_get = _hwtimer_count_get, - .control = _hwtimer_control +static const struct rt_clock_timer_ops _clock_timer_ops = { + .init = _clock_timer_init, + .start = _clock_timer_start, + .stop = _clock_timer_stop, + .count_get = _clock_timer_count_get, + .control = _clock_timer_control }; -static const struct rt_hwtimer_info _hwtimer_info = { +static const struct rt_clock_timer_info _clock_timer_info = { .maxfreq = 1000000UL, .minfreq = 1000000UL, .maxcnt = 0xFFFFFFFFUL, - .cntmode = HWTIMER_MODE_PERIOD + .cntmode = CLOCK_TIMER_MODE_PERIOD }; #ifdef BSP_USING_TIMER0 @@ -84,12 +84,12 @@ static void _hwtmr_isr(_gptimer_t *timer) bool hwtmr_stat = bflb_timer_get_compint_status(timer->bflb_timer, TIMER_COMP_ID_0); if (hwtmr_stat) { - rt_device_hwtimer_isr(&timer->timer); + rt_clock_timer_isr(&timer->timer); bflb_timer_compint_clear(timer->bflb_timer, TIMER_COMP_ID_0); } } -static void _hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void _clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { _gptimer_t *_gptmr = (_gptimer_t*)timer->parent.user_data; @@ -106,12 +106,12 @@ static void _hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) bflb_timer_init(_gptmr->bflb_timer, &cfg); } -static rt_err_t _hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t _clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { _gptimer_t *_gptmr = (_gptimer_t*) timer->parent.user_data; struct bflb_timer_config_s cfg; - if(mode == HWTIMER_MODE_ONESHOT) + if(mode == CLOCK_TIMER_MODE_ONESHOT) cfg.counter_mode = TIMER_COUNTER_MODE_UP; else cfg.counter_mode = TIMER_COUNTER_MODE_PROLOAD; @@ -130,13 +130,13 @@ static rt_err_t _hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ return RT_EOK; } -static void _hwtimer_stop(rt_hwtimer_t *timer) +static void _clock_timer_stop(rt_clock_timer_t *timer) { _gptimer_t *_gptmr = (_gptimer_t*)timer->parent.user_data; bflb_timer_stop(_gptmr->bflb_timer); } -static rt_uint32_t _hwtimer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t _clock_timer_count_get(rt_clock_timer_t *timer) { _gptimer_t *_gptmr = (_gptimer_t*)timer->parent.user_data; @@ -145,22 +145,22 @@ static rt_uint32_t _hwtimer_count_get(rt_hwtimer_t *timer) return current_cnt; } -static rt_err_t _hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t _clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t err = RT_EOK; _gptimer_t *_gptmr = (_gptimer_t*) timer->parent.user_data; switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: err = -RT_ERROR; break; - case HWTIMER_CTRL_INFO_GET: - *(rt_hwtimer_t*)args = _gptmr->timer; + case CLOCK_TIMER_CTRL_INFO_GET: + *(rt_clock_timer_t*)args = _gptmr->timer; break; - case HWTIMER_CTRL_MODE_SET: + case CLOCK_TIMER_CTRL_MODE_SET: _gptmr->timer.mode = *(rt_uint32_t*)args; break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: bflb_timer_stop(_gptmr->bflb_timer); break; } @@ -169,15 +169,15 @@ static rt_err_t _hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg } -int rt_hw_hwtimer_init(void) +int rt_hw_clock_timer_init(void) { int ret = RT_EOK; for (uint32_t i = 0; i < sizeof(s_gptimers) / sizeof(s_gptimers[0]); i++) { - s_gptimers[i]->timer.info = &_hwtimer_info; - s_gptimers[i]->timer.ops = &_hwtimer_ops; + s_gptimers[i]->timer.info = &_clock_timer_info; + s_gptimers[i]->timer.ops = &_clock_timer_ops; s_gptimers[i]->bflb_timer = bflb_device_get_by_name(s_gptimers[i]->name); - ret = rt_device_hwtimer_register(&s_gptimers[i]->timer, s_gptimers[i]->name, s_gptimers[i]); + ret = rt_clock_timer_register(&s_gptimers[i]->timer, s_gptimers[i]->name, s_gptimers[i]); if (ret != RT_EOK) { LOG_E("%s register failed", s_gptimers[i]->name); @@ -195,5 +195,5 @@ int rt_hw_hwtimer_init(void) return ret; } -INIT_DEVICE_EXPORT(rt_hw_hwtimer_init); -#endif /* BSP_USING_HWTIMER */ +INIT_DEVICE_EXPORT(rt_hw_clock_timer_init); +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/drv_hwtimer.h b/bsp/bouffalo_lab/libraries/rt_drivers/drv_timer.h similarity index 71% rename from bsp/bouffalo_lab/libraries/rt_drivers/drv_hwtimer.h rename to bsp/bouffalo_lab/libraries/rt_drivers/drv_timer.h index 6f3cfbc7ae0..05a6ec1812c 100644 --- a/bsp/bouffalo_lab/libraries/rt_drivers/drv_hwtimer.h +++ b/bsp/bouffalo_lab/libraries/rt_drivers/drv_timer.h @@ -8,12 +8,12 @@ * 2023-04-01 wcx1024979076 first version */ -#ifndef DRV_HWTIMER_H -#define DRV_HWTIMER_H +#ifndef DRV_CLOCK_TIMER_H +#define DRV_CLOCK_TIMER_H #include "bflb_timer.h" #include "bflb_mtimer.h" #include "board.h" -int rt_hw_hwtimer_init(void); +int rt_hw_clock_timer_init(void); -#endif /* DRV_HWTIMER_H */ +#endif /* DRV_CLOCK_TIMER_H */ diff --git a/bsp/bouffalo_lab/libraries/rt_drivers/sample/hwtimer_sample.c b/bsp/bouffalo_lab/libraries/rt_drivers/sample/clock_timer_sample.c similarity index 65% rename from bsp/bouffalo_lab/libraries/rt_drivers/sample/hwtimer_sample.c rename to bsp/bouffalo_lab/libraries/rt_drivers/sample/clock_timer_sample.c index e2f6e3abb25..3aeaeefbca2 100755 --- a/bsp/bouffalo_lab/libraries/rt_drivers/sample/hwtimer_sample.c +++ b/bsp/bouffalo_lab/libraries/rt_drivers/sample/clock_timer_sample.c @@ -8,41 +8,41 @@ * 2023-04-01 wcx1024979076 first version. */ /* - * 程序清单：这是一个 hwtimer 设备使用例程 - * 例程导出了 hwtimer_sample 命令到控制终端 - * 命令调用格式：hwtimer_sample + * 程序清单：这是一个 clock_timer 设备使用例程 + * 例程导出了 clock_timer_sample 命令到控制终端 + * 命令调用格式：clock_timer_sample * 程序功能：硬件定时器超时回调函数周期性的打印当前tick值，2次tick值之差换算为时间等同于定时时间值。 */ #include #include -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER -#define HWTIMER_DEV_NAME "timer0" /* 定时器名称 */ +#define CLOCK_TIMER_DEV_NAME "timer0" /* 定时器名称 */ /* 定时器超时回调函数 */ static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) { - rt_kprintf("this is hwtimer timeout callback fucntion!\n"); + rt_kprintf("this is clock_timer timeout callback fucntion!\n"); rt_kprintf("tick is :%d !\n", rt_tick_get()); return 0; } -static int hwtimer_sample(int argc, char *argv[]) +static int clock_timer_sample(int argc, char *argv[]) { rt_err_t ret = RT_EOK; - rt_hwtimerval_t timeout_s; /* 定时器超时值 */ + rt_clock_timerval_t timeout_s; /* 定时器超时值 */ rt_device_t hw_dev = RT_NULL; /* 定时器设备句柄 */ - rt_hwtimer_mode_t mode; /* 定时器模式 */ + rt_clock_timer_mode_t mode; /* 定时器模式 */ rt_uint32_t freq = 10000; /* 计数频率 */ /* 查找定时器设备 */ - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); return -RT_ERROR; } @@ -50,7 +50,7 @@ static int hwtimer_sample(int argc, char *argv[]) ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); if (ret != RT_EOK) { - rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME); + rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME); return ret; } @@ -58,10 +58,10 @@ static int hwtimer_sample(int argc, char *argv[]) rt_device_set_rx_indicate(hw_dev, timeout_cb); /* 设置计数频率(若未设置该项，默认为1Mhz 或 支持的最小计数频率) */ - rt_device_control(hw_dev, HWTIMER_CTRL_FREQ_SET, &freq); - /* 设置模式为周期性定时器（若未设置，默认是HWTIMER_MODE_ONESHOT）*/ - mode = HWTIMER_MODE_PERIOD; - ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_FREQ_SET, &freq); + /* 设置模式为周期性定时器（若未设置，默认是CLOCK_TIMER_MODE_ONESHOT）*/ + mode = CLOCK_TIMER_MODE_PERIOD; + ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); if (ret != RT_EOK) { rt_kprintf("set mode failed! ret is :%d\n", ret); @@ -87,6 +87,6 @@ static int hwtimer_sample(int argc, char *argv[]) return ret; } /* 导出到 msh 命令列表中 */ -MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample); +MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample); -#endif /* RT_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME */ diff --git a/bsp/cvitek/c906_little/board/Kconfig b/bsp/cvitek/c906_little/board/Kconfig index 49c046748b2..104648aa698 100755 --- a/bsp/cvitek/c906_little/board/Kconfig +++ b/bsp/cvitek/c906_little/board/Kconfig @@ -298,7 +298,7 @@ menu "General Drivers Configuration" menuconfig BSP_USING_TIMER bool "Enable TIMER" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIMER config BSP_USING_TIMER4 bool "Enable TIMER4" diff --git a/bsp/cvitek/cv18xx_risc-v/board/Kconfig b/bsp/cvitek/cv18xx_risc-v/board/Kconfig index f971b18e2c0..d0cb78020e9 100755 --- a/bsp/cvitek/cv18xx_risc-v/board/Kconfig +++ b/bsp/cvitek/cv18xx_risc-v/board/Kconfig @@ -298,7 +298,7 @@ menu "General Drivers Configuration" menuconfig BSP_USING_TIMER bool "Enable TIMER" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIMER config BSP_USING_TIMER0 bool "Enable TIMER0" diff --git a/bsp/cvitek/drivers/drv_timer.c b/bsp/cvitek/drivers/drv_timer.c index 4028b77d17e..024282ad858 100644 --- a/bsp/cvitek/drivers/drv_timer.c +++ b/bsp/cvitek/drivers/drv_timer.c @@ -135,16 +135,16 @@ typedef struct _timer char *name; dw_timer_regs_t *base; rt_uint32_t irqno; - rt_hwtimer_t timer; + rt_clock_timer_t timer; }_timer_t; -static void _timer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t _timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode); -static void _timer_stop(rt_hwtimer_t *timer); -static rt_uint32_t _timer_count_get(rt_hwtimer_t *timer); -static rt_err_t _timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void _timer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t _timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode); +static void _timer_stop(rt_clock_timer_t *timer); +static rt_uint32_t _timer_count_get(rt_clock_timer_t *timer); +static rt_err_t _timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); -static const struct rt_hwtimer_ops _timer_ops = { +static const struct rt_clock_timer_ops _timer_ops = { .init = _timer_init, .start = _timer_start, .stop = _timer_stop, @@ -152,11 +152,11 @@ static const struct rt_hwtimer_ops _timer_ops = { .control = _timer_control }; -static const struct rt_hwtimer_info _timer_info = { +static const struct rt_clock_timer_info _timer_info = { .maxfreq = 25000000UL, .minfreq = 25000000UL, .maxcnt = 0xFFFFFFFF, - .cntmode = HWTIMER_MODE_PERIOD + .cntmode = CLOCK_TIMER_MODE_PERIOD }; static _timer_t _timer_obj[] = @@ -333,8 +333,8 @@ static void rt_hw_hwtmr_isr(int irqno, void *param) hal_timer_clear_irq(timer_base); hal_timer_set_disable(timer_base); - rt_device_hwtimer_isr(&_tmr->timer); - if(_tmr->timer.mode == HWTIMER_MODE_PERIOD) + rt_clock_timer_isr(&_tmr->timer); + if(_tmr->timer.mode == CLOCK_TIMER_MODE_PERIOD) { hal_timer_set_enable(timer_base); hal_timer_set_unmask(timer_base); @@ -342,7 +342,7 @@ static void rt_hw_hwtmr_isr(int irqno, void *param) } } -static void _timer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void _timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { _timer_t *_tmr = rt_container_of(timer, _timer_t, timer); @@ -353,7 +353,7 @@ static void _timer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t _timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t _timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { _timer_t *_tmr = rt_container_of(timer, _timer_t, timer); uint32_t tmp_load = cnt; @@ -375,7 +375,7 @@ static rt_err_t _timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mo return RT_EOK; } -static void _timer_stop(rt_hwtimer_t *timer) +static void _timer_stop(rt_clock_timer_t *timer) { _timer_t *_tmr = rt_container_of(timer, _timer_t, timer); @@ -383,7 +383,7 @@ static void _timer_stop(rt_hwtimer_t *timer) hal_timer_set_disable(_tmr->base); } -static rt_uint32_t _timer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t _timer_count_get(rt_clock_timer_t *timer) { _timer_t *_tmr = rt_container_of(timer, _timer_t, timer); rt_uint32_t cnt = hal_timer_get_current(_tmr->base); @@ -391,23 +391,23 @@ static rt_uint32_t _timer_count_get(rt_hwtimer_t *timer) return cnt; } -static rt_err_t _timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t _timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t err = RT_EOK; _timer_t *_tmr = rt_container_of(timer, _timer_t, timer); switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: err = -RT_ERROR; break; - case HWTIMER_CTRL_INFO_GET: - *(rt_hwtimer_t*)args = _tmr->timer; + case CLOCK_TIMER_CTRL_INFO_GET: + *(rt_clock_timer_t*)args = _tmr->timer; break; - case HWTIMER_CTRL_MODE_SET: + case CLOCK_TIMER_CTRL_MODE_SET: _tmr->timer.mode = *(rt_uint32_t*)args; break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: _timer_stop(timer); break; default: @@ -428,7 +428,7 @@ int rt_hw_timer_init(void) _timer_obj[i].timer.info = &_timer_info; _timer_obj[i].timer.ops = &_timer_ops; - ret = rt_device_hwtimer_register(&_timer_obj[i].timer, _timer_obj[i].name, &_timer_obj[i]); + ret = rt_clock_timer_register(&_timer_obj[i].timer, _timer_obj[i].name, &_timer_obj[i]); if (ret != RT_EOK) { LOG_E("%s register failed", _timer_obj[i].name); diff --git a/bsp/essemi/es32f0654/drivers/ES/Kconfig b/bsp/essemi/es32f0654/drivers/ES/Kconfig index 6c8b9ba197c..7780e9e4779 100644 --- a/bsp/essemi/es32f0654/drivers/ES/Kconfig +++ b/bsp/essemi/es32f0654/drivers/ES/Kconfig @@ -89,50 +89,50 @@ menu "PWM Drivers" endmenu menu "HWtimer Drivers" - config BSP_USING_AD16C4T0_HWTIMER + config BSP_USING_AD16C4T0_CLOCK_TIMER bool "Register timer0" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n depends on !BSP_USING_AD16C4T0_PWM - config BSP_USING_GP16C4T0_HWTIMER + config BSP_USING_GP16C4T0_CLOCK_TIMER bool "Register timer1" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n depends on !BSP_USING_GP16C4T0_PWM - config BSP_USING_GP16C2T0_HWTIMER + config BSP_USING_GP16C2T0_CLOCK_TIMER bool "Register timer2" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n depends on !BSP_USING_GP16C2T0_PWM - config BSP_USING_GP16C2T1_HWTIMER + config BSP_USING_GP16C2T1_CLOCK_TIMER bool "Register timer3" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n depends on !BSP_USING_GP16C2T1_PWM - config BSP_USING_BS16T0_HWTIMER + config BSP_USING_BS16T0_CLOCK_TIMER bool "Register timer4" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n - config BSP_USING_BS16T1_HWTIMER + config BSP_USING_BS16T1_CLOCK_TIMER bool "Register timer5" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n depends on !BSP_USING_UART2 - config BSP_USING_BS16T2_HWTIMER + config BSP_USING_BS16T2_CLOCK_TIMER bool "Register timer6" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n depends on !BSP_USING_UART3 - config BSP_USING_BS16T3_HWTIMER + config BSP_USING_BS16T3_CLOCK_TIMER bool "Register timer7" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n endmenu diff --git a/bsp/essemi/es32f0654/drivers/ES/es_conf_info_clock_timer.h b/bsp/essemi/es32f0654/drivers/ES/es_conf_info_clock_timer.h new file mode 100644 index 00000000000..c4ec5a21e49 --- /dev/null +++ b/bsp/essemi/es32f0654/drivers/ES/es_conf_info_clock_timer.h @@ -0,0 +1,103 @@ +/* + * Change Logs: + * Date Author Notes + * 2021-04-20 liuhy the first version + * + * Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#ifndef __ES_CONF_INFO_CLOCK_TIMER_H__ +#define __ES_CONF_INFO_CLOCK_TIMER_H__ + +#include +#include + +#define ES_C_CLOCK_TIMER_MODE_UP CLOCK_TIMER_CNTMODE_UP +#define ES_C_CLOCK_TIMER_MODE_DOWN CLOCK_TIMER_CNTMODE_DW + +/* CLOCK_TIMER 配置 */ + +/* codes_main */ + + + +#ifndef ES_AD16C4T0_CLOCK_TIMER_MODE +#define ES_AD16C4T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif + +#ifndef ES_GP16C4T0_CLOCK_TIMER_MODE +#define ES_GP16C4T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP16C2T0_CLOCK_TIMER_MODE +#define ES_GP16C2T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP1624T1_CLOCK_TIMER_MODE +#define ES_GP16C2T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T0_CLOCK_TIMER_MODE +#define ES_BS16T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T1_CLOCK_TIMER_MODE +#define ES_BS16T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T2_CLOCK_TIMER_MODE +#define ES_BS16T2_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T3_CLOCK_TIMER_MODE +#define ES_BS16T3_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif + + + + +#define ES_AD16C4T0_CLOCK_TIMER_PRES 1 +#define ES_GP16C4T0_CLOCK_TIMER_PRES 1 +#define ES_GP16C2T0_CLOCK_TIMER_PRES 1 +#define ES_GP16C2T1_CLOCK_TIMER_PRES 1 +#define ES_BS16T0_CLOCK_TIMER_PRES 1 +#define ES_BS16T1_CLOCK_TIMER_PRES 1 +#define ES_BS16T2_CLOCK_TIMER_PRES 1 +#define ES_BS16T3_CLOCK_TIMER_PRES 1 + +#ifndef ES_DEVICE_NAME_AD16C4T0_CLOCK_TIMER +#define ES_DEVICE_NAME_AD16C4T0_CLOCK_TIMER "timer0" +#endif +#ifndef ES_DEVICE_NAME_GP16C4T0_CLOCK_TIMER +#define ES_DEVICE_NAME_GP16C4T0_CLOCK_TIMER "timer1" +#endif +#ifndef ES_DEVICE_NAME_GP16C2T0_CLOCK_TIMER +#define ES_DEVICE_NAME_GP16C2T0_CLOCK_TIMER "timer2" +#endif +#ifndef ES_DEVICE_NAME_GP16C2T1_CLOCK_TIMER +#define ES_DEVICE_NAME_GP16C2T1_CLOCK_TIMER "timer3" +#endif +#ifndef ES_DEVICE_NAME_BS16T0_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T0_CLOCK_TIMER "timer4" +#endif +#ifndef ES_DEVICE_NAME_BS16T1_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T1_CLOCK_TIMER "timer5" +#endif +#ifndef ES_DEVICE_NAME_BS16T2_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T2_CLOCK_TIMER "timer6" +#endif +#ifndef ES_DEVICE_NAME_BS16T3_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T3_CLOCK_TIMER "timer7" +#endif + + +#endif diff --git a/bsp/essemi/es32f0654/drivers/ES/es_conf_info_hwtimer.h b/bsp/essemi/es32f0654/drivers/ES/es_conf_info_hwtimer.h deleted file mode 100644 index 100b2e626be..00000000000 --- a/bsp/essemi/es32f0654/drivers/ES/es_conf_info_hwtimer.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Change Logs: - * Date Author Notes - * 2021-04-20 liuhy the first version - * - * Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - */ - -#ifndef __ES_CONF_INFO_HWTIMER_H__ -#define __ES_CONF_INFO_HWTIMER_H__ - -#include -#include - -#define ES_C_HWTIMER_MODE_UP HWTIMER_CNTMODE_UP -#define ES_C_HWTIMER_MODE_DOWN HWTIMER_CNTMODE_DW - -/* HWTIMER 配置 */ - -/* codes_main */ - - - -#ifndef ES_AD16C4T0_HWTIMER_MODE -#define ES_AD16C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif - -#ifndef ES_GP16C4T0_HWTIMER_MODE -#define ES_GP16C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP16C2T0_HWTIMER_MODE -#define ES_GP16C2T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP1624T1_HWTIMER_MODE -#define ES_GP16C2T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T0_HWTIMER_MODE -#define ES_BS16T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T1_HWTIMER_MODE -#define ES_BS16T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T2_HWTIMER_MODE -#define ES_BS16T2_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T3_HWTIMER_MODE -#define ES_BS16T3_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif - - - - -#define ES_AD16C4T0_HWTIMER_PRES 1 -#define ES_GP16C4T0_HWTIMER_PRES 1 -#define ES_GP16C2T0_HWTIMER_PRES 1 -#define ES_GP16C2T1_HWTIMER_PRES 1 -#define ES_BS16T0_HWTIMER_PRES 1 -#define ES_BS16T1_HWTIMER_PRES 1 -#define ES_BS16T2_HWTIMER_PRES 1 -#define ES_BS16T3_HWTIMER_PRES 1 - -#ifndef ES_DEVICE_NAME_AD16C4T0_HWTIMER -#define ES_DEVICE_NAME_AD16C4T0_HWTIMER "timer0" -#endif -#ifndef ES_DEVICE_NAME_GP16C4T0_HWTIMER -#define ES_DEVICE_NAME_GP16C4T0_HWTIMER "timer1" -#endif -#ifndef ES_DEVICE_NAME_GP16C2T0_HWTIMER -#define ES_DEVICE_NAME_GP16C2T0_HWTIMER "timer2" -#endif -#ifndef ES_DEVICE_NAME_GP16C2T1_HWTIMER -#define ES_DEVICE_NAME_GP16C2T1_HWTIMER "timer3" -#endif -#ifndef ES_DEVICE_NAME_BS16T0_HWTIMER -#define ES_DEVICE_NAME_BS16T0_HWTIMER "timer4" -#endif -#ifndef ES_DEVICE_NAME_BS16T1_HWTIMER -#define ES_DEVICE_NAME_BS16T1_HWTIMER "timer5" -#endif -#ifndef ES_DEVICE_NAME_BS16T2_HWTIMER -#define ES_DEVICE_NAME_BS16T2_HWTIMER "timer6" -#endif -#ifndef ES_DEVICE_NAME_BS16T3_HWTIMER -#define ES_DEVICE_NAME_BS16T3_HWTIMER "timer7" -#endif - - -#endif diff --git a/bsp/essemi/es32f0654/drivers/Kconfig b/bsp/essemi/es32f0654/drivers/Kconfig index 30e2756e404..863ed91bdc4 100644 --- a/bsp/essemi/es32f0654/drivers/Kconfig +++ b/bsp/essemi/es32f0654/drivers/Kconfig @@ -43,8 +43,8 @@ endif bool "BSP_USING_EXAMPLE_ADC_VOL" default n - config BSP_USING_EXAMPLE_HWTIMER - bool "BSP_USING_EXAMPLE_HWTIMER" + config BSP_USING_EXAMPLE_CLOCK_TIMER + bool "BSP_USING_EXAMPLE_CLOCK_TIMER" default n config BSP_USING_EXAMPLE_I2C diff --git a/bsp/essemi/es32f0654/drivers/SConscript b/bsp/essemi/es32f0654/drivers/SConscript index 0e34f50b2f3..832f91ae8cf 100644 --- a/bsp/essemi/es32f0654/drivers/SConscript +++ b/bsp/essemi/es32f0654/drivers/SConscript @@ -45,15 +45,15 @@ if GetDepend(['BSP_USING_RTC']): if GetDepend('BSP_USING_SPI_FLASH'): src += ['drv_spiflash.c'] -# add hwtimer driver code -if GetDepend('BSP_USING_AD16C4T0_HWTIMER') or GetDepend('BSP_USING_AD16C4T1_HWTIMER') or \ - GetDepend('BSP_USING_GP32C4T0_HWTIMER') or GetDepend('BSP_USING_GP32C4T1_HWTIMER') or \ - GetDepend('BSP_USING_GP16C4T0_HWTIMER') or GetDepend('BSP_USING_GP16C4T1_HWTIMER') or \ - GetDepend('BSP_USING_GP16C2T0_HWTIMER') or GetDepend('BSP_USING_GP16C2T1_HWTIMER') or \ - GetDepend('BSP_USING_GP16C4T0_HWTIMER') or GetDepend('BSP_USING_GP16C4T1_HWTIMER') or \ - GetDepend('BSP_USING_BS16T0_HWTIMER') or GetDepend('BSP_USING_BS16T1_HWTIMERIMER') or \ - GetDepend('BSP_USING_BS16T2_HWTIMER') or GetDepend('BSP_USING_BS16T3_HWTIMER'): - src += ['drv_hwtimer.c'] +# add clock_timer driver code +if GetDepend('BSP_USING_AD16C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_AD16C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP32C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP32C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP16C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP16C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP16C2T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP16C2T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP16C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP16C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_BS16T0_CLOCK_TIMER') or GetDepend('BSP_USING_BS16T1_CLOCK_TIMERIMER') or \ + GetDepend('BSP_USING_BS16T2_CLOCK_TIMER') or GetDepend('BSP_USING_BS16T3_CLOCK_TIMER'): + src += ['drv_timer.c'] # add pwm driver code if GetDepend('BSP_USING_AD16C4T0_PWM') or GetDepend('BSP_USING_AD16C4T1_PWM') or \ @@ -77,8 +77,8 @@ include_path = [cwd + '/ES'] if GetDepend('BSP_USING_EXAMPLE_ADC_VOL'): src += ['bsp_driver_example/adc_vol_sample.c'] -if GetDepend('BSP_USING_EXAMPLE_HWTIMER'): - src += ['bsp_driver_example/hwtimer_sample.c'] +if GetDepend('BSP_USING_EXAMPLE_CLOCK_TIMER'): + src += ['bsp_driver_example/clock_timer_sample.c'] if GetDepend('BSP_USING_EXAMPLE_I2C'): src += ['bsp_driver_example/i2c_sample.c'] diff --git a/bsp/essemi/es32f0654/drivers/drv_hwtimer.c b/bsp/essemi/es32f0654/drivers/drv_hwtimer.c deleted file mode 100644 index 498d6c3a463..00000000000 --- a/bsp/essemi/es32f0654/drivers/drv_hwtimer.c +++ /dev/null @@ -1,453 +0,0 @@ -/* - * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * Change Logs: - * Date Author Notes - * 2019-3-19 wangyq the first version - * 2019-11-01 wangyq update libraries - * 2021-04-20 liuhy the second version - */ - -#include -#include -#include -#include -#include - - -#ifdef RT_USING_HWTIMER - -struct es32f0_hwtimer_dev -{ - rt_hwtimer_t parent; - timer_handle_t *hwtimer_periph; - IRQn_Type IRQn; -}; - -#ifdef BSP_USING_AD16C4T0_HWTIMER -static struct es32f0_hwtimer_dev ad16c4t0_hwtimer; - -static struct rt_hwtimer_info ad16c4t0_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_AD16C4T0_HWTIMER_MODE -}; - -void AD16C4T0_BRK_UP_TRIG_COM_Handler(void) -{ - ald_timer_clear_flag_status(ad16c4t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&ad16c4t0_hwtimer.parent); -} - -#endif - -#ifdef BSP_USING_GP16C4T0_HWTIMER - -static struct es32f0_hwtimer_dev gp16c4t0_hwtimer; - -static struct rt_hwtimer_info gp16c4t0_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_GP16C4T0_HWTIMER_MODE -}; - -void GP16C4T0_LCD_Handler(void) -{ - ald_timer_clear_flag_status(gp16c4t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&gp16c4t0_hwtimer.parent); -} - -#endif - -#ifdef BSP_USING_GP16C2T0_HWTIMER - -static struct es32f0_hwtimer_dev gp16c2t0_hwtimer; - -static struct rt_hwtimer_info gp16c2t0_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_GP16C2T0_HWTIMER_MODE -}; - -void GP16C2T0_Handler(void) -{ - ald_timer_clear_flag_status(gp16c2t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&gp16c2t0_hwtimer.parent); -} - -#endif - -#ifdef BSP_USING_GP16C2T1_HWTIMER - -static struct es32f0_hwtimer_dev gp16c2t1_hwtimer; - -static struct rt_hwtimer_info gp16c2t1_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_GP16C2T1_HWTIMER_MODE -}; - -void GP16C2T1_Handler(void) -{ - ald_timer_clear_flag_status(gp16c2t1_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&gp16c2t1_hwtimer.parent); -} - -#endif - -#ifdef BSP_USING_BS16T0_HWTIMER - -static struct es32f0_hwtimer_dev bs16t0_hwtimer; - -static struct rt_hwtimer_info bs16t0_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_BS16T0_HWTIMER_MODE -}; - -void BS16T0_Handler(void) -{ - ald_timer_clear_flag_status(bs16t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&bs16t0_hwtimer.parent); -} - -#endif - -#ifdef BSP_USING_BS16T1_HWTIMER - -static struct es32f0_hwtimer_dev bs16t1_hwtimer; - -static struct rt_hwtimer_info bs16t1_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_BS16T1_HWTIMER_MODE -}; - -void BS16T1_UART2_Handler(void) -{ - ald_timer_clear_flag_status(bs16t1_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&bs16t1_hwtimer.parent); -} - -#endif - -#ifdef BSP_USING_BS16T2_HWTIMER - -static struct es32f0_hwtimer_dev bs16t2_hwtimer; - -static struct rt_hwtimer_info bs16t2_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_BS16T2_HWTIMER_MODE -}; - -void BS16T2_UART3_Handler(void) -{ - ald_timer_clear_flag_status(bs16t2_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&bs16t2_hwtimer.parent); -} - -#endif - -#ifdef BSP_USING_BS16T3_HWTIMER - -static struct es32f0_hwtimer_dev bs16t3_hwtimer; - -static struct rt_hwtimer_info bs16t3_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_BS16T3_HWTIMER_MODE -}; - -void BS16T3_DAC0_Handler(void) -{ - ald_timer_clear_flag_status(bs16t3_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&bs16t3_hwtimer.parent); -} - -#endif - -static void es32f0_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) -{ - struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data; - - struct rt_hwtimer_info *hwtimer_info = (struct rt_hwtimer_info *)timer->info; - - - RT_ASSERT(hwtimer != RT_NULL); - - if (1 == state) - { - ald_timer_base_init(hwtimer->hwtimer_periph); - ald_timer_interrupt_config(hwtimer->hwtimer_periph, TIMER_IT_UPDATE, ENABLE); - NVIC_EnableIRQ(hwtimer->IRQn); - } - - hwtimer->parent.freq = ald_cmu_get_pclk1_clock()/((hwtimer->hwtimer_periph->perh->PRES & 0xFFFF)+1); - hwtimer_info->maxfreq = hwtimer->parent.freq; - hwtimer_info->minfreq = (hwtimer->parent.freq)/0xFFFF; -} - -static rt_err_t es32f0_hwtimer_start(rt_hwtimer_t *timer, - rt_uint32_t cnt, - rt_hwtimer_mode_t mode) -{ - struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data; - - RT_ASSERT(hwtimer != RT_NULL); - - WRITE_REG(hwtimer->hwtimer_periph->perh->AR, cnt); - ald_timer_base_start(hwtimer->hwtimer_periph); - - return RT_EOK; -} - -static void es32f0_hwtimer_stop(rt_hwtimer_t *timer) -{ - struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data; - - RT_ASSERT(hwtimer != RT_NULL); - - ald_timer_base_stop(hwtimer->hwtimer_periph); -} - -static rt_uint32_t es32f0_hwtimer_count_get(rt_hwtimer_t *timer) -{ - struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data; - uint32_t hwtimer_count = 0; - - RT_ASSERT(hwtimer != RT_NULL); - - hwtimer_count = READ_REG(hwtimer->hwtimer_periph->perh->COUNT); - - return hwtimer_count; -} - -static rt_err_t es32f0_hwtimer_control(rt_hwtimer_t *timer, - rt_uint32_t cmd, - void *args) -{ - rt_err_t ret = RT_EOK; - rt_uint32_t freq = 0; - struct es32f0_hwtimer_dev *hwtimer = (struct es32f0_hwtimer_dev *)timer->parent.user_data; - - RT_ASSERT(hwtimer != RT_NULL); - - switch (cmd) - { - case HWTIMER_CTRL_FREQ_SET: - freq = *(rt_uint32_t *)args; - - ret = -RT_ERROR; - - if(freq) - { - double temp,target; - temp = (double)ald_cmu_get_pclk1_clock(); - target = temp/freq; - - if(target < 0x10001) /*最大分频 = max(PRES)+1*/ - { - temp = target - (int)(target); - - if((temp > 0.998)&&(target < 0x10000)) - { - hwtimer->hwtimer_periph->perh->PRES = (uint32_t)target; - ret = RT_EOK; - } - if((temp < 0.002)&&(target >= 0x1)) - { - hwtimer->hwtimer_periph->perh->PRES = (uint32_t)target - 1; - ret = RT_EOK; - } - - } - - if(ret == RT_EOK) /*更新信息*/ - hwtimer->parent.freq = ald_cmu_get_pclk1_clock()/((hwtimer->hwtimer_periph->perh->PRES & 0xFFFF)+1); - - } - - break; - - case HWTIMER_CTRL_STOP: - ald_timer_base_stop(hwtimer->hwtimer_periph); - break; - - default: - ret = -RT_EINVAL; - break; - } - - return ret; -} - -static struct rt_hwtimer_ops es32f0_hwtimer_ops = -{ - es32f0_hwtimer_init, - es32f0_hwtimer_start, - es32f0_hwtimer_stop, - es32f0_hwtimer_count_get, - es32f0_hwtimer_control -}; - -int rt_hw_hwtimer_init(void) -{ - rt_err_t ret = RT_EOK; - -#ifdef BSP_USING_AD16C4T0_HWTIMER - static timer_handle_t ad16c4t0_hwtimer_periph; - - ad16c4t0_hwtimer_periph.perh = AD16C4T0; - ad16c4t0_hwtimer.IRQn = AD16C4T0_BRK_UP_TRIG_COM_IRQn; - - ad16c4t0_hwtimer_periph.init.prescaler = ES_AD16C4T0_HWTIMER_PRES - 1; - ad16c4t0_hwtimer_periph.init.mode = ( ES_AD16C4T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - ad16c4t0_hwtimer.hwtimer_periph = &ad16c4t0_hwtimer_periph; - - ad16c4t0_hwtimer.parent.info = &ad16c4t0_info; - ad16c4t0_hwtimer.parent.ops = &es32f0_hwtimer_ops; - ret = rt_device_hwtimer_register(&ad16c4t0_hwtimer.parent, ES_DEVICE_NAME_AD16C4T0_HWTIMER, &ad16c4t0_hwtimer); -#endif - -#ifdef BSP_USING_GP16C4T0_HWTIMER - static timer_handle_t gp16c4t0_hwtimer_periph; - - gp16c4t0_hwtimer_periph.perh = GP16C4T0; - gp16c4t0_hwtimer.IRQn = GP16C4T0_LCD_IRQn; - - gp16c4t0_hwtimer_periph.init.prescaler = ES_GP16C4T0_HWTIMER_PRES - 1; - gp16c4t0_hwtimer_periph.init.mode = ( ES_GP16C4T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - gp16c4t0_hwtimer.hwtimer_periph = &gp16c4t0_hwtimer_periph; - - gp16c4t0_hwtimer.parent.info = &gp16c4t0_info; - gp16c4t0_hwtimer.parent.ops = &es32f0_hwtimer_ops; - ret = rt_device_hwtimer_register(&gp16c4t0_hwtimer.parent, ES_DEVICE_NAME_GP16C4T0_HWTIMER, &gp16c4t0_hwtimer); -#endif - -#ifdef BSP_USING_GP16C2T0_HWTIMER - static timer_handle_t gp16c2t0_hwtimer_periph; - - gp16c2t0_hwtimer_periph.perh = GP16C2T0; - gp16c2t0_hwtimer.IRQn = GP16C2T0_IRQn; - - gp16c2t0_hwtimer_periph.init.prescaler = ES_GP16C2T0_HWTIMER_PRES - 1; - gp16c2t0_hwtimer_periph.init.mode = ( ES_GP16C2T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - gp16c2t0_hwtimer.hwtimer_periph = &gp16c2t0_hwtimer_periph; - - gp16c2t0_hwtimer.parent.info = &gp16c2t0_info; - gp16c2t0_hwtimer.parent.ops = &es32f0_hwtimer_ops; - ret = rt_device_hwtimer_register(&gp16c2t0_hwtimer.parent, ES_DEVICE_NAME_GP16C2T0_HWTIMER, &gp16c2t0_hwtimer); -#endif - -#ifdef BSP_USING_GP16C2T1_HWTIMER - static timer_handle_t gp16c2t1_hwtimer_periph; - - gp16c2t1_hwtimer_periph.perh = GP16C2T1; - gp16c2t1_hwtimer.IRQn = GP16C2T1_IRQn; - - gp16c2t1_hwtimer_periph.init.prescaler = ES_GP16C2T1_HWTIMER_PRES - 1; - gp16c2t1_hwtimer_periph.init.mode = ( ES_GP16C2T1_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - gp16c2t1_hwtimer.hwtimer_periph = &gp16c2t1_hwtimer_periph; - - gp16c2t1_hwtimer.parent.info = &gp16c2t1_info; - gp16c2t1_hwtimer.parent.ops = &es32f0_hwtimer_ops; - ret = rt_device_hwtimer_register(&gp16c2t1_hwtimer.parent, ES_DEVICE_NAME_GP16C2T1_HWTIMER, &gp16c2t1_hwtimer); -#endif - -#ifdef BSP_USING_BS16T0_HWTIMER - static timer_handle_t bs16t0_hwtimer_periph; - - bs16t0_hwtimer_periph.perh = BS16T0; - bs16t0_hwtimer.IRQn = BS16T0_IRQn; - - bs16t0_hwtimer_periph.init.prescaler = ES_BS16T0_HWTIMER_PRES - 1; - bs16t0_hwtimer_periph.init.mode = ( ES_BS16T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - bs16t0_hwtimer.hwtimer_periph = &bs16t0_hwtimer_periph; - - bs16t0_hwtimer.parent.info = &bs16t0_info; - bs16t0_hwtimer.parent.ops = &es32f0_hwtimer_ops; - ret = rt_device_hwtimer_register(&bs16t0_hwtimer.parent, ES_DEVICE_NAME_BS16T0_HWTIMER, &bs16t0_hwtimer); -#endif - -#ifdef BSP_USING_BS16T1_HWTIMER - static timer_handle_t bs16t1_hwtimer_periph; - - bs16t1_hwtimer_periph.perh = BS16T1; - bs16t1_hwtimer.IRQn = BS16T1_UART2_IRQn; - - bs16t1_hwtimer_periph.init.prescaler = ES_BS16T1_HWTIMER_PRES - 1; - bs16t1_hwtimer_periph.init.mode = ( ES_BS16T1_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - bs16t1_hwtimer.hwtimer_periph = &bs16t1_hwtimer_periph; - - bs16t1_hwtimer.parent.info = &bs16t1_info; - bs16t1_hwtimer.parent.ops = &es32f0_hwtimer_ops; - ret = rt_device_hwtimer_register(&bs16t1_hwtimer.parent, ES_DEVICE_NAME_BS16T1_HWTIMER, &bs16t1_hwtimer); -#endif - -#ifdef BSP_USING_BS16T2_HWTIMER - static timer_handle_t bs16t2_hwtimer_periph; - - bs16t2_hwtimer_periph.perh = BS16T2; - bs16t2_hwtimer.IRQn = BS16T2_UART3_IRQn; - - bs16t2_hwtimer_periph.init.prescaler = ES_BS16T2_HWTIMER_PRES - 1; - bs16t2_hwtimer_periph.init.mode = ( ES_BS16T2_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - bs16t2_hwtimer.hwtimer_periph = &bs16t2_hwtimer_periph; - - bs16t2_hwtimer.parent.info = &bs16t2_info; - bs16t2_hwtimer.parent.ops = &es32f0_hwtimer_ops; - ret = rt_device_hwtimer_register(&bs16t2_hwtimer.parent, ES_DEVICE_NAME_BS16T2_HWTIMER, &bs16t2_hwtimer); -#endif - -#ifdef BSP_USING_BS16T3_HWTIMER - static timer_handle_t bs16t3_hwtimer_periph; - - bs16t3_hwtimer_periph.perh = BS16T3; - bs16t3_hwtimer.IRQn = BS16T3_DAC0_IRQn; - - bs16t3_hwtimer_periph.init.prescaler = ES_BS16T3_HWTIMER_PRES - 1; - bs16t3_hwtimer_periph.init.mode = ( ES_BS16T3_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - bs16t3_hwtimer.hwtimer_periph = &bs16t3_hwtimer_periph; - - bs16t3_hwtimer.parent.info = &bs16t3_info; - bs16t3_hwtimer.parent.ops = &es32f0_hwtimer_ops; - ret = rt_device_hwtimer_register(&bs16t3_hwtimer.parent, ES_DEVICE_NAME_BS16T3_HWTIMER, &bs16t3_hwtimer); -#endif - - - return ret; -} -INIT_BOARD_EXPORT(rt_hw_hwtimer_init); - -#endif diff --git a/bsp/essemi/es32f0654/drivers/drv_timer.c b/bsp/essemi/es32f0654/drivers/drv_timer.c new file mode 100644 index 00000000000..4ae26c0c78f --- /dev/null +++ b/bsp/essemi/es32f0654/drivers/drv_timer.c @@ -0,0 +1,453 @@ +/* + * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * Change Logs: + * Date Author Notes + * 2019-3-19 wangyq the first version + * 2019-11-01 wangyq update libraries + * 2021-04-20 liuhy the second version + */ + +#include +#include +#include +#include +#include + + +#ifdef RT_USING_CLOCK_TIME + +struct es32f0_clock_timer_dev +{ + rt_clock_timer_t parent; + timer_handle_t *clock_timer_periph; + IRQn_Type IRQn; +}; + +#ifdef BSP_USING_AD16C4T0_CLOCK_TIMER +static struct es32f0_clock_timer_dev ad16c4t0_clock_timer; + +static struct rt_clock_timer_info ad16c4t0_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_AD16C4T0_CLOCK_TIMER_MODE +}; + +void AD16C4T0_BRK_UP_TRIG_COM_Handler(void) +{ + ald_timer_clear_flag_status(ad16c4t0_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&ad16c4t0_clock_timer.parent); +} + +#endif + +#ifdef BSP_USING_GP16C4T0_CLOCK_TIMER + +static struct es32f0_clock_timer_dev gp16c4t0_clock_timer; + +static struct rt_clock_timer_info gp16c4t0_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_GP16C4T0_CLOCK_TIMER_MODE +}; + +void GP16C4T0_LCD_Handler(void) +{ + ald_timer_clear_flag_status(gp16c4t0_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&gp16c4t0_clock_timer.parent); +} + +#endif + +#ifdef BSP_USING_GP16C2T0_CLOCK_TIMER + +static struct es32f0_clock_timer_dev gp16c2t0_clock_timer; + +static struct rt_clock_timer_info gp16c2t0_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_GP16C2T0_CLOCK_TIMER_MODE +}; + +void GP16C2T0_Handler(void) +{ + ald_timer_clear_flag_status(gp16c2t0_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&gp16c2t0_clock_timer.parent); +} + +#endif + +#ifdef BSP_USING_GP16C2T1_CLOCK_TIMER + +static struct es32f0_clock_timer_dev gp16c2t1_clock_timer; + +static struct rt_clock_timer_info gp16c2t1_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_GP16C2T1_CLOCK_TIMER_MODE +}; + +void GP16C2T1_Handler(void) +{ + ald_timer_clear_flag_status(gp16c2t1_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&gp16c2t1_clock_timer.parent); +} + +#endif + +#ifdef BSP_USING_BS16T0_CLOCK_TIMER + +static struct es32f0_clock_timer_dev bs16t0_clock_timer; + +static struct rt_clock_timer_info bs16t0_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_BS16T0_CLOCK_TIMER_MODE +}; + +void BS16T0_Handler(void) +{ + ald_timer_clear_flag_status(bs16t0_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&bs16t0_clock_timer.parent); +} + +#endif + +#ifdef BSP_USING_BS16T1_CLOCK_TIMER + +static struct es32f0_clock_timer_dev bs16t1_clock_timer; + +static struct rt_clock_timer_info bs16t1_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_BS16T1_CLOCK_TIMER_MODE +}; + +void BS16T1_UART2_Handler(void) +{ + ald_timer_clear_flag_status(bs16t1_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&bs16t1_clock_timer.parent); +} + +#endif + +#ifdef BSP_USING_BS16T2_CLOCK_TIMER + +static struct es32f0_clock_timer_dev bs16t2_clock_timer; + +static struct rt_clock_timer_info bs16t2_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_BS16T2_CLOCK_TIMER_MODE +}; + +void BS16T2_UART3_Handler(void) +{ + ald_timer_clear_flag_status(bs16t2_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&bs16t2_clock_timer.parent); +} + +#endif + +#ifdef BSP_USING_BS16T3_CLOCK_TIMER + +static struct es32f0_clock_timer_dev bs16t3_clock_timer; + +static struct rt_clock_timer_info bs16t3_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_BS16T3_CLOCK_TIMER_MODE +}; + +void BS16T3_DAC0_Handler(void) +{ + ald_timer_clear_flag_status(bs16t3_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&bs16t3_clock_timer.parent); +} + +#endif + +static void es32f0_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) +{ + struct es32f0_clock_timer_dev *clock_timer = (struct es32f0_clock_timer_dev *)timer->parent.user_data; + + struct rt_clock_timer_info *clock_timer_info = (struct rt_clock_timer_info *)timer->info; + + + RT_ASSERT(clock_timer != RT_NULL); + + if (1 == state) + { + ald_timer_base_init(clock_timer->clock_timer_periph); + ald_timer_interrupt_config(clock_timer->clock_timer_periph, TIMER_IT_UPDATE, ENABLE); + NVIC_EnableIRQ(clock_timer->IRQn); + } + + clock_timer->parent.freq = ald_cmu_get_pclk1_clock()/((clock_timer->clock_timer_periph->perh->PRES & 0xFFFF)+1); + clock_timer_info->maxfreq = clock_timer->parent.freq; + clock_timer_info->minfreq = (clock_timer->parent.freq)/0xFFFF; +} + +static rt_err_t es32f0_clock_timer_start(rt_clock_timer_t *timer, + rt_uint32_t cnt, + rt_clock_timer_mode_t mode) +{ + struct es32f0_clock_timer_dev *clock_timer = (struct es32f0_clock_timer_dev *)timer->parent.user_data; + + RT_ASSERT(clock_timer != RT_NULL); + + WRITE_REG(clock_timer->clock_timer_periph->perh->AR, cnt); + ald_timer_base_start(clock_timer->clock_timer_periph); + + return RT_EOK; +} + +static void es32f0_clock_timer_stop(rt_clock_timer_t *timer) +{ + struct es32f0_clock_timer_dev *clock_timer = (struct es32f0_clock_timer_dev *)timer->parent.user_data; + + RT_ASSERT(clock_timer != RT_NULL); + + ald_timer_base_stop(clock_timer->clock_timer_periph); +} + +static rt_uint32_t es32f0_clock_timer_count_get(rt_clock_timer_t *timer) +{ + struct es32f0_clock_timer_dev *clock_timer = (struct es32f0_clock_timer_dev *)timer->parent.user_data; + uint32_t clock_timer_count = 0; + + RT_ASSERT(clock_timer != RT_NULL); + + clock_timer_count = READ_REG(clock_timer->clock_timer_periph->perh->COUNT); + + return clock_timer_count; +} + +static rt_err_t es32f0_clock_timer_control(rt_clock_timer_t *timer, + rt_uint32_t cmd, + void *args) +{ + rt_err_t ret = RT_EOK; + rt_uint32_t freq = 0; + struct es32f0_clock_timer_dev *clock_timer = (struct es32f0_clock_timer_dev *)timer->parent.user_data; + + RT_ASSERT(clock_timer != RT_NULL); + + switch (cmd) + { + case CLOCK_TIMER_CTRL_FREQ_SET: + freq = *(rt_uint32_t *)args; + + ret = -RT_ERROR; + + if(freq) + { + double temp,target; + temp = (double)ald_cmu_get_pclk1_clock(); + target = temp/freq; + + if(target < 0x10001) /*最大分频 = max(PRES)+1*/ + { + temp = target - (int)(target); + + if((temp > 0.998)&&(target < 0x10000)) + { + clock_timer->clock_timer_periph->perh->PRES = (uint32_t)target; + ret = RT_EOK; + } + if((temp < 0.002)&&(target >= 0x1)) + { + clock_timer->clock_timer_periph->perh->PRES = (uint32_t)target - 1; + ret = RT_EOK; + } + + } + + if(ret == RT_EOK) /*更新信息*/ + clock_timer->parent.freq = ald_cmu_get_pclk1_clock()/((clock_timer->clock_timer_periph->perh->PRES & 0xFFFF)+1); + + } + + break; + + case CLOCK_TIMER_CTRL_STOP: + ald_timer_base_stop(clock_timer->clock_timer_periph); + break; + + default: + ret = -RT_EINVAL; + break; + } + + return ret; +} + +static struct rt_clock_timer_ops es32f0_clock_timer_ops = +{ + es32f0_clock_timer_init, + es32f0_clock_timer_start, + es32f0_clock_timer_stop, + es32f0_clock_timer_count_get, + es32f0_clock_timer_control +}; + +int rt_hw_clock_timer_init(void) +{ + rt_err_t ret = RT_EOK; + +#ifdef BSP_USING_AD16C4T0_CLOCK_TIMER + static timer_handle_t ad16c4t0_clock_timer_periph; + + ad16c4t0_clock_timer_periph.perh = AD16C4T0; + ad16c4t0_clock_timer.IRQn = AD16C4T0_BRK_UP_TRIG_COM_IRQn; + + ad16c4t0_clock_timer_periph.init.prescaler = ES_AD16C4T0_CLOCK_TIMER_PRES - 1; + ad16c4t0_clock_timer_periph.init.mode = ( ES_AD16C4T0_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + ad16c4t0_clock_timer.clock_timer_periph = &ad16c4t0_clock_timer_periph; + + ad16c4t0_clock_timer.parent.info = &ad16c4t0_info; + ad16c4t0_clock_timer.parent.ops = &es32f0_clock_timer_ops; + ret = rt_clock_timer_register(&ad16c4t0_clock_timer.parent, ES_DEVICE_NAME_AD16C4T0_CLOCK_TIMER, &ad16c4t0_clock_timer); +#endif + +#ifdef BSP_USING_GP16C4T0_CLOCK_TIMER + static timer_handle_t gp16c4t0_clock_timer_periph; + + gp16c4t0_clock_timer_periph.perh = GP16C4T0; + gp16c4t0_clock_timer.IRQn = GP16C4T0_LCD_IRQn; + + gp16c4t0_clock_timer_periph.init.prescaler = ES_GP16C4T0_CLOCK_TIMER_PRES - 1; + gp16c4t0_clock_timer_periph.init.mode = ( ES_GP16C4T0_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + gp16c4t0_clock_timer.clock_timer_periph = &gp16c4t0_clock_timer_periph; + + gp16c4t0_clock_timer.parent.info = &gp16c4t0_info; + gp16c4t0_clock_timer.parent.ops = &es32f0_clock_timer_ops; + ret = rt_clock_timer_register(&gp16c4t0_clock_timer.parent, ES_DEVICE_NAME_GP16C4T0_CLOCK_TIMER, &gp16c4t0_clock_timer); +#endif + +#ifdef BSP_USING_GP16C2T0_CLOCK_TIMER + static timer_handle_t gp16c2t0_clock_timer_periph; + + gp16c2t0_clock_timer_periph.perh = GP16C2T0; + gp16c2t0_clock_timer.IRQn = GP16C2T0_IRQn; + + gp16c2t0_clock_timer_periph.init.prescaler = ES_GP16C2T0_CLOCK_TIMER_PRES - 1; + gp16c2t0_clock_timer_periph.init.mode = ( ES_GP16C2T0_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + gp16c2t0_clock_timer.clock_timer_periph = &gp16c2t0_clock_timer_periph; + + gp16c2t0_clock_timer.parent.info = &gp16c2t0_info; + gp16c2t0_clock_timer.parent.ops = &es32f0_clock_timer_ops; + ret = rt_clock_timer_register(&gp16c2t0_clock_timer.parent, ES_DEVICE_NAME_GP16C2T0_CLOCK_TIMER, &gp16c2t0_clock_timer); +#endif + +#ifdef BSP_USING_GP16C2T1_CLOCK_TIMER + static timer_handle_t gp16c2t1_clock_timer_periph; + + gp16c2t1_clock_timer_periph.perh = GP16C2T1; + gp16c2t1_clock_timer.IRQn = GP16C2T1_IRQn; + + gp16c2t1_clock_timer_periph.init.prescaler = ES_GP16C2T1_CLOCK_TIMER_PRES - 1; + gp16c2t1_clock_timer_periph.init.mode = ( ES_GP16C2T1_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + gp16c2t1_clock_timer.clock_timer_periph = &gp16c2t1_clock_timer_periph; + + gp16c2t1_clock_timer.parent.info = &gp16c2t1_info; + gp16c2t1_clock_timer.parent.ops = &es32f0_clock_timer_ops; + ret = rt_clock_timer_register(&gp16c2t1_clock_timer.parent, ES_DEVICE_NAME_GP16C2T1_CLOCK_TIMER, &gp16c2t1_clock_timer); +#endif + +#ifdef BSP_USING_BS16T0_CLOCK_TIMER + static timer_handle_t bs16t0_clock_timer_periph; + + bs16t0_clock_timer_periph.perh = BS16T0; + bs16t0_clock_timer.IRQn = BS16T0_IRQn; + + bs16t0_clock_timer_periph.init.prescaler = ES_BS16T0_CLOCK_TIMER_PRES - 1; + bs16t0_clock_timer_periph.init.mode = ( ES_BS16T0_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + bs16t0_clock_timer.clock_timer_periph = &bs16t0_clock_timer_periph; + + bs16t0_clock_timer.parent.info = &bs16t0_info; + bs16t0_clock_timer.parent.ops = &es32f0_clock_timer_ops; + ret = rt_clock_timer_register(&bs16t0_clock_timer.parent, ES_DEVICE_NAME_BS16T0_CLOCK_TIMER, &bs16t0_clock_timer); +#endif + +#ifdef BSP_USING_BS16T1_CLOCK_TIMER + static timer_handle_t bs16t1_clock_timer_periph; + + bs16t1_clock_timer_periph.perh = BS16T1; + bs16t1_clock_timer.IRQn = BS16T1_UART2_IRQn; + + bs16t1_clock_timer_periph.init.prescaler = ES_BS16T1_CLOCK_TIMER_PRES - 1; + bs16t1_clock_timer_periph.init.mode = ( ES_BS16T1_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + bs16t1_clock_timer.clock_timer_periph = &bs16t1_clock_timer_periph; + + bs16t1_clock_timer.parent.info = &bs16t1_info; + bs16t1_clock_timer.parent.ops = &es32f0_clock_timer_ops; + ret = rt_clock_timer_register(&bs16t1_clock_timer.parent, ES_DEVICE_NAME_BS16T1_CLOCK_TIMER, &bs16t1_clock_timer); +#endif + +#ifdef BSP_USING_BS16T2_CLOCK_TIMER + static timer_handle_t bs16t2_clock_timer_periph; + + bs16t2_clock_timer_periph.perh = BS16T2; + bs16t2_clock_timer.IRQn = BS16T2_UART3_IRQn; + + bs16t2_clock_timer_periph.init.prescaler = ES_BS16T2_CLOCK_TIMER_PRES - 1; + bs16t2_clock_timer_periph.init.mode = ( ES_BS16T2_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + bs16t2_clock_timer.clock_timer_periph = &bs16t2_clock_timer_periph; + + bs16t2_clock_timer.parent.info = &bs16t2_info; + bs16t2_clock_timer.parent.ops = &es32f0_clock_timer_ops; + ret = rt_clock_timer_register(&bs16t2_clock_timer.parent, ES_DEVICE_NAME_BS16T2_CLOCK_TIMER, &bs16t2_clock_timer); +#endif + +#ifdef BSP_USING_BS16T3_CLOCK_TIMER + static timer_handle_t bs16t3_clock_timer_periph; + + bs16t3_clock_timer_periph.perh = BS16T3; + bs16t3_clock_timer.IRQn = BS16T3_DAC0_IRQn; + + bs16t3_clock_timer_periph.init.prescaler = ES_BS16T3_CLOCK_TIMER_PRES - 1; + bs16t3_clock_timer_periph.init.mode = ( ES_BS16T3_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + bs16t3_clock_timer.clock_timer_periph = &bs16t3_clock_timer_periph; + + bs16t3_clock_timer.parent.info = &bs16t3_info; + bs16t3_clock_timer.parent.ops = &es32f0_clock_timer_ops; + ret = rt_clock_timer_register(&bs16t3_clock_timer.parent, ES_DEVICE_NAME_BS16T3_CLOCK_TIMER, &bs16t3_clock_timer); +#endif + + + return ret; +} +INIT_BOARD_EXPORT(rt_hw_clock_timer_init); + +#endif diff --git a/bsp/essemi/es32vf2264/drivers/drv_hwtimer.h b/bsp/essemi/es32f0654/drivers/drv_timer.h similarity index 86% rename from bsp/essemi/es32vf2264/drivers/drv_hwtimer.h rename to bsp/essemi/es32f0654/drivers/drv_timer.h index bbf51a47715..676ebb23583 100644 --- a/bsp/essemi/es32vf2264/drivers/drv_hwtimer.h +++ b/bsp/essemi/es32f0654/drivers/drv_timer.h @@ -21,10 +21,10 @@ * 2021-04-20 liuhy the second version */ -#ifndef DRV_HWTIMER_H__ -#define DRV_HWTIMER_H__ +#ifndef DRV_CLOCK_TIMER_H__ +#define DRV_CLOCK_TIMER_H__ -#include "es_conf_info_hwtimer.h" -int rt_hw_hwtimer_init(void); +#include "es_conf_info_clock_timer.h" +int rt_hw_clock_timer_init(void); #endif diff --git a/bsp/essemi/es32f365x/drivers/ES/Kconfig b/bsp/essemi/es32f365x/drivers/ES/Kconfig index cf90fe65c71..21ff44d6664 100644 --- a/bsp/essemi/es32f365x/drivers/ES/Kconfig +++ b/bsp/essemi/es32f365x/drivers/ES/Kconfig @@ -166,46 +166,46 @@ menu "RTC Drivers" endmenu -menu "HWTIMER Drivers" +menu "CLOCK_TIMER Drivers" - config BSP_USING_AD16C4T0_HWTIMER - bool "Register HWTIMER0 " - select RT_USING_HWTIMER + config BSP_USING_AD16C4T0_CLOCK_TIMER + bool "Register CLOCK_TIMER0 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_AD16C4T1_HWTIMER - bool "Register HWTIMER1 " - select RT_USING_HWTIMER + config BSP_USING_AD16C4T1_CLOCK_TIMER + bool "Register CLOCK_TIMER1 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_GP32C4T0_HWTIMER - bool "Register HWTIMER2 " - select RT_USING_HWTIMER + config BSP_USING_GP32C4T0_CLOCK_TIMER + bool "Register CLOCK_TIMER2 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_GP32C4T1_HWTIMER - bool "Register HWTIMER3 " - select RT_USING_HWTIMER + config BSP_USING_GP32C4T1_CLOCK_TIMER + bool "Register CLOCK_TIMER3 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_GP16C4T0_HWTIMER - bool "Register HWTIMER4 " - select RT_USING_HWTIMER + config BSP_USING_GP16C4T0_CLOCK_TIMER + bool "Register CLOCK_TIMER4 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_GP16C4T1_HWTIMER - bool "Register HWTIMER5 " - select RT_USING_HWTIMER + config BSP_USING_GP16C4T1_CLOCK_TIMER + bool "Register CLOCK_TIMER5 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_BS16T0_HWTIMER - bool "Register HWTIMER6 " - select RT_USING_HWTIMER + config BSP_USING_BS16T0_CLOCK_TIMER + bool "Register CLOCK_TIMER6 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_BS16T1_HWTIMER - bool "Register HWTIMER7 " - select RT_USING_HWTIMER + config BSP_USING_BS16T1_CLOCK_TIMER + bool "Register CLOCK_TIMER7 " + select RT_USING_CLOCK_TIME default n endmenu @@ -216,37 +216,37 @@ menu "PWM Drivers" bool "Register PWM0 " select RT_USING_PWM default n - depends on !BSP_USING_AD16C4T0_HWTIMER + depends on !BSP_USING_AD16C4T0_CLOCK_TIMER config BSP_USING_AD16C4T1_PWM bool "Register PWM1 " select RT_USING_PWM default n - depends on !BSP_USING_AD16C4T1_HWTIMER + depends on !BSP_USING_AD16C4T1_CLOCK_TIMER config BSP_USING_GP32C4T0_PWM bool "Register PWM2 " select RT_USING_PWM default n - depends on !BSP_USING_GP32C4T0_HWTIMER + depends on !BSP_USING_GP32C4T0_CLOCK_TIMER config BSP_USING_GP32C4T1_PWM bool "Register PWM3 " select RT_USING_PWM default n - depends on !BSP_USING_GP32C4T1_HWTIMER + depends on !BSP_USING_GP32C4T1_CLOCK_TIMER config BSP_USING_GP16C4T0_PWM bool "Register PWM4 " select RT_USING_PWM default n - depends on !BSP_USING_GP16C4T0_HWTIMER + depends on !BSP_USING_GP16C4T0_CLOCK_TIMER config BSP_USING_GP16C4T1_PWM bool "Register PWM5 " select RT_USING_PWM default n - depends on !BSP_USING_GP16C4T1_HWTIMER + depends on !BSP_USING_GP16C4T1_CLOCK_TIMER endmenu diff --git a/bsp/essemi/es32f365x/drivers/ES/es_conf_info_clock_timer.h b/bsp/essemi/es32f365x/drivers/ES/es_conf_info_clock_timer.h new file mode 100644 index 00000000000..369875a0d69 --- /dev/null +++ b/bsp/essemi/es32f365x/drivers/ES/es_conf_info_clock_timer.h @@ -0,0 +1,102 @@ +/* + * Change Logs: + * Date Author Notes + * 2021-04-20 liuhy the first version + * + * Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#ifndef __ES_CONF_INFO_CLOCK_TIMER_H__ +#define __ES_CONF_INFO_CLOCK_TIMER_H__ + +#include +#include + +#define ES_C_CLOCK_TIMER_MODE_UP CLOCK_TIMER_CNTMODE_UP +#define ES_C_CLOCK_TIMER_MODE_DOWN CLOCK_TIMER_CNTMODE_DW + +/* CLOCK_TIMER 配置 */ + +/* codes_main */ + + + +#ifndef ES_AD16C4T0_CLOCK_TIMER_MODE +#define ES_AD16C4T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_AD16C4T1_CLOCK_TIMER_MODE +#define ES_AD16C4T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP32C4T0_CLOCK_TIMER_MODE +#define ES_GP32C4T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP32C4T1_CLOCK_TIMER_MODE +#define ES_GP32C4T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP16C4T0_CLOCK_TIMER_MODE +#define ES_GP16C4T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP16C4T1_CLOCK_TIMER_MODE +#define ES_GP16C4T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T0_CLOCK_TIMER_MODE +#define ES_BS16T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T1_CLOCK_TIMER_MODE +#define ES_BS16T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif + + + + +#define ES_AD16C4T0_CLOCK_TIMER_PRES 1 +#define ES_AD16C4T1_CLOCK_TIMER_PRES 1 +#define ES_GP16C4T0_CLOCK_TIMER_PRES 1 +#define ES_GP16C4T1_CLOCK_TIMER_PRES 1 +#define ES_GP32C4T0_CLOCK_TIMER_PRES 1 +#define ES_GP32C4T1_CLOCK_TIMER_PRES 1 +#define ES_BS16T0_CLOCK_TIMER_PRES 1 +#define ES_BS16T1_CLOCK_TIMER_PRES 1 + +#ifndef ES_DEVICE_NAME_AD16C4T0_CLOCK_TIMER +#define ES_DEVICE_NAME_AD16C4T0_CLOCK_TIMER "timer0" +#endif +#ifndef ES_DEVICE_NAME_AD16C4T1_CLOCK_TIMER +#define ES_DEVICE_NAME_AD16C4T1_CLOCK_TIMER "timer1" +#endif +#ifndef ES_DEVICE_NAME_GP32C4T0_CLOCK_TIMER +#define ES_DEVICE_NAME_GP32C4T0_CLOCK_TIMER "timer2" +#endif +#ifndef ES_DEVICE_NAME_GP32C4T1_CLOCK_TIMER +#define ES_DEVICE_NAME_GP32C4T1_CLOCK_TIMER "timer3" +#endif +#ifndef ES_DEVICE_NAME_GP16C4T0_CLOCK_TIMER +#define ES_DEVICE_NAME_GP16C4T0_CLOCK_TIMER "timer4" +#endif +#ifndef ES_DEVICE_NAME_GP16C4T1_CLOCK_TIMER +#define ES_DEVICE_NAME_GP16C4T1_CLOCK_TIMER "timer5" +#endif +#ifndef ES_DEVICE_NAME_BS16T0_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T0_CLOCK_TIMER "timer6" +#endif +#ifndef ES_DEVICE_NAME_BS16T1_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T1_CLOCK_TIMER "timer7" +#endif + + +#endif diff --git a/bsp/essemi/es32f365x/drivers/ES/es_conf_info_hwtimer.h b/bsp/essemi/es32f365x/drivers/ES/es_conf_info_hwtimer.h deleted file mode 100644 index 18f2ff8aa02..00000000000 --- a/bsp/essemi/es32f365x/drivers/ES/es_conf_info_hwtimer.h +++ /dev/null @@ -1,102 +0,0 @@ -/* - * Change Logs: - * Date Author Notes - * 2021-04-20 liuhy the first version - * - * Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - */ - -#ifndef __ES_CONF_INFO_HWTIMER_H__ -#define __ES_CONF_INFO_HWTIMER_H__ - -#include -#include - -#define ES_C_HWTIMER_MODE_UP HWTIMER_CNTMODE_UP -#define ES_C_HWTIMER_MODE_DOWN HWTIMER_CNTMODE_DW - -/* HWTIMER 配置 */ - -/* codes_main */ - - - -#ifndef ES_AD16C4T0_HWTIMER_MODE -#define ES_AD16C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_AD16C4T1_HWTIMER_MODE -#define ES_AD16C4T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP32C4T0_HWTIMER_MODE -#define ES_GP32C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP32C4T1_HWTIMER_MODE -#define ES_GP32C4T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP16C4T0_HWTIMER_MODE -#define ES_GP16C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP16C4T1_HWTIMER_MODE -#define ES_GP16C4T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T0_HWTIMER_MODE -#define ES_BS16T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T1_HWTIMER_MODE -#define ES_BS16T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif - - - - -#define ES_AD16C4T0_HWTIMER_PRES 1 -#define ES_AD16C4T1_HWTIMER_PRES 1 -#define ES_GP16C4T0_HWTIMER_PRES 1 -#define ES_GP16C4T1_HWTIMER_PRES 1 -#define ES_GP32C4T0_HWTIMER_PRES 1 -#define ES_GP32C4T1_HWTIMER_PRES 1 -#define ES_BS16T0_HWTIMER_PRES 1 -#define ES_BS16T1_HWTIMER_PRES 1 - -#ifndef ES_DEVICE_NAME_AD16C4T0_HWTIMER -#define ES_DEVICE_NAME_AD16C4T0_HWTIMER "timer0" -#endif -#ifndef ES_DEVICE_NAME_AD16C4T1_HWTIMER -#define ES_DEVICE_NAME_AD16C4T1_HWTIMER "timer1" -#endif -#ifndef ES_DEVICE_NAME_GP32C4T0_HWTIMER -#define ES_DEVICE_NAME_GP32C4T0_HWTIMER "timer2" -#endif -#ifndef ES_DEVICE_NAME_GP32C4T1_HWTIMER -#define ES_DEVICE_NAME_GP32C4T1_HWTIMER "timer3" -#endif -#ifndef ES_DEVICE_NAME_GP16C4T0_HWTIMER -#define ES_DEVICE_NAME_GP16C4T0_HWTIMER "timer4" -#endif -#ifndef ES_DEVICE_NAME_GP16C4T1_HWTIMER -#define ES_DEVICE_NAME_GP16C4T1_HWTIMER "timer5" -#endif -#ifndef ES_DEVICE_NAME_BS16T0_HWTIMER -#define ES_DEVICE_NAME_BS16T0_HWTIMER "timer6" -#endif -#ifndef ES_DEVICE_NAME_BS16T1_HWTIMER -#define ES_DEVICE_NAME_BS16T1_HWTIMER "timer7" -#endif - - -#endif diff --git a/bsp/essemi/es32f365x/drivers/Kconfig b/bsp/essemi/es32f365x/drivers/Kconfig index 81ef72b911d..ad4ad5968d9 100644 --- a/bsp/essemi/es32f365x/drivers/Kconfig +++ b/bsp/essemi/es32f365x/drivers/Kconfig @@ -45,8 +45,8 @@ endif bool "BSP_USING_EXAMPLE_ADC_VOL" default n - config BSP_USING_EXAMPLE_HWTIMER - bool "BSP_USING_EXAMPLE_HWTIMER" + config BSP_USING_EXAMPLE_CLOCK_TIMER + bool "BSP_USING_EXAMPLE_CLOCK_TIMER" default n config BSP_USING_EXAMPLE_I2C diff --git a/bsp/essemi/es32f365x/drivers/SConscript b/bsp/essemi/es32f365x/drivers/SConscript index 9b38fc3661c..843e04de674 100644 --- a/bsp/essemi/es32f365x/drivers/SConscript +++ b/bsp/essemi/es32f365x/drivers/SConscript @@ -48,12 +48,12 @@ if GetDepend(['BSP_USING_RTC']): if GetDepend('BSP_USING_SPI_FLASH'): src += [ES32F36XX_DRV_ROOT+'/drv_spiflash.c'] -# add hwtimer driver code -if GetDepend('BSP_USING_AD16C4T0_HWTIMER') or GetDepend('BSP_USING_AD16C4T1_HWTIMER') or \ - GetDepend('BSP_USING_GP32C4T0_HWTIMER') or GetDepend('BSP_USING_GP32C4T1_HWTIMER') or \ - GetDepend('BSP_USING_GP16C4T0_HWTIMER') or GetDepend('BSP_USING_GP16C4T1_HWTIMER') or \ - GetDepend('BSP_USING_BS16T0_HWTIMER') or GetDepend('BSP_USING_BS16T1_HWTIMER'): - src += [ES32F36XX_DRV_ROOT+'/drv_hwtimer.c'] +# add clock_timer driver code +if GetDepend('BSP_USING_AD16C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_AD16C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP32C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP32C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP16C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP16C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_BS16T0_CLOCK_TIMER') or GetDepend('BSP_USING_BS16T1_CLOCK_TIMER'): + src += [ES32F36XX_DRV_ROOT+'/drv_timer.c'] # add pwm driver code if GetDepend('BSP_USING_AD16C4T0_PWM') or GetDepend('BSP_USING_AD16C4T1_PWM') or \ @@ -76,8 +76,8 @@ include_path = [cwd + '/ES'] if GetDepend('BSP_USING_EXAMPLE_ADC_VOL'): src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/adc_vol_sample.c'] -if GetDepend('BSP_USING_EXAMPLE_HWTIMER'): - src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/hwtimer_sample.c'] +if GetDepend('BSP_USING_EXAMPLE_CLOCK_TIMER'): + src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/clock_timer_sample.c'] if GetDepend('BSP_USING_EXAMPLE_I2C'): src += [ES32F36XX_DRV_ROOT+'/bsp_driver_example/i2c_sample.c'] diff --git a/bsp/essemi/es32f0654/drivers/drv_hwtimer.h b/bsp/essemi/es32f365x/drivers/drv_timer.h similarity index 86% rename from bsp/essemi/es32f0654/drivers/drv_hwtimer.h rename to bsp/essemi/es32f365x/drivers/drv_timer.h index bbf51a47715..676ebb23583 100644 --- a/bsp/essemi/es32f0654/drivers/drv_hwtimer.h +++ b/bsp/essemi/es32f365x/drivers/drv_timer.h @@ -21,10 +21,10 @@ * 2021-04-20 liuhy the second version */ -#ifndef DRV_HWTIMER_H__ -#define DRV_HWTIMER_H__ +#ifndef DRV_CLOCK_TIMER_H__ +#define DRV_CLOCK_TIMER_H__ -#include "es_conf_info_hwtimer.h" -int rt_hw_hwtimer_init(void); +#include "es_conf_info_clock_timer.h" +int rt_hw_clock_timer_init(void); #endif diff --git a/bsp/essemi/es32f369x/drivers/ES/Kconfig b/bsp/essemi/es32f369x/drivers/ES/Kconfig index cf90fe65c71..21ff44d6664 100644 --- a/bsp/essemi/es32f369x/drivers/ES/Kconfig +++ b/bsp/essemi/es32f369x/drivers/ES/Kconfig @@ -166,46 +166,46 @@ menu "RTC Drivers" endmenu -menu "HWTIMER Drivers" +menu "CLOCK_TIMER Drivers" - config BSP_USING_AD16C4T0_HWTIMER - bool "Register HWTIMER0 " - select RT_USING_HWTIMER + config BSP_USING_AD16C4T0_CLOCK_TIMER + bool "Register CLOCK_TIMER0 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_AD16C4T1_HWTIMER - bool "Register HWTIMER1 " - select RT_USING_HWTIMER + config BSP_USING_AD16C4T1_CLOCK_TIMER + bool "Register CLOCK_TIMER1 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_GP32C4T0_HWTIMER - bool "Register HWTIMER2 " - select RT_USING_HWTIMER + config BSP_USING_GP32C4T0_CLOCK_TIMER + bool "Register CLOCK_TIMER2 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_GP32C4T1_HWTIMER - bool "Register HWTIMER3 " - select RT_USING_HWTIMER + config BSP_USING_GP32C4T1_CLOCK_TIMER + bool "Register CLOCK_TIMER3 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_GP16C4T0_HWTIMER - bool "Register HWTIMER4 " - select RT_USING_HWTIMER + config BSP_USING_GP16C4T0_CLOCK_TIMER + bool "Register CLOCK_TIMER4 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_GP16C4T1_HWTIMER - bool "Register HWTIMER5 " - select RT_USING_HWTIMER + config BSP_USING_GP16C4T1_CLOCK_TIMER + bool "Register CLOCK_TIMER5 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_BS16T0_HWTIMER - bool "Register HWTIMER6 " - select RT_USING_HWTIMER + config BSP_USING_BS16T0_CLOCK_TIMER + bool "Register CLOCK_TIMER6 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_BS16T1_HWTIMER - bool "Register HWTIMER7 " - select RT_USING_HWTIMER + config BSP_USING_BS16T1_CLOCK_TIMER + bool "Register CLOCK_TIMER7 " + select RT_USING_CLOCK_TIME default n endmenu @@ -216,37 +216,37 @@ menu "PWM Drivers" bool "Register PWM0 " select RT_USING_PWM default n - depends on !BSP_USING_AD16C4T0_HWTIMER + depends on !BSP_USING_AD16C4T0_CLOCK_TIMER config BSP_USING_AD16C4T1_PWM bool "Register PWM1 " select RT_USING_PWM default n - depends on !BSP_USING_AD16C4T1_HWTIMER + depends on !BSP_USING_AD16C4T1_CLOCK_TIMER config BSP_USING_GP32C4T0_PWM bool "Register PWM2 " select RT_USING_PWM default n - depends on !BSP_USING_GP32C4T0_HWTIMER + depends on !BSP_USING_GP32C4T0_CLOCK_TIMER config BSP_USING_GP32C4T1_PWM bool "Register PWM3 " select RT_USING_PWM default n - depends on !BSP_USING_GP32C4T1_HWTIMER + depends on !BSP_USING_GP32C4T1_CLOCK_TIMER config BSP_USING_GP16C4T0_PWM bool "Register PWM4 " select RT_USING_PWM default n - depends on !BSP_USING_GP16C4T0_HWTIMER + depends on !BSP_USING_GP16C4T0_CLOCK_TIMER config BSP_USING_GP16C4T1_PWM bool "Register PWM5 " select RT_USING_PWM default n - depends on !BSP_USING_GP16C4T1_HWTIMER + depends on !BSP_USING_GP16C4T1_CLOCK_TIMER endmenu diff --git a/bsp/essemi/es32f369x/drivers/ES/es_conf_info_clock_timer.h b/bsp/essemi/es32f369x/drivers/ES/es_conf_info_clock_timer.h new file mode 100644 index 00000000000..369875a0d69 --- /dev/null +++ b/bsp/essemi/es32f369x/drivers/ES/es_conf_info_clock_timer.h @@ -0,0 +1,102 @@ +/* + * Change Logs: + * Date Author Notes + * 2021-04-20 liuhy the first version + * + * Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#ifndef __ES_CONF_INFO_CLOCK_TIMER_H__ +#define __ES_CONF_INFO_CLOCK_TIMER_H__ + +#include +#include + +#define ES_C_CLOCK_TIMER_MODE_UP CLOCK_TIMER_CNTMODE_UP +#define ES_C_CLOCK_TIMER_MODE_DOWN CLOCK_TIMER_CNTMODE_DW + +/* CLOCK_TIMER 配置 */ + +/* codes_main */ + + + +#ifndef ES_AD16C4T0_CLOCK_TIMER_MODE +#define ES_AD16C4T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_AD16C4T1_CLOCK_TIMER_MODE +#define ES_AD16C4T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP32C4T0_CLOCK_TIMER_MODE +#define ES_GP32C4T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP32C4T1_CLOCK_TIMER_MODE +#define ES_GP32C4T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP16C4T0_CLOCK_TIMER_MODE +#define ES_GP16C4T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP16C4T1_CLOCK_TIMER_MODE +#define ES_GP16C4T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T0_CLOCK_TIMER_MODE +#define ES_BS16T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T1_CLOCK_TIMER_MODE +#define ES_BS16T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif + + + + +#define ES_AD16C4T0_CLOCK_TIMER_PRES 1 +#define ES_AD16C4T1_CLOCK_TIMER_PRES 1 +#define ES_GP16C4T0_CLOCK_TIMER_PRES 1 +#define ES_GP16C4T1_CLOCK_TIMER_PRES 1 +#define ES_GP32C4T0_CLOCK_TIMER_PRES 1 +#define ES_GP32C4T1_CLOCK_TIMER_PRES 1 +#define ES_BS16T0_CLOCK_TIMER_PRES 1 +#define ES_BS16T1_CLOCK_TIMER_PRES 1 + +#ifndef ES_DEVICE_NAME_AD16C4T0_CLOCK_TIMER +#define ES_DEVICE_NAME_AD16C4T0_CLOCK_TIMER "timer0" +#endif +#ifndef ES_DEVICE_NAME_AD16C4T1_CLOCK_TIMER +#define ES_DEVICE_NAME_AD16C4T1_CLOCK_TIMER "timer1" +#endif +#ifndef ES_DEVICE_NAME_GP32C4T0_CLOCK_TIMER +#define ES_DEVICE_NAME_GP32C4T0_CLOCK_TIMER "timer2" +#endif +#ifndef ES_DEVICE_NAME_GP32C4T1_CLOCK_TIMER +#define ES_DEVICE_NAME_GP32C4T1_CLOCK_TIMER "timer3" +#endif +#ifndef ES_DEVICE_NAME_GP16C4T0_CLOCK_TIMER +#define ES_DEVICE_NAME_GP16C4T0_CLOCK_TIMER "timer4" +#endif +#ifndef ES_DEVICE_NAME_GP16C4T1_CLOCK_TIMER +#define ES_DEVICE_NAME_GP16C4T1_CLOCK_TIMER "timer5" +#endif +#ifndef ES_DEVICE_NAME_BS16T0_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T0_CLOCK_TIMER "timer6" +#endif +#ifndef ES_DEVICE_NAME_BS16T1_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T1_CLOCK_TIMER "timer7" +#endif + + +#endif diff --git a/bsp/essemi/es32f369x/drivers/ES/es_conf_info_hwtimer.h b/bsp/essemi/es32f369x/drivers/ES/es_conf_info_hwtimer.h deleted file mode 100644 index 18f2ff8aa02..00000000000 --- a/bsp/essemi/es32f369x/drivers/ES/es_conf_info_hwtimer.h +++ /dev/null @@ -1,102 +0,0 @@ -/* - * Change Logs: - * Date Author Notes - * 2021-04-20 liuhy the first version - * - * Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - */ - -#ifndef __ES_CONF_INFO_HWTIMER_H__ -#define __ES_CONF_INFO_HWTIMER_H__ - -#include -#include - -#define ES_C_HWTIMER_MODE_UP HWTIMER_CNTMODE_UP -#define ES_C_HWTIMER_MODE_DOWN HWTIMER_CNTMODE_DW - -/* HWTIMER 配置 */ - -/* codes_main */ - - - -#ifndef ES_AD16C4T0_HWTIMER_MODE -#define ES_AD16C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_AD16C4T1_HWTIMER_MODE -#define ES_AD16C4T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP32C4T0_HWTIMER_MODE -#define ES_GP32C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP32C4T1_HWTIMER_MODE -#define ES_GP32C4T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP16C4T0_HWTIMER_MODE -#define ES_GP16C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP16C4T1_HWTIMER_MODE -#define ES_GP16C4T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T0_HWTIMER_MODE -#define ES_BS16T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T1_HWTIMER_MODE -#define ES_BS16T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif - - - - -#define ES_AD16C4T0_HWTIMER_PRES 1 -#define ES_AD16C4T1_HWTIMER_PRES 1 -#define ES_GP16C4T0_HWTIMER_PRES 1 -#define ES_GP16C4T1_HWTIMER_PRES 1 -#define ES_GP32C4T0_HWTIMER_PRES 1 -#define ES_GP32C4T1_HWTIMER_PRES 1 -#define ES_BS16T0_HWTIMER_PRES 1 -#define ES_BS16T1_HWTIMER_PRES 1 - -#ifndef ES_DEVICE_NAME_AD16C4T0_HWTIMER -#define ES_DEVICE_NAME_AD16C4T0_HWTIMER "timer0" -#endif -#ifndef ES_DEVICE_NAME_AD16C4T1_HWTIMER -#define ES_DEVICE_NAME_AD16C4T1_HWTIMER "timer1" -#endif -#ifndef ES_DEVICE_NAME_GP32C4T0_HWTIMER -#define ES_DEVICE_NAME_GP32C4T0_HWTIMER "timer2" -#endif -#ifndef ES_DEVICE_NAME_GP32C4T1_HWTIMER -#define ES_DEVICE_NAME_GP32C4T1_HWTIMER "timer3" -#endif -#ifndef ES_DEVICE_NAME_GP16C4T0_HWTIMER -#define ES_DEVICE_NAME_GP16C4T0_HWTIMER "timer4" -#endif -#ifndef ES_DEVICE_NAME_GP16C4T1_HWTIMER -#define ES_DEVICE_NAME_GP16C4T1_HWTIMER "timer5" -#endif -#ifndef ES_DEVICE_NAME_BS16T0_HWTIMER -#define ES_DEVICE_NAME_BS16T0_HWTIMER "timer6" -#endif -#ifndef ES_DEVICE_NAME_BS16T1_HWTIMER -#define ES_DEVICE_NAME_BS16T1_HWTIMER "timer7" -#endif - - -#endif diff --git a/bsp/essemi/es32f369x/drivers/Kconfig b/bsp/essemi/es32f369x/drivers/Kconfig index 8eade9ab28c..c25b38fab1a 100644 --- a/bsp/essemi/es32f369x/drivers/Kconfig +++ b/bsp/essemi/es32f369x/drivers/Kconfig @@ -57,8 +57,8 @@ endif bool "BSP_USING_EXAMPLE_ADC_VOL" default n - config BSP_USING_EXAMPLE_HWTIMER - bool "BSP_USING_EXAMPLE_HWTIMER" + config BSP_USING_EXAMPLE_CLOCK_TIMER + bool "BSP_USING_EXAMPLE_CLOCK_TIMER" default n config BSP_USING_EXAMPLE_I2C diff --git a/bsp/essemi/es32f369x/drivers/SConscript b/bsp/essemi/es32f369x/drivers/SConscript index 950f8c70e95..369c09ad663 100644 --- a/bsp/essemi/es32f369x/drivers/SConscript +++ b/bsp/essemi/es32f369x/drivers/SConscript @@ -44,12 +44,12 @@ if GetDepend(['BSP_USING_RTC']): if GetDepend('BSP_USING_SPI_FLASH'): src += ['drv_spiflash.c'] -# add hwtimer driver code -if GetDepend('BSP_USING_AD16C4T0_HWTIMER') or GetDepend('BSP_USING_AD16C4T1_HWTIMER') or \ - GetDepend('BSP_USING_GP32C4T0_HWTIMER') or GetDepend('BSP_USING_GP32C4T1_HWTIMER') or \ - GetDepend('BSP_USING_GP16C4T0_HWTIMER') or GetDepend('BSP_USING_GP16C4T1_HWTIMER') or \ - GetDepend('BSP_USING_BS16T0_HWTIMER') or GetDepend('BSP_USING_BS16T1_HWTIMER'): - src += ['drv_hwtimer.c'] +# add clock_timer driver code +if GetDepend('BSP_USING_AD16C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_AD16C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP32C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP32C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP16C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP16C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_BS16T0_CLOCK_TIMER') or GetDepend('BSP_USING_BS16T1_CLOCK_TIMER'): + src += ['drv_timer.c'] # add pwm driver code if GetDepend('BSP_USING_AD16C4T0_PWM') or GetDepend('BSP_USING_AD16C4T1_PWM') or \ @@ -72,8 +72,8 @@ include_path = [cwd + '/ES'] if GetDepend('BSP_USING_EXAMPLE_ADC_VOL'): src += ['bsp_driver_example/adc_vol_sample.c'] -if GetDepend('BSP_USING_EXAMPLE_HWTIMER'): - src += ['bsp_driver_example/hwtimer_sample.c'] +if GetDepend('BSP_USING_EXAMPLE_CLOCK_TIMER'): + src += ['bsp_driver_example/clock_timer_sample.c'] if GetDepend('BSP_USING_EXAMPLE_I2C'): src += ['bsp_driver_example/i2c_sample.c'] diff --git a/bsp/essemi/es32f369x/drivers/drv_hwtimer.c b/bsp/essemi/es32f369x/drivers/drv_hwtimer.c deleted file mode 100644 index 5b26407252b..00000000000 --- a/bsp/essemi/es32f369x/drivers/drv_hwtimer.c +++ /dev/null @@ -1,448 +0,0 @@ -/* - * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * Change Logs: - * Date Author Notes - * 2019-3-19 wangyq the first version - * 2019-11-01 wangyq update libraries - * 2021-04-20 liuhy the second version - */ - -#include -#include -#include -#include -#include - - -#ifdef RT_USING_HWTIMER - -struct es32f3_hwtimer_dev -{ - rt_hwtimer_t parent; - timer_handle_t *hwtimer_periph; - IRQn_Type IRQn; -}; - -#ifdef BSP_USING_AD16C4T0_HWTIMER -static struct es32f3_hwtimer_dev ad16c4t0_hwtimer; - -static struct rt_hwtimer_info ad16c4t0_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_AD16C4T0_HWTIMER_MODE -}; - -void AD16C4T0_UP_Handler(void) -{ - ald_timer_clear_flag_status(ad16c4t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&ad16c4t0_hwtimer.parent); -} - -#endif - -#ifdef BSP_USING_AD16C4T1_HWTIMER - -static struct es32f3_hwtimer_dev ad16c4t1_hwtimer; - -static struct rt_hwtimer_info ad16c4t1_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_AD16C4T1_HWTIMER_MODE -}; - -void AD16C4T1_UP_Handler(void) -{ - ald_timer_clear_flag_status(ad16c4t1_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&ad16c4t1_hwtimer.parent); -} - -#endif -#ifdef BSP_USING_GP32C4T0_HWTIMER - -static struct es32f3_hwtimer_dev gp32c4t0_hwtimer; - -static struct rt_hwtimer_info gp32c4t0_info = -{ - - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV , /* maximum count frequency */ - ( ES_SYS_CLK >> ES_CMU_PCLK_1_DIV )/(1U<<16), /* minimum count frequency */ - 0xFFFFFFFF, /* counter maximum value */ - ES_GP32C4T0_HWTIMER_MODE -}; - -void GP32C4T0_Handler(void) -{ - ald_timer_clear_flag_status(gp32c4t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&gp32c4t0_hwtimer.parent); -} - -#endif -#ifdef BSP_USING_GP32C4T1_HWTIMER - -static struct es32f3_hwtimer_dev gp32c4t1_hwtimer; - -static struct rt_hwtimer_info gp32c4t1_info = -{ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV ), /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV )/(1U<<16), /* minimum count frequency */ - 0xFFFFFFFF, /* counter maximum value */ - ES_GP32C4T1_HWTIMER_MODE -}; - -void GP32C4T1_Handler(void) -{ - ald_timer_clear_flag_status(gp32c4t1_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&gp32c4t1_hwtimer.parent); -} - -#endif -#ifdef BSP_USING_GP16C4T0_HWTIMER - -static struct es32f3_hwtimer_dev gp16c4t0_hwtimer; - -static struct rt_hwtimer_info gp16c4t0_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_GP16C4T0_HWTIMER_MODE -}; - -void GP16C4T0_Handler(void) -{ - ald_timer_clear_flag_status(gp16c4t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&gp16c4t0_hwtimer.parent); -} - -#endif -#ifdef BSP_USING_GP16C4T1_HWTIMER - -static struct es32f3_hwtimer_dev gp16c4t1_hwtimer; - -static struct rt_hwtimer_info gp16c4t1_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_GP16C4T1_HWTIMER_MODE -}; - -void GP16C4T1_Handler(void) -{ - ald_timer_clear_flag_status(gp16c4t1_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&gp16c4t1_hwtimer.parent); -} - -#endif -#ifdef BSP_USING_BS16T0_HWTIMER - -static struct es32f3_hwtimer_dev bs16t0_hwtimer; - -static struct rt_hwtimer_info bs16t0_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_BS16T0_HWTIMER_MODE -}; - -void BS16T0_Handler(void) -{ - ald_timer_clear_flag_status(bs16t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&bs16t0_hwtimer.parent); -} - -#endif -#ifdef BSP_USING_BS16T1_HWTIMER - -static struct es32f3_hwtimer_dev bs16t1_hwtimer; - -static struct rt_hwtimer_info bs16t1_info = -{ - ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ - (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_BS16T1_HWTIMER_MODE -}; - -void BS16T1_Handler(void) -{ - ald_timer_clear_flag_status(bs16t1_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&bs16t1_hwtimer.parent); -} - -#endif - -static void es32f3_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) -{ - struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data; - - struct rt_hwtimer_info *hwtimer_info = (struct rt_hwtimer_info *)timer->info; - - - RT_ASSERT(hwtimer != RT_NULL); - - if (1 == state) - { - ald_timer_base_init(hwtimer->hwtimer_periph); - ald_timer_interrupt_config(hwtimer->hwtimer_periph, TIMER_IT_UPDATE, ENABLE); - NVIC_EnableIRQ(hwtimer->IRQn); - } - - hwtimer->parent.freq = ald_cmu_get_pclk1_clock()/((hwtimer->hwtimer_periph->perh->PRES & 0xFFFF)+1); - hwtimer_info->maxfreq = hwtimer->parent.freq; - hwtimer_info->minfreq = (hwtimer->parent.freq)/0xFFFF; - -} - -static rt_err_t es32f3_hwtimer_start(rt_hwtimer_t *timer, - rt_uint32_t cnt, - rt_hwtimer_mode_t mode) -{ - struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data; - - RT_ASSERT(hwtimer != RT_NULL); - - WRITE_REG(hwtimer->hwtimer_periph->perh->AR, cnt); - ald_timer_base_start(hwtimer->hwtimer_periph); - - return RT_EOK; -} - -static void es32f3_hwtimer_stop(rt_hwtimer_t *timer) -{ - struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data; - - RT_ASSERT(hwtimer != RT_NULL); - - ald_timer_base_stop(hwtimer->hwtimer_periph); -} - -static rt_uint32_t es32f3_hwtimer_count_get(rt_hwtimer_t *timer) -{ - struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data; - uint32_t hwtimer_count = 0; - - RT_ASSERT(hwtimer != RT_NULL); - - hwtimer_count = READ_REG(hwtimer->hwtimer_periph->perh->COUNT); - - return hwtimer_count; -} - -static rt_err_t es32f3_hwtimer_control(rt_hwtimer_t *timer, - rt_uint32_t cmd, - void *args) -{ - rt_err_t ret = RT_EOK; - rt_uint32_t freq = 0; - struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data; - - RT_ASSERT(hwtimer != RT_NULL); - - switch (cmd) - { - case HWTIMER_CTRL_FREQ_SET: - freq = *(rt_uint32_t *)args; - - ret = -RT_ERROR; - - if(freq) - { - double temp,target; - temp = (double)ald_cmu_get_pclk1_clock(); - target = temp/freq; - - if(target < 0x10001) /*最大分频 = max(PRES)+1*/ - { - temp = target - (int)(target); - - if((temp > 0.998)&&(target < 0x10000)) - { - hwtimer->hwtimer_periph->perh->PRES = (uint32_t)target; - ret = RT_EOK; - } - if((temp < 0.002)&&(target >= 0x1)) - { - hwtimer->hwtimer_periph->perh->PRES = (uint32_t)target - 1; - ret = RT_EOK; - } - - } - - if(ret == RT_EOK) /*更新信息*/ - hwtimer->parent.freq = ald_cmu_get_pclk1_clock()/((hwtimer->hwtimer_periph->perh->PRES & 0xFFFF)+1); - - } - - break; - - case HWTIMER_CTRL_STOP: - ald_timer_base_stop(hwtimer->hwtimer_periph); - break; - - default: - ret = -RT_EINVAL; - break; - } - - return ret; -} - -static struct rt_hwtimer_ops es32f3_hwtimer_ops = -{ - es32f3_hwtimer_init, - es32f3_hwtimer_start, - es32f3_hwtimer_stop, - es32f3_hwtimer_count_get, - es32f3_hwtimer_control -}; - -int rt_hw_hwtimer_init(void) -{ - rt_err_t ret = RT_EOK; - -#ifdef BSP_USING_AD16C4T0_HWTIMER - static timer_handle_t ad16c4t0_hwtimer_periph; - - ad16c4t0_hwtimer_periph.perh = AD16C4T0; - ad16c4t0_hwtimer.IRQn = AD16C4T0_UP_IRQn; - - ad16c4t0_hwtimer_periph.init.prescaler = ES_AD16C4T0_HWTIMER_PRES - 1; - ad16c4t0_hwtimer_periph.init.mode = ( ES_AD16C4T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - ad16c4t0_hwtimer.hwtimer_periph = &ad16c4t0_hwtimer_periph; - - ad16c4t0_hwtimer.parent.info = &ad16c4t0_info; - ad16c4t0_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&ad16c4t0_hwtimer.parent, ES_DEVICE_NAME_AD16C4T0_HWTIMER, &ad16c4t0_hwtimer); -#endif - -#ifdef BSP_USING_AD16C4T1_HWTIMER - static timer_handle_t ad16c4t1_hwtimer_periph; - - ad16c4t1_hwtimer_periph.perh = AD16C4T1; - ad16c4t1_hwtimer.IRQn = AD16C4T1_UP_IRQn; - - ad16c4t1_hwtimer_periph.init.prescaler = ES_AD16C4T1_HWTIMER_PRES - 1; - ad16c4t1_hwtimer_periph.init.mode = ( ES_AD16C4T1_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - ad16c4t1_hwtimer.hwtimer_periph = &ad16c4t1_hwtimer_periph; - - ad16c4t1_hwtimer.parent.info = &ad16c4t1_info; - ad16c4t1_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&ad16c4t1_hwtimer.parent, ES_DEVICE_NAME_AD16C4T1_HWTIMER, &ad16c4t1_hwtimer); -#endif - -#ifdef BSP_USING_GP32C4T0_HWTIMER - static timer_handle_t gp32c4t0_hwtimer_periph; - - gp32c4t0_hwtimer_periph.perh = GP32C4T0; - gp32c4t0_hwtimer.IRQn = GP32C4T0_IRQn; - - gp32c4t0_hwtimer_periph.init.prescaler = ES_GP32C4T0_HWTIMER_PRES - 1; - gp32c4t0_hwtimer_periph.init.mode = ( ES_GP32C4T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - gp32c4t0_hwtimer.hwtimer_periph = &gp32c4t0_hwtimer_periph; - - gp32c4t0_hwtimer.parent.info = &gp32c4t0_info; - gp32c4t0_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&gp32c4t0_hwtimer.parent, ES_DEVICE_NAME_GP32C4T0_HWTIMER, &gp32c4t0_hwtimer); -#endif - -#ifdef BSP_USING_GP32C4T1_HWTIMER - static timer_handle_t gp32c4t1_hwtimer_periph; - - gp32c4t1_hwtimer_periph.perh = GP32C4T1; - gp32c4t1_hwtimer.IRQn = GP32C4T1_IRQn; - - gp32c4t1_hwtimer_periph.init.prescaler = ES_GP32C4T1_HWTIMER_PRES - 1; - gp32c4t1_hwtimer_periph.init.mode = ( ES_GP32C4T1_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - gp32c4t1_hwtimer.hwtimer_periph = &gp32c4t1_hwtimer_periph; - - gp32c4t1_hwtimer.parent.info = &gp32c4t1_info; - gp32c4t1_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&gp32c4t1_hwtimer.parent, ES_DEVICE_NAME_GP32C4T1_HWTIMER, &gp32c4t1_hwtimer); -#endif - -#ifdef BSP_USING_GP16C4T0_HWTIMER - static timer_handle_t gp16c4t0_hwtimer_periph; - - gp16c4t0_hwtimer_periph.perh = GP16C4T0; - gp16c4t0_hwtimer.IRQn = GP16C4T0_IRQn; - - gp16c4t0_hwtimer_periph.init.prescaler = ES_GP16C4T0_HWTIMER_PRES - 1; - gp16c4t0_hwtimer_periph.init.mode = ( ES_GP16C4T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - gp16c4t0_hwtimer.hwtimer_periph = &gp16c4t0_hwtimer_periph; - - gp16c4t0_hwtimer.parent.info = &gp16c4t0_info; - gp16c4t0_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&gp16c4t0_hwtimer.parent, ES_DEVICE_NAME_GP16C4T0_HWTIMER, &gp16c4t0_hwtimer); -#endif - -#ifdef BSP_USING_GP16C4T1_HWTIMER - static timer_handle_t gp16c4t1_hwtimer_periph; - - gp16c4t1_hwtimer_periph.perh = GP16C4T1; - gp16c4t1_hwtimer.IRQn = GP16C4T1_IRQn; - - gp16c4t1_hwtimer_periph.init.prescaler = ES_GP16C4T1_HWTIMER_PRES - 1; - gp16c4t1_hwtimer_periph.init.mode = ( ES_GP16C4T1_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - gp16c4t1_hwtimer.hwtimer_periph = &gp16c4t1_hwtimer_periph; - - gp16c4t1_hwtimer.parent.info = &gp16c4t1_info; - gp16c4t1_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&gp16c4t1_hwtimer.parent, ES_DEVICE_NAME_GP16C4T1_HWTIMER, &gp16c4t1_hwtimer); -#endif - -#ifdef BSP_USING_BS16T0_HWTIMER - static timer_handle_t bs16t0_hwtimer_periph; - - bs16t0_hwtimer_periph.perh = BS16T0; - bs16t0_hwtimer.IRQn = BS16T0_IRQn; - - bs16t0_hwtimer_periph.init.prescaler = ES_BS16T0_HWTIMER_PRES - 1; - bs16t0_hwtimer_periph.init.mode = ( ES_BS16T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - bs16t0_hwtimer.hwtimer_periph = &bs16t0_hwtimer_periph; - - bs16t0_hwtimer.parent.info = &bs16t0_info; - bs16t0_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&bs16t0_hwtimer.parent, ES_DEVICE_NAME_BS16T0_HWTIMER, &bs16t0_hwtimer); -#endif - -#ifdef BSP_USING_BS16T1_HWTIMER - static timer_handle_t bs16t1_hwtimer_periph; - - bs16t1_hwtimer_periph.perh = BS16T1; - bs16t1_hwtimer.IRQn = BS16T1_IRQn; - - bs16t1_hwtimer_periph.init.prescaler = ES_BS16T1_HWTIMER_PRES - 1; - bs16t1_hwtimer_periph.init.mode = ( ES_BS16T1_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - bs16t1_hwtimer.hwtimer_periph = &bs16t1_hwtimer_periph; - - bs16t1_hwtimer.parent.info = &bs16t1_info; - bs16t1_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&bs16t1_hwtimer.parent, ES_DEVICE_NAME_BS16T1_HWTIMER, &bs16t1_hwtimer); -#endif - - return ret; -} -INIT_BOARD_EXPORT(rt_hw_hwtimer_init); - -#endif diff --git a/bsp/essemi/es32f369x/drivers/drv_timer.c b/bsp/essemi/es32f369x/drivers/drv_timer.c new file mode 100644 index 00000000000..16adf7ebcdf --- /dev/null +++ b/bsp/essemi/es32f369x/drivers/drv_timer.c @@ -0,0 +1,448 @@ +/* + * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * Change Logs: + * Date Author Notes + * 2019-3-19 wangyq the first version + * 2019-11-01 wangyq update libraries + * 2021-04-20 liuhy the second version + */ + +#include +#include +#include +#include +#include + + +#ifdef RT_USING_CLOCK_TIME + +struct es32f3_clock_timer_dev +{ + rt_clock_timer_t parent; + timer_handle_t *clock_timer_periph; + IRQn_Type IRQn; +}; + +#ifdef BSP_USING_AD16C4T0_CLOCK_TIMER +static struct es32f3_clock_timer_dev ad16c4t0_clock_timer; + +static struct rt_clock_timer_info ad16c4t0_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_AD16C4T0_CLOCK_TIMER_MODE +}; + +void AD16C4T0_UP_Handler(void) +{ + ald_timer_clear_flag_status(ad16c4t0_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&ad16c4t0_clock_timer.parent); +} + +#endif + +#ifdef BSP_USING_AD16C4T1_CLOCK_TIMER + +static struct es32f3_clock_timer_dev ad16c4t1_clock_timer; + +static struct rt_clock_timer_info ad16c4t1_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_AD16C4T1_CLOCK_TIMER_MODE +}; + +void AD16C4T1_UP_Handler(void) +{ + ald_timer_clear_flag_status(ad16c4t1_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&ad16c4t1_clock_timer.parent); +} + +#endif +#ifdef BSP_USING_GP32C4T0_CLOCK_TIMER + +static struct es32f3_clock_timer_dev gp32c4t0_clock_timer; + +static struct rt_clock_timer_info gp32c4t0_info = +{ + + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV , /* maximum count frequency */ + ( ES_SYS_CLK >> ES_CMU_PCLK_1_DIV )/(1U<<16), /* minimum count frequency */ + 0xFFFFFFFF, /* counter maximum value */ + ES_GP32C4T0_CLOCK_TIMER_MODE +}; + +void GP32C4T0_Handler(void) +{ + ald_timer_clear_flag_status(gp32c4t0_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&gp32c4t0_clock_timer.parent); +} + +#endif +#ifdef BSP_USING_GP32C4T1_CLOCK_TIMER + +static struct es32f3_clock_timer_dev gp32c4t1_clock_timer; + +static struct rt_clock_timer_info gp32c4t1_info = +{ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV ), /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV )/(1U<<16), /* minimum count frequency */ + 0xFFFFFFFF, /* counter maximum value */ + ES_GP32C4T1_CLOCK_TIMER_MODE +}; + +void GP32C4T1_Handler(void) +{ + ald_timer_clear_flag_status(gp32c4t1_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&gp32c4t1_clock_timer.parent); +} + +#endif +#ifdef BSP_USING_GP16C4T0_CLOCK_TIMER + +static struct es32f3_clock_timer_dev gp16c4t0_clock_timer; + +static struct rt_clock_timer_info gp16c4t0_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_GP16C4T0_CLOCK_TIMER_MODE +}; + +void GP16C4T0_Handler(void) +{ + ald_timer_clear_flag_status(gp16c4t0_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&gp16c4t0_clock_timer.parent); +} + +#endif +#ifdef BSP_USING_GP16C4T1_CLOCK_TIMER + +static struct es32f3_clock_timer_dev gp16c4t1_clock_timer; + +static struct rt_clock_timer_info gp16c4t1_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_GP16C4T1_CLOCK_TIMER_MODE +}; + +void GP16C4T1_Handler(void) +{ + ald_timer_clear_flag_status(gp16c4t1_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&gp16c4t1_clock_timer.parent); +} + +#endif +#ifdef BSP_USING_BS16T0_CLOCK_TIMER + +static struct es32f3_clock_timer_dev bs16t0_clock_timer; + +static struct rt_clock_timer_info bs16t0_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_BS16T0_CLOCK_TIMER_MODE +}; + +void BS16T0_Handler(void) +{ + ald_timer_clear_flag_status(bs16t0_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&bs16t0_clock_timer.parent); +} + +#endif +#ifdef BSP_USING_BS16T1_CLOCK_TIMER + +static struct es32f3_clock_timer_dev bs16t1_clock_timer; + +static struct rt_clock_timer_info bs16t1_info = +{ + ES_SYS_CLK >> ES_CMU_PCLK_1_DIV, /* maximum count frequency */ + (ES_SYS_CLK >> ES_CMU_PCLK_1_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_BS16T1_CLOCK_TIMER_MODE +}; + +void BS16T1_Handler(void) +{ + ald_timer_clear_flag_status(bs16t1_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&bs16t1_clock_timer.parent); +} + +#endif + +static void es32f3_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) +{ + struct es32f3_clock_timer_dev *clock_timer = (struct es32f3_clock_timer_dev *)timer->parent.user_data; + + struct rt_clock_timer_info *clock_timer_info = (struct rt_clock_timer_info *)timer->info; + + + RT_ASSERT(clock_timer != RT_NULL); + + if (1 == state) + { + ald_timer_base_init(clock_timer->clock_timer_periph); + ald_timer_interrupt_config(clock_timer->clock_timer_periph, TIMER_IT_UPDATE, ENABLE); + NVIC_EnableIRQ(clock_timer->IRQn); + } + + clock_timer->parent.freq = ald_cmu_get_pclk1_clock()/((clock_timer->clock_timer_periph->perh->PRES & 0xFFFF)+1); + clock_timer_info->maxfreq = clock_timer->parent.freq; + clock_timer_info->minfreq = (clock_timer->parent.freq)/0xFFFF; + +} + +static rt_err_t es32f3_clock_timer_start(rt_clock_timer_t *timer, + rt_uint32_t cnt, + rt_clock_timer_mode_t mode) +{ + struct es32f3_clock_timer_dev *clock_timer = (struct es32f3_clock_timer_dev *)timer->parent.user_data; + + RT_ASSERT(clock_timer != RT_NULL); + + WRITE_REG(clock_timer->clock_timer_periph->perh->AR, cnt); + ald_timer_base_start(clock_timer->clock_timer_periph); + + return RT_EOK; +} + +static void es32f3_clock_timer_stop(rt_clock_timer_t *timer) +{ + struct es32f3_clock_timer_dev *clock_timer = (struct es32f3_clock_timer_dev *)timer->parent.user_data; + + RT_ASSERT(clock_timer != RT_NULL); + + ald_timer_base_stop(clock_timer->clock_timer_periph); +} + +static rt_uint32_t es32f3_clock_timer_count_get(rt_clock_timer_t *timer) +{ + struct es32f3_clock_timer_dev *clock_timer = (struct es32f3_clock_timer_dev *)timer->parent.user_data; + uint32_t clock_timer_count = 0; + + RT_ASSERT(clock_timer != RT_NULL); + + clock_timer_count = READ_REG(clock_timer->clock_timer_periph->perh->COUNT); + + return clock_timer_count; +} + +static rt_err_t es32f3_clock_timer_control(rt_clock_timer_t *timer, + rt_uint32_t cmd, + void *args) +{ + rt_err_t ret = RT_EOK; + rt_uint32_t freq = 0; + struct es32f3_clock_timer_dev *clock_timer = (struct es32f3_clock_timer_dev *)timer->parent.user_data; + + RT_ASSERT(clock_timer != RT_NULL); + + switch (cmd) + { + case CLOCK_TIMER_CTRL_FREQ_SET: + freq = *(rt_uint32_t *)args; + + ret = -RT_ERROR; + + if(freq) + { + double temp,target; + temp = (double)ald_cmu_get_pclk1_clock(); + target = temp/freq; + + if(target < 0x10001) /*最大分频 = max(PRES)+1*/ + { + temp = target - (int)(target); + + if((temp > 0.998)&&(target < 0x10000)) + { + clock_timer->clock_timer_periph->perh->PRES = (uint32_t)target; + ret = RT_EOK; + } + if((temp < 0.002)&&(target >= 0x1)) + { + clock_timer->clock_timer_periph->perh->PRES = (uint32_t)target - 1; + ret = RT_EOK; + } + + } + + if(ret == RT_EOK) /*更新信息*/ + clock_timer->parent.freq = ald_cmu_get_pclk1_clock()/((clock_timer->clock_timer_periph->perh->PRES & 0xFFFF)+1); + + } + + break; + + case CLOCK_TIMER_CTRL_STOP: + ald_timer_base_stop(clock_timer->clock_timer_periph); + break; + + default: + ret = -RT_EINVAL; + break; + } + + return ret; +} + +static struct rt_clock_timer_ops es32f3_clock_timer_ops = +{ + es32f3_clock_timer_init, + es32f3_clock_timer_start, + es32f3_clock_timer_stop, + es32f3_clock_timer_count_get, + es32f3_clock_timer_control +}; + +int rt_hw_clock_timer_init(void) +{ + rt_err_t ret = RT_EOK; + +#ifdef BSP_USING_AD16C4T0_CLOCK_TIMER + static timer_handle_t ad16c4t0_clock_timer_periph; + + ad16c4t0_clock_timer_periph.perh = AD16C4T0; + ad16c4t0_clock_timer.IRQn = AD16C4T0_UP_IRQn; + + ad16c4t0_clock_timer_periph.init.prescaler = ES_AD16C4T0_CLOCK_TIMER_PRES - 1; + ad16c4t0_clock_timer_periph.init.mode = ( ES_AD16C4T0_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + ad16c4t0_clock_timer.clock_timer_periph = &ad16c4t0_clock_timer_periph; + + ad16c4t0_clock_timer.parent.info = &ad16c4t0_info; + ad16c4t0_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&ad16c4t0_clock_timer.parent, ES_DEVICE_NAME_AD16C4T0_CLOCK_TIMER, &ad16c4t0_clock_timer); +#endif + +#ifdef BSP_USING_AD16C4T1_CLOCK_TIMER + static timer_handle_t ad16c4t1_clock_timer_periph; + + ad16c4t1_clock_timer_periph.perh = AD16C4T1; + ad16c4t1_clock_timer.IRQn = AD16C4T1_UP_IRQn; + + ad16c4t1_clock_timer_periph.init.prescaler = ES_AD16C4T1_CLOCK_TIMER_PRES - 1; + ad16c4t1_clock_timer_periph.init.mode = ( ES_AD16C4T1_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + ad16c4t1_clock_timer.clock_timer_periph = &ad16c4t1_clock_timer_periph; + + ad16c4t1_clock_timer.parent.info = &ad16c4t1_info; + ad16c4t1_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&ad16c4t1_clock_timer.parent, ES_DEVICE_NAME_AD16C4T1_CLOCK_TIMER, &ad16c4t1_clock_timer); +#endif + +#ifdef BSP_USING_GP32C4T0_CLOCK_TIMER + static timer_handle_t gp32c4t0_clock_timer_periph; + + gp32c4t0_clock_timer_periph.perh = GP32C4T0; + gp32c4t0_clock_timer.IRQn = GP32C4T0_IRQn; + + gp32c4t0_clock_timer_periph.init.prescaler = ES_GP32C4T0_CLOCK_TIMER_PRES - 1; + gp32c4t0_clock_timer_periph.init.mode = ( ES_GP32C4T0_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + gp32c4t0_clock_timer.clock_timer_periph = &gp32c4t0_clock_timer_periph; + + gp32c4t0_clock_timer.parent.info = &gp32c4t0_info; + gp32c4t0_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&gp32c4t0_clock_timer.parent, ES_DEVICE_NAME_GP32C4T0_CLOCK_TIMER, &gp32c4t0_clock_timer); +#endif + +#ifdef BSP_USING_GP32C4T1_CLOCK_TIMER + static timer_handle_t gp32c4t1_clock_timer_periph; + + gp32c4t1_clock_timer_periph.perh = GP32C4T1; + gp32c4t1_clock_timer.IRQn = GP32C4T1_IRQn; + + gp32c4t1_clock_timer_periph.init.prescaler = ES_GP32C4T1_CLOCK_TIMER_PRES - 1; + gp32c4t1_clock_timer_periph.init.mode = ( ES_GP32C4T1_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + gp32c4t1_clock_timer.clock_timer_periph = &gp32c4t1_clock_timer_periph; + + gp32c4t1_clock_timer.parent.info = &gp32c4t1_info; + gp32c4t1_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&gp32c4t1_clock_timer.parent, ES_DEVICE_NAME_GP32C4T1_CLOCK_TIMER, &gp32c4t1_clock_timer); +#endif + +#ifdef BSP_USING_GP16C4T0_CLOCK_TIMER + static timer_handle_t gp16c4t0_clock_timer_periph; + + gp16c4t0_clock_timer_periph.perh = GP16C4T0; + gp16c4t0_clock_timer.IRQn = GP16C4T0_IRQn; + + gp16c4t0_clock_timer_periph.init.prescaler = ES_GP16C4T0_CLOCK_TIMER_PRES - 1; + gp16c4t0_clock_timer_periph.init.mode = ( ES_GP16C4T0_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + gp16c4t0_clock_timer.clock_timer_periph = &gp16c4t0_clock_timer_periph; + + gp16c4t0_clock_timer.parent.info = &gp16c4t0_info; + gp16c4t0_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&gp16c4t0_clock_timer.parent, ES_DEVICE_NAME_GP16C4T0_CLOCK_TIMER, &gp16c4t0_clock_timer); +#endif + +#ifdef BSP_USING_GP16C4T1_CLOCK_TIMER + static timer_handle_t gp16c4t1_clock_timer_periph; + + gp16c4t1_clock_timer_periph.perh = GP16C4T1; + gp16c4t1_clock_timer.IRQn = GP16C4T1_IRQn; + + gp16c4t1_clock_timer_periph.init.prescaler = ES_GP16C4T1_CLOCK_TIMER_PRES - 1; + gp16c4t1_clock_timer_periph.init.mode = ( ES_GP16C4T1_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + gp16c4t1_clock_timer.clock_timer_periph = &gp16c4t1_clock_timer_periph; + + gp16c4t1_clock_timer.parent.info = &gp16c4t1_info; + gp16c4t1_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&gp16c4t1_clock_timer.parent, ES_DEVICE_NAME_GP16C4T1_CLOCK_TIMER, &gp16c4t1_clock_timer); +#endif + +#ifdef BSP_USING_BS16T0_CLOCK_TIMER + static timer_handle_t bs16t0_clock_timer_periph; + + bs16t0_clock_timer_periph.perh = BS16T0; + bs16t0_clock_timer.IRQn = BS16T0_IRQn; + + bs16t0_clock_timer_periph.init.prescaler = ES_BS16T0_CLOCK_TIMER_PRES - 1; + bs16t0_clock_timer_periph.init.mode = ( ES_BS16T0_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + bs16t0_clock_timer.clock_timer_periph = &bs16t0_clock_timer_periph; + + bs16t0_clock_timer.parent.info = &bs16t0_info; + bs16t0_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&bs16t0_clock_timer.parent, ES_DEVICE_NAME_BS16T0_CLOCK_TIMER, &bs16t0_clock_timer); +#endif + +#ifdef BSP_USING_BS16T1_CLOCK_TIMER + static timer_handle_t bs16t1_clock_timer_periph; + + bs16t1_clock_timer_periph.perh = BS16T1; + bs16t1_clock_timer.IRQn = BS16T1_IRQn; + + bs16t1_clock_timer_periph.init.prescaler = ES_BS16T1_CLOCK_TIMER_PRES - 1; + bs16t1_clock_timer_periph.init.mode = ( ES_BS16T1_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + bs16t1_clock_timer.clock_timer_periph = &bs16t1_clock_timer_periph; + + bs16t1_clock_timer.parent.info = &bs16t1_info; + bs16t1_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&bs16t1_clock_timer.parent, ES_DEVICE_NAME_BS16T1_CLOCK_TIMER, &bs16t1_clock_timer); +#endif + + return ret; +} +INIT_BOARD_EXPORT(rt_hw_clock_timer_init); + +#endif diff --git a/bsp/essemi/es32f365x/drivers/drv_hwtimer.h b/bsp/essemi/es32f369x/drivers/drv_timer.h similarity index 86% rename from bsp/essemi/es32f365x/drivers/drv_hwtimer.h rename to bsp/essemi/es32f369x/drivers/drv_timer.h index bbf51a47715..676ebb23583 100644 --- a/bsp/essemi/es32f365x/drivers/drv_hwtimer.h +++ b/bsp/essemi/es32f369x/drivers/drv_timer.h @@ -21,10 +21,10 @@ * 2021-04-20 liuhy the second version */ -#ifndef DRV_HWTIMER_H__ -#define DRV_HWTIMER_H__ +#ifndef DRV_CLOCK_TIMER_H__ +#define DRV_CLOCK_TIMER_H__ -#include "es_conf_info_hwtimer.h" -int rt_hw_hwtimer_init(void); +#include "es_conf_info_clock_timer.h" +int rt_hw_clock_timer_init(void); #endif diff --git a/bsp/essemi/es32vf2264/drivers/ES/Kconfig b/bsp/essemi/es32vf2264/drivers/ES/Kconfig index 8c2fffd7b45..bea93ab8735 100644 --- a/bsp/essemi/es32vf2264/drivers/ES/Kconfig +++ b/bsp/essemi/es32vf2264/drivers/ES/Kconfig @@ -121,31 +121,31 @@ menu "ADC Drivers" endmenu -menu "HWTIMER Drivers" +menu "CLOCK_TIMER Drivers" - config BSP_USING_AD16C4T0_HWTIMER - bool "Register HWTIMER0 " - select RT_USING_HWTIMER + config BSP_USING_AD16C4T0_CLOCK_TIMER + bool "Register CLOCK_TIMER0 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_GP16C4T0_HWTIMER - bool "Register HWTIMER1 " - select RT_USING_HWTIMER + config BSP_USING_GP16C4T0_CLOCK_TIMER + bool "Register CLOCK_TIMER1 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_GP16C4T1_HWTIMER - bool "Register HWTIMER2 " - select RT_USING_HWTIMER + config BSP_USING_GP16C4T1_CLOCK_TIMER + bool "Register CLOCK_TIMER2 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_GP16C4T2_HWTIMER - bool "Register HWTIMER3 " - select RT_USING_HWTIMER + config BSP_USING_GP16C4T2_CLOCK_TIMER + bool "Register CLOCK_TIMER3 " + select RT_USING_CLOCK_TIME default n - config BSP_USING_BS16T0_HWTIMER - bool "Register HWTIMER4 " - select RT_USING_HWTIMER + config BSP_USING_BS16T0_CLOCK_TIMER + bool "Register CLOCK_TIMER4 " + select RT_USING_CLOCK_TIME default n endmenu @@ -156,25 +156,25 @@ menu "PWM Drivers" bool "Register PWM0 " select RT_USING_PWM default n - depends on !BSP_USING_AD16C4T0_HWTIMER + depends on !BSP_USING_AD16C4T0_CLOCK_TIMER config BSP_USING_GP16C4T0_PWM bool "Register PWM1 " select RT_USING_PWM default n - depends on !BSP_USING_GP16C4T0_HWTIMER + depends on !BSP_USING_GP16C4T0_CLOCK_TIMER config BSP_USING_GP16C4T1_PWM bool "Register PWM2 " select RT_USING_PWM default n - depends on !BSP_USING_GP16C4T1_HWTIMER + depends on !BSP_USING_GP16C4T1_CLOCK_TIMER config BSP_USING_GP16C4T2_PWM bool "Register PWM3 " select RT_USING_PWM default n - depends on !BSP_USING_GP16C4T1_HWTIMER + depends on !BSP_USING_GP16C4T1_CLOCK_TIMER endmenu diff --git a/bsp/essemi/es32vf2264/drivers/ES/es_conf_info_clock_timer.h b/bsp/essemi/es32vf2264/drivers/ES/es_conf_info_clock_timer.h new file mode 100644 index 00000000000..8f7f65b43ea --- /dev/null +++ b/bsp/essemi/es32vf2264/drivers/ES/es_conf_info_clock_timer.h @@ -0,0 +1,103 @@ +/* + * Change Logs: + * Date Author Notes + * 2021-04-20 liuhy the first version + * + * Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + */ + +#ifndef __ES_CONF_INFO_CLOCK_TIMER_H__ +#define __ES_CONF_INFO_CLOCK_TIMER_H__ + +#include +#include + +#define ES_C_CLOCK_TIMER_MODE_UP CLOCK_TIMER_CNTMODE_UP +#define ES_C_CLOCK_TIMER_MODE_DOWN CLOCK_TIMER_CNTMODE_DW + +/* CLOCK_TIMER 配置 */ + +/* codes_main */ + + + +#ifndef ES_AD16C4T0_CLOCK_TIMER_MODE +#define ES_AD16C4T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif + +#ifndef ES_GP16C4T0_CLOCK_TIMER_MODE +#define ES_GP16C4T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP16C4T1_CLOCK_TIMER_MODE +#define ES_GP16C4T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_GP16C4T2_CLOCK_TIMER_MODE +#define ES_GP16C4T2_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T0_CLOCK_TIMER_MODE +#define ES_BS16T0_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T1_CLOCK_TIMER_MODE +#define ES_BS16T1_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T2_CLOCK_TIMER_MODE +#define ES_BS16T2_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif +#ifndef ES_BS16T3_CLOCK_TIMER_MODE +#define ES_BS16T3_CLOCK_TIMER_MODE ES_C_CLOCK_TIMER_MODE_UP +#endif + + + + +#define ES_AD16C4T0_CLOCK_TIMER_PRES 1 +#define ES_GP16C4T0_CLOCK_TIMER_PRES 1 +#define ES_GP16C2T0_CLOCK_TIMER_PRES 1 +#define ES_GP16C2T1_CLOCK_TIMER_PRES 1 +#define ES_BS16T0_CLOCK_TIMER_PRES 1 +#define ES_BS16T1_CLOCK_TIMER_PRES 1 +#define ES_BS16T2_CLOCK_TIMER_PRES 1 +#define ES_BS16T3_CLOCK_TIMER_PRES 1 + +#ifndef ES_DEVICE_NAME_AD16C4T0_CLOCK_TIMER +#define ES_DEVICE_NAME_AD16C4T0_CLOCK_TIMER "timer0" +#endif +#ifndef ES_DEVICE_NAME_GP16C4T0_CLOCK_TIMER +#define ES_DEVICE_NAME_GP16C4T0_CLOCK_TIMER "timer1" +#endif +#ifndef ES_DEVICE_NAME_GP16C4T1_CLOCK_TIMER +#define ES_DEVICE_NAME_GP16C4T1_CLOCK_TIMER "timer2" +#endif +#ifndef ES_DEVICE_NAME_GP16C4T2_CLOCK_TIMER +#define ES_DEVICE_NAME_GP16C4T2_CLOCK_TIMER "timer3" +#endif +#ifndef ES_DEVICE_NAME_BS16T0_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T0_CLOCK_TIMER "timer4" +#endif +#ifndef ES_DEVICE_NAME_BS16T1_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T1_CLOCK_TIMER "timer5" +#endif +#ifndef ES_DEVICE_NAME_BS16T2_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T2_CLOCK_TIMER "timer6" +#endif +#ifndef ES_DEVICE_NAME_BS16T3_CLOCK_TIMER +#define ES_DEVICE_NAME_BS16T3_CLOCK_TIMER "timer7" +#endif + + +#endif diff --git a/bsp/essemi/es32vf2264/drivers/ES/es_conf_info_hwtimer.h b/bsp/essemi/es32vf2264/drivers/ES/es_conf_info_hwtimer.h deleted file mode 100644 index f712810bcb6..00000000000 --- a/bsp/essemi/es32vf2264/drivers/ES/es_conf_info_hwtimer.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Change Logs: - * Date Author Notes - * 2021-04-20 liuhy the first version - * - * Copyright (C) 2021 Shanghai Eastsoft Microelectronics Co., Ltd. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - */ - -#ifndef __ES_CONF_INFO_HWTIMER_H__ -#define __ES_CONF_INFO_HWTIMER_H__ - -#include -#include - -#define ES_C_HWTIMER_MODE_UP HWTIMER_CNTMODE_UP -#define ES_C_HWTIMER_MODE_DOWN HWTIMER_CNTMODE_DW - -/* HWTIMER 配置 */ - -/* codes_main */ - - - -#ifndef ES_AD16C4T0_HWTIMER_MODE -#define ES_AD16C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif - -#ifndef ES_GP16C4T0_HWTIMER_MODE -#define ES_GP16C4T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP16C4T1_HWTIMER_MODE -#define ES_GP16C4T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_GP16C4T2_HWTIMER_MODE -#define ES_GP16C4T2_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T0_HWTIMER_MODE -#define ES_BS16T0_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T1_HWTIMER_MODE -#define ES_BS16T1_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T2_HWTIMER_MODE -#define ES_BS16T2_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif -#ifndef ES_BS16T3_HWTIMER_MODE -#define ES_BS16T3_HWTIMER_MODE ES_C_HWTIMER_MODE_UP -#endif - - - - -#define ES_AD16C4T0_HWTIMER_PRES 1 -#define ES_GP16C4T0_HWTIMER_PRES 1 -#define ES_GP16C2T0_HWTIMER_PRES 1 -#define ES_GP16C2T1_HWTIMER_PRES 1 -#define ES_BS16T0_HWTIMER_PRES 1 -#define ES_BS16T1_HWTIMER_PRES 1 -#define ES_BS16T2_HWTIMER_PRES 1 -#define ES_BS16T3_HWTIMER_PRES 1 - -#ifndef ES_DEVICE_NAME_AD16C4T0_HWTIMER -#define ES_DEVICE_NAME_AD16C4T0_HWTIMER "timer0" -#endif -#ifndef ES_DEVICE_NAME_GP16C4T0_HWTIMER -#define ES_DEVICE_NAME_GP16C4T0_HWTIMER "timer1" -#endif -#ifndef ES_DEVICE_NAME_GP16C4T1_HWTIMER -#define ES_DEVICE_NAME_GP16C4T1_HWTIMER "timer2" -#endif -#ifndef ES_DEVICE_NAME_GP16C4T2_HWTIMER -#define ES_DEVICE_NAME_GP16C4T2_HWTIMER "timer3" -#endif -#ifndef ES_DEVICE_NAME_BS16T0_HWTIMER -#define ES_DEVICE_NAME_BS16T0_HWTIMER "timer4" -#endif -#ifndef ES_DEVICE_NAME_BS16T1_HWTIMER -#define ES_DEVICE_NAME_BS16T1_HWTIMER "timer5" -#endif -#ifndef ES_DEVICE_NAME_BS16T2_HWTIMER -#define ES_DEVICE_NAME_BS16T2_HWTIMER "timer6" -#endif -#ifndef ES_DEVICE_NAME_BS16T3_HWTIMER -#define ES_DEVICE_NAME_BS16T3_HWTIMER "timer7" -#endif - - -#endif diff --git a/bsp/essemi/es32vf2264/drivers/SConscript b/bsp/essemi/es32vf2264/drivers/SConscript index d5a224afc43..24861f45eac 100644 --- a/bsp/essemi/es32vf2264/drivers/SConscript +++ b/bsp/essemi/es32vf2264/drivers/SConscript @@ -46,15 +46,15 @@ if GetDepend(['BSP_USING_RTC']): if GetDepend('BSP_USING_SPI_FLASH'): src += ['drv_spiflash.c'] -# add hwtimer driver code -if GetDepend('BSP_USING_AD16C4T0_HWTIMER') or GetDepend('BSP_USING_AD16C4T1_HWTIMER') or \ - GetDepend('BSP_USING_GP32C4T0_HWTIMER') or GetDepend('BSP_USING_GP32C4T1_HWTIMER') or \ - GetDepend('BSP_USING_GP16C4T0_HWTIMER') or GetDepend('BSP_USING_GP16C4T1_HWTIMER') or GetDepend('BSP_USING_GP16C4T2_HWTIMER') or \ - GetDepend('BSP_USING_GP16C2T0_HWTIMER') or GetDepend('BSP_USING_GP16C2T1_HWTIMER') or \ - GetDepend('BSP_USING_GP16C4T0_HWTIMER') or GetDepend('BSP_USING_GP16C4T1_HWTIMER') or \ - GetDepend('BSP_USING_BS16T0_HWTIMER') or GetDepend('BSP_USING_BS16T1_HWTIMERIMER') or \ - GetDepend('BSP_USING_BS16T2_HWTIMER') or GetDepend('BSP_USING_BS16T3_HWTIMER'): - src += ['drv_hwtimer.c'] +# add clock_timer driver code +if GetDepend('BSP_USING_AD16C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_AD16C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP32C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP32C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP16C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP16C4T1_CLOCK_TIMER') or GetDepend('BSP_USING_GP16C4T2_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP16C2T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP16C2T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_GP16C4T0_CLOCK_TIMER') or GetDepend('BSP_USING_GP16C4T1_CLOCK_TIMER') or \ + GetDepend('BSP_USING_BS16T0_CLOCK_TIMER') or GetDepend('BSP_USING_BS16T1_CLOCK_TIMERIMER') or \ + GetDepend('BSP_USING_BS16T2_CLOCK_TIMER') or GetDepend('BSP_USING_BS16T3_CLOCK_TIMER'): + src += ['drv_timer.c'] # add pwm driver code if GetDepend('BSP_USING_AD16C4T0_PWM') or GetDepend('BSP_USING_AD16C4T1_PWM') or \ diff --git a/bsp/essemi/es32vf2264/drivers/board.h b/bsp/essemi/es32vf2264/drivers/board.h index a230d97a39a..3f5cb6a0816 100644 --- a/bsp/essemi/es32vf2264/drivers/board.h +++ b/bsp/essemi/es32vf2264/drivers/board.h @@ -36,7 +36,7 @@ #include "es_conf_info_map.h" #include "es_conf_info_gpio.h" #include "es_conf_info_adc.h" -#include "es_conf_info_hwtimer.h" +#include "es_conf_info_clock_timer.h" #include "es_conf_info_pwm.h" #include "es_conf_info_uart.h" #include "es_conf_info_spi.h" diff --git a/bsp/essemi/es32vf2264/drivers/drv_hwtimer.c b/bsp/essemi/es32vf2264/drivers/drv_hwtimer.c deleted file mode 100644 index e42819af094..00000000000 --- a/bsp/essemi/es32vf2264/drivers/drv_hwtimer.c +++ /dev/null @@ -1,354 +0,0 @@ -/* - * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * Change Logs: - * Date Author Notes - * 2019-3-19 wangyq the first version - * 2019-11-01 wangyq update libraries - * 2021-04-20 liuhy the second version - */ - -#include -#include -#include -#include -#include - - -#ifdef RT_USING_HWTIMER - -struct es32f3_hwtimer_dev -{ - rt_hwtimer_t parent; - ald_timer_handle_t *hwtimer_periph; - IRQn_Type IRQn; -}; - -#ifdef BSP_USING_AD16C4T0_HWTIMER -static struct es32f3_hwtimer_dev ad16c4t0_hwtimer; - -static struct rt_hwtimer_info ad16c4t0_info = -{ - ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV, /* maximum count frequency */ - (ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_AD16C4T0_HWTIMER_MODE -}; - -void __attribute__((interrupt)) AD16C4T_Handler(void) -{ - rt_interrupt_enter(); - ald_timer_clear_flag_status(ad16c4t0_hwtimer.hwtimer_periph, ALD_TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&ad16c4t0_hwtimer.parent); - rt_interrupt_leave(); -} - -#endif - -#ifdef BSP_USING_GP16C4T0_HWTIMER - -static struct es32f3_hwtimer_dev gp16c4t0_hwtimer; - -static struct rt_hwtimer_info gp16c4t0_info = -{ - ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV, /* maximum count frequency */ - (ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_GP16C4T0_HWTIMER_MODE -}; - -void __attribute__((interrupt)) GPTIMB0_Handler(void) -{ - rt_interrupt_enter(); - ald_timer_clear_flag_status(gp16c4t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&gp16c4t0_hwtimer.parent); - rt_interrupt_leave(); -} - -#endif -#ifdef BSP_USING_GP16C4T1_HWTIMER - -static struct es32f3_hwtimer_dev gp16c4t1_hwtimer; - -static struct rt_hwtimer_info gp16c4t1_info = -{ - ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV, /* maximum count frequency */ - (ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_GP16C4T1_HWTIMER_MODE -}; - -void __attribute__((interrupt)) GPTIMB1_Handler(void) -{ - rt_interrupt_enter(); - ald_timer_clear_flag_status(gp16c4t1_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&gp16c4t1_hwtimer.parent); - rt_interrupt_leave(); -} - -#endif -#ifdef BSP_USING_GP16C4T1_HWTIMER - -static struct es32f3_hwtimer_dev gp16c4t1_hwtimer; - -static struct rt_hwtimer_info gp16c4t1_info = -{ - ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV, /* maximum count frequency */ - (ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_GP16C4T1_HWTIMER_MODE -}; - -void __attribute__((interrupt)) GPTIMB2_Handler(void) -{ - rt_interrupt_enter(); - ald_timer_clear_flag_status(gp16c4t1_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&gp16c4t1_hwtimer.parent); - rt_interrupt_leave(); -} - -#endif -#ifdef BSP_USING_BS16T0_HWTIMER - -static struct es32f3_hwtimer_dev bs16t0_hwtimer; - -static struct rt_hwtimer_info bs16t0_info = -{ - ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV, /* maximum count frequency */ - (ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV)/(1U<<16), /* minimum count frequency */ - 0xFFFF, /* counter maximum value */ - ES_BS16T0_HWTIMER_MODE -}; - -void __attribute__((interrupt)) BSTIM0_Handler(void) -{ - rt_interrupt_enter(); - ald_timer_clear_flag_status(bs16t0_hwtimer.hwtimer_periph, TIMER_FLAG_UPDATE); - rt_device_hwtimer_isr(&bs16t0_hwtimer.parent); - rt_interrupt_leave(); -} - -#endif - -static void es32f3_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) -{ - struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data; - - struct rt_hwtimer_info *hwtimer_info = (struct rt_hwtimer_info *)timer->info; - - RT_ASSERT(hwtimer != RT_NULL); - - if (1 == state) - { - ald_timer_base_init(hwtimer->hwtimer_periph); - ald_timer_interrupt_config(hwtimer->hwtimer_periph, ALD_TIMER_IT_UPDATE, ENABLE); - csi_vic_enable_sirq(hwtimer->IRQn); - } - - hwtimer->parent.freq = ald_cmu_get_pclk_clock()/((hwtimer->hwtimer_periph->perh->PRES & 0xFFFF)+1); - hwtimer_info->maxfreq = hwtimer->parent.freq; - hwtimer_info->minfreq = (hwtimer->parent.freq)/0xFFFF; - -} - -static rt_err_t es32f3_hwtimer_start(rt_hwtimer_t *timer, - rt_uint32_t cnt, - rt_hwtimer_mode_t mode) -{ - struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data; - - RT_ASSERT(hwtimer != RT_NULL); - - WRITE_REG(hwtimer->hwtimer_periph->perh->AR, cnt); - ald_timer_base_start(hwtimer->hwtimer_periph); - - return RT_EOK; -} - -static void es32f3_hwtimer_stop(rt_hwtimer_t *timer) -{ - struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data; - - RT_ASSERT(hwtimer != RT_NULL); - - ald_timer_base_stop(hwtimer->hwtimer_periph); -} - -static rt_uint32_t es32f3_hwtimer_count_get(rt_hwtimer_t *timer) -{ - struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data; - uint32_t hwtimer_count = 0; - - RT_ASSERT(hwtimer != RT_NULL); - - hwtimer_count = READ_REG(hwtimer->hwtimer_periph->perh->COUNT); - - return hwtimer_count; -} - -static rt_err_t es32f3_hwtimer_control(rt_hwtimer_t *timer, - rt_uint32_t cmd, - void *args) -{ - rt_err_t ret = RT_EOK; - rt_uint32_t freq = 0; - struct es32f3_hwtimer_dev *hwtimer = (struct es32f3_hwtimer_dev *)timer->parent.user_data; - - RT_ASSERT(hwtimer != RT_NULL); - - switch (cmd) - { - case HWTIMER_CTRL_FREQ_SET: - freq = *(rt_uint32_t *)args; - - ret = -RT_ERROR; - - if(freq) - { - double temp,target; - temp = (double)ald_cmu_get_pclk_clock(); - target = temp/freq; - - if(target < 0x10001) /*最大分频 = max(PRES)+1*/ - { - temp = target - (int)(target); - - if((temp > 0.998)&&(target < 0x10000)) - { - hwtimer->hwtimer_periph->perh->PRES = (uint32_t)target; - ret = RT_EOK; - } - if((temp < 0.002)&&(target >= 0x1)) - { - hwtimer->hwtimer_periph->perh->PRES = (uint32_t)target - 1; - ret = RT_EOK; - } - - } - - if(ret == RT_EOK) /*更新信息*/ - hwtimer->parent.freq = ald_cmu_get_pclk_clock()/((hwtimer->hwtimer_periph->perh->PRES & 0xFFFF)+1); - - } - - break; - - case HWTIMER_CTRL_STOP: - ald_timer_base_stop(hwtimer->hwtimer_periph); - break; - - default: - ret = RT_EINVAL; - break; - } - - return ret; -} - -static struct rt_hwtimer_ops es32f3_hwtimer_ops = -{ - es32f3_hwtimer_init, - es32f3_hwtimer_start, - es32f3_hwtimer_stop, - es32f3_hwtimer_count_get, - es32f3_hwtimer_control -}; - -int rt_hw_hwtimer_init(void) -{ - rt_err_t ret = RT_EOK; - -#ifdef BSP_USING_AD16C4T0_HWTIMER - static ald_timer_handle_t ad16c4t0_hwtimer_periph; - - ad16c4t0_hwtimer_periph.perh = AD16C4T; - ad16c4t0_hwtimer.IRQn = AD16C4T_IRQn; - - ad16c4t0_hwtimer_periph.init.prescaler = ES_AD16C4T0_HWTIMER_PRES - 1; - ad16c4t0_hwtimer_periph.init.mode = ( ES_AD16C4T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? ALD_TIMER_CNT_MODE_UP : ALD_TIMER_CNT_MODE_DOWN; - ad16c4t0_hwtimer.hwtimer_periph = &ad16c4t0_hwtimer_periph; - - ad16c4t0_hwtimer.parent.info = &ad16c4t0_info; - ad16c4t0_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&ad16c4t0_hwtimer.parent, ES_DEVICE_NAME_AD16C4T0_HWTIMER, &ad16c4t0_hwtimer); -#endif - -#ifdef BSP_USING_GP16C4T0_HWTIMER - static timer_handle_t gp16c4t0_hwtimer_periph; - - gp16c4t0_hwtimer_periph.perh = GP16C4T0; - gp16c4t0_hwtimer.IRQn = GP16C4T0_IRQn; - - gp16c4t0_hwtimer_periph.init.prescaler = ES_GP16C4T0_HWTIMER_PRES - 1; - gp16c4t0_hwtimer_periph.init.mode = ( ES_GP16C4T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - gp16c4t0_hwtimer.hwtimer_periph = &gp16c4t0_hwtimer_periph; - - gp16c4t0_hwtimer.parent.info = &gp16c4t0_info; - gp16c4t0_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&gp16c4t0_hwtimer.parent, ES_DEVICE_NAME_GP16C4T0_HWTIMER, &gp16c4t0_hwtimer); -#endif - -#ifdef BSP_USING_GP16C4T1_HWTIMER - static timer_handle_t gp16c4t1_hwtimer_periph; - - gp16c4t1_hwtimer_periph.perh = GP16C4T1; - gp16c4t1_hwtimer.IRQn = GP16C4T1_IRQn; - - gp16c4t1_hwtimer_periph.init.prescaler = ES_GP16C4T1_HWTIMER_PRES - 1; - gp16c4t1_hwtimer_periph.init.mode = ( ES_GP16C4T1_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - gp16c4t1_hwtimer.hwtimer_periph = &gp16c4t1_hwtimer_periph; - - gp16c4t1_hwtimer.parent.info = &gp16c4t1_info; - gp16c4t1_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&gp16c4t1_hwtimer.parent, ES_DEVICE_NAME_GP16C4T1_HWTIMER, &gp16c4t1_hwtimer); -#endif - -#ifdef BSP_USING_GP16C4T2_HWTIMER - static timer_handle_t gp16c4t2_hwtimer_periph; - - gp16c4t2_hwtimer_periph.perh = GP16C4T2; - gp16c4t2_hwtimer.IRQn = GP16C4T2_IRQn; - - gp16c4t2_hwtimer_periph.init.prescaler = ES_GP16C4T2_HWTIMER_PRES - 1; - gp16c4t2_hwtimer_periph.init.mode = ( ES_GP16C4T2_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - gp16c4t2_hwtimer.hwtimer_periph = &gp16c4t2_hwtimer_periph; - - gp16c4t2_hwtimer.parent.info = &gp16c4t2_info; - gp16c4t2_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&gp16c4t2_hwtimer.parent, ES_DEVICE_NAME_GP16C4T2_HWTIMER, &gp16c4t2_hwtimer); -#endif - -#ifdef BSP_USING_BS16T0_HWTIMER - static timer_handle_t bs16t0_hwtimer_periph; - - bs16t0_hwtimer_periph.perh = BS16T0; - bs16t0_hwtimer.IRQn = BS16T0_IRQn; - - bs16t0_hwtimer_periph.init.prescaler = ES_BS16T0_HWTIMER_PRES - 1; - bs16t0_hwtimer_periph.init.mode = ( ES_BS16T0_HWTIMER_MODE == HWTIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; - bs16t0_hwtimer.hwtimer_periph = &bs16t0_hwtimer_periph; - - bs16t0_hwtimer.parent.info = &bs16t0_info; - bs16t0_hwtimer.parent.ops = &es32f3_hwtimer_ops; - ret = rt_device_hwtimer_register(&bs16t0_hwtimer.parent, ES_DEVICE_NAME_BS16T0_HWTIMER, &bs16t0_hwtimer); -#endif - - return ret; -} -INIT_BOARD_EXPORT(rt_hw_hwtimer_init); - -#endif diff --git a/bsp/essemi/es32vf2264/drivers/drv_timer.c b/bsp/essemi/es32vf2264/drivers/drv_timer.c new file mode 100644 index 00000000000..b2078975b01 --- /dev/null +++ b/bsp/essemi/es32vf2264/drivers/drv_timer.c @@ -0,0 +1,354 @@ +/* + * Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd. + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the License); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * Change Logs: + * Date Author Notes + * 2019-3-19 wangyq the first version + * 2019-11-01 wangyq update libraries + * 2021-04-20 liuhy the second version + */ + +#include +#include +#include +#include +#include + + +#ifdef RT_USING_CLOCK_TIME + +struct es32f3_clock_timer_dev +{ + rt_clock_timer_t parent; + ald_timer_handle_t *clock_timer_periph; + IRQn_Type IRQn; +}; + +#ifdef BSP_USING_AD16C4T0_CLOCK_TIMER +static struct es32f3_clock_timer_dev ad16c4t0_clock_timer; + +static struct rt_clock_timer_info ad16c4t0_info = +{ + ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV, /* maximum count frequency */ + (ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_AD16C4T0_CLOCK_TIMER_MODE +}; + +void __attribute__((interrupt)) AD16C4T_Handler(void) +{ + rt_interrupt_enter(); + ald_timer_clear_flag_status(ad16c4t0_clock_timer.clock_timer_periph, ALD_TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&ad16c4t0_clock_timer.parent); + rt_interrupt_leave(); +} + +#endif + +#ifdef BSP_USING_GP16C4T0_CLOCK_TIMER + +static struct es32f3_clock_timer_dev gp16c4t0_clock_timer; + +static struct rt_clock_timer_info gp16c4t0_info = +{ + ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV, /* maximum count frequency */ + (ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_GP16C4T0_CLOCK_TIMER_MODE +}; + +void __attribute__((interrupt)) GPTIMB0_Handler(void) +{ + rt_interrupt_enter(); + ald_timer_clear_flag_status(gp16c4t0_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&gp16c4t0_clock_timer.parent); + rt_interrupt_leave(); +} + +#endif +#ifdef BSP_USING_GP16C4T1_CLOCK_TIMER + +static struct es32f3_clock_timer_dev gp16c4t1_clock_timer; + +static struct rt_clock_timer_info gp16c4t1_info = +{ + ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV, /* maximum count frequency */ + (ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_GP16C4T1_CLOCK_TIMER_MODE +}; + +void __attribute__((interrupt)) GPTIMB1_Handler(void) +{ + rt_interrupt_enter(); + ald_timer_clear_flag_status(gp16c4t1_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&gp16c4t1_clock_timer.parent); + rt_interrupt_leave(); +} + +#endif +#ifdef BSP_USING_GP16C4T1_CLOCK_TIMER + +static struct es32f3_clock_timer_dev gp16c4t1_clock_timer; + +static struct rt_clock_timer_info gp16c4t1_info = +{ + ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV, /* maximum count frequency */ + (ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_GP16C4T1_CLOCK_TIMER_MODE +}; + +void __attribute__((interrupt)) GPTIMB2_Handler(void) +{ + rt_interrupt_enter(); + ald_timer_clear_flag_status(gp16c4t1_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&gp16c4t1_clock_timer.parent); + rt_interrupt_leave(); +} + +#endif +#ifdef BSP_USING_BS16T0_CLOCK_TIMER + +static struct es32f3_clock_timer_dev bs16t0_clock_timer; + +static struct rt_clock_timer_info bs16t0_info = +{ + ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV, /* maximum count frequency */ + (ES_SYS_HCLK_CLK >> ES_CMU_PCLK_DIV)/(1U<<16), /* minimum count frequency */ + 0xFFFF, /* counter maximum value */ + ES_BS16T0_CLOCK_TIMER_MODE +}; + +void __attribute__((interrupt)) BSTIM0_Handler(void) +{ + rt_interrupt_enter(); + ald_timer_clear_flag_status(bs16t0_clock_timer.clock_timer_periph, TIMER_FLAG_UPDATE); + rt_clock_timer_isr(&bs16t0_clock_timer.parent); + rt_interrupt_leave(); +} + +#endif + +static void es32f3_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) +{ + struct es32f3_clock_timer_dev *clock_timer = (struct es32f3_clock_timer_dev *)timer->parent.user_data; + + struct rt_clock_timer_info *clock_timer_info = (struct rt_clock_timer_info *)timer->info; + + RT_ASSERT(clock_timer != RT_NULL); + + if (1 == state) + { + ald_timer_base_init(clock_timer->clock_timer_periph); + ald_timer_interrupt_config(clock_timer->clock_timer_periph, ALD_TIMER_IT_UPDATE, ENABLE); + csi_vic_enable_sirq(clock_timer->IRQn); + } + + clock_timer->parent.freq = ald_cmu_get_pclk_clock()/((clock_timer->clock_timer_periph->perh->PRES & 0xFFFF)+1); + clock_timer_info->maxfreq = clock_timer->parent.freq; + clock_timer_info->minfreq = (clock_timer->parent.freq)/0xFFFF; + +} + +static rt_err_t es32f3_clock_timer_start(rt_clock_timer_t *timer, + rt_uint32_t cnt, + rt_clock_timer_mode_t mode) +{ + struct es32f3_clock_timer_dev *clock_timer = (struct es32f3_clock_timer_dev *)timer->parent.user_data; + + RT_ASSERT(clock_timer != RT_NULL); + + WRITE_REG(clock_timer->clock_timer_periph->perh->AR, cnt); + ald_timer_base_start(clock_timer->clock_timer_periph); + + return RT_EOK; +} + +static void es32f3_clock_timer_stop(rt_clock_timer_t *timer) +{ + struct es32f3_clock_timer_dev *clock_timer = (struct es32f3_clock_timer_dev *)timer->parent.user_data; + + RT_ASSERT(clock_timer != RT_NULL); + + ald_timer_base_stop(clock_timer->clock_timer_periph); +} + +static rt_uint32_t es32f3_clock_timer_count_get(rt_clock_timer_t *timer) +{ + struct es32f3_clock_timer_dev *clock_timer = (struct es32f3_clock_timer_dev *)timer->parent.user_data; + uint32_t clock_timer_count = 0; + + RT_ASSERT(clock_timer != RT_NULL); + + clock_timer_count = READ_REG(clock_timer->clock_timer_periph->perh->COUNT); + + return clock_timer_count; +} + +static rt_err_t es32f3_clock_timer_control(rt_clock_timer_t *timer, + rt_uint32_t cmd, + void *args) +{ + rt_err_t ret = RT_EOK; + rt_uint32_t freq = 0; + struct es32f3_clock_timer_dev *clock_timer = (struct es32f3_clock_timer_dev *)timer->parent.user_data; + + RT_ASSERT(clock_timer != RT_NULL); + + switch (cmd) + { + case CLOCK_TIMER_CTRL_FREQ_SET: + freq = *(rt_uint32_t *)args; + + ret = -RT_ERROR; + + if(freq) + { + double temp,target; + temp = (double)ald_cmu_get_pclk_clock(); + target = temp/freq; + + if(target < 0x10001) /*最大分频 = max(PRES)+1*/ + { + temp = target - (int)(target); + + if((temp > 0.998)&&(target < 0x10000)) + { + clock_timer->clock_timer_periph->perh->PRES = (uint32_t)target; + ret = RT_EOK; + } + if((temp < 0.002)&&(target >= 0x1)) + { + clock_timer->clock_timer_periph->perh->PRES = (uint32_t)target - 1; + ret = RT_EOK; + } + + } + + if(ret == RT_EOK) /*更新信息*/ + clock_timer->parent.freq = ald_cmu_get_pclk_clock()/((clock_timer->clock_timer_periph->perh->PRES & 0xFFFF)+1); + + } + + break; + + case CLOCK_TIMER_CTRL_STOP: + ald_timer_base_stop(clock_timer->clock_timer_periph); + break; + + default: + ret = RT_EINVAL; + break; + } + + return ret; +} + +static struct rt_clock_timer_ops es32f3_clock_timer_ops = +{ + es32f3_clock_timer_init, + es32f3_clock_timer_start, + es32f3_clock_timer_stop, + es32f3_clock_timer_count_get, + es32f3_clock_timer_control +}; + +int rt_hw_clock_timer_init(void) +{ + rt_err_t ret = RT_EOK; + +#ifdef BSP_USING_AD16C4T0_CLOCK_TIMER + static ald_timer_handle_t ad16c4t0_clock_timer_periph; + + ad16c4t0_clock_timer_periph.perh = AD16C4T; + ad16c4t0_clock_timer.IRQn = AD16C4T_IRQn; + + ad16c4t0_clock_timer_periph.init.prescaler = ES_AD16C4T0_CLOCK_TIMER_PRES - 1; + ad16c4t0_clock_timer_periph.init.mode = ( ES_AD16C4T0_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? ALD_TIMER_CNT_MODE_UP : ALD_TIMER_CNT_MODE_DOWN; + ad16c4t0_clock_timer.clock_timer_periph = &ad16c4t0_clock_timer_periph; + + ad16c4t0_clock_timer.parent.info = &ad16c4t0_info; + ad16c4t0_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&ad16c4t0_clock_timer.parent, ES_DEVICE_NAME_AD16C4T0_CLOCK_TIMER, &ad16c4t0_clock_timer); +#endif + +#ifdef BSP_USING_GP16C4T0_CLOCK_TIMER + static timer_handle_t gp16c4t0_clock_timer_periph; + + gp16c4t0_clock_timer_periph.perh = GP16C4T0; + gp16c4t0_clock_timer.IRQn = GP16C4T0_IRQn; + + gp16c4t0_clock_timer_periph.init.prescaler = ES_GP16C4T0_CLOCK_TIMER_PRES - 1; + gp16c4t0_clock_timer_periph.init.mode = ( ES_GP16C4T0_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + gp16c4t0_clock_timer.clock_timer_periph = &gp16c4t0_clock_timer_periph; + + gp16c4t0_clock_timer.parent.info = &gp16c4t0_info; + gp16c4t0_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&gp16c4t0_clock_timer.parent, ES_DEVICE_NAME_GP16C4T0_CLOCK_TIMER, &gp16c4t0_clock_timer); +#endif + +#ifdef BSP_USING_GP16C4T1_CLOCK_TIMER + static timer_handle_t gp16c4t1_clock_timer_periph; + + gp16c4t1_clock_timer_periph.perh = GP16C4T1; + gp16c4t1_clock_timer.IRQn = GP16C4T1_IRQn; + + gp16c4t1_clock_timer_periph.init.prescaler = ES_GP16C4T1_CLOCK_TIMER_PRES - 1; + gp16c4t1_clock_timer_periph.init.mode = ( ES_GP16C4T1_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + gp16c4t1_clock_timer.clock_timer_periph = &gp16c4t1_clock_timer_periph; + + gp16c4t1_clock_timer.parent.info = &gp16c4t1_info; + gp16c4t1_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&gp16c4t1_clock_timer.parent, ES_DEVICE_NAME_GP16C4T1_CLOCK_TIMER, &gp16c4t1_clock_timer); +#endif + +#ifdef BSP_USING_GP16C4T2_CLOCK_TIMER + static timer_handle_t gp16c4t2_clock_timer_periph; + + gp16c4t2_clock_timer_periph.perh = GP16C4T2; + gp16c4t2_clock_timer.IRQn = GP16C4T2_IRQn; + + gp16c4t2_clock_timer_periph.init.prescaler = ES_GP16C4T2_CLOCK_TIMER_PRES - 1; + gp16c4t2_clock_timer_periph.init.mode = ( ES_GP16C4T2_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + gp16c4t2_clock_timer.clock_timer_periph = &gp16c4t2_clock_timer_periph; + + gp16c4t2_clock_timer.parent.info = &gp16c4t2_info; + gp16c4t2_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&gp16c4t2_clock_timer.parent, ES_DEVICE_NAME_GP16C4T2_CLOCK_TIMER, &gp16c4t2_clock_timer); +#endif + +#ifdef BSP_USING_BS16T0_CLOCK_TIMER + static timer_handle_t bs16t0_clock_timer_periph; + + bs16t0_clock_timer_periph.perh = BS16T0; + bs16t0_clock_timer.IRQn = BS16T0_IRQn; + + bs16t0_clock_timer_periph.init.prescaler = ES_BS16T0_CLOCK_TIMER_PRES - 1; + bs16t0_clock_timer_periph.init.mode = ( ES_BS16T0_CLOCK_TIMER_MODE == CLOCK_TIMER_CNTMODE_UP )? TIMER_CNT_MODE_UP : TIMER_CNT_MODE_DOWN; + bs16t0_clock_timer.clock_timer_periph = &bs16t0_clock_timer_periph; + + bs16t0_clock_timer.parent.info = &bs16t0_info; + bs16t0_clock_timer.parent.ops = &es32f3_clock_timer_ops; + ret = rt_clock_timer_register(&bs16t0_clock_timer.parent, ES_DEVICE_NAME_BS16T0_CLOCK_TIMER, &bs16t0_clock_timer); +#endif + + return ret; +} +INIT_BOARD_EXPORT(rt_hw_clock_timer_init); + +#endif diff --git a/bsp/essemi/es32f369x/drivers/drv_hwtimer.h b/bsp/essemi/es32vf2264/drivers/drv_timer.h similarity index 86% rename from bsp/essemi/es32f369x/drivers/drv_hwtimer.h rename to bsp/essemi/es32vf2264/drivers/drv_timer.h index bbf51a47715..676ebb23583 100644 --- a/bsp/essemi/es32f369x/drivers/drv_hwtimer.h +++ b/bsp/essemi/es32vf2264/drivers/drv_timer.h @@ -21,10 +21,10 @@ * 2021-04-20 liuhy the second version */ -#ifndef DRV_HWTIMER_H__ -#define DRV_HWTIMER_H__ +#ifndef DRV_CLOCK_TIMER_H__ +#define DRV_CLOCK_TIMER_H__ -#include "es_conf_info_hwtimer.h" -int rt_hw_hwtimer_init(void); +#include "es_conf_info_clock_timer.h" +int rt_hw_clock_timer_init(void); #endif diff --git a/bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/SConscript b/bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/SConscript index 46d626df1e5..14fbf4f1ca4 100644 --- a/bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/SConscript +++ b/bsp/fm33lc026/libraries/FM33LC0xx_FL_Driver/SConscript @@ -27,7 +27,7 @@ if GetDepend(['RT_USING_I2C']): if GetDepend(['RT_USING_SPI']): src += ['Src/fm33lc0xx_fl_spi.c'] -if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']): +if GetDepend(['RT_USING_CLOCK_TIME']) or GetDepend(['RT_USING_PWM']): src += ['Src/fm33lc0xx_fl_atim.c'] src += ['Src/fm33lc0xx_fl_bstim32.c'] diff --git a/bsp/fm33lc026/libraries/HAL_Drivers/SConscript b/bsp/fm33lc026/libraries/HAL_Drivers/SConscript index b95ebbf2407..704e728356a 100644 --- a/bsp/fm33lc026/libraries/HAL_Drivers/SConscript +++ b/bsp/fm33lc026/libraries/HAL_Drivers/SConscript @@ -14,8 +14,8 @@ if GetDepend(['RT_USING_PIN']): if GetDepend(['RT_USING_SERIAL']): src += ['drv_usart.c'] -if GetDepend(['RT_USING_HWTIMER']): - src += ['drv_hwtimer.c'] +if GetDepend(['RT_USING_CLOCK_TIME']): + src += ['drv_timer.c'] if GetDepend(['RT_USING_PWM']): src += ['drv_pwm.c'] diff --git a/bsp/ft2004/libraries/SConscript b/bsp/ft2004/libraries/SConscript index 2f023e6b9fa..7447ac38229 100644 --- a/bsp/ft2004/libraries/SConscript +++ b/bsp/ft2004/libraries/SConscript @@ -61,7 +61,7 @@ if GetDepend(['BSP_USE_CAN']): None -if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']): +if GetDepend(['RT_USING_CLOCK_TIME']) or GetDepend(['RT_USING_PWM']): None if GetDepend(['RT_USING_ADC']): diff --git a/bsp/gd32/arm/gd32103c-eval/board/Kconfig b/bsp/gd32/arm/gd32103c-eval/board/Kconfig index 46de28e3606..2a5ef718bb7 100644 --- a/bsp/gd32/arm/gd32103c-eval/board/Kconfig +++ b/bsp/gd32/arm/gd32103c-eval/board/Kconfig @@ -262,7 +262,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32105c-eval/board/Kconfig b/bsp/gd32/arm/gd32105c-eval/board/Kconfig index c2c937003e0..bbe77fe170b 100644 --- a/bsp/gd32/arm/gd32105c-eval/board/Kconfig +++ b/bsp/gd32/arm/gd32105c-eval/board/Kconfig @@ -258,7 +258,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32105r-start/board/Kconfig b/bsp/gd32/arm/gd32105r-start/board/Kconfig index 6147acac5d4..a4edaa9cc3a 100644 --- a/bsp/gd32/arm/gd32105r-start/board/Kconfig +++ b/bsp/gd32/arm/gd32105r-start/board/Kconfig @@ -266,7 +266,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32107c-eval/board/Kconfig b/bsp/gd32/arm/gd32107c-eval/board/Kconfig index e3538ec93d7..deeddd42342 100644 --- a/bsp/gd32/arm/gd32107c-eval/board/Kconfig +++ b/bsp/gd32/arm/gd32107c-eval/board/Kconfig @@ -258,7 +258,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32205r-start/board/Kconfig b/bsp/gd32/arm/gd32205r-start/board/Kconfig index 895e03a7239..29bcf9d8e5b 100644 --- a/bsp/gd32/arm/gd32205r-start/board/Kconfig +++ b/bsp/gd32/arm/gd32205r-start/board/Kconfig @@ -262,7 +262,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32207i-eval/board/Kconfig b/bsp/gd32/arm/gd32207i-eval/board/Kconfig index a0d39cf53c4..0d05371f607 100644 --- a/bsp/gd32/arm/gd32207i-eval/board/Kconfig +++ b/bsp/gd32/arm/gd32207i-eval/board/Kconfig @@ -262,7 +262,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32303e-eval/board/Kconfig b/bsp/gd32/arm/gd32303e-eval/board/Kconfig index f46897be953..940d34687ee 100644 --- a/bsp/gd32/arm/gd32303e-eval/board/Kconfig +++ b/bsp/gd32/arm/gd32303e-eval/board/Kconfig @@ -262,7 +262,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32305r-start/board/Kconfig b/bsp/gd32/arm/gd32305r-start/board/Kconfig index ce44b26f8fc..e52d1dae401 100644 --- a/bsp/gd32/arm/gd32305r-start/board/Kconfig +++ b/bsp/gd32/arm/gd32305r-start/board/Kconfig @@ -258,7 +258,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32307e-start/board/Kconfig b/bsp/gd32/arm/gd32307e-start/board/Kconfig index d04e13d66b5..0e06786c0b2 100644 --- a/bsp/gd32/arm/gd32307e-start/board/Kconfig +++ b/bsp/gd32/arm/gd32307e-start/board/Kconfig @@ -258,7 +258,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32407v-lckfb/board/Kconfig b/bsp/gd32/arm/gd32407v-lckfb/board/Kconfig index b9281dffebf..2a54c9aa121 100644 --- a/bsp/gd32/arm/gd32407v-lckfb/board/Kconfig +++ b/bsp/gd32/arm/gd32407v-lckfb/board/Kconfig @@ -282,7 +282,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32407v-start/board/Kconfig b/bsp/gd32/arm/gd32407v-start/board/Kconfig index bf19a90c804..d6cb2c6fd7a 100644 --- a/bsp/gd32/arm/gd32407v-start/board/Kconfig +++ b/bsp/gd32/arm/gd32407v-start/board/Kconfig @@ -262,7 +262,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32450z-eval/board/Kconfig b/bsp/gd32/arm/gd32450z-eval/board/Kconfig index c0a86c5def7..64bfd3ca4eb 100644 --- a/bsp/gd32/arm/gd32450z-eval/board/Kconfig +++ b/bsp/gd32/arm/gd32450z-eval/board/Kconfig @@ -262,7 +262,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32470i-eval/board/Kconfig b/bsp/gd32/arm/gd32470i-eval/board/Kconfig index 5ab121f7dd3..3fc8296d76e 100644 --- a/bsp/gd32/arm/gd32470i-eval/board/Kconfig +++ b/bsp/gd32/arm/gd32470i-eval/board/Kconfig @@ -255,7 +255,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32470z-lckfb/board/Kconfig b/bsp/gd32/arm/gd32470z-lckfb/board/Kconfig index 806989c9abf..9d73815115f 100644 --- a/bsp/gd32/arm/gd32470z-lckfb/board/Kconfig +++ b/bsp/gd32/arm/gd32470z-lckfb/board/Kconfig @@ -332,7 +332,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32527I-eval/board/Kconfig b/bsp/gd32/arm/gd32527I-eval/board/Kconfig index 80604dcb9da..1bdb2c1de22 100644 --- a/bsp/gd32/arm/gd32527I-eval/board/Kconfig +++ b/bsp/gd32/arm/gd32527I-eval/board/Kconfig @@ -272,7 +272,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/gd32e230-lckfb/board/Kconfig b/bsp/gd32/arm/gd32e230-lckfb/board/Kconfig index 81ab374ea0d..89f0da097ba 100644 --- a/bsp/gd32/arm/gd32e230-lckfb/board/Kconfig +++ b/bsp/gd32/arm/gd32e230-lckfb/board/Kconfig @@ -314,7 +314,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable Hardware Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n if BSP_USING_TIM config BSP_USING_TIM2 diff --git a/bsp/gd32/arm/gd32e503v-eval/board/Kconfig b/bsp/gd32/arm/gd32e503v-eval/board/Kconfig index 57a6518e9ae..121af8c225b 100644 --- a/bsp/gd32/arm/gd32e503v-eval/board/Kconfig +++ b/bsp/gd32/arm/gd32e503v-eval/board/Kconfig @@ -262,7 +262,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/arm/libraries/gd32_drivers/SConscript b/bsp/gd32/arm/libraries/gd32_drivers/SConscript index 31a8d4458d7..d10212978d2 100644 --- a/bsp/gd32/arm/libraries/gd32_drivers/SConscript +++ b/bsp/gd32/arm/libraries/gd32_drivers/SConscript @@ -41,8 +41,8 @@ if GetDepend('RT_USING_RTC'): src += ['drv_rtc.c'] # add timer drivers. -if GetDepend('RT_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('RT_USING_CLOCK_TIME'): + src += ['drv_timer.c'] # add adc drivers. if GetDepend('RT_USING_ADC'): diff --git a/bsp/gd32/arm/libraries/gd32_drivers/drv_hwtimer.c b/bsp/gd32/arm/libraries/gd32_drivers/drv_timer.c similarity index 63% rename from bsp/gd32/arm/libraries/gd32_drivers/drv_hwtimer.c rename to bsp/gd32/arm/libraries/gd32_drivers/drv_timer.c index 1c22b104679..be459ffcf66 100644 --- a/bsp/gd32/arm/libraries/gd32_drivers/drv_hwtimer.c +++ b/bsp/gd32/arm/libraries/gd32_drivers/drv_timer.c @@ -10,64 +10,64 @@ #include #include -#include +#include -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER typedef struct { uint32_t reg_base; IRQn_Type irqn; rcu_periph_enum rcu; -} gd32_hwtimer_data; +} gd32_clock_timer_data; typedef struct { char dev_name[RT_NAME_MAX]; - const gd32_hwtimer_data hw_data; - rt_hwtimer_t hwtimer_dev; - const struct rt_hwtimer_info hwtimer_info; -} gd32_hwtimer_device; + const gd32_clock_timer_data hw_data; + rt_clock_timer_t clock_timer_dev; + const struct rt_clock_timer_info clock_timer_info; +} gd32_clock_timer_device; enum timer_index_E { -#ifdef BSP_USING_HWTIMER0 +#ifdef BSP_USING_CLOCK_TIMER0 TIM0_INDEX, #endif -#ifdef BSP_USING_HWTIMER1 +#ifdef BSP_USING_CLOCK_TIMER1 TIM1_INDEX, #endif -#ifdef BSP_USING_HWTIMER2 +#ifdef BSP_USING_CLOCK_TIMER2 TIM2_INDEX, #endif -#ifdef BSP_USING_HWTIMER3 +#ifdef BSP_USING_CLOCK_TIMER3 TIM3_INDEX, #endif -#ifdef BSP_USING_HWTIMER4 +#ifdef BSP_USING_CLOCK_TIMER4 TIM4_INDEX, #endif -#ifdef BSP_USING_HWTIMER5 +#ifdef BSP_USING_CLOCK_TIMER5 TIM5_INDEX, #endif -#ifdef BSP_USING_HWTIMER6 +#ifdef BSP_USING_CLOCK_TIMER6 TIM6_INDEX, #endif -#ifdef BSP_USING_HWTIMER7 +#ifdef BSP_USING_CLOCK_TIMER7 TIM7_INDEX, #endif -#ifdef BSP_USING_HWTIMER8 +#ifdef BSP_USING_CLOCK_TIMER8 TIM8_INDEX, #endif -#ifdef BSP_USING_HWTIMER9 +#ifdef BSP_USING_CLOCK_TIMER9 TIM9_INDEX, #endif -#ifdef BSP_USING_HWTIMER10 +#ifdef BSP_USING_CLOCK_TIMER10 TIM10_INDEX, #endif -#ifdef BSP_USING_HWTIMER11 +#ifdef BSP_USING_CLOCK_TIMER11 TIM11_INDEX, #endif -#ifdef BSP_USING_HWTIMER12 +#ifdef BSP_USING_CLOCK_TIMER12 TIM12_INDEX, #endif -#ifdef BSP_USING_HWTIMER13 +#ifdef BSP_USING_CLOCK_TIMER13 TIM13_INDEX, #endif }; @@ -111,7 +111,7 @@ static void __set_timerx_freq(uint32_t timerx, uint32_t freq) timer_prescaler_config(timerx, prescaler, TIMER_PSC_RELOAD_NOW); } -static void gd32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void gd32_clock_timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { uint32_t timer_base = (uint32_t)timer->parent.user_data; timer_parameter_struct initpara; @@ -126,16 +126,16 @@ static void gd32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t state } } -static rt_err_t gd32_hwtimer_start(struct rt_hwtimer_device *timer, \ - rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t gd32_clock_timer_start(struct rt_clock_timer_device *timer, \ + rt_uint32_t cnt, rt_clock_timer_mode_t mode) { uint32_t timer_base = (uint32_t)timer->parent.user_data; - if (mode == HWTIMER_MODE_ONESHOT) + if (mode == CLOCK_TIMER_MODE_ONESHOT) { timer_single_pulse_mode_config(timer_base, TIMER_SP_MODE_SINGLE); } - else if (mode == HWTIMER_MODE_PERIOD) + else if (mode == CLOCK_TIMER_MODE_PERIOD) { timer_single_pulse_mode_config(timer_base, TIMER_SP_MODE_REPETITIVE); } @@ -147,14 +147,14 @@ static rt_err_t gd32_hwtimer_start(struct rt_hwtimer_device *timer, \ return 0; } -static void gd32_hwtimer_stop(struct rt_hwtimer_device *timer) +static void gd32_clock_timer_stop(struct rt_clock_timer_device *timer) { uint32_t timer_base = (uint32_t)timer->parent.user_data; timer_disable(timer_base); } -static rt_uint32_t gd32_hwtimer_count_get(struct rt_hwtimer_device *timer) +static rt_uint32_t gd32_clock_timer_count_get(struct rt_clock_timer_device *timer) { uint32_t timer_base = (uint32_t)timer->parent.user_data; rt_uint32_t count; @@ -164,16 +164,16 @@ static rt_uint32_t gd32_hwtimer_count_get(struct rt_hwtimer_device *timer) return count; } -static rt_err_t gd32_hwtimer_control(struct rt_hwtimer_device *timer, rt_uint32_t cmd, \ +static rt_err_t gd32_clock_timer_control(struct rt_clock_timer_device *timer, rt_uint32_t cmd, \ void *args) { int ret = RT_EOK; rt_int32_t freq; - rt_hwtimer_mode_t mode; + rt_clock_timer_mode_t mode; switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: freq = *(rt_uint32_t *)args; __set_timerx_freq((uint32_t)timer->parent.user_data, freq); break; @@ -186,16 +186,16 @@ static rt_err_t gd32_hwtimer_control(struct rt_hwtimer_device *timer, rt_uint32_ return ret; } -static const struct rt_hwtimer_ops g_gd32_hwtimer_ops = { - gd32_hwtimer_init, - gd32_hwtimer_start, - gd32_hwtimer_stop, - gd32_hwtimer_count_get, - gd32_hwtimer_control, +static const struct rt_clock_timer_ops g_gd32_clock_timer_ops = { + gd32_clock_timer_init, + gd32_clock_timer_start, + gd32_clock_timer_stop, + gd32_clock_timer_count_get, + gd32_clock_timer_control, }; -static gd32_hwtimer_device g_gd32_hwtimer[] = { -#ifdef BSP_USING_HWTIMER0 +static gd32_clock_timer_device g_gd32_clock_timer[] = { +#ifdef BSP_USING_CLOCK_TIMER0 { "timer0", { @@ -212,7 +212,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER1 +#ifdef BSP_USING_CLOCK_TIMER1 { "timer1", { @@ -229,7 +229,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER2 +#ifdef BSP_USING_CLOCK_TIMER2 { "timer2", { @@ -246,7 +246,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER3 +#ifdef BSP_USING_CLOCK_TIMER3 { "timer3", { @@ -263,7 +263,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER4 +#ifdef BSP_USING_CLOCK_TIMER4 { "timer4", { @@ -280,7 +280,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER5 +#ifdef BSP_USING_CLOCK_TIMER5 { "timer5", { @@ -297,7 +297,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER6 +#ifdef BSP_USING_CLOCK_TIMER6 { "timer6", { @@ -314,7 +314,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER7 +#ifdef BSP_USING_CLOCK_TIMER7 { "timer7", { @@ -331,7 +331,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER8 +#ifdef BSP_USING_CLOCK_TIMER8 { "timer8", { @@ -348,7 +348,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER9 +#ifdef BSP_USING_CLOCK_TIMER9 { "timer9", { @@ -365,7 +365,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER10 +#ifdef BSP_USING_CLOCK_TIMER10 { "timer10", { @@ -382,7 +382,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER11 +#ifdef BSP_USING_CLOCK_TIMER11 { "timer11", { @@ -399,7 +399,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER12 +#ifdef BSP_USING_CLOCK_TIMER12 { "timer12", { @@ -416,7 +416,7 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { } }, #endif -#ifdef BSP_USING_HWTIMER13 +#ifdef BSP_USING_CLOCK_TIMER13 { "timer13", { @@ -435,112 +435,112 @@ static gd32_hwtimer_device g_gd32_hwtimer[] = { #endif }; -#ifdef BSP_USING_HWTIMER0 +#ifdef BSP_USING_CLOCK_TIMER0 void TIMER0_UP_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&g_gd32_hwtimer[TIM0_INDEX].hwtimer_dev); - timer_flag_clear((uint32_t)g_gd32_hwtimer[TIM0_INDEX].hwtimer_dev.parent.user_data, \ + rt_clock_timer_isr(&g_gd32_clock_timer[TIM0_INDEX].clock_timer_dev); + timer_flag_clear((uint32_t)g_gd32_clock_timer[TIM0_INDEX].clock_timer_dev.parent.user_data, \ TIMER_INT_UP); rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER1 +#ifdef BSP_USING_CLOCK_TIMER1 void TIMER1_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&g_gd32_hwtimer[TIM1_INDEX].hwtimer_dev); - timer_flag_clear((uint32_t)g_gd32_hwtimer[TIM1_INDEX].hwtimer_dev.parent.user_data, \ + rt_clock_timer_isr(&g_gd32_clock_timer[TIM1_INDEX].clock_timer_dev); + timer_flag_clear((uint32_t)g_gd32_clock_timer[TIM1_INDEX].clock_timer_dev.parent.user_data, \ TIMER_INT_UP); rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER2 +#ifdef BSP_USING_CLOCK_TIMER2 void TIMER2_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&g_gd32_hwtimer[TIM2_INDEX].hwtimer_dev); - timer_flag_clear((uint32_t)g_gd32_hwtimer[TIM2_INDEX].hwtimer_dev.parent.user_data, \ + rt_clock_timer_isr(&g_gd32_clock_timer[TIM2_INDEX].clock_timer_dev); + timer_flag_clear((uint32_t)g_gd32_clock_timer[TIM2_INDEX].clock_timer_dev.parent.user_data, \ TIMER_INT_UP); rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER3 +#ifdef BSP_USING_CLOCK_TIMER3 void TIMER3_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&g_gd32_hwtimer[TIM3_INDEX].hwtimer_dev); - timer_flag_clear((uint32_t)g_gd32_hwtimer[TIM3_INDEX].hwtimer_dev.parent.user_data, \ + rt_clock_timer_isr(&g_gd32_clock_timer[TIM3_INDEX].clock_timer_dev); + timer_flag_clear((uint32_t)g_gd32_clock_timer[TIM3_INDEX].clock_timer_dev.parent.user_data, \ TIMER_INT_UP); rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER4 +#ifdef BSP_USING_CLOCK_TIMER4 void TIMER4_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&g_gd32_hwtimer[TIM4_INDEX].hwtimer_dev); - timer_flag_clear((uint32_t)g_gd32_hwtimer[TIM4_INDEX].hwtimer_dev.parent.user_data, \ + rt_clock_timer_isr(&g_gd32_clock_timer[TIM4_INDEX].clock_timer_dev); + timer_flag_clear((uint32_t)g_gd32_clock_timer[TIM4_INDEX].clock_timer_dev.parent.user_data, \ TIMER_INT_UP); rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER5 +#ifdef BSP_USING_CLOCK_TIMER5 void TIMER5_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&g_gd32_hwtimer[TIM5_INDEX].hwtimer_dev); - timer_flag_clear((uint32_t)g_gd32_hwtimer[TIM5_INDEX].hwtimer_dev.parent.user_data, \ + rt_clock_timer_isr(&g_gd32_clock_timer[TIM5_INDEX].clock_timer_dev); + timer_flag_clear((uint32_t)g_gd32_clock_timer[TIM5_INDEX].clock_timer_dev.parent.user_data, \ TIMER_INT_UP); rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER6 +#ifdef BSP_USING_CLOCK_TIMER6 void TIMER6_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&g_gd32_hwtimer[TIM6_INDEX].hwtimer_dev); - timer_flag_clear((uint32_t)g_gd32_hwtimer[TIM6_INDEX].hwtimer_dev.parent.user_data, \ + rt_clock_timer_isr(&g_gd32_clock_timer[TIM6_INDEX].clock_timer_dev); + timer_flag_clear((uint32_t)g_gd32_clock_timer[TIM6_INDEX].clock_timer_dev.parent.user_data, \ TIMER_INT_UP); rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER7 +#ifdef BSP_USING_CLOCK_TIMER7 void TIMER7_UP_IRQHandler(void) { rt_interrupt_enter(); - rt_device_hwtimer_isr(&g_gd32_hwtimer[TIM7_INDEX].hwtimer_dev); - timer_flag_clear((uint32_t)g_gd32_hwtimer[TIM7_INDEX].hwtimer_dev.parent.user_data, \ + rt_clock_timer_isr(&g_gd32_clock_timer[TIM7_INDEX].clock_timer_dev); + timer_flag_clear((uint32_t)g_gd32_clock_timer[TIM7_INDEX].clock_timer_dev.parent.user_data, \ TIMER_INT_UP); rt_interrupt_leave(); } #endif -static int rt_hwtimer_init(void) +static int rt_clock_timer_init(void) { int ret = 0, i = 0; - for (; i < sizeof(g_gd32_hwtimer) / sizeof(g_gd32_hwtimer[0]); i++) + for (; i < sizeof(g_gd32_clock_timer) / sizeof(g_gd32_clock_timer[0]); i++) { - g_gd32_hwtimer[i].hwtimer_dev.ops = &g_gd32_hwtimer_ops; - g_gd32_hwtimer[i].hwtimer_dev.info = &g_gd32_hwtimer[i].hwtimer_info; - - rcu_periph_clock_enable(g_gd32_hwtimer[i].hw_data.rcu); - NVIC_SetPriority(g_gd32_hwtimer[i].hw_data.irqn, 0); - NVIC_EnableIRQ(g_gd32_hwtimer[i].hw_data.irqn); - timer_interrupt_enable(g_gd32_hwtimer[i].hw_data.reg_base, TIMER_INT_UP); - ret = rt_device_hwtimer_register(&g_gd32_hwtimer[i].hwtimer_dev, \ - g_gd32_hwtimer[i].dev_name, (void *)g_gd32_hwtimer[i].hw_data.reg_base); + g_gd32_clock_timer[i].clock_timer_dev.ops = &g_gd32_clock_timer_ops; + g_gd32_clock_timer[i].clock_timer_dev.info = &g_gd32_clock_timer[i].clock_timer_info; + + rcu_periph_clock_enable(g_gd32_clock_timer[i].hw_data.rcu); + NVIC_SetPriority(g_gd32_clock_timer[i].hw_data.irqn, 0); + NVIC_EnableIRQ(g_gd32_clock_timer[i].hw_data.irqn); + timer_interrupt_enable(g_gd32_clock_timer[i].hw_data.reg_base, TIMER_INT_UP); + ret = rt_clock_timer_register(&g_gd32_clock_timer[i].clock_timer_dev, \ + g_gd32_clock_timer[i].dev_name, (void *)g_gd32_clock_timer[i].hw_data.reg_base); if (RT_EOK != ret) { - rt_kprintf("failed register %s, err=%d\n", g_gd32_hwtimer[i].dev_name, \ + rt_kprintf("failed register %s, err=%d\n", g_gd32_clock_timer[i].dev_name, \ ret); break; } @@ -548,5 +548,5 @@ static int rt_hwtimer_init(void) return ret; } -INIT_BOARD_EXPORT(rt_hwtimer_init); +INIT_BOARD_EXPORT(rt_clock_timer_init); #endif diff --git a/bsp/gd32/risc-v/gd32vf103r-start/board/Kconfig b/bsp/gd32/risc-v/gd32vf103r-start/board/Kconfig index 57ac5297c35..abd9f94bc6f 100644 --- a/bsp/gd32/risc-v/gd32vf103r-start/board/Kconfig +++ b/bsp/gd32/risc-v/gd32vf103r-start/board/Kconfig @@ -134,7 +134,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/risc-v/gd32vf103v-eval/board/Kconfig b/bsp/gd32/risc-v/gd32vf103v-eval/board/Kconfig index 63127807cf7..421d2da24fa 100644 --- a/bsp/gd32/risc-v/gd32vf103v-eval/board/Kconfig +++ b/bsp/gd32/risc-v/gd32vf103v-eval/board/Kconfig @@ -137,7 +137,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/SConscript b/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/SConscript index 2c2cb029001..7cc4a1b5239 100644 --- a/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/SConscript +++ b/bsp/gd32/risc-v/libraries/GD32VF103_Firmware_Library/SConscript @@ -40,7 +40,7 @@ if GetDepend(['RT_USING_ADC']): if GetDepend(['RT_USING_DAC']): src += ['GD32VF103_standard_peripheral/Source/gd32vf103_dac.c'] -if GetDepend(['RT_USING_HWTIMER']): +if GetDepend(['RT_USING_CLOCK_TIME']): src += ['GD32VF103_standard_peripheral/Source/gd32vf103_timer.c'] if GetDepend(['RT_USING_RTC']): diff --git a/bsp/gd32/risc-v/libraries/gd32_drivers/SConscript b/bsp/gd32/risc-v/libraries/gd32_drivers/SConscript index df963f3b78a..9148ed9816e 100644 --- a/bsp/gd32/risc-v/libraries/gd32_drivers/SConscript +++ b/bsp/gd32/risc-v/libraries/gd32_drivers/SConscript @@ -38,8 +38,8 @@ if GetDepend('RT_USING_RTC'): src += ['drv_rtc.c'] # add timer drivers. -if GetDepend('RT_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('RT_USING_CLOCK_TIME'): + src += ['drv_timer.c'] # add adc drivers. if GetDepend('RT_USING_ADC'): diff --git a/bsp/hc32/ev_hc32f334_lqfp64/board/Kconfig b/bsp/hc32/ev_hc32f334_lqfp64/board/Kconfig index a2bf2035bfb..a0367487403 100644 --- a/bsp/hc32/ev_hc32f334_lqfp64/board/Kconfig +++ b/bsp/hc32/ev_hc32f334_lqfp64/board/Kconfig @@ -527,11 +527,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER bool "Enable Hw Timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_TMRA_1 bool "Use Timer_a1 As The Hw Timer" default n diff --git a/bsp/hc32/ev_hc32f334_lqfp64/bsp_compile_ci.bat b/bsp/hc32/ev_hc32f334_lqfp64/bsp_compile_ci.bat index f35553ed5ab..d1b6de173a1 100644 --- a/bsp/hc32/ev_hc32f334_lqfp64/bsp_compile_ci.bat +++ b/bsp/hc32/ev_hc32f334_lqfp64/bsp_compile_ci.bat @@ -18,7 +18,7 @@ scons --attach=devices.gpio scons -j4 scons --attach=default -scons --attach=devices.hwtimer +scons --attach=devices.clock_timer scons -j4 scons --attach=default diff --git a/bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig b/bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig index 5859ec06f4d..76940804952 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig +++ b/bsp/hc32/ev_hc32f448_lqfp80/board/Kconfig @@ -640,11 +640,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER bool "Enable Hw Timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_TMRA_1 bool "Use Timer_a1 As The Hw Timer" default n @@ -681,7 +681,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_SENSOR bool "Enable SENSOR" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_SENSOR config BSP_USING_TMR0_2B bool "Use KEYSCAN" diff --git a/bsp/hc32/ev_hc32f448_lqfp80/bsp_compile_ci.bat b/bsp/hc32/ev_hc32f448_lqfp80/bsp_compile_ci.bat index 12d5baf2780..801b91cb7fc 100644 --- a/bsp/hc32/ev_hc32f448_lqfp80/bsp_compile_ci.bat +++ b/bsp/hc32/ev_hc32f448_lqfp80/bsp_compile_ci.bat @@ -18,7 +18,7 @@ scons --attach=devices.gpio scons -j4 scons --attach=default -scons --attach=devices.hwtimer +scons --attach=devices.clock_timer scons -j4 scons --attach=default diff --git a/bsp/hc32/ev_hc32f460_lqfp100_v2/board/Kconfig b/bsp/hc32/ev_hc32f460_lqfp100_v2/board/Kconfig index 23155b14f4b..b2fab38d89e 100644 --- a/bsp/hc32/ev_hc32f460_lqfp100_v2/board/Kconfig +++ b/bsp/hc32/ev_hc32f460_lqfp100_v2/board/Kconfig @@ -636,11 +636,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER bool "Enable Hw Timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_TMRA_1 bool "Use Timer_a1 As The Hw Timer" default n diff --git a/bsp/hc32/ev_hc32f460_lqfp100_v2/bsp_compile_ci.bat b/bsp/hc32/ev_hc32f460_lqfp100_v2/bsp_compile_ci.bat index 5ae6c2aa698..f1d04b01aa3 100644 --- a/bsp/hc32/ev_hc32f460_lqfp100_v2/bsp_compile_ci.bat +++ b/bsp/hc32/ev_hc32f460_lqfp100_v2/bsp_compile_ci.bat @@ -18,7 +18,7 @@ scons --attach=devices.gpio scons -j4 scons --attach=default -scons --attach=devices.hwtimer +scons --attach=devices.clock_timer scons -j4 scons --attach=default diff --git a/bsp/hc32/ev_hc32f472_lqfp100/board/Kconfig b/bsp/hc32/ev_hc32f472_lqfp100/board/Kconfig index 0867ee69290..0c31a20cd01 100644 --- a/bsp/hc32/ev_hc32f472_lqfp100/board/Kconfig +++ b/bsp/hc32/ev_hc32f472_lqfp100/board/Kconfig @@ -703,11 +703,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER bool "Enable Hw Timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_TMRA_1 bool "Use Timer_a1 As The Hw Timer" default n @@ -731,7 +731,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_SENSOR bool "Enable SENSOR" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_SENSOR config BSP_USING_TMR0_2B bool "Use KEYSCAN" diff --git a/bsp/hc32/ev_hc32f472_lqfp100/bsp_compile_ci.bat b/bsp/hc32/ev_hc32f472_lqfp100/bsp_compile_ci.bat index be8ad075384..997f3ec2e1d 100644 --- a/bsp/hc32/ev_hc32f472_lqfp100/bsp_compile_ci.bat +++ b/bsp/hc32/ev_hc32f472_lqfp100/bsp_compile_ci.bat @@ -22,7 +22,7 @@ scons --attach=devices.gpio scons -j4 scons --attach=default -scons --attach=devices.hwtimer +scons --attach=devices.clock_timer scons -j4 scons --attach=default diff --git a/bsp/hc32/ev_hc32f4a0_lqfp176/board/Kconfig b/bsp/hc32/ev_hc32f4a0_lqfp176/board/Kconfig index dd6cf3734e3..79cb785cbc0 100644 --- a/bsp/hc32/ev_hc32f4a0_lqfp176/board/Kconfig +++ b/bsp/hc32/ev_hc32f4a0_lqfp176/board/Kconfig @@ -963,11 +963,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER bool "Enable Hw Timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_TMRA_1 bool "Use Timer_a1 As The Hw Timer" default n diff --git a/bsp/hc32/ev_hc32f4a0_lqfp176/bsp_compile_ci.bat b/bsp/hc32/ev_hc32f4a0_lqfp176/bsp_compile_ci.bat index 7a3904105df..c0cd921b13b 100644 --- a/bsp/hc32/ev_hc32f4a0_lqfp176/bsp_compile_ci.bat +++ b/bsp/hc32/ev_hc32f4a0_lqfp176/bsp_compile_ci.bat @@ -22,7 +22,7 @@ scons --attach=devices.gpio scons -j4 scons --attach=default -scons --attach=devices.hwtimer +scons --attach=devices.clock_timer scons -j4 scons --attach=default diff --git a/bsp/hc32/ev_hc32f4a8_lqfp176/board/Kconfig b/bsp/hc32/ev_hc32f4a8_lqfp176/board/Kconfig index cae9576d068..9d0e00a67cf 100644 --- a/bsp/hc32/ev_hc32f4a8_lqfp176/board/Kconfig +++ b/bsp/hc32/ev_hc32f4a8_lqfp176/board/Kconfig @@ -961,11 +961,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER bool "Enable Hw Timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_TMRA_1 bool "Use Timer_a1 As The Hw Timer" default n diff --git a/bsp/hc32/ev_hc32f4a8_lqfp176/bsp_compile_ci.bat b/bsp/hc32/ev_hc32f4a8_lqfp176/bsp_compile_ci.bat index b5b3bbe7468..fd4ec1d3ac9 100644 --- a/bsp/hc32/ev_hc32f4a8_lqfp176/bsp_compile_ci.bat +++ b/bsp/hc32/ev_hc32f4a8_lqfp176/bsp_compile_ci.bat @@ -22,7 +22,7 @@ scons --attach=devices.gpio scons -j4 scons --attach=default -scons --attach=devices.hwtimer +scons --attach=devices.clock_timer scons -j4 scons --attach=default diff --git a/bsp/hc32/lckfb-hc32f4a0-lqfp100/board/Kconfig b/bsp/hc32/lckfb-hc32f4a0-lqfp100/board/Kconfig index d5e9a6bbaac..6c91f7e6603 100644 --- a/bsp/hc32/lckfb-hc32f4a0-lqfp100/board/Kconfig +++ b/bsp/hc32/lckfb-hc32f4a0-lqfp100/board/Kconfig @@ -909,11 +909,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER bool "Enable Hw Timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_TMRA_1 bool "Use Timer_a1 As The Hw Timer" default n diff --git a/bsp/hc32/libraries/hc32_drivers/SConscript b/bsp/hc32/libraries/hc32_drivers/SConscript index 449e1356a25..3edb6bc1c80 100644 --- a/bsp/hc32/libraries/hc32_drivers/SConscript +++ b/bsp/hc32/libraries/hc32_drivers/SConscript @@ -50,8 +50,8 @@ if GetDepend(['RT_USING_RTC']): if GetDepend(['RT_USING_WDT']): src += ['drv_wdt.c'] -if GetDepend(['RT_USING_HWTIMER']): - src += ['drv_hwtimer.c'] +if GetDepend(['RT_USING_CLOCK_TIME']): + src += ['drv_timer.c'] if GetDepend(['RT_USING_PULSE_ENCODER']): src += ['drv_pulse_encoder.c'] diff --git a/bsp/hc32/libraries/hc32_drivers/drv_hwtimer.c b/bsp/hc32/libraries/hc32_drivers/drv_timer.c similarity index 58% rename from bsp/hc32/libraries/hc32_drivers/drv_hwtimer.c rename to bsp/hc32/libraries/hc32_drivers/drv_timer.c index 2cac51d01f1..2db13325c70 100644 --- a/bsp/hc32/libraries/hc32_drivers/drv_hwtimer.c +++ b/bsp/hc32/libraries/hc32_drivers/drv_timer.c @@ -14,10 +14,10 @@ #include "drv_config.h" // #define DRV_DEBUG -#define LOG_TAG "drv.hwtimer" +#define LOG_TAG "drv.clock_timer" #include -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER #include "drv_irq.h" @@ -61,9 +61,9 @@ enum #endif }; -struct hc32_hwtimer +struct hc32_clock_timer { - rt_hwtimer_t time_device; + rt_clock_timer_t time_device; CM_TMRA_TypeDef *tmr_handle; rt_uint32_t clock_source; rt_uint32_t clock; @@ -80,7 +80,7 @@ struct hc32_hwtimer char *name; }; -static struct hc32_hwtimer hc32_hwtimer_obj[] = +static struct hc32_clock_timer hc32_clock_timer_obj[] = { #ifdef BSP_USING_TMRA_1 TMRA_1_CONFIG, @@ -120,11 +120,11 @@ static struct hc32_hwtimer hc32_hwtimer_obj[] = #endif }; -static void _timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void _timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { stc_tmra_init_t stcTmraInit; struct hc32_irq_config irq_config; - struct hc32_hwtimer *tmr_device = (struct hc32_hwtimer *)timer; + struct hc32_clock_timer *tmr_device = (struct hc32_clock_timer *)timer; RT_ASSERT(timer != RT_NULL); @@ -166,14 +166,14 @@ static void _timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) } } -static rt_err_t _timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t _timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode) { rt_err_t result = RT_EOK; - struct hc32_hwtimer *tmr_device = RT_NULL; + struct hc32_clock_timer *tmr_device = RT_NULL; RT_ASSERT(timer != RT_NULL); - tmr_device = (struct hc32_hwtimer *)timer; + tmr_device = (struct hc32_clock_timer *)timer; /* set timer arr */ TMRA_SetPeriodValue(tmr_device->tmr_handle, t - 1U); @@ -183,13 +183,13 @@ static rt_err_t _timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode return result; } -static void _timer_stop(rt_hwtimer_t *timer) +static void _timer_stop(rt_clock_timer_t *timer) { - struct hc32_hwtimer *tmr_device = RT_NULL; + struct hc32_clock_timer *tmr_device = RT_NULL; RT_ASSERT(timer != RT_NULL); - tmr_device = (struct hc32_hwtimer *)timer; + tmr_device = (struct hc32_clock_timer *)timer; /* stop timer */ TMRA_Stop(tmr_device->tmr_handle); @@ -197,7 +197,7 @@ static void _timer_stop(rt_hwtimer_t *timer) TMRA_SetCountValue(tmr_device->tmr_handle, 0U); } -static rt_err_t _timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t _timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { rt_err_t result = -RT_ERROR; uint32_t freq = *(uint32_t *)arg; @@ -207,7 +207,7 @@ static rt_err_t _timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { if (freq != timer->freq) { @@ -230,14 +230,14 @@ static rt_err_t _timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) return result; } -static rt_uint32_t _timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t _timer_counter_get(rt_clock_timer_t *timer) { - struct hc32_hwtimer *tmr_device = RT_NULL; + struct hc32_clock_timer *tmr_device = RT_NULL; rt_uint32_t Counter; RT_ASSERT(timer != RT_NULL); - tmr_device = (struct hc32_hwtimer *)timer; + tmr_device = (struct hc32_clock_timer *)timer; Counter = TMRA_GetCountValue(tmr_device->tmr_handle); @@ -247,8 +247,8 @@ static rt_uint32_t _timer_counter_get(rt_hwtimer_t *timer) #ifdef BSP_USING_TMRA_1 static void TMRA_1_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_1_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_1_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_1_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_1_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_1_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_1_INDEX].time_device); } #if defined (HC32F448) || defined (HC32F472) || defined (HC32F334) @@ -262,8 +262,8 @@ void TMRA_1_Ovf_Udf_Handler(void) #ifdef BSP_USING_TMRA_2 static void TMRA_2_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_2_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_2_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_2_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_2_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_2_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_2_INDEX].time_device); } #if defined (HC32F448) || defined (HC32F472) || defined (HC32F334) @@ -277,8 +277,8 @@ void TMRA_2_Ovf_Udf_Handler(void) #ifdef BSP_USING_TMRA_3 static void TMRA_3_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_3_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_3_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_3_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_3_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_3_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_3_INDEX].time_device); } #if defined (HC32F448) || defined (HC32F472) || defined (HC32F334) @@ -292,8 +292,8 @@ void TMRA_3_Ovf_Udf_Handler(void) #ifdef BSP_USING_TMRA_4 static void TMRA_4_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_4_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_4_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_4_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_4_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_4_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_4_INDEX].time_device); } #if defined (HC32F448) || defined (HC32F472) || defined (HC32F334) @@ -307,8 +307,8 @@ void TMRA_4_Ovf_Udf_Handler(void) #ifdef BSP_USING_TMRA_5 static void TMRA_5_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_5_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_5_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_5_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_5_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_5_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_5_INDEX].time_device); } #if defined (HC32F448) || defined (HC32F472) || defined (HC32F334) @@ -322,8 +322,8 @@ void TMRA_5_Ovf_Udf_Handler(void) #ifdef BSP_USING_TMRA_6 static void TMRA_6_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_6_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_6_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_6_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_6_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_6_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_6_INDEX].time_device); } #if defined (HC32F472) @@ -337,105 +337,105 @@ void TMRA_6_Ovf_Udf_Handler(void) #ifdef BSP_USING_TMRA_7 static void TMRA_7_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_7_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_7_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_7_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_7_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_7_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_7_INDEX].time_device); } #endif /* BSP_USING_TMRA_7 */ #ifdef BSP_USING_TMRA_8 static void TMRA_8_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_8_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_8_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_8_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_8_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_8_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_8_INDEX].time_device); } #endif /* BSP_USING_TMRA_8 */ #ifdef BSP_USING_TMRA_9 static void TMRA_9_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_9_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_9_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_9_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_9_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_9_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_9_INDEX].time_device); } #endif /* BSP_USING_TMRA_9 */ #ifdef BSP_USING_TMRA_10 static void TMRA_10_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_10_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_10_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_10_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_10_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_10_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_10_INDEX].time_device); } #endif /* BSP_USING_TMRA_10 */ #ifdef BSP_USING_TMRA_11 static void TMRA_11_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_11_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_11_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_11_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_11_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_11_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_11_INDEX].time_device); } #endif /* BSP_USING_TMRA_11 */ #ifdef BSP_USING_TMRA_12 static void TMRA_12_callback(void) { - TMRA_ClearStatus(hc32_hwtimer_obj[TMRA_12_INDEX].tmr_handle, hc32_hwtimer_obj[TMRA_12_INDEX].flag); - rt_device_hwtimer_isr(&hc32_hwtimer_obj[TMRA_12_INDEX].time_device); + TMRA_ClearStatus(hc32_clock_timer_obj[TMRA_12_INDEX].tmr_handle, hc32_clock_timer_obj[TMRA_12_INDEX].flag); + rt_clock_timer_isr(&hc32_clock_timer_obj[TMRA_12_INDEX].time_device); } #endif /* BSP_USING_TMRA_12 */ -static struct rt_hwtimer_info _info[sizeof(hc32_hwtimer_obj) / sizeof(hc32_hwtimer_obj[0])]; +static struct rt_clock_timer_info _info[sizeof(hc32_clock_timer_obj) / sizeof(hc32_clock_timer_obj[0])]; void tmra_get_info_callback(void) { /* Div = 32 */ for (rt_uint8_t i = 0; i < sizeof(_info) / sizeof(_info[0]); i++) { - _info[i].maxcnt = CLK_GetBusClockFreq(hc32_hwtimer_obj[i].clock_source) / 32U / 1000U; /* Period = 1ms */ - _info[i].maxfreq = CLK_GetBusClockFreq(hc32_hwtimer_obj[i].clock_source) / 32U; - _info[i].minfreq = CLK_GetBusClockFreq(hc32_hwtimer_obj[i].clock_source) / 32U / _info[i].maxcnt; - _info[i].cntmode = HWTIMER_CNTMODE_UP; + _info[i].maxcnt = CLK_GetBusClockFreq(hc32_clock_timer_obj[i].clock_source) / 32U / 1000U; /* Period = 1ms */ + _info[i].maxfreq = CLK_GetBusClockFreq(hc32_clock_timer_obj[i].clock_source) / 32U; + _info[i].minfreq = CLK_GetBusClockFreq(hc32_clock_timer_obj[i].clock_source) / 32U / _info[i].maxcnt; + _info[i].cntmode = CLOCK_TIMER_CNTMODE_UP; } #if defined (HC32F460) || defined (HC32F4A0) || defined (HC32F4A8) #ifdef BSP_USING_TMRA_1 - hc32_hwtimer_obj[TMRA_1_INDEX].isr.irq_callback = TMRA_1_callback; + hc32_clock_timer_obj[TMRA_1_INDEX].isr.irq_callback = TMRA_1_callback; #endif #ifdef BSP_USING_TMRA_2 - hc32_hwtimer_obj[TMRA_2_INDEX].isr.irq_callback = TMRA_2_callback; + hc32_clock_timer_obj[TMRA_2_INDEX].isr.irq_callback = TMRA_2_callback; #endif #ifdef BSP_USING_TMRA_3 - hc32_hwtimer_obj[TMRA_3_INDEX].isr.irq_callback = TMRA_3_callback; + hc32_clock_timer_obj[TMRA_3_INDEX].isr.irq_callback = TMRA_3_callback; #endif #ifdef BSP_USING_TMRA_4 - hc32_hwtimer_obj[TMRA_4_INDEX].isr.irq_callback = TMRA_4_callback; + hc32_clock_timer_obj[TMRA_4_INDEX].isr.irq_callback = TMRA_4_callback; #endif #ifdef BSP_USING_TMRA_5 - hc32_hwtimer_obj[TMRA_5_INDEX].isr.irq_callback = TMRA_5_callback; + hc32_clock_timer_obj[TMRA_5_INDEX].isr.irq_callback = TMRA_5_callback; #endif #ifdef BSP_USING_TMRA_6 - hc32_hwtimer_obj[TMRA_6_INDEX].isr.irq_callback = TMRA_6_callback; + hc32_clock_timer_obj[TMRA_6_INDEX].isr.irq_callback = TMRA_6_callback; #endif #ifdef BSP_USING_TMRA_7 - hc32_hwtimer_obj[TMRA_7_INDEX].isr.irq_callback = TMRA_7_callback; + hc32_clock_timer_obj[TMRA_7_INDEX].isr.irq_callback = TMRA_7_callback; #endif #ifdef BSP_USING_TMRA_8 - hc32_hwtimer_obj[TMRA_8_INDEX].isr.irq_callback = TMRA_8_callback; + hc32_clock_timer_obj[TMRA_8_INDEX].isr.irq_callback = TMRA_8_callback; #endif #ifdef BSP_USING_TMRA_9 - hc32_hwtimer_obj[TMRA_9_INDEX].isr.irq_callback = TMRA_9_callback; + hc32_clock_timer_obj[TMRA_9_INDEX].isr.irq_callback = TMRA_9_callback; #endif #ifdef BSP_USING_TMRA_10 - hc32_hwtimer_obj[TMRA_10_INDEX].isr.irq_callback = TMRA_10_callback; + hc32_clock_timer_obj[TMRA_10_INDEX].isr.irq_callback = TMRA_10_callback; #endif #ifdef BSP_USING_TMRA_11 - hc32_hwtimer_obj[TMRA_11_INDEX].isr.irq_callback = TMRA_11_callback; + hc32_clock_timer_obj[TMRA_11_INDEX].isr.irq_callback = TMRA_11_callback; #endif #ifdef BSP_USING_TMRA_12 - hc32_hwtimer_obj[TMRA_12_INDEX].isr.irq_callback = TMRA_12_callback; + hc32_clock_timer_obj[TMRA_12_INDEX].isr.irq_callback = TMRA_12_callback; #endif #endif } -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_ops _ops = { .init = _timer_init, .start = _timer_start, @@ -444,30 +444,30 @@ static const struct rt_hwtimer_ops _ops = .control = _timer_ctrl, }; -static int rt_hw_hwtimer_init(void) +static int rt_hw_clock_timer_init(void) { int i; int result = RT_EOK; tmra_get_info_callback(); - for (i = 0; i < sizeof(hc32_hwtimer_obj) / sizeof(hc32_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(hc32_clock_timer_obj) / sizeof(hc32_clock_timer_obj[0]); i++) { - hc32_hwtimer_obj[i].time_device.info = &_info[i]; - hc32_hwtimer_obj[i].time_device.ops = &_ops; - if (rt_device_hwtimer_register(&hc32_hwtimer_obj[i].time_device, - hc32_hwtimer_obj[i].name, &hc32_hwtimer_obj[i].tmr_handle) == RT_EOK) + hc32_clock_timer_obj[i].time_device.info = &_info[i]; + hc32_clock_timer_obj[i].time_device.ops = &_ops; + if (rt_clock_timer_register(&hc32_clock_timer_obj[i].time_device, + hc32_clock_timer_obj[i].name, &hc32_clock_timer_obj[i].tmr_handle) == RT_EOK) { - LOG_D("%s register success", hc32_hwtimer_obj[i].name); + LOG_D("%s register success", hc32_clock_timer_obj[i].name); } else { - LOG_E("%s register failed", hc32_hwtimer_obj[i].name); + LOG_E("%s register failed", hc32_clock_timer_obj[i].name); result = -RT_ERROR; } } return result; } -INIT_BOARD_EXPORT(rt_hw_hwtimer_init); +INIT_BOARD_EXPORT(rt_hw_clock_timer_init); -#endif /* BSP_USING_HWTIMER */ +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/hc32/tests/SConscript b/bsp/hc32/tests/SConscript index fd00268e783..3733761301b 100644 --- a/bsp/hc32/tests/SConscript +++ b/bsp/hc32/tests/SConscript @@ -52,8 +52,8 @@ if GetDepend(['BSP_USING_RTC']): if GetDepend(['BSP_USING_WDT']) or GetDepend(['BSP_USING_SWDT']): src += ['test_wdt.c'] -if GetDepend(['BSP_USING_HWTIMER']): - src += ['test_hwtimer.c'] +if GetDepend(['BSP_USING_CLOCK_TIMER']): + src += ['test_clock_timer.c'] if GetDepend(['BSP_USING_PULSE_ENCODER']): src += ['test_pulse_encoder.c'] diff --git a/bsp/hc32/tests/test_hwtimer.c b/bsp/hc32/tests/test_clock_timer.c similarity index 75% rename from bsp/hc32/tests/test_hwtimer.c rename to bsp/hc32/tests/test_clock_timer.c index 3bb8d7738c7..b5536b9bed7 100644 --- a/bsp/hc32/tests/test_hwtimer.c +++ b/bsp/hc32/tests/test_clock_timer.c @@ -9,13 +9,13 @@ */ /* - * 程序清单：这是一个 hwtimer 设备使用例程 - * 例程导出了 hwtimer_sample 命令到控制终端 - * 命令调用格式：hwtimer_sample hwtimer_sample [option1] [option2] [option3] + * 程序清单：这是一个 clock_timer 设备使用例程 + * 例程导出了 clock_timer_sample 命令到控制终端 + * 命令调用格式：clock_timer_sample clock_timer_sample [option1] [option2] [option3] * option1: [tmra_1/2/3..] 定时器单元 * option2: [oneshot/period] 定时模式 * option3: 超时时间，单位毫秒 - * eg:hwtimer_sample tmra_1 period 1000 + * eg:clock_timer_sample tmra_1 period 1000 * 程序功能：每隔一秒打印一次定时器运行时间值，在定时器超时回调函数中打印总tick值 * 可以使用逻辑分析进一步查看测试管脚PA0定时时间是否准确 */ @@ -25,7 +25,7 @@ #include #include -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER /* IO用于定时时间测试 */ #define TIMEOUT_TEST_PIN GET_PIN(A, 0) @@ -33,13 +33,13 @@ static rt_uint32_t tick; static rt_bool_t cb_run = RT_FALSE; -static void _hwtimer_cmd_print_usage(void) +static void _clock_timer_cmd_print_usage(void) { - rt_kprintf("hwtimer_sample [option1] [option2] [option3]\n"); + rt_kprintf("clock_timer_sample [option1] [option2] [option3]\n"); rt_kprintf(" option1: [tmra_1/2/3..] tmra uint\n"); rt_kprintf(" option2: [oneshot/period] timing mode set\n"); rt_kprintf(" option3: timeout unit:ms\n"); - rt_kprintf(" e.g. MSH >hwtimer_sample tmra_1 period 1000\n"); + rt_kprintf(" e.g. MSH >clock_timer_sample tmra_1 period 1000\n"); } /* 定时器超时回调函数 */ @@ -55,22 +55,22 @@ static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) return 0; } -static int hwtimer_sample(int argc, char *argv[]) +static int clock_timer_sample(int argc, char *argv[]) { rt_uint8_t i; rt_err_t ret = RT_EOK; - rt_hwtimerval_t timeout_s; /* 定时器超时值 */ - rt_hwtimer_mode_t mode = HWTIMER_MODE_ONESHOT; /* 定时器模式 */ + rt_clock_timerval_t timeout_s; /* 定时器超时值 */ + rt_clock_timer_mode_t mode = CLOCK_TIMER_MODE_ONESHOT; /* 定时器模式 */ rt_device_t hw_dev = RT_NULL; /* 定时器设备句柄 */ - rt_hwtimer_t *hwtimer; + rt_clock_timer_t *clock_timer; float t; rt_uint8_t loop_cnt; /* 循环打印次数 */ - rt_hwtimerval_t overflow_tv; /* 定时器超时值 */ + rt_clock_timerval_t overflow_tv; /* 定时器超时值 */ rt_uint32_t timer_out_s; if ((argc != 4) || (rt_strcmp("oneshot", argv[2]) && rt_strcmp("period", argv[2]))) { - _hwtimer_cmd_print_usage(); + _clock_timer_cmd_print_usage(); return -RT_ERROR; } @@ -78,12 +78,12 @@ static int hwtimer_sample(int argc, char *argv[]) hw_dev = rt_device_find(argv[1]); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", argv[1]); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", argv[1]); return -RT_ERROR; } else { - hwtimer = (rt_hwtimer_t *)hw_dev; + clock_timer = (rt_clock_timer_t *)hw_dev; } /* 以读写方式打开设备 */ @@ -97,15 +97,15 @@ static int hwtimer_sample(int argc, char *argv[]) /* 设置模式 */ if (0 == rt_strcmp(argv[2], "oneshot")) { - mode = HWTIMER_MODE_ONESHOT; + mode = CLOCK_TIMER_MODE_ONESHOT; loop_cnt = 1; } else if (0 == rt_strcmp(argv[2], "period")) { - mode = HWTIMER_MODE_PERIOD; + mode = CLOCK_TIMER_MODE_PERIOD; loop_cnt = 5; } - rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); /* 设置超时回调函数 */ rt_device_set_rx_indicate(hw_dev, timeout_cb); @@ -132,15 +132,15 @@ static int hwtimer_sample(int argc, char *argv[]) rt_thread_mdelay(1000); /* 读取定时器当前值 */ - if (mode == HWTIMER_MODE_PERIOD) + if (mode == CLOCK_TIMER_MODE_PERIOD) { rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s)); } - else if (mode == HWTIMER_MODE_ONESHOT) + else if (mode == CLOCK_TIMER_MODE_ONESHOT) { rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s)); - t = hwtimer->overflow * hwtimer->period_sec; + t = clock_timer->overflow * clock_timer->period_sec; overflow_tv.sec = (rt_int32_t)t; overflow_tv.usec = (rt_int32_t)((t - overflow_tv.sec) * 1000000); @@ -160,5 +160,5 @@ static int hwtimer_sample(int argc, char *argv[]) return ret; } /* 导出到 msh 命令列表中 */ -MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample: devname [oneshot | period] timeout); +MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample: devname [oneshot | period] timeout); #endif diff --git a/bsp/hk32/hk32f030c8-mini/README.md b/bsp/hk32/hk32f030c8-mini/README.md index 14fc745b899..22d62e433bb 100644 --- a/bsp/hk32/hk32f030c8-mini/README.md +++ b/bsp/hk32/hk32f030c8-mini/README.md @@ -49,7 +49,7 @@ HK32F030C8T6-MINI板级包支持MDK5开发环境和GCC编译器，以下是具 | SPI | 支持 | SPI1 | | ADC | 不支持 | | | PWM | 不支持 | | -| HWTIMER | 不支持 | | +| CLOCK_TIMER | 不支持 | | | WDT | 不支持 | | | RTC | 不支持 | | | FLASH | 不支持 | | diff --git a/bsp/hk32/hk32f030c8-mini/board/Kconfig b/bsp/hk32/hk32f030c8-mini/board/Kconfig index 2479bdc2ecc..e3e8e27c2fa 100644 --- a/bsp/hk32/hk32f030c8-mini/board/Kconfig +++ b/bsp/hk32/hk32f030c8-mini/board/Kconfig @@ -78,11 +78,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTIM3 bool "Enable hardware timer3" default n diff --git a/bsp/hk32/libraries/rt_drivers/SConscript b/bsp/hk32/libraries/rt_drivers/SConscript index b810f026e9f..c816e2c8fbd 100644 --- a/bsp/hk32/libraries/rt_drivers/SConscript +++ b/bsp/hk32/libraries/rt_drivers/SConscript @@ -18,8 +18,8 @@ if GetDepend(['RT_USING_SERIAL']): if GetDepend(['BSP_USING_PWM']): src += ['drv_pwm.c'] -if GetDepend(['BSP_USING_HWTIMER']): - src += ['drv_hwtimer.c'] +if GetDepend(['BSP_USING_CLOCK_TIMER']): + src += ['drv_timer.c'] if GetDepend(['BSP_USING_SPI']): src += ['drv_spi.c'] diff --git a/bsp/hpmicro/hpm5300evk/board/Kconfig b/bsp/hpmicro/hpm5300evk/board/Kconfig index b02bba277d9..2abc17f7fbe 100644 --- a/bsp/hpmicro/hpm5300evk/board/Kconfig +++ b/bsp/hpmicro/hpm5300evk/board/Kconfig @@ -342,7 +342,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_GPTMR bool "Enable GPTMR" default n - select RT_USING_HWTIMER if BSP_USING_GPTMR + select RT_USING_CLOCK_TIME if BSP_USING_GPTMR if BSP_USING_GPTMR config BSP_USING_GPTMR0 bool "Enable GPTMR0" diff --git a/bsp/hpmicro/hpm5301evklite/board/Kconfig b/bsp/hpmicro/hpm5301evklite/board/Kconfig index 63888530c25..41f1d35f175 100644 --- a/bsp/hpmicro/hpm5301evklite/board/Kconfig +++ b/bsp/hpmicro/hpm5301evklite/board/Kconfig @@ -266,7 +266,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_GPTMR bool "Enable GPTMR" default n - select RT_USING_HWTIMER if BSP_USING_GPTMR + select RT_USING_CLOCK_TIME if BSP_USING_GPTMR if BSP_USING_GPTMR config BSP_USING_GPTMR0 bool "Enable GPTMR0" diff --git a/bsp/hpmicro/hpm5e00evk/board/Kconfig b/bsp/hpmicro/hpm5e00evk/board/Kconfig index 6e8a2b2341d..a6813786a28 100644 --- a/bsp/hpmicro/hpm5e00evk/board/Kconfig +++ b/bsp/hpmicro/hpm5e00evk/board/Kconfig @@ -401,7 +401,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_GPTMR bool "Enable GPTMR" default n - select RT_USING_HWTIMER if BSP_USING_GPTMR + select RT_USING_CLOCK_TIME if BSP_USING_GPTMR if BSP_USING_GPTMR config BSP_USING_GPTMR0 bool "Enable GPTMR0" diff --git a/bsp/hpmicro/hpm6200evk/board/Kconfig b/bsp/hpmicro/hpm6200evk/board/Kconfig index 43fbd1d4ba0..0b5373e534a 100644 --- a/bsp/hpmicro/hpm6200evk/board/Kconfig +++ b/bsp/hpmicro/hpm6200evk/board/Kconfig @@ -130,7 +130,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_GPTMR bool "Enable GPTMR" default n - select RT_USING_HWTIMER if BSP_USING_GPTMR + select RT_USING_CLOCK_TIME if BSP_USING_GPTMR if BSP_USING_GPTMR config BSP_USING_GPTMR1 bool "Enable GPTMR1" diff --git a/bsp/hpmicro/hpm6300evk/board/Kconfig b/bsp/hpmicro/hpm6300evk/board/Kconfig index 7a1ea26dbfe..accf154bcc3 100644 --- a/bsp/hpmicro/hpm6300evk/board/Kconfig +++ b/bsp/hpmicro/hpm6300evk/board/Kconfig @@ -468,7 +468,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_GPTMR bool "Enable GPTMR" default n - select RT_USING_HWTIMER if BSP_USING_GPTMR + select RT_USING_CLOCK_TIME if BSP_USING_GPTMR if BSP_USING_GPTMR config BSP_USING_GPTMR0 bool "Enable GPTMR0" diff --git a/bsp/hpmicro/hpm6750evk/board/Kconfig b/bsp/hpmicro/hpm6750evk/board/Kconfig index 975ec75bc8e..386d29bd177 100644 --- a/bsp/hpmicro/hpm6750evk/board/Kconfig +++ b/bsp/hpmicro/hpm6750evk/board/Kconfig @@ -279,7 +279,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_GPTMR bool "Enable GPTMR" default n - select RT_USING_HWTIMER if BSP_USING_GPTMR + select RT_USING_CLOCK_TIME if BSP_USING_GPTMR if BSP_USING_GPTMR config BSP_USING_GPTMR1 bool "Enable GPTMR1" diff --git a/bsp/hpmicro/hpm6750evk2/board/Kconfig b/bsp/hpmicro/hpm6750evk2/board/Kconfig index 9f97bd4a7d3..893320d8c87 100644 --- a/bsp/hpmicro/hpm6750evk2/board/Kconfig +++ b/bsp/hpmicro/hpm6750evk2/board/Kconfig @@ -785,7 +785,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_GPTMR bool "Enable GPTMR" default n - select RT_USING_HWTIMER if BSP_USING_GPTMR + select RT_USING_CLOCK_TIME if BSP_USING_GPTMR if BSP_USING_GPTMR config BSP_USING_GPTMR0 bool "Enable GPTMR0" diff --git a/bsp/hpmicro/hpm6750evkmini/board/Kconfig b/bsp/hpmicro/hpm6750evkmini/board/Kconfig index 29c636386ec..f495435be7b 100644 --- a/bsp/hpmicro/hpm6750evkmini/board/Kconfig +++ b/bsp/hpmicro/hpm6750evkmini/board/Kconfig @@ -791,7 +791,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_GPTMR bool "Enable GPTMR" default n - select RT_USING_HWTIMER if BSP_USING_GPTMR + select RT_USING_CLOCK_TIME if BSP_USING_GPTMR if BSP_USING_GPTMR config BSP_USING_GPTMR0 bool "Enable GPTMR0" diff --git a/bsp/hpmicro/hpm6800evk/board/Kconfig b/bsp/hpmicro/hpm6800evk/board/Kconfig index 9e8d58ad4e2..d23696e8540 100644 --- a/bsp/hpmicro/hpm6800evk/board/Kconfig +++ b/bsp/hpmicro/hpm6800evk/board/Kconfig @@ -567,7 +567,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_GPTMR bool "Enable GPTMR" default n - select RT_USING_HWTIMER if BSP_USING_GPTMR + select RT_USING_CLOCK_TIME if BSP_USING_GPTMR if BSP_USING_GPTMR config BSP_USING_GPTMR0 bool "Enable GPTMR0" diff --git a/bsp/hpmicro/hpm6e00evk/board/Kconfig b/bsp/hpmicro/hpm6e00evk/board/Kconfig index 795107e16ca..6ba06a28d82 100644 --- a/bsp/hpmicro/hpm6e00evk/board/Kconfig +++ b/bsp/hpmicro/hpm6e00evk/board/Kconfig @@ -753,7 +753,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_GPTMR bool "Enable GPTMR" default n - select RT_USING_HWTIMER if BSP_USING_GPTMR + select RT_USING_CLOCK_TIME if BSP_USING_GPTMR if BSP_USING_GPTMR config BSP_USING_GPTMR0 bool "Enable GPTMR0" diff --git a/bsp/hpmicro/hpm6p00evk/board/Kconfig b/bsp/hpmicro/hpm6p00evk/board/Kconfig index beaf5b3a9ed..ad13b7dab86 100644 --- a/bsp/hpmicro/hpm6p00evk/board/Kconfig +++ b/bsp/hpmicro/hpm6p00evk/board/Kconfig @@ -401,7 +401,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_GPTMR bool "Enable GPTMR" default n - select RT_USING_HWTIMER if BSP_USING_GPTMR + select RT_USING_CLOCK_TIME if BSP_USING_GPTMR if BSP_USING_GPTMR config BSP_USING_GPTMR0 bool "Enable GPTMR0" diff --git a/bsp/hpmicro/libraries/drivers/SConscript b/bsp/hpmicro/libraries/drivers/SConscript index d558ae6e9b5..4f5fa25d84f 100644 --- a/bsp/hpmicro/libraries/drivers/SConscript +++ b/bsp/hpmicro/libraries/drivers/SConscript @@ -3,6 +3,7 @@ from building import * cwd = GetCurrentDir() src = [] +src += ['drv_delay.c'] if GetDepend('BSP_USING_GPIO'): src += ['drv_gpio.c'] @@ -33,7 +34,7 @@ if GetDepend('BSP_USING_PWM') or GetDepend('BSP_USING_PWMV2'): src += ['drv_pwm.c'] if GetDepend('BSP_USING_GPTMR'): - src += ['drv_hwtimer.c'] + src += ['drv_timer.c'] if GetDepend('BSP_USING_CAN'): src += ['drv_can.c'] diff --git a/bsp/hpmicro/libraries/drivers/drv_hwtimer.h b/bsp/hpmicro/libraries/drivers/drv_hwtimer.h deleted file mode 100644 index 29739f06407..00000000000 --- a/bsp/hpmicro/libraries/drivers/drv_hwtimer.h +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Copyright (c) 2022 HPMicro - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef DRV_HWTIMER_H -#define DRV_HWTIMER_H - - -int rt_hw_hwtimer_init(void); - -#endif /* DRV_HWTIMER_H */ diff --git a/bsp/hpmicro/libraries/drivers/drv_hwtimer.c b/bsp/hpmicro/libraries/drivers/drv_timer.c similarity index 79% rename from bsp/hpmicro/libraries/drivers/drv_hwtimer.c rename to bsp/hpmicro/libraries/drivers/drv_timer.c index 7b29c99b513..3c3a37c4f46 100644 --- a/bsp/hpmicro/libraries/drivers/drv_hwtimer.c +++ b/bsp/hpmicro/libraries/drivers/drv_timer.c @@ -8,9 +8,9 @@ #include #include #include -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME -#include "drv_hwtimer.h" +#include "drv_timer.h" #include "board.h" #include "hpm_gptmr_drv.h" @@ -20,34 +20,34 @@ typedef struct _hpm_gptimer { GPTMR_Type *base; const char *name; - rt_hwtimer_t timer; + rt_clock_timer_t timer; uint32_t channel; clock_name_t clock_name; int32_t irq_num; uint8_t irq_priority; } hpm_gptimer_t; -static void hpm_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t hpm_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode); -static void hpm_hwtimer_stop(rt_hwtimer_t *timer); -static rt_uint32_t hpm_hwtimer_count_get(rt_hwtimer_t *timer); -static rt_err_t hpm_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void hpm_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t hpm_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode); +static void hpm_clock_timer_stop(rt_clock_timer_t *timer); +static rt_uint32_t hpm_clock_timer_count_get(rt_clock_timer_t *timer); +static rt_err_t hpm_clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); static void hpm_hwtmr_isr(hpm_gptimer_t *gptmr); -static const struct rt_hwtimer_ops hpm_hwtimer_ops = { - .init = hpm_hwtimer_init, - .start = hpm_hwtimer_start, - .stop = hpm_hwtimer_stop, - .count_get = hpm_hwtimer_count_get, - .control = hpm_hwtimer_control +static const struct rt_clock_timer_ops hpm_clock_timer_ops = { + .init = hpm_clock_timer_init, + .start = hpm_clock_timer_start, + .stop = hpm_clock_timer_stop, + .count_get = hpm_clock_timer_count_get, + .control = hpm_clock_timer_control }; -static const struct rt_hwtimer_info hpm_hwtimer_info = { +static const struct rt_clock_timer_info hpm_clock_timer_info = { .maxfreq = 100000000UL, .minfreq = 93750UL, .maxcnt = 0xFFFFFFFFUL, - .cntmode = HWTIMER_CNTMODE_UP + .cntmode = CLOCK_TIMER_CNTMODE_UP }; @@ -262,12 +262,12 @@ static void hpm_hwtmr_isr(hpm_gptimer_t *timer) uint32_t hwtmr_stat = gptmr_get_status(timer->base); if ((hwtmr_stat & GPTMR_CH_RLD_STAT_MASK(timer->channel)) != 0U) { - rt_device_hwtimer_isr(&timer->timer); + rt_clock_timer_isr(&timer->timer); gptmr_clear_status(timer->base, GPTMR_CH_RLD_STAT_MASK(timer->channel)); } } -static void hpm_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void hpm_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*)timer->parent.user_data; GPTMR_Type *base = hpm_gptmr->base; @@ -282,7 +282,7 @@ static void hpm_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t hpm_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t hpm_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*) timer->parent.user_data; GPTMR_Type *base = hpm_gptmr->base; @@ -307,7 +307,7 @@ static rt_err_t hpm_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtim return RT_EOK; } -static void hpm_hwtimer_stop(rt_hwtimer_t *timer) +static void hpm_clock_timer_stop(rt_clock_timer_t *timer) { hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*)timer->parent.user_data; GPTMR_Type *base = hpm_gptmr->base; @@ -315,7 +315,7 @@ static void hpm_hwtimer_stop(rt_hwtimer_t *timer) gptmr_stop_counter(base, hpm_gptmr->channel); } -static rt_uint32_t hpm_hwtimer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t hpm_clock_timer_count_get(rt_clock_timer_t *timer) { hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*)timer->parent.user_data; GPTMR_Type *base = hpm_gptmr->base; @@ -325,7 +325,7 @@ static rt_uint32_t hpm_hwtimer_count_get(rt_hwtimer_t *timer) return current_cnt; } -static rt_err_t hpm_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t hpm_clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t err = RT_EOK; hpm_gptimer_t *hpm_gptmr = (hpm_gptimer_t*) timer->parent.user_data; @@ -333,16 +333,16 @@ static rt_err_t hpm_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void * switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: err = -RT_ERROR; break; - case HWTIMER_CTRL_INFO_GET: - *(rt_hwtimer_t*)args = hpm_gptmr->timer; + case CLOCK_TIMER_CTRL_INFO_GET: + *(rt_clock_timer_t*)args = hpm_gptmr->timer; break; - case HWTIMER_CTRL_MODE_SET: + case CLOCK_TIMER_CTRL_MODE_SET: hpm_gptmr->timer.mode = *(rt_uint32_t*)args; break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: gptmr_stop_counter(base, hpm_gptmr->channel); break; } @@ -351,15 +351,15 @@ static rt_err_t hpm_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void * } -int rt_hw_hwtimer_init(void) +int rt_hw_clock_timer_init(void) { int ret = RT_EOK; for (uint32_t i = 0; i < ARRAY_SIZE(s_gptimers); i++) { - s_gptimers[i]->timer.info = &hpm_hwtimer_info; - s_gptimers[i]->timer.ops = &hpm_hwtimer_ops; - ret = rt_device_hwtimer_register(&s_gptimers[i]->timer, s_gptimers[i]->name, s_gptimers[i]); + s_gptimers[i]->timer.info = &hpm_clock_timer_info; + s_gptimers[i]->timer.ops = &hpm_clock_timer_ops; + ret = rt_clock_timer_register(&s_gptimers[i]->timer, s_gptimers[i]->name, s_gptimers[i]); if (ret != RT_EOK) { LOG_E("%s register failed\n", s_gptimers[i]->name); @@ -369,6 +369,6 @@ int rt_hw_hwtimer_init(void) return ret; } -INIT_BOARD_EXPORT(rt_hw_hwtimer_init); +INIT_BOARD_EXPORT(rt_hw_clock_timer_init); #endif /* BSP_USING_GPTMR */ diff --git a/bsp/hpmicro/libraries/drivers/drv_timer.h b/bsp/hpmicro/libraries/drivers/drv_timer.h new file mode 100644 index 00000000000..3a6e615c0a5 --- /dev/null +++ b/bsp/hpmicro/libraries/drivers/drv_timer.h @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2022 HPMicro + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + +#ifndef DRV_CLOCK_TIMER_H +#define DRV_CLOCK_TIMER_H + + +int rt_hw_clock_timer_init(void); + +#endif /* DRV_CLOCK_TIMER_H */ diff --git a/bsp/k210/drivers/SConscript b/bsp/k210/drivers/SConscript index cc4dc0e26dc..71b51795954 100644 --- a/bsp/k210/drivers/SConscript +++ b/bsp/k210/drivers/SConscript @@ -18,12 +18,9 @@ if GetDepend('BSP_USING_LCD'): src += ['drv_mpylcd.c'] src += ['test/lcd_test.c'] -if GetDepend('RT_USING_HWTIMER'): +if GetDepend('RT_USING_CLOCK_TIME') and os.path.exists(os.path.join(cwd, 'drv_hw_timer.c')): src += ['drv_hw_timer.c'] -if GetDepend('RT_USING_CPUTIME'): - src += ['drv_cputime.c'] - if GetDepend('RT_USING_I2C'): src += ['drv_i2c.c'] diff --git a/bsp/k230/board/Kconfig b/bsp/k230/board/Kconfig index 92c78665606..11d7e6aae0b 100644 --- a/bsp/k230/board/Kconfig +++ b/bsp/k230/board/Kconfig @@ -165,7 +165,7 @@ menu "Drivers Configuration" menuconfig BSP_USING_TIMERS bool "Enable Hardware Timers" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n if BSP_USING_TIMERS diff --git a/bsp/k230/drivers/interdrv/hwtimer/SConscript b/bsp/k230/drivers/interdrv/clock_timer/SConscript similarity index 100% rename from bsp/k230/drivers/interdrv/hwtimer/SConscript rename to bsp/k230/drivers/interdrv/clock_timer/SConscript diff --git a/bsp/k230/drivers/interdrv/hwtimer/drv_timer.c b/bsp/k230/drivers/interdrv/clock_timer/drv_timer.c similarity index 84% rename from bsp/k230/drivers/interdrv/hwtimer/drv_timer.c rename to bsp/k230/drivers/interdrv/clock_timer/drv_timer.c index 4ec803739c5..8bc6c50fc23 100644 --- a/bsp/k230/drivers/interdrv/hwtimer/drv_timer.c +++ b/bsp/k230/drivers/interdrv/clock_timer/drv_timer.c @@ -52,8 +52,8 @@ #include "drv_timer.h" #include -static void k230_timer_stop(rt_hwtimer_t *timer); -static void k230_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void k230_timer_stop(rt_clock_timer_t *timer); +static void k230_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { struct k230_timer *kd_timer = rt_container_of(timer, struct k230_timer, device); @@ -76,7 +76,7 @@ static void k230_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t k230_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t k230_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { struct k230_timer *kd_timer = rt_container_of(timer, struct k230_timer, device); uint8_t id = kd_timer->id; @@ -87,7 +87,7 @@ static rt_err_t k230_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtime return RT_EOK; } -static void k230_timer_stop(rt_hwtimer_t *timer) +static void k230_timer_stop(rt_clock_timer_t *timer) { struct k230_timer *kd_timer = rt_container_of(timer, struct k230_timer, device); uint8_t id = kd_timer->id; @@ -96,7 +96,7 @@ static void k230_timer_stop(rt_hwtimer_t *timer) reg->channel[id].control |= TIMER_CR_INTERRUPT_MASK; } -static rt_uint32_t k230_timer_get(rt_hwtimer_t *timer) +static rt_uint32_t k230_timer_get(rt_clock_timer_t *timer) { struct k230_timer *kd_timer = rt_container_of(timer, struct k230_timer, device); uint8_t id = kd_timer->id; @@ -104,13 +104,13 @@ static rt_uint32_t k230_timer_get(rt_hwtimer_t *timer) return reg->channel[id].current_value; } -static rt_err_t k230_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t k230_timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { struct k230_timer *kd_timer = rt_container_of(timer, struct k230_timer, device); switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: timer->freq = *((rt_uint32_t*)arg); sysctl_clk_set_leaf_parent(kd_timer->clk, kd_timer->clk_src); if (timer->freq == timer->info->minfreq) @@ -122,32 +122,32 @@ static rt_err_t k230_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) if (timer->freq == 25*MHz) sysctl_clk_set_leaf_div(kd_timer->clk_src, 1, 4); break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: k230_timer_stop(timer); break; - case HWTIMER_CTRL_INFO_GET: + case CLOCK_TIMER_CTRL_INFO_GET: if (arg == RT_NULL) { - LOG_E("HWTIMER_CTRL_INFO_GET arg is NULL"); + LOG_E("CLOCK_TIMER_CTRL_INFO_GET arg is NULL"); return -RT_ERROR; } - *(struct rt_hwtimer_info *)arg = *(kd_timer->device.info); + *(struct rt_clock_timer_info *)arg = *(kd_timer->device.info); break; - case HWTIMER_CTRL_MODE_SET: + case CLOCK_TIMER_CTRL_MODE_SET: if (arg == RT_NULL) { - LOG_E("HWTIMER_CTRL_MODE_SET arg is NULL"); + LOG_E("CLOCK_TIMER_CTRL_MODE_SET arg is NULL"); return -RT_ERROR; } - timer->mode = *(rt_hwtimer_mode_t *)arg; - if (timer->mode != HWTIMER_MODE_ONESHOT) + timer->mode = *(rt_clock_timer_mode_t *)arg; + if (timer->mode != CLOCK_TIMER_MODE_ONESHOT) { LOG_E("mode is invalid/unsupported, only ONESHOT is supported"); return -RT_ERROR; } break; default: - LOG_E("HWTIMER_CTRL cmd is invalid"); + LOG_E("CLOCK_TIMER_CTRL cmd is invalid"); return -RT_ERROR; } return RT_EOK; @@ -165,15 +165,15 @@ static int k230_timer_fops_close(struct dfs_file* fd) return rt_device_close(device); } -static const struct rt_hwtimer_info k230_timer_info = +static const struct rt_clock_timer_info k230_timer_info = { 100000000, /* the maximum count frequency can be set */ 12500000, /* the minimum count frequency can be set */ 0xFFFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_DW, /* Increment or Decreasing count mode */ + CLOCK_TIMER_CNTMODE_DW, /* Increment or Decreasing count mode */ }; -static const struct rt_hwtimer_ops k230_timer_ops = +static const struct rt_clock_timer_ops k230_timer_ops = { .init = k230_timer_init, .start = k230_timer_start, @@ -187,20 +187,20 @@ static const struct dfs_file_ops k230_timer_fops = { k230_timer_fops_close, }; -void k230_hwtimer_isr(int vector, void *param) +void k230_clock_timer_isr(int vector, void *param) { uint32_t ret; struct k230_timer *kd_timer = (struct k230_timer *)param; - rt_hwtimer_t *hwtimer = (rt_hwtimer_t *)&(kd_timer->device); + rt_clock_timer_t *clock_timer = (rt_clock_timer_t *)&(kd_timer->device); - RT_ASSERT(kd_timer != RT_NULL && hwtimer != RT_NULL); + RT_ASSERT(kd_timer != RT_NULL && clock_timer != RT_NULL); int id = kd_timer->id; k230_timer_regs_t* reg = (k230_timer_regs_t *)kd_timer->base; ret = (reg->channel[id].eoi); - rt_device_hwtimer_isr(hwtimer); + rt_clock_timer_isr(clock_timer); } static struct k230_timer timer_devices[] = @@ -211,7 +211,7 @@ static struct k230_timer timer_devices[] = .device.ops = &k230_timer_ops, .device.parent.fops = &k230_timer_fops, - .name = "hwtimer0", + .name = "clock_timer0", .id = 0, .clk = SYSCTL_CLK_TIMER0, .clk_src = SYSCTL_CLK_TIMER0_SRC, @@ -225,7 +225,7 @@ static struct k230_timer timer_devices[] = .device.ops = &k230_timer_ops, .device.parent.fops = &k230_timer_fops, - .name = "hwtimer1", + .name = "clock_timer1", .id = 1, .clk = SYSCTL_CLK_TIMER1, .clk_src = SYSCTL_CLK_TIMER1_SRC, @@ -239,7 +239,7 @@ static struct k230_timer timer_devices[] = .device.ops = &k230_timer_ops, .device.parent.fops = &k230_timer_fops, - .name = "hwtimer2", + .name = "clock_timer2", .id = 2, .clk = SYSCTL_CLK_TIMER2, .clk_src = SYSCTL_CLK_TIMER2_SRC, @@ -253,7 +253,7 @@ static struct k230_timer timer_devices[] = .device.ops = &k230_timer_ops, .device.parent.fops = &k230_timer_fops, - .name = "hwtimer3", + .name = "clock_timer3", .id = 3, .clk = SYSCTL_CLK_TIMER3, .clk_src = SYSCTL_CLK_TIMER3_SRC, @@ -267,7 +267,7 @@ static struct k230_timer timer_devices[] = .device.ops = &k230_timer_ops, .device.parent.fops = &k230_timer_fops, - .name = "hwtimer4", + .name = "clock_timer4", .id = 4, .clk = SYSCTL_CLK_TIMER4, .clk_src = SYSCTL_CLK_TIMER4_SRC, @@ -281,7 +281,7 @@ static struct k230_timer timer_devices[] = .device.ops = &k230_timer_ops, .device.parent.fops = &k230_timer_fops, - .name = "hwtimer5", + .name = "clock_timer5", .id = 5, .clk = SYSCTL_CLK_TIMER5, .clk_src = SYSCTL_CLK_TIMER5_SRC, @@ -315,7 +315,7 @@ int rt_hw_timer_init(void) { timer_devices[i].base = (rt_ubase_t)base; - if (rt_device_hwtimer_register(&timer_devices[i].device, timer_devices[i].name, RT_NULL) != RT_EOK) + if (rt_clock_timer_register(&timer_devices[i].device, timer_devices[i].name, RT_NULL) != RT_EOK) { LOG_E("%s register failed!", timer_devices[i].name); return -RT_ERROR; @@ -323,7 +323,7 @@ int rt_hw_timer_init(void) LOG_D("%s register OK!", timer_devices[i].name); rt_hw_interrupt_install(timer_devices[i].irq_num, - k230_hwtimer_isr, + k230_clock_timer_isr, &timer_devices[i], timer_devices[i].name); rt_hw_interrupt_umask(timer_devices[i].irq_num); diff --git a/bsp/k230/drivers/interdrv/hwtimer/drv_timer.h b/bsp/k230/drivers/interdrv/clock_timer/drv_timer.h similarity index 98% rename from bsp/k230/drivers/interdrv/hwtimer/drv_timer.h rename to bsp/k230/drivers/interdrv/clock_timer/drv_timer.h index 71392243bc8..e0d127bc43e 100644 --- a/bsp/k230/drivers/interdrv/hwtimer/drv_timer.h +++ b/bsp/k230/drivers/interdrv/clock_timer/drv_timer.h @@ -32,7 +32,7 @@ #ifndef DRV_TIMER_H__ #define DRV_TIMER_H__ #include -#include +#include #include "sysctl_clk.h" #include "board.h" @@ -85,7 +85,7 @@ typedef struct _k230_timer_regs } __attribute__((packed, aligned(4))) k230_timer_regs_t; struct k230_timer { - struct rt_hwtimer_device device; + struct rt_clock_timer_device device; const char *name; rt_ubase_t base; uint32_t id; diff --git a/bsp/k230/drivers/utest/test_timer.c b/bsp/k230/drivers/utest/test_timer.c index 50a5578a70b..ddcffbacbdb 100644 --- a/bsp/k230/drivers/utest/test_timer.c +++ b/bsp/k230/drivers/utest/test_timer.c @@ -30,9 +30,9 @@ */ #include -#include +#include -#include "../interdrv/hwtimer/drv_timer.h" +#include "../interdrv/clock_timer/drv_timer.h" #include "utest.h" /* @@ -46,8 +46,8 @@ * 6. Trigger the interrupt callback when the timer times out and print a message. */ -#define DEVICE_NAME0 "hwtimer0" -#define DEVICE_NAME1 "hwtimer1" +#define DEVICE_NAME0 "clock_timer0" +#define DEVICE_NAME1 "clock_timer1" static rt_device_t tmr_dev_0; static rt_device_t tmr_dev_1; @@ -59,24 +59,24 @@ static rt_device_t tmr_dev_1; static rt_err_t tmr_timeout_cb(rt_device_t dev, rt_size_t size) { - struct rt_hwtimer_device *rt_timer = rt_container_of(dev, struct rt_hwtimer_device, parent); + struct rt_clock_timer_device *rt_timer = rt_container_of(dev, struct rt_clock_timer_device, parent); struct k230_timer *kd_timer = rt_container_of(rt_timer, struct k230_timer, device); LOG_I("---> [%s] timeout callback fucntion!\n", kd_timer->name); return RT_EOK; } -static void test_hwtimer(void) +static void test_clock_timer(void) { - rt_hwtimerval_t timerval; - rt_hwtimer_mode_t mode; + rt_clock_timerval_t timerval; + rt_clock_timer_mode_t mode; rt_size_t tsize; rt_uint32_t freq = 25000000; /* Frequency options: 12.5M 25M 50M 100M */ rt_err_t ret; rt_ssize_t size; int loop_count = 0; - LOG_I("test_hwtimer start"); + LOG_I("test_clock_timer start"); tmr_dev_0 = rt_device_find(DEVICE_NAME0); uassert_not_null(tmr_dev_0); @@ -88,7 +88,7 @@ static void test_hwtimer(void) ret = rt_device_open(tmr_dev_1, RT_DEVICE_OFLAG_RDWR); uassert_int_equal(ret, RT_EOK); - ret = rt_device_control(tmr_dev_0, HWTIMER_CTRL_FREQ_SET, &freq); + ret = rt_device_control(tmr_dev_0, CLOCK_TIMER_CTRL_FREQ_SET, &freq); uassert_int_equal(ret, RT_EOK); ret = rt_device_set_rx_indicate(tmr_dev_0, tmr_timeout_cb); @@ -99,8 +99,8 @@ static void test_hwtimer(void) timerval.sec = TIMEOUT_SEC_0; timerval.usec = 0; tsize = sizeof(timerval); - mode = HWTIMER_MODE_ONESHOT; - ret = rt_device_control(tmr_dev_0, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_ONESHOT; + ret = rt_device_control(tmr_dev_0, CLOCK_TIMER_CTRL_MODE_SET, &mode); uassert_int_equal(ret, RT_EOK); size = rt_device_write(tmr_dev_0, 0, &timerval, tsize); uassert_int_equal(size, tsize); @@ -109,8 +109,8 @@ static void test_hwtimer(void) timerval.sec = TIMEOUT_SEC_1; timerval.usec = 0; tsize = sizeof(timerval); - mode = HWTIMER_MODE_ONESHOT; - ret = rt_device_control(tmr_dev_1, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_ONESHOT; + ret = rt_device_control(tmr_dev_1, CLOCK_TIMER_CTRL_MODE_SET, &mode); uassert_int_equal(ret, RT_EOK); size = rt_device_write(tmr_dev_1, 0, &timerval, tsize); uassert_int_equal(size, tsize); @@ -133,12 +133,12 @@ static void test_hwtimer(void) uassert_int_equal(ret, RT_EOK); ret = rt_device_close(tmr_dev_1); uassert_int_equal(ret, RT_EOK); - LOG_I("test_hwtimer end"); + LOG_I("test_clock_timer end"); } static void hw_timer_testcase(void) { - UTEST_UNIT_RUN(test_hwtimer); + UTEST_UNIT_RUN(test_clock_timer); } static rt_err_t utest_tc_init(void) diff --git a/bsp/mm32/libraries/MM32F3270_HAL/SConscript b/bsp/mm32/libraries/MM32F3270_HAL/SConscript index dd7e019ef4d..2ca9f25edd3 100644 --- a/bsp/mm32/libraries/MM32F3270_HAL/SConscript +++ b/bsp/mm32/libraries/MM32F3270_HAL/SConscript @@ -29,7 +29,7 @@ if GetDepend(['RT_USING_SPI']): if GetDepend(['RT_USING_USB']): src += ['MM32F3270_HAL_Driver/Src/hal_usb.c'] -if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']): +if GetDepend(['RT_USING_CLOCK_TIME']) or GetDepend(['RT_USING_PWM']): src += ['MM32F3270_HAL_Driver/Src/hal_tim_16b.c'] src += ['MM32F3270_HAL_Driver/Src/hal_tim_32b.c'] src += ['MM32F3270_HAL_Driver/Src/hal_tim_adv.c'] diff --git a/bsp/n32/libraries/N32G43x_Firmware_Library/SConscript b/bsp/n32/libraries/N32G43x_Firmware_Library/SConscript index 24b530897e7..b935a5a6b6e 100644 --- a/bsp/n32/libraries/N32G43x_Firmware_Library/SConscript +++ b/bsp/n32/libraries/N32G43x_Firmware_Library/SConscript @@ -33,7 +33,7 @@ if GetDepend(['RT_USING_ADC']): if GetDepend(['RT_USING_DAC']): src += ['n32g43x_std_periph_driver/src/n32g43x_dac.c'] -if GetDepend(['RT_USING_HWTIMER']): +if GetDepend(['RT_USING_CLOCK_TIME']): src += ['n32g43x_std_periph_driver/src/n32g43x_tim.c'] if GetDepend(['RT_USING_RTC']): diff --git a/bsp/n32/libraries/N32G45x_Firmware_Library/SConscript b/bsp/n32/libraries/N32G45x_Firmware_Library/SConscript index fc0934459fa..3b0502c2c4a 100644 --- a/bsp/n32/libraries/N32G45x_Firmware_Library/SConscript +++ b/bsp/n32/libraries/N32G45x_Firmware_Library/SConscript @@ -38,7 +38,7 @@ if GetDepend(['RT_USING_ADC']): if GetDepend(['RT_USING_DAC']): src += ['n32g45x_std_periph_driver/src/n32g45x_dac.c'] -if GetDepend(['RT_USING_HWTIMER']): +if GetDepend(['RT_USING_CLOCK_TIME']): src += ['n32g45x_std_periph_driver/src/n32g45x_tim.c'] if GetDepend(['RT_USING_RTC']): diff --git a/bsp/n32/libraries/N32G4FR_Firmware_Library/SConscript b/bsp/n32/libraries/N32G4FR_Firmware_Library/SConscript index d10b610de1c..7d39f87d201 100644 --- a/bsp/n32/libraries/N32G4FR_Firmware_Library/SConscript +++ b/bsp/n32/libraries/N32G4FR_Firmware_Library/SConscript @@ -32,7 +32,7 @@ if GetDepend(['RT_USING_ADC']): if GetDepend(['RT_USING_DAC']): src += ['n32g4fr_std_periph_driver/src/n32g4fr_dac.c'] -if GetDepend(['RT_USING_HWTIMER']): +if GetDepend(['RT_USING_CLOCK_TIME']): src += ['n32g4fr_std_periph_driver/src/n32g4fr_tim.c'] if GetDepend(['RT_USING_RTC']): diff --git a/bsp/n32/libraries/N32L40x_Firmware_Library/SConscript b/bsp/n32/libraries/N32L40x_Firmware_Library/SConscript index 49b8b0a13b5..05abfbd596f 100644 --- a/bsp/n32/libraries/N32L40x_Firmware_Library/SConscript +++ b/bsp/n32/libraries/N32L40x_Firmware_Library/SConscript @@ -33,7 +33,7 @@ if GetDepend(['RT_USING_ADC']): if GetDepend(['RT_USING_DAC']): src += ['n32l40x_std_periph_driver/src/n32l40x_dac.c'] -if GetDepend(['RT_USING_HWTIMER']): +if GetDepend(['RT_USING_CLOCK_TIME']): src += ['n32l40x_std_periph_driver/src/n32l40x_tim.c'] if GetDepend(['RT_USING_RTC']): diff --git a/bsp/n32/libraries/N32L43x_Firmware_Library/SConscript b/bsp/n32/libraries/N32L43x_Firmware_Library/SConscript index f8180cfb79a..ad89d20dd6c 100644 --- a/bsp/n32/libraries/N32L43x_Firmware_Library/SConscript +++ b/bsp/n32/libraries/N32L43x_Firmware_Library/SConscript @@ -33,7 +33,7 @@ if GetDepend(['RT_USING_ADC']): if GetDepend(['RT_USING_DAC']): src += ['n32l43x_std_periph_driver/src/n32l43x_dac.c'] -if GetDepend(['RT_USING_HWTIMER']): +if GetDepend(['RT_USING_CLOCK_TIME']): src += ['n32l43x_std_periph_driver/src/n32l43x_tim.c'] if GetDepend(['RT_USING_RTC']): diff --git a/bsp/n32/libraries/N32WB452_Firmware_Library/SConscript b/bsp/n32/libraries/N32WB452_Firmware_Library/SConscript index ec1ac4502ae..a8862b66ef1 100644 --- a/bsp/n32/libraries/N32WB452_Firmware_Library/SConscript +++ b/bsp/n32/libraries/N32WB452_Firmware_Library/SConscript @@ -33,7 +33,7 @@ if GetDepend(['RT_USING_ADC']): if GetDepend(['RT_USING_DAC']): src += ['n32wb452_std_periph_driver/src/n32wb452_dac.c'] -if GetDepend(['RT_USING_HWTIMER']): +if GetDepend(['RT_USING_CLOCK_TIME']): src += ['n32wb452_std_periph_driver/src/n32wb452_tim.c'] if GetDepend(['RT_USING_RTC']): diff --git a/bsp/n32/libraries/n32_drivers/SConscript b/bsp/n32/libraries/n32_drivers/SConscript index 107e4d1b333..b97376e3883 100644 --- a/bsp/n32/libraries/n32_drivers/SConscript +++ b/bsp/n32/libraries/n32_drivers/SConscript @@ -17,8 +17,8 @@ if GetDepend(['RT_USING_SERIAL']): else: src += ['drv_usart.c'] -if GetDepend(['RT_USING_HWTIMER']): - src += ['drv_hwtimer.c'] +if GetDepend(['RT_USING_CLOCK_TIME']): + src += ['drv_timer.c'] if GetDepend(['RT_USING_PWM']): src += ['drv_pwm.c'] diff --git a/bsp/n32/libraries/n32_drivers/drv_hwtimer.c b/bsp/n32/libraries/n32_drivers/drv_timer.c similarity index 66% rename from bsp/n32/libraries/n32_drivers/drv_hwtimer.c rename to bsp/n32/libraries/n32_drivers/drv_timer.c index 575f9944900..890fd9cd78f 100644 --- a/bsp/n32/libraries/n32_drivers/drv_hwtimer.c +++ b/bsp/n32/libraries/n32_drivers/drv_timer.c @@ -8,17 +8,17 @@ * 2022-10-19 Nations first version */ -#include "drv_hwtimer.h" +#include "drv_timer.h" -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME -#if defined(BSP_USING_HWTIMER1) || defined(BSP_USING_HWTIMER2) || defined(BSP_USING_HWTIMER3) || \ - defined(BSP_USING_HWTIMER4) || defined(BSP_USING_HWTIMER5) || defined(BSP_USING_HWTIMER6) || \ - defined(BSP_USING_HWTIMER7) || defined(BSP_USING_HWTIMER8) || defined(BSP_USING_HWTIMER9) +#if defined(BSP_USING_CLOCK_TIMER1) || defined(BSP_USING_CLOCK_TIMER2) || defined(BSP_USING_CLOCK_TIMER3) || \ + defined(BSP_USING_CLOCK_TIMER4) || defined(BSP_USING_CLOCK_TIMER5) || defined(BSP_USING_CLOCK_TIMER6) || \ + defined(BSP_USING_CLOCK_TIMER7) || defined(BSP_USING_CLOCK_TIMER8) || defined(BSP_USING_CLOCK_TIMER9) -static struct n32_hwtimer_config hwtimer_config[] = +static struct n32_clock_timer_config clock_timer_config[] = { -#ifdef BSP_USING_HWTIMER1 +#ifdef BSP_USING_CLOCK_TIMER1 { "timer1", TIM1, @@ -26,7 +26,7 @@ static struct n32_hwtimer_config hwtimer_config[] = }, #endif -#ifdef BSP_USING_HWTIMER2 +#ifdef BSP_USING_CLOCK_TIMER2 { "timer2", TIM2, @@ -34,7 +34,7 @@ static struct n32_hwtimer_config hwtimer_config[] = }, #endif -#ifdef BSP_USING_HWTIMER3 +#ifdef BSP_USING_CLOCK_TIMER3 { "timer3", TIM3, @@ -42,7 +42,7 @@ static struct n32_hwtimer_config hwtimer_config[] = }, #endif -#ifdef BSP_USING_HWTIMER4 +#ifdef BSP_USING_CLOCK_TIMER4 { "timer4", TIM4, @@ -50,7 +50,7 @@ static struct n32_hwtimer_config hwtimer_config[] = }, #endif -#ifdef BSP_USING_HWTIMER5 +#ifdef BSP_USING_CLOCK_TIMER5 { "timer5", TIM5, @@ -58,7 +58,7 @@ static struct n32_hwtimer_config hwtimer_config[] = }, #endif -#ifdef BSP_USING_HWTIMER6 +#ifdef BSP_USING_CLOCK_TIMER6 { "timer6", TIM6, @@ -66,7 +66,7 @@ static struct n32_hwtimer_config hwtimer_config[] = }, #endif -#ifdef BSP_USING_HWTIMER7 +#ifdef BSP_USING_CLOCK_TIMER7 { "timer7", TIM7, @@ -74,7 +74,7 @@ static struct n32_hwtimer_config hwtimer_config[] = }, #endif -#ifdef BSP_USING_HWTIMER8 +#ifdef BSP_USING_CLOCK_TIMER8 { "timer8", TIM8, @@ -82,7 +82,7 @@ static struct n32_hwtimer_config hwtimer_config[] = }, #endif -#ifdef BSP_USING_HWTIMER9 +#ifdef BSP_USING_CLOCK_TIMER9 { "timer9", TIM9, @@ -100,47 +100,47 @@ static void caculate_tim_count() { uint8_t count = 0; -#ifdef BSP_USING_HWTIMER1 +#ifdef BSP_USING_CLOCK_TIMER1 tim1_count = count; count++; #endif -#ifdef BSP_USING_HWTIMER2 +#ifdef BSP_USING_CLOCK_TIMER2 tim2_count = count; count++; #endif -#ifdef BSP_USING_HWTIMER3 +#ifdef BSP_USING_CLOCK_TIMER3 tim3_count = count; count++; #endif -#ifdef BSP_USING_HWTIMER4 +#ifdef BSP_USING_CLOCK_TIMER4 tim4_count = count; count++; #endif -#ifdef BSP_USING_HWTIMER5 +#ifdef BSP_USING_CLOCK_TIMER5 tim5_count = count; count++; #endif -#ifdef BSP_USING_HWTIMER6 +#ifdef BSP_USING_CLOCK_TIMER6 tim6_count = count; count++; #endif -#ifdef BSP_USING_HWTIMER7 +#ifdef BSP_USING_CLOCK_TIMER7 tim7_count = count; count++; #endif -#ifdef BSP_USING_HWTIMER8 +#ifdef BSP_USING_CLOCK_TIMER8 tim8_count = count; count++; #endif -#ifdef BSP_USING_HWTIMER9 +#ifdef BSP_USING_CLOCK_TIMER9 tim9_count = count; count++; #endif @@ -149,22 +149,22 @@ static void caculate_tim_count() #define BITS(start, end) ((0xFFFFFFFFUL << (start)) & (0xFFFFFFFFUL >> (31U - (uint32_t)(end)))) #define GET_BITS(regval, start, end) (((regval) & BITS((start),(end))) >> (start)) -static struct n32_hwtimer hwtimer_obj[sizeof(hwtimer_config) / sizeof(hwtimer_config[0])] = {0}; +static struct n32_clock_timer clock_timer_obj[sizeof(clock_timer_config) / sizeof(clock_timer_config[0])] = {0}; -static rt_err_t n32_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t n32_clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t err = RT_EOK; - struct n32_hwtimer_config *config; + struct n32_clock_timer_config *config; RCC_ClocksType RCC_ClockFreq; RT_ASSERT(timer != RT_NULL); - config = (struct n32_hwtimer_config *)timer->parent.user_data; + config = (struct n32_clock_timer_config *)timer->parent.user_data; RCC_GetClocksFreqValue(&RCC_ClockFreq); switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint8_t clkpre; @@ -188,7 +188,7 @@ static rt_err_t n32_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void * config->timer_periph->EVTGEN |= TIM_EVTGEN_UDGN; } break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: TIM_Enable(config->timer_periph, DISABLE); break; default: @@ -198,13 +198,13 @@ static rt_err_t n32_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void * return err; } -static rt_uint32_t n32_hwtimer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t n32_clock_timer_count_get(rt_clock_timer_t *timer) { rt_uint32_t CurrentTimer_Count; - struct n32_hwtimer_config *config; + struct n32_clock_timer_config *config; RT_ASSERT(timer != RT_NULL); - config = (struct n32_hwtimer_config *)timer->parent.user_data; + config = (struct n32_clock_timer_config *)timer->parent.user_data; CurrentTimer_Count = TIM_GetCnt(config->timer_periph); @@ -232,13 +232,13 @@ void TIM_NVIC_Config(IRQn_Type IRQn, uint8_t PreemptionPriority, uint8_t SubPrio } -static void n32_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void n32_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { - struct n32_hwtimer_config *config; + struct n32_clock_timer_config *config; TIM_TimeBaseInitType TIM_TimeBaseStructure; RCC_ClocksType RCC_ClockFreq; RT_ASSERT(timer != RT_NULL); - config = (struct n32_hwtimer_config *)timer->parent.user_data; + config = (struct n32_clock_timer_config *)timer->parent.user_data; if (state == 1) { @@ -272,7 +272,7 @@ static void n32_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1; TIM_TimeBaseStructure.RepetCnt = 0; - if (timer->info->cntmode == HWTIMER_CNTMODE_UP) + if (timer->info->cntmode == CLOCK_TIMER_CNTMODE_UP) { TIM_TimeBaseStructure.CntMode = TIM_CNT_MODE_UP; } @@ -294,18 +294,18 @@ static void n32_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t n32_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t n32_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { - struct n32_hwtimer_config *config; + struct n32_clock_timer_config *config; RT_ASSERT(timer != RT_NULL); - config = (struct n32_hwtimer_config *)timer->parent.user_data; + config = (struct n32_clock_timer_config *)timer->parent.user_data; /* set tim cnt */ TIM_SetCnt(config->timer_periph, 0); /* set tim arr */ TIM_SetAutoReload(config->timer_periph, cnt - 1); - if (mode == HWTIMER_MODE_ONESHOT) + if (mode == CLOCK_TIMER_MODE_ONESHOT) { TIM_SelectOnePulseMode(config->timer_periph, TIM_OPMODE_SINGLE); } @@ -324,32 +324,32 @@ static rt_err_t n32_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtim return RT_EOK; } -static void n32_hwtimer_stop(rt_hwtimer_t *timer) +static void n32_clock_timer_stop(rt_clock_timer_t *timer) { - struct n32_hwtimer_config *config; + struct n32_clock_timer_config *config; RT_ASSERT(timer != RT_NULL); - config = (struct n32_hwtimer_config *)timer->parent.user_data; + config = (struct n32_clock_timer_config *)timer->parent.user_data; TIM_Enable(config->timer_periph, DISABLE); TIM_NVIC_Config(config->irqn, 3, 0, DISABLE); } -static const struct rt_hwtimer_ops n32_hwtimer_ops = +static const struct rt_clock_timer_ops n32_clock_timer_ops = { - .init = n32_hwtimer_init, - .start = n32_hwtimer_start, - .stop = n32_hwtimer_stop, - .count_get = n32_hwtimer_count_get, - .control = n32_hwtimer_control, + .init = n32_clock_timer_init, + .start = n32_clock_timer_start, + .stop = n32_clock_timer_stop, + .count_get = n32_clock_timer_count_get, + .control = n32_clock_timer_control, }; -static const struct rt_hwtimer_info n32_hwtimer_info = +static const struct rt_clock_timer_info n32_clock_timer_info = { 1000000, /* the maximum count frequency can be set */ 2000, /* the minimum count frequency can be set */ 0xFFFF, - HWTIMER_CNTMODE_UP, + CLOCK_TIMER_CNTMODE_UP, }; /** @@ -425,187 +425,187 @@ void TIM_IRQHandler(TIM_Module* timer_periph) } } -#ifdef BSP_USING_HWTIMER1 +#ifdef BSP_USING_CLOCK_TIMER1 void TIM1_UP_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - TIM_ClrIntPendingBit(hwtimer_obj[tim1_count].config->timer_periph, TIM_INT_UPDATE); - rt_device_hwtimer_isr(&hwtimer_obj[tim1_count].time_device); + TIM_ClrIntPendingBit(clock_timer_obj[tim1_count].config->timer_periph, TIM_INT_UPDATE); + rt_clock_timer_isr(&clock_timer_obj[tim1_count].time_device); /* leave interrupt */ rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER2 +#ifdef BSP_USING_CLOCK_TIMER2 void TIM2_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - TIM_ClrIntPendingBit(hwtimer_obj[tim2_count].config->timer_periph, TIM_INT_UPDATE); - rt_device_hwtimer_isr(&hwtimer_obj[tim2_count].time_device); + TIM_ClrIntPendingBit(clock_timer_obj[tim2_count].config->timer_periph, TIM_INT_UPDATE); + rt_clock_timer_isr(&clock_timer_obj[tim2_count].time_device); /* leave interrupt */ rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER3 +#ifdef BSP_USING_CLOCK_TIMER3 void TIM3_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - TIM_ClrIntPendingBit(hwtimer_obj[tim3_count].config->timer_periph, TIM_INT_UPDATE); - rt_device_hwtimer_isr(&hwtimer_obj[tim3_count].time_device); + TIM_ClrIntPendingBit(clock_timer_obj[tim3_count].config->timer_periph, TIM_INT_UPDATE); + rt_clock_timer_isr(&clock_timer_obj[tim3_count].time_device); /* leave interrupt */ rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER4 +#ifdef BSP_USING_CLOCK_TIMER4 void TIM4_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - TIM_ClrIntPendingBit(hwtimer_obj[tim4_count].config->timer_periph, TIM_INT_UPDATE); - rt_device_hwtimer_isr(&hwtimer_obj[tim4_count].time_device); + TIM_ClrIntPendingBit(clock_timer_obj[tim4_count].config->timer_periph, TIM_INT_UPDATE); + rt_clock_timer_isr(&clock_timer_obj[tim4_count].time_device); /* leave interrupt */ rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER5 +#ifdef BSP_USING_CLOCK_TIMER5 void TIM5_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - TIM_ClrIntPendingBit(hwtimer_obj[tim5_count].config->timer_periph, TIM_INT_UPDATE); - rt_device_hwtimer_isr(&hwtimer_obj[tim5_count].time_device); + TIM_ClrIntPendingBit(clock_timer_obj[tim5_count].config->timer_periph, TIM_INT_UPDATE); + rt_clock_timer_isr(&clock_timer_obj[tim5_count].time_device); /* leave interrupt */ rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER6 +#ifdef BSP_USING_CLOCK_TIMER6 void TIM6_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - TIM_ClrIntPendingBit(hwtimer_obj[tim6_count].config->timer_periph, TIM_INT_UPDATE); - rt_device_hwtimer_isr(&hwtimer_obj[tim6_count].time_device); + TIM_ClrIntPendingBit(clock_timer_obj[tim6_count].config->timer_periph, TIM_INT_UPDATE); + rt_clock_timer_isr(&clock_timer_obj[tim6_count].time_device); /* leave interrupt */ rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER7 +#ifdef BSP_USING_CLOCK_TIMER7 void TIM7_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - TIM_ClrIntPendingBit(hwtimer_obj[tim7_count].config->timer_periph, TIM_INT_UPDATE); - rt_device_hwtimer_isr(&hwtimer_obj[tim7_count].time_device); + TIM_ClrIntPendingBit(clock_timer_obj[tim7_count].config->timer_periph, TIM_INT_UPDATE); + rt_clock_timer_isr(&clock_timer_obj[tim7_count].time_device); /* leave interrupt */ rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER8 +#ifdef BSP_USING_CLOCK_TIMER8 void TIM8_UP_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - TIM_ClrIntPendingBit(hwtimer_obj[tim8_count].config->timer_periph, TIM_INT_UPDATE); - rt_device_hwtimer_isr(&hwtimer_obj[tim8_count].time_device); + TIM_ClrIntPendingBit(clock_timer_obj[tim8_count].config->timer_periph, TIM_INT_UPDATE); + rt_clock_timer_isr(&clock_timer_obj[tim8_count].time_device); /* leave interrupt */ rt_interrupt_leave(); } #endif -#ifdef BSP_USING_HWTIMER9 +#ifdef BSP_USING_CLOCK_TIMER9 void TIM9_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - TIM_ClrIntPendingBit(hwtimer_obj[tim9_count].config->timer_periph, TIM_INT_UPDATE); - rt_device_hwtimer_isr(&hwtimer_obj[tim9_count].time_device); + TIM_ClrIntPendingBit(clock_timer_obj[tim9_count].config->timer_periph, TIM_INT_UPDATE); + rt_clock_timer_isr(&clock_timer_obj[tim9_count].time_device); /* leave interrupt */ rt_interrupt_leave(); } #endif -int rt_hwtimer_init(void) +int rt_clock_timer_init(void) { int i = 0; int result = RT_EOK; -#ifdef BSP_USING_HWTIMER1 +#ifdef BSP_USING_CLOCK_TIMER1 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM1, ENABLE); #endif -#ifdef BSP_USING_HWTIMER2 +#ifdef BSP_USING_CLOCK_TIMER2 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM2, ENABLE); #endif -#ifdef BSP_USING_HWTIMER3 +#ifdef BSP_USING_CLOCK_TIMER3 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM3, ENABLE); #endif -#ifdef BSP_USING_HWTIMER4 +#ifdef BSP_USING_CLOCK_TIMER4 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM4, ENABLE); #endif -#ifdef BSP_USING_HWTIMER5 +#ifdef BSP_USING_CLOCK_TIMER5 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM5, ENABLE); #endif -#ifdef BSP_USING_HWTIMER6 +#ifdef BSP_USING_CLOCK_TIMER6 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM6, ENABLE); #endif -#ifdef BSP_USING_HWTIMER7 +#ifdef BSP_USING_CLOCK_TIMER7 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM7, ENABLE); #endif -#ifdef BSP_USING_HWTIMER8 +#ifdef BSP_USING_CLOCK_TIMER8 RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_TIM8, ENABLE); #endif -#ifdef BSP_USING_HWTIMER9 +#ifdef BSP_USING_CLOCK_TIMER9 RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_TIM9, ENABLE); #endif caculate_tim_count(); - for (i = 0; i < sizeof(hwtimer_obj) / sizeof(hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(clock_timer_obj) / sizeof(clock_timer_obj[0]); i++) { - hwtimer_obj[i].time_device.info = &n32_hwtimer_info; - hwtimer_obj[i].time_device.ops = &n32_hwtimer_ops; - hwtimer_obj[i].config = &hwtimer_config[i]; - rt_device_hwtimer_register(&hwtimer_obj[i].time_device, \ - hwtimer_obj[i].config->name, hwtimer_obj[i].config); + clock_timer_obj[i].time_device.info = &n32_clock_timer_info; + clock_timer_obj[i].time_device.ops = &n32_clock_timer_ops; + clock_timer_obj[i].config = &clock_timer_config[i]; + rt_clock_timer_register(&clock_timer_obj[i].time_device, \ + clock_timer_obj[i].config->name, clock_timer_obj[i].config); } return result; } -INIT_DEVICE_EXPORT(rt_hwtimer_init); +INIT_DEVICE_EXPORT(rt_clock_timer_init); -#endif /* defined(BSP_USING_HWTIMERx) */ -#endif /* RT_USING_HWTIMER */ +#endif /* defined(BSP_USING_CLOCK_TIMERx) */ +#endif /* RT_USING_CLOCK_TIME */ diff --git a/bsp/n32/libraries/n32_drivers/drv_hwtimer.h b/bsp/n32/libraries/n32_drivers/drv_timer.h similarity index 64% rename from bsp/n32/libraries/n32_drivers/drv_hwtimer.h rename to bsp/n32/libraries/n32_drivers/drv_timer.h index ee1368ae367..c0cf8976824 100644 --- a/bsp/n32/libraries/n32_drivers/drv_hwtimer.h +++ b/bsp/n32/libraries/n32_drivers/drv_timer.h @@ -8,8 +8,8 @@ * 2022-10-19 Nations first version */ -#ifndef __DRV_HWTIMER__ -#define __DRV_HWTIMER__ +#ifndef __DRV_CLOCK_TIMER__ +#define __DRV_CLOCK_TIMER__ #include #include @@ -21,23 +21,23 @@ extern "C" { #endif /* n32 config class */ -struct n32_hwtimer_config +struct n32_clock_timer_config { const char *name; TIM_Module* timer_periph; IRQn_Type irqn; }; -struct n32_hwtimer +struct n32_clock_timer { - rt_hwtimer_t time_device; - struct n32_hwtimer_config *config; + rt_clock_timer_t time_device; + struct n32_clock_timer_config *config; }; -int rt_hwtimer_init(void); +int rt_clock_timer_init(void); #ifdef __cplusplus } #endif -#endif /* __DRV_HWTIMER__ */ +#endif /* __DRV_CLOCK_TIMER__ */ diff --git a/bsp/n32/n32g43xcl-stb/README.md b/bsp/n32/n32g43xcl-stb/README.md index ba8b0db849d..9e389606a27 100644 --- a/bsp/n32/n32g43xcl-stb/README.md +++ b/bsp/n32/n32g43xcl-stb/README.md @@ -45,7 +45,7 @@ N32G43XCL_STB 板级包支持MDK5开发环境和GCC编译器，以下是具体 | ADC | 支持 | ADC | | CAN | 支持 | CAN | | DAC | 支持 | DAC | -| HWTIMER | 支持 | TIMER1/2/3/4/5/6/7/8/9 | +| CLOCK_TIMER | 支持 | TIMER1/2/3/4/5/6/7/8/9 | | WDT | 支持 | IWDG | | RTC | 支持 | 时钟源支持LSE/LSI/HSE | diff --git a/bsp/n32/n32g43xcl-stb/board/Kconfig b/bsp/n32/n32g43xcl-stb/board/Kconfig index a5bfedd61c1..cf2a42fedd0 100644 --- a/bsp/n32/n32g43xcl-stb/board/Kconfig +++ b/bsp/n32/n32g43xcl-stb/board/Kconfig @@ -107,45 +107,45 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n - config BSP_USING_HWTIMER9 - bool "using hwtimer9" + config BSP_USING_CLOCK_TIMER9 + bool "using clock_timer9" default n endif diff --git a/bsp/n32/n32g43xcl-stb/project.ewp b/bsp/n32/n32g43xcl-stb/project.ewp index 84925d44d1f..9a4a86e020c 100644 --- a/bsp/n32/n32g43xcl-stb/project.ewp +++ b/bsp/n32/n32g43xcl-stb/project.ewp @@ -2237,7 +2237,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2321,7 +2321,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32g43xcl-stb/project.uvprojx b/bsp/n32/n32g43xcl-stb/project.uvprojx index 8d75374a6f6..8c33d032b76 100644 --- a/bsp/n32/n32g43xcl-stb/project.uvprojx +++ b/bsp/n32/n32g43xcl-stb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32/n32g457qel-stb/README.md b/bsp/n32/n32g457qel-stb/README.md index f6e08227939..a64e39d489a 100644 --- a/bsp/n32/n32g457qel-stb/README.md +++ b/bsp/n32/n32g457qel-stb/README.md @@ -45,7 +45,7 @@ N32G457QEL-STB 板级包支持MDK5开发环境和GCC编译器，以下是具体 | ADC | 支持 | ADC1/2/3/4 | | CAN | 支持 | CAN1/2 | | DAC | 支持 | DAC2, DAC1由于与音频芯片直连，工作会受到影响 | -| HWTIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | +| CLOCK_TIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | | WDT | 支持 | IWDG | | RTC | 支持 | 时钟源支持LSE/LSI/HSE | diff --git a/bsp/n32/n32g457qel-stb/board/Kconfig b/bsp/n32/n32g457qel-stb/board/Kconfig index 2e186f1a749..ea112b3c239 100644 --- a/bsp/n32/n32g457qel-stb/board/Kconfig +++ b/bsp/n32/n32g457qel-stb/board/Kconfig @@ -114,34 +114,34 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n endif diff --git a/bsp/n32/n32g457qel-stb/project.ewp b/bsp/n32/n32g457qel-stb/project.ewp index bd8690c0502..8f1108bf107 100644 --- a/bsp/n32/n32g457qel-stb/project.ewp +++ b/bsp/n32/n32g457qel-stb/project.ewp @@ -2237,7 +2237,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2321,7 +2321,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32g457qel-stb/project.uvprojx b/bsp/n32/n32g457qel-stb/project.uvprojx index b994bc1107a..6075cab541b 100644 --- a/bsp/n32/n32g457qel-stb/project.uvprojx +++ b/bsp/n32/n32g457qel-stb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32/n32g45xcl-stb/README.md b/bsp/n32/n32g45xcl-stb/README.md index ca50472b840..6138e07cb58 100644 --- a/bsp/n32/n32g45xcl-stb/README.md +++ b/bsp/n32/n32g45xcl-stb/README.md @@ -45,7 +45,7 @@ N32G45XCL-STB 板级包支持MDK5开发环境和GCC编译器，以下是具体 | ADC | 支持 | ADC1/2/3/4 | | CAN | 支持 | CAN1/2 | | DAC | 支持 | DAC1/2 | -| HWTIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | +| CLOCK_TIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | | WDT | 支持 | IWDG | | RTC | 支持 | 时钟源支持LSE/LSI/HSE | diff --git a/bsp/n32/n32g45xcl-stb/board/Kconfig b/bsp/n32/n32g45xcl-stb/board/Kconfig index ac08b2c594d..b7034deff09 100644 --- a/bsp/n32/n32g45xcl-stb/board/Kconfig +++ b/bsp/n32/n32g45xcl-stb/board/Kconfig @@ -114,34 +114,34 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n endif diff --git a/bsp/n32/n32g45xcl-stb/project.ewp b/bsp/n32/n32g45xcl-stb/project.ewp index c6ed49af2af..8e9be79e66a 100644 --- a/bsp/n32/n32g45xcl-stb/project.ewp +++ b/bsp/n32/n32g45xcl-stb/project.ewp @@ -2237,7 +2237,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2321,7 +2321,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32g45xcl-stb/project.uvprojx b/bsp/n32/n32g45xcl-stb/project.uvprojx index 2f9e8d63593..7d8841a62e1 100644 --- a/bsp/n32/n32g45xcl-stb/project.uvprojx +++ b/bsp/n32/n32g45xcl-stb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32/n32g45xml-stb/README.md b/bsp/n32/n32g45xml-stb/README.md index 50409930a8d..a05199f0b4f 100644 --- a/bsp/n32/n32g45xml-stb/README.md +++ b/bsp/n32/n32g45xml-stb/README.md @@ -45,7 +45,7 @@ N32G45XML-STB 板级包支持MDK5开发环境和GCC编译器，以下是具体 | ADC | 支持 | ADC1/2/3/4 | | CAN | 支持 | CAN1/2 | | DAC | 支持 | DAC1/2 | -| HWTIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | +| CLOCK_TIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | | WDT | 支持 | IWDG | | RTC | 支持 | 时钟源支持LSE/LSI/HSE | diff --git a/bsp/n32/n32g45xml-stb/board/Kconfig b/bsp/n32/n32g45xml-stb/board/Kconfig index 2e186f1a749..ea112b3c239 100644 --- a/bsp/n32/n32g45xml-stb/board/Kconfig +++ b/bsp/n32/n32g45xml-stb/board/Kconfig @@ -114,34 +114,34 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n endif diff --git a/bsp/n32/n32g45xml-stb/project.ewp b/bsp/n32/n32g45xml-stb/project.ewp index e78f902eaad..6f05d12e068 100644 --- a/bsp/n32/n32g45xml-stb/project.ewp +++ b/bsp/n32/n32g45xml-stb/project.ewp @@ -2237,7 +2237,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2321,7 +2321,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32g45xml-stb/project.uvprojx b/bsp/n32/n32g45xml-stb/project.uvprojx index 7db04a3fcef..4bbb30d6111 100644 --- a/bsp/n32/n32g45xml-stb/project.uvprojx +++ b/bsp/n32/n32g45xml-stb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32/n32g45xrl-stb/README.md b/bsp/n32/n32g45xrl-stb/README.md index 1c1f77eef09..831d6094964 100644 --- a/bsp/n32/n32g45xrl-stb/README.md +++ b/bsp/n32/n32g45xrl-stb/README.md @@ -45,7 +45,7 @@ N32G45XRL-STB 板级包支持MDK5开发环境和GCC编译器，以下是具体 | ADC | 支持 | ADC1/2/3/4 | | CAN | 支持 | CAN1/2 | | DAC | 支持 | DAC1/2 | -| HWTIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | +| CLOCK_TIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | | WDT | 支持 | IWDG | | RTC | 支持 | 时钟源支持LSE/LSI/HSE | diff --git a/bsp/n32/n32g45xrl-stb/board/Kconfig b/bsp/n32/n32g45xrl-stb/board/Kconfig index 2e186f1a749..ea112b3c239 100644 --- a/bsp/n32/n32g45xrl-stb/board/Kconfig +++ b/bsp/n32/n32g45xrl-stb/board/Kconfig @@ -114,34 +114,34 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n endif diff --git a/bsp/n32/n32g45xrl-stb/project.ewp b/bsp/n32/n32g45xrl-stb/project.ewp index df8713d3477..1a898830f02 100644 --- a/bsp/n32/n32g45xrl-stb/project.ewp +++ b/bsp/n32/n32g45xrl-stb/project.ewp @@ -2237,7 +2237,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2321,7 +2321,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32g45xrl-stb/project.uvprojx b/bsp/n32/n32g45xrl-stb/project.uvprojx index d2d6148d78b..33efa7b75eb 100644 --- a/bsp/n32/n32g45xrl-stb/project.uvprojx +++ b/bsp/n32/n32g45xrl-stb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32/n32g45xvl-stb/README.md b/bsp/n32/n32g45xvl-stb/README.md index d588ffe423a..f481a953cd5 100644 --- a/bsp/n32/n32g45xvl-stb/README.md +++ b/bsp/n32/n32g45xvl-stb/README.md @@ -45,7 +45,7 @@ N32G45XVL-STB 板级包支持MDK5开发环境和GCC编译器，以下是具体 | ADC | 支持 | ADC1/2/3/4 | | CAN | 支持 | CAN1/2 | | DAC | 支持 | DAC1/2 | -| HWTIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | +| CLOCK_TIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | | WDT | 支持 | IWDG | ### IO在板级支持包中的映射情况 diff --git a/bsp/n32/n32g45xvl-stb/board/Kconfig b/bsp/n32/n32g45xvl-stb/board/Kconfig index 5df1f9fc3a8..51047d9b4b3 100644 --- a/bsp/n32/n32g45xvl-stb/board/Kconfig +++ b/bsp/n32/n32g45xvl-stb/board/Kconfig @@ -447,34 +447,34 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n endif diff --git a/bsp/n32/n32g45xvl-stb/project.ewp b/bsp/n32/n32g45xvl-stb/project.ewp index 137f9ff1c67..60d65cbb1eb 100644 --- a/bsp/n32/n32g45xvl-stb/project.ewp +++ b/bsp/n32/n32g45xvl-stb/project.ewp @@ -2237,7 +2237,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2321,7 +2321,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32g45xvl-stb/project.uvprojx b/bsp/n32/n32g45xvl-stb/project.uvprojx index b4310ee0aed..3d12e6f4b91 100644 --- a/bsp/n32/n32g45xvl-stb/project.uvprojx +++ b/bsp/n32/n32g45xvl-stb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32/n32g4frml-stb/board/Kconfig b/bsp/n32/n32g4frml-stb/board/Kconfig index 16351ea7e11..f2c09867d68 100644 --- a/bsp/n32/n32g4frml-stb/board/Kconfig +++ b/bsp/n32/n32g4frml-stb/board/Kconfig @@ -114,34 +114,34 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n endif diff --git a/bsp/n32/n32g4frml-stb/project.ewp b/bsp/n32/n32g4frml-stb/project.ewp index 3b515c59cc5..96ebc11b673 100644 --- a/bsp/n32/n32g4frml-stb/project.ewp +++ b/bsp/n32/n32g4frml-stb/project.ewp @@ -2213,7 +2213,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2297,7 +2297,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32g4frml-stb/project.uvprojx b/bsp/n32/n32g4frml-stb/project.uvprojx index 6008458b4ac..f116d801f89 100644 --- a/bsp/n32/n32g4frml-stb/project.uvprojx +++ b/bsp/n32/n32g4frml-stb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32/n32l40xcl-stb/README.md b/bsp/n32/n32l40xcl-stb/README.md index c25ba9b192c..f1155c24e07 100644 --- a/bsp/n32/n32l40xcl-stb/README.md +++ b/bsp/n32/n32l40xcl-stb/README.md @@ -45,7 +45,7 @@ N32L40XCL_STB 板级包支持MDK5开发环境和GCC编译器，以下是具体 | ADC | 支持 | ADC | | CAN | 支持 | CAN | | DAC | 支持 | DAC | -| HWTIMER | 支持 | TIMER1/2/3/4/5/6/7/8/9 | +| CLOCK_TIMER | 支持 | TIMER1/2/3/4/5/6/7/8/9 | | WDT | 支持 | IWDG | | RTC | 支持 | 时钟源支持LSE/LSI/HSE | diff --git a/bsp/n32/n32l40xcl-stb/board/Kconfig b/bsp/n32/n32l40xcl-stb/board/Kconfig index 4303b8e4ad1..be6846a115b 100644 --- a/bsp/n32/n32l40xcl-stb/board/Kconfig +++ b/bsp/n32/n32l40xcl-stb/board/Kconfig @@ -107,45 +107,45 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n - config BSP_USING_HWTIMER9 - bool "using hwtimer9" + config BSP_USING_CLOCK_TIMER9 + bool "using clock_timer9" default n endif diff --git a/bsp/n32/n32l40xcl-stb/project.ewp b/bsp/n32/n32l40xcl-stb/project.ewp index 8343f097f33..74de3b89314 100644 --- a/bsp/n32/n32l40xcl-stb/project.ewp +++ b/bsp/n32/n32l40xcl-stb/project.ewp @@ -2237,7 +2237,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2321,7 +2321,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32l40xcl-stb/project.uvprojx b/bsp/n32/n32l40xcl-stb/project.uvprojx index 82add6e608d..b984ba461b8 100644 --- a/bsp/n32/n32l40xcl-stb/project.uvprojx +++ b/bsp/n32/n32l40xcl-stb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32/n32l436-evb/README.md b/bsp/n32/n32l436-evb/README.md index 2b083412988..24e33e568b0 100644 --- a/bsp/n32/n32l436-evb/README.md +++ b/bsp/n32/n32l436-evb/README.md @@ -45,7 +45,7 @@ N32L436_EVB 板级包支持MDK5开发环境和GCC编译器，以下是具体版 | ADC | 支持 | ADC | | CAN | 支持 | CAN | | DAC | 支持 | DAC | -| HWTIMER | 支持 | TIMER1/2/3/4/5/6/7/8/9 | +| CLOCK_TIMER | 支持 | TIMER1/2/3/4/5/6/7/8/9 | | WDT | 支持 | IWDG | | RTC | 支持 | 时钟源支持LSE/LSI/HSE | diff --git a/bsp/n32/n32l436-evb/board/Kconfig b/bsp/n32/n32l436-evb/board/Kconfig index 5e3fe2a39e6..312cd4e7dfe 100644 --- a/bsp/n32/n32l436-evb/board/Kconfig +++ b/bsp/n32/n32l436-evb/board/Kconfig @@ -107,45 +107,45 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n - config BSP_USING_HWTIMER9 - bool "using hwtimer9" + config BSP_USING_CLOCK_TIMER9 + bool "using clock_timer9" default n endif diff --git a/bsp/n32/n32l436-evb/project.ewp b/bsp/n32/n32l436-evb/project.ewp index b53987f97ed..b364f0ffdc4 100644 --- a/bsp/n32/n32l436-evb/project.ewp +++ b/bsp/n32/n32l436-evb/project.ewp @@ -2237,7 +2237,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2321,7 +2321,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32l436-evb/project.uvprojx b/bsp/n32/n32l436-evb/project.uvprojx index 81d22ed3a0c..31d96d5ffba 100644 --- a/bsp/n32/n32l436-evb/project.uvprojx +++ b/bsp/n32/n32l436-evb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32/n32l43xml-stb/README.md b/bsp/n32/n32l43xml-stb/README.md index 72a277aca96..66d8571946d 100644 --- a/bsp/n32/n32l43xml-stb/README.md +++ b/bsp/n32/n32l43xml-stb/README.md @@ -45,7 +45,7 @@ N32L43XML_STB 板级包支持MDK5开发环境和GCC编译器，以下是具体 | ADC | 支持 | ADC | | CAN | 支持 | CAN | | DAC | 支持 | DAC | -| HWTIMER | 支持 | TIMER1/2/3/4/5/6/7/8/9 | +| CLOCK_TIMER | 支持 | TIMER1/2/3/4/5/6/7/8/9 | | WDT | 支持 | IWDG | | RTC | 支持 | 时钟源支持LSE/LSI/HSE | diff --git a/bsp/n32/n32l43xml-stb/board/Kconfig b/bsp/n32/n32l43xml-stb/board/Kconfig index 5e3fe2a39e6..312cd4e7dfe 100644 --- a/bsp/n32/n32l43xml-stb/board/Kconfig +++ b/bsp/n32/n32l43xml-stb/board/Kconfig @@ -107,45 +107,45 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n - config BSP_USING_HWTIMER9 - bool "using hwtimer9" + config BSP_USING_CLOCK_TIMER9 + bool "using clock_timer9" default n endif diff --git a/bsp/n32/n32l43xml-stb/project.ewp b/bsp/n32/n32l43xml-stb/project.ewp index 7cd39f1f144..6b379267390 100644 --- a/bsp/n32/n32l43xml-stb/project.ewp +++ b/bsp/n32/n32l43xml-stb/project.ewp @@ -2237,7 +2237,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2321,7 +2321,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32l43xml-stb/project.uvprojx b/bsp/n32/n32l43xml-stb/project.uvprojx index d378a750085..cbb0d714315 100644 --- a/bsp/n32/n32l43xml-stb/project.uvprojx +++ b/bsp/n32/n32l43xml-stb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32/n32l43xrl-stb/README.md b/bsp/n32/n32l43xrl-stb/README.md index 798096604f1..0faccdd2417 100644 --- a/bsp/n32/n32l43xrl-stb/README.md +++ b/bsp/n32/n32l43xrl-stb/README.md @@ -45,7 +45,7 @@ N32L43XRL_STB 板级包支持MDK5开发环境和GCC编译器，以下是具体 | ADC | 支持 | ADC | | CAN | 支持 | CAN | | DAC | 支持 | DAC | -| HWTIMER | 支持 | TIMER1/2/3/4/5/6/7/8/9 | +| CLOCK_TIMER | 支持 | TIMER1/2/3/4/5/6/7/8/9 | | WDT | 支持 | IWDG | | RTC | 支持 | 时钟源支持LSE/LSI/HSE | diff --git a/bsp/n32/n32l43xrl-stb/board/Kconfig b/bsp/n32/n32l43xrl-stb/board/Kconfig index 5e3fe2a39e6..312cd4e7dfe 100644 --- a/bsp/n32/n32l43xrl-stb/board/Kconfig +++ b/bsp/n32/n32l43xrl-stb/board/Kconfig @@ -107,45 +107,45 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n - config BSP_USING_HWTIMER9 - bool "using hwtimer9" + config BSP_USING_CLOCK_TIMER9 + bool "using clock_timer9" default n endif diff --git a/bsp/n32/n32l43xrl-stb/project.ewp b/bsp/n32/n32l43xrl-stb/project.ewp index 7404ec4b8c2..c0cb0739321 100644 --- a/bsp/n32/n32l43xrl-stb/project.ewp +++ b/bsp/n32/n32l43xrl-stb/project.ewp @@ -2237,7 +2237,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2321,7 +2321,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32l43xrl-stb/project.uvprojx b/bsp/n32/n32l43xrl-stb/project.uvprojx index 2a9cd0823c3..3b5c38167a8 100644 --- a/bsp/n32/n32l43xrl-stb/project.uvprojx +++ b/bsp/n32/n32l43xrl-stb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32/n32wb45xl-evb/README.md b/bsp/n32/n32wb45xl-evb/README.md index 3f490f08d49..e549e509996 100644 --- a/bsp/n32/n32wb45xl-evb/README.md +++ b/bsp/n32/n32wb45xl-evb/README.md @@ -45,7 +45,7 @@ N32WB45XL_EVB 板级包支持MDK5开发环境和GCC编译器，以下是具体 | ADC | 支持 | ADC1/2 | | CAN | 支持 | CAN1/2 | | DAC | 支持 | DAC1/2 | -| HWTIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | +| CLOCK_TIMER | 支持 | TIMER1/2/3/4/5/6/7/8 | | WDT | 支持 | IWDG | | RTC | 支持 | 时钟源支持LSE/LSI/HSE | diff --git a/bsp/n32/n32wb45xl-evb/board/Kconfig b/bsp/n32/n32wb45xl-evb/board/Kconfig index 0610640dc42..5da0bd4a406 100644 --- a/bsp/n32/n32wb45xl-evb/board/Kconfig +++ b/bsp/n32/n32wb45xl-evb/board/Kconfig @@ -114,34 +114,34 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - bool "Enable hwtimer" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable clock_timer" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER1 - bool "using hwtimer1" + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER1 + bool "using clock_timer1" default n - config BSP_USING_HWTIMER2 - bool "using hwtimer2" + config BSP_USING_CLOCK_TIMER2 + bool "using clock_timer2" default n - config BSP_USING_HWTIMER3 - bool "using hwtimer3" + config BSP_USING_CLOCK_TIMER3 + bool "using clock_timer3" default n - config BSP_USING_HWTIMER4 - bool "using hwtimer4" + config BSP_USING_CLOCK_TIMER4 + bool "using clock_timer4" default n - config BSP_USING_HWTIMER5 - bool "using hwtimer5" + config BSP_USING_CLOCK_TIMER5 + bool "using clock_timer5" default n - config BSP_USING_HWTIMER6 - bool "using hwtimer6" + config BSP_USING_CLOCK_TIMER6 + bool "using clock_timer6" default n - config BSP_USING_HWTIMER7 - bool "using hwtimer7" + config BSP_USING_CLOCK_TIMER7 + bool "using clock_timer7" default n - config BSP_USING_HWTIMER8 - bool "using hwtimer8" + config BSP_USING_CLOCK_TIMER8 + bool "using clock_timer8" default n endif diff --git a/bsp/n32/n32wb45xl-evb/project.ewp b/bsp/n32/n32wb45xl-evb/project.ewp index da3f4ce8dbb..cf5e7983976 100644 --- a/bsp/n32/n32wb45xl-evb/project.ewp +++ b/bsp/n32/n32wb45xl-evb/project.ewp @@ -2237,7 +2237,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c @@ -2321,7 +2321,7 @@ $PROJ_DIR$\..\libraries\n32_drivers\drv_gpio.c - $PROJ_DIR$\..\libraries\n32_drivers\drv_hwtimer.c + $PROJ_DIR$\..\libraries\n32_drivers\drv_timer.c $PROJ_DIR$\..\libraries\n32_drivers\drv_rtc.c diff --git a/bsp/n32/n32wb45xl-evb/project.uvprojx b/bsp/n32/n32wb45xl-evb/project.uvprojx index 61d4ee2eb9b..e1ba0c9ebfd 100644 --- a/bsp/n32/n32wb45xl-evb/project.uvprojx +++ b/bsp/n32/n32wb45xl-evb/project.uvprojx @@ -488,9 +488,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c @@ -932,9 +932,9 @@ - drv_hwtimer.c + drv_timer.c 1 - ..\libraries\n32_drivers\drv_hwtimer.c + ..\libraries\n32_drivers\drv_timer.c diff --git a/bsp/n32g452xx/Libraries/rt_drivers/SConscript b/bsp/n32g452xx/Libraries/rt_drivers/SConscript index b082134ed4d..cf9e595798d 100755 --- a/bsp/n32g452xx/Libraries/rt_drivers/SConscript +++ b/bsp/n32g452xx/Libraries/rt_drivers/SConscript @@ -24,8 +24,8 @@ if GetDepend(['BSP_USING_UART']): if GetDepend(['BSP_USING_PWM']): src += ['drv_pwm.c'] -if GetDepend(['BSP_USING_HWTIMER']): - src += ['drv_hwtimer.c'] +if GetDepend(['BSP_USING_CLOCK_TIMER']): + src += ['drv_timer.c'] if GetDepend(['BSP_USING_SPI']): src += ['drv_spi.c'] diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c b/bsp/n32g452xx/Libraries/rt_drivers/drv_timer.c similarity index 77% rename from bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c rename to bsp/n32g452xx/Libraries/rt_drivers/drv_timer.c index 65c05ce702e..67bc0446257 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.c +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_timer.c @@ -9,13 +9,13 @@ */ #include -#include "drv_hwtimer.h" +#include "drv_timer.h" #define DRV_DEBUG -#define LOG_TAG "drv.hwtimer" +#define LOG_TAG "drv.clock_timer" #include -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER enum { #ifdef BSP_USING_HWTIM1 @@ -51,15 +51,15 @@ enum #endif }; -struct n32_hwtimer +struct n32_clock_timer { - rt_hwtimer_t time_device; + rt_clock_timer_t time_device; TIM_Module *tim_handle; IRQn_Type tim_irqn; char *name; }; -static struct n32_hwtimer n32_hwtimer_obj[] = +static struct n32_clock_timer n32_clock_timer_obj[] = { #ifdef BSP_USING_HWTIM1 TIM1_CONFIG, @@ -94,7 +94,7 @@ static struct n32_hwtimer n32_hwtimer_obj[] = #endif }; -static void n32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void n32_timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { RCC_ClocksType RCC_ClockStruct; TIM_TimeBaseInitType TIM_TimeBaseStructure; @@ -103,13 +103,13 @@ static void n32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) uint32_t input_clock; uint32_t prescaler_value = 0; TIM_Module *tim = RT_NULL; - struct n32_hwtimer *tim_device = RT_NULL; + struct n32_clock_timer *tim_device = RT_NULL; RT_ASSERT(timer != RT_NULL); if (state) { tim = (TIM_Module *)timer->parent.user_data; - tim_device = (struct n32_hwtimer *)timer; + tim_device = (struct n32_clock_timer *)timer; RT_ASSERT((tim == TIM2) || (tim == TIM3) || (tim == TIM4) || (tim == TIM5) || (tim == TIM6) || (tim == TIM7)); @@ -130,7 +130,7 @@ static void n32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) TIM_TimeBaseStructure.ClkDiv = TIM_CLK_DIV1; TIM_TimeBaseStructure.RepetCnt = 0; - if (timer->info->cntmode == HWTIMER_CNTMODE_UP) + if (timer->info->cntmode == CLOCK_TIMER_CNTMODE_UP) { TIM_TimeBaseStructure.CntMode = TIM_CNT_MODE_UP; } @@ -155,7 +155,7 @@ static void n32_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) } } -static rt_err_t n32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t n32_timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode) { rt_err_t result = RT_EOK; TIM_Module *tim = RT_NULL; @@ -168,7 +168,7 @@ static rt_err_t n32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_m TIM_SetCnt(tim, 0); /* set tim arr */ TIM_SetAutoReload(tim, t - 1); - if (opmode == HWTIMER_MODE_ONESHOT) + if (opmode == CLOCK_TIMER_MODE_ONESHOT) { /* set timer to single mode */ TIM_SelectOnePulseMode(tim, TIM_OPMODE_SINGLE); @@ -184,7 +184,7 @@ static rt_err_t n32_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_m return result; } -static void n32_timer_stop(rt_hwtimer_t *timer) +static void n32_timer_stop(rt_clock_timer_t *timer) { TIM_Module *tim = RT_NULL; @@ -198,7 +198,7 @@ static void n32_timer_stop(rt_hwtimer_t *timer) TIM_SetCnt(tim, 0); } -static rt_uint32_t n32_timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t n32_timer_counter_get(rt_clock_timer_t *timer) { TIM_Module *tim = RT_NULL; @@ -209,7 +209,7 @@ static rt_uint32_t n32_timer_counter_get(rt_hwtimer_t *timer) return tim->CNT; } -static rt_err_t n32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t n32_timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { RCC_ClocksType RCC_ClockStruct; TIM_Module *tim = RT_NULL; @@ -222,7 +222,7 @@ static rt_err_t n32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { rt_uint32_t input_clock; rt_uint32_t freq; @@ -251,8 +251,8 @@ static rt_err_t n32_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) return result; } -static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG; -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_info _info = TIM_DEV_INFO_CONFIG; +static const struct rt_clock_timer_ops _ops = { .init = n32_timer_init, .start = n32_timer_start, @@ -270,7 +270,7 @@ void TIM2_IRQHandler(void) if (TIM_GetIntStatus(TIM2, TIM_INT_UPDATE) == SET) { - rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM2_INDEX].time_device); + rt_clock_timer_isr(&n32_clock_timer_obj[TIM2_INDEX].time_device); TIM_ClrIntPendingBit(TIM2, TIM_INT_UPDATE); } @@ -288,7 +288,7 @@ void TIM3_IRQHandler(void) if (TIM_GetIntStatus(TIM3, TIM_INT_UPDATE) == SET) { - rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM3_INDEX].time_device); + rt_clock_timer_isr(&n32_clock_timer_obj[TIM3_INDEX].time_device); TIM_ClrIntPendingBit(TIM3, TIM_INT_UPDATE); } @@ -306,7 +306,7 @@ void TIM4_IRQHandler(void) if (TIM_GetIntStatus(TIM4, TIM_INT_UPDATE) == SET) { - rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM4_INDEX].time_device); + rt_clock_timer_isr(&n32_clock_timer_obj[TIM4_INDEX].time_device); TIM_ClrIntPendingBit(TIM4, TIM_INT_UPDATE); } @@ -324,7 +324,7 @@ void TIM5_IRQHandler(void) if (TIM_GetIntStatus(TIM5, TIM_INT_UPDATE) == SET) { - rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM5_INDEX].time_device); + rt_clock_timer_isr(&n32_clock_timer_obj[TIM5_INDEX].time_device); TIM_ClrIntPendingBit(TIM5, TIM_INT_UPDATE); } @@ -342,7 +342,7 @@ void TIM6_IRQHandler(void) if (TIM_GetIntStatus(TIM6, TIM_INT_UPDATE) == SET) { - rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM6_INDEX].time_device); + rt_clock_timer_isr(&n32_clock_timer_obj[TIM6_INDEX].time_device); TIM_ClrIntPendingBit(TIM6, TIM_INT_UPDATE); } @@ -360,7 +360,7 @@ void TIM7_IRQHandler(void) if (TIM_GetIntStatus(TIM7, TIM_INT_UPDATE) == SET) { - rt_device_hwtimer_isr(&n32_hwtimer_obj[TIM7_INDEX].time_device); + rt_clock_timer_isr(&n32_clock_timer_obj[TIM7_INDEX].time_device); TIM_ClrIntPendingBit(TIM7, TIM_INT_UPDATE); } @@ -369,31 +369,31 @@ void TIM7_IRQHandler(void) } #endif -static int rt_hw_hwtimer_init(void) +static int rt_hw_clock_timer_init(void) { int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(n32_hwtimer_obj) / sizeof(n32_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(n32_clock_timer_obj) / sizeof(n32_clock_timer_obj[0]); i++) { - n32_hwtimer_obj[i].time_device.info = &_info; - n32_hwtimer_obj[i].time_device.ops = &_ops; - if (rt_device_hwtimer_register(&n32_hwtimer_obj[i].time_device, n32_hwtimer_obj[i].name, n32_hwtimer_obj[i].tim_handle) == RT_EOK) + n32_clock_timer_obj[i].time_device.info = &_info; + n32_clock_timer_obj[i].time_device.ops = &_ops; + if (rt_clock_timer_register(&n32_clock_timer_obj[i].time_device, n32_clock_timer_obj[i].name, n32_clock_timer_obj[i].tim_handle) == RT_EOK) { - LOG_D("%s register success", n32_hwtimer_obj[i].name); + LOG_D("%s register success", n32_clock_timer_obj[i].name); } else { - LOG_E("%s register failed", n32_hwtimer_obj[i].name); + LOG_E("%s register failed", n32_clock_timer_obj[i].name); result = -RT_ERROR; } } return result; } -INIT_BOARD_EXPORT(rt_hw_hwtimer_init); +INIT_BOARD_EXPORT(rt_hw_clock_timer_init); -#endif /* BSP_USING_HWTIMER */ +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h b/bsp/n32g452xx/Libraries/rt_drivers/drv_timer.h similarity index 96% rename from bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h rename to bsp/n32g452xx/Libraries/rt_drivers/drv_timer.h index 73647845e06..9258eec0102 100644 --- a/bsp/n32g452xx/Libraries/rt_drivers/drv_hwtimer.h +++ b/bsp/n32g452xx/Libraries/rt_drivers/drv_timer.h @@ -12,7 +12,7 @@ #define __TIM_CONFIG_H__ #include -#include +#include #ifdef __cplusplus extern "C" { @@ -24,7 +24,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 1000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/n32g452xx/n32g452xx-mini-system/README.md b/bsp/n32g452xx/n32g452xx-mini-system/README.md index 68bd5b3d7ef..e1063e1a1b7 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/README.md +++ b/bsp/n32g452xx/n32g452xx-mini-system/README.md @@ -37,7 +37,7 @@ N32G452 MINI-SYSTEM 板级包支持MDK5开发环境和GCC编译器，以下是 | GPIO | 支持(已移植，已测试) | PA0...PF7 | | ADC | 支持(已移植，已测试) | ADC1/2 | | PWM | 支持(已移植，已测试) | TMR1/2 | -| HWTIMER | 支持(已移植，已测试) | TMR6/7 | +| CLOCK_TIMER | 支持(已移植，已测试) | TMR6/7 | ### IO在板级支持包中的映射情况 diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig b/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig index 0f3cfab5e58..373a7d69e29 100755 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/Kconfig @@ -304,11 +304,11 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_HWTIM3 bool "Enable hardware timer3" default n diff --git a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c index 35f17b6b41f..56fe68cea77 100644 --- a/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c +++ b/bsp/n32g452xx/n32g452xx-mini-system/board/msp/n32_msp.c @@ -670,7 +670,7 @@ void n32_msp_adc_init(void *Instance) } #endif /* BSP_USING_ADC */ -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void n32_msp_hwtim_init(void *Instance) { TIM_Module *TIMx = (TIM_Module *)Instance; @@ -881,25 +881,25 @@ static int adc_vol_sample(int argc, char *argv[]) MSH_CMD_EXPORT(adc_vol_sample, adc voltage convert sample); #endif -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) { - rt_kprintf("this is hwtimer timeout callback fucntion!\n"); + rt_kprintf("this is clock_timer timeout callback fucntion!\n"); rt_kprintf("timer name is :%s.\n", dev->parent.name); rt_kprintf("tick is :%d !\n", rt_tick_get()); return 0; } -static int hwtimer_init(const char *name) +static int clock_timer_init(const char *name) { rt_err_t ret = RT_EOK; - rt_hwtimerval_t timeout_s; + rt_clock_timerval_t timeout_s; rt_device_t hw_dev = RT_NULL; - rt_hwtimer_mode_t mode; + rt_clock_timer_mode_t mode; hw_dev = rt_device_find(name); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", name); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", name); return -RT_ERROR; } ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); @@ -909,8 +909,8 @@ static int hwtimer_init(const char *name) return ret; } rt_device_set_rx_indicate(hw_dev, timeout_cb); - mode = HWTIMER_MODE_PERIOD; - ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); if (ret != RT_EOK) { rt_kprintf("set mode failed! ret is :%d\n", ret); @@ -932,17 +932,17 @@ static int hwtimer_init(const char *name) return ret; } -static int hwtimer_sample(int argc, char *argv[]) +static int clock_timer_sample(int argc, char *argv[]) { #ifdef BSP_USING_HWTIM6 - hwtimer_init("timer6"); + clock_timer_init("timer6"); #endif #ifdef BSP_USING_HWTIM7 - hwtimer_init("timer7"); + clock_timer_init("timer7"); #endif return RT_EOK; } -MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample); +MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample); #endif #endif diff --git a/bsp/nrf5x/libraries/drivers/SConscript b/bsp/nrf5x/libraries/drivers/SConscript index 53987e54c83..f065f4994ad 100644 --- a/bsp/nrf5x/libraries/drivers/SConscript +++ b/bsp/nrf5x/libraries/drivers/SConscript @@ -41,7 +41,7 @@ if GetDepend(['BSP_USING_ONCHIP_RTC']): src += ['drv_rtc.c'] if GetDepend(['BSP_USING_TIM']): - src += ['drv_hwtimer.c'] + src += ['drv_timer.c'] path = [cwd] diff --git a/bsp/nrf5x/libraries/drivers/drv_hwtimer.c b/bsp/nrf5x/libraries/drivers/drv_timer.c similarity index 80% rename from bsp/nrf5x/libraries/drivers/drv_hwtimer.c rename to bsp/nrf5x/libraries/drivers/drv_timer.c index 1e8d83f5500..358cd4a13ac 100644 --- a/bsp/nrf5x/libraries/drivers/drv_hwtimer.c +++ b/bsp/nrf5x/libraries/drivers/drv_timer.c @@ -20,11 +20,11 @@ #ifdef BSP_USING_TIM -#define LOG_TAG "drv.hwtimer" +#define LOG_TAG "drv.clock_timer" #define DBG_LVL DBG_INFO #include -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME #ifndef TIM_DEV_INFO_CONFIG /* maxfreq and minfreq unit is HZ */ @@ -33,7 +33,7 @@ .maxfreq = 16000000, \ .minfreq = 31250, \ .maxcnt = 0xFFFFFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif @@ -44,14 +44,14 @@ typedef struct nrf_timer_cc_channel_t cc_channel; }nrf5x_timer_info_t; -struct nrf5x_hwtimer +struct nrf5x_clock_timer { - rt_hwtimer_t timer_device; + rt_clock_timer_t timer_device; nrf5x_timer_info_t timer_info; char *name; }; -static struct nrf5x_hwtimer nrf5x_hwtimer_obj[] = +static struct nrf5x_clock_timer nrf5x_clock_timer_obj[] = { #ifdef BSP_USING_TIM0 { @@ -101,15 +101,15 @@ static struct nrf5x_hwtimer nrf5x_hwtimer_obj[] = static void timer_callback(nrf_timer_event_t event_type, void* p_context) { - rt_hwtimer_t *timer_device = (struct rt_hwtimer_device *)p_context; + rt_clock_timer_t *timer_device = (struct rt_clock_timer_device *)p_context; - /* no matter what event_type is(NRF_TIMER_EVENT_COMPARE0 or others), call same function "rt_device_hwtimer_isr" */ + /* no matter what event_type is(NRF_TIMER_EVENT_COMPARE0 or others), call same function "rt_clock_timer_isr" */ LOG_D("timer_callback event_type = %d, inst_id = %d, cc conunt = %d\r\n", event_type, timer_info->timer_inst.instance_id, timer_info->timer_inst.cc_channel_count); - rt_device_hwtimer_isr(timer_device); + rt_clock_timer_isr(timer_device); } -static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { nrf5x_timer_info_t *timer_info = RT_NULL; nrfx_timer_config_t *timer_cfg = RT_NULL; @@ -126,7 +126,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) } } -static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode) { nrf5x_timer_info_t *timer_info = RT_NULL; nrf_timer_short_mask_t mask = NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK; @@ -135,7 +135,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ timer_info = (nrf5x_timer_info_t *)timer->parent.user_data; - if (opmode == HWTIMER_MODE_ONESHOT) + if (opmode == CLOCK_TIMER_MODE_ONESHOT) { /* means TIMER_SHORTS_COMPARE0_STOP_Msk or TIMER_SHORTS_COMPARE1_STOP_Msk ..., according to cc_channel. */ mask = (nrf_timer_short_mask_t)(1 << (timer_info->cc_channel + 8)); @@ -151,7 +151,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ return RT_EOK; } -static void timer_stop(rt_hwtimer_t *timer) +static void timer_stop(rt_clock_timer_t *timer) { nrf5x_timer_info_t *timer_info = RT_NULL; @@ -233,7 +233,7 @@ static nrf_timer_frequency_t frequency_convert(rt_uint32_t freq) return frequency; } -static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { rt_err_t result = RT_EOK; nrf5x_timer_info_t *timer_info = RT_NULL; @@ -247,7 +247,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { rt_uint32_t freq; /* set timer frequence */ @@ -267,7 +267,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) return result; } -static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t timer_counter_get(rt_clock_timer_t *timer) { rt_uint32_t count = 0; nrf5x_timer_info_t *timer_info = RT_NULL; @@ -282,8 +282,8 @@ static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) return count; } -static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG; -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_info _info = TIM_DEV_INFO_CONFIG; +static const struct rt_clock_timer_ops _ops = { .init = timer_init, .start = timer_start, @@ -292,30 +292,30 @@ static const struct rt_hwtimer_ops _ops = .control = timer_ctrl, }; -static int nrf5x_hwtimer_init(void) +static int nrf5x_clock_timer_init(void) { int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(nrf5x_hwtimer_obj) / sizeof(nrf5x_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(nrf5x_clock_timer_obj) / sizeof(nrf5x_clock_timer_obj[0]); i++) { - nrf5x_hwtimer_obj[i].timer_device.info = &_info; - nrf5x_hwtimer_obj[i].timer_device.ops = &_ops; - if (rt_device_hwtimer_register(&nrf5x_hwtimer_obj[i].timer_device, nrf5x_hwtimer_obj[i].name, &nrf5x_hwtimer_obj[i].timer_info) == RT_EOK) + nrf5x_clock_timer_obj[i].timer_device.info = &_info; + nrf5x_clock_timer_obj[i].timer_device.ops = &_ops; + if (rt_clock_timer_register(&nrf5x_clock_timer_obj[i].timer_device, nrf5x_clock_timer_obj[i].name, &nrf5x_clock_timer_obj[i].timer_info) == RT_EOK) { - LOG_D("%s register success", nrf5x_hwtimer_obj[i].name); + LOG_D("%s register success", nrf5x_clock_timer_obj[i].name); } else { - LOG_E("%s register failed", nrf5x_hwtimer_obj[i].name); + LOG_E("%s register failed", nrf5x_clock_timer_obj[i].name); result = -RT_ERROR; } } return result; } -INIT_BOARD_EXPORT(nrf5x_hwtimer_init); +INIT_BOARD_EXPORT(nrf5x_clock_timer_init); -#endif /* RT_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME */ #endif /* BSP_USING_TIM */ diff --git a/bsp/nrf5x/nrf52832/board/Kconfig b/bsp/nrf5x/nrf52832/board/Kconfig index 261c5ff9974..9b0e1dadfa2 100644 --- a/bsp/nrf5x/nrf52832/board/Kconfig +++ b/bsp/nrf5x/nrf52832/board/Kconfig @@ -421,7 +421,7 @@ menu "On-chip Peripheral Drivers" config BSP_USING_TIM bool "Enable TIMER" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n if BSP_USING_TIM config NRFX_TIMER_ENABLED diff --git a/bsp/nrf5x/nrf52840/board/Kconfig b/bsp/nrf5x/nrf52840/board/Kconfig index 924db34a5ea..9118680155e 100644 --- a/bsp/nrf5x/nrf52840/board/Kconfig +++ b/bsp/nrf5x/nrf52840/board/Kconfig @@ -511,7 +511,7 @@ menu "On-chip Peripheral Drivers" config BSP_USING_TIM bool "Enable TIMER" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n if BSP_USING_TIM config NRFX_TIMER_ENABLED diff --git a/bsp/nrf5x/nrf5340/board/Kconfig b/bsp/nrf5x/nrf5340/board/Kconfig index eaf696c8eaa..079395abe43 100644 --- a/bsp/nrf5x/nrf5340/board/Kconfig +++ b/bsp/nrf5x/nrf5340/board/Kconfig @@ -513,7 +513,7 @@ menu "On-chip Peripheral Drivers" config BSP_USING_TIM bool "Enable TIMER" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n if BSP_USING_TIM config NRFX_TIMER_ENABLED diff --git a/bsp/nuclei/gd32vf103_rvstar/README.md b/bsp/nuclei/gd32vf103_rvstar/README.md index 6e265d6729a..545fae5c72e 100644 --- a/bsp/nuclei/gd32vf103_rvstar/README.md +++ b/bsp/nuclei/gd32vf103_rvstar/README.md @@ -256,7 +256,7 @@ Breakpoint 1, irq_entry () at D:\workspace\Sourcecode\rt-thread\libcpu\risc-v\nu | GPIO | 支持 | 默认使能，支持中断控制 | | SPI | 支持 | 默认关闭 | | I2C | 支持 | 默认关闭 | -| HWTIMER | 支持 | 默认关闭 | +| CLOCK_TIMER | 支持 | 默认关闭 | | PWM | 支持 | 默认关闭 | | WDT | 支持 | 默认关闭 | | RTC | 支持 | 默认关闭 | @@ -300,7 +300,7 @@ gpio_init(GPIOA, GPIO_MODE_IN_FLOATING, GPIO_OSPEED_50MHZ, GPIO_PIN_6); - 适配RT-Thread的驱动框架的代码在 [../libraries/gd32vf103/HAL_Drivers](../libraries/gd32vf103/HAL_Drivers)目录下。 - 如果有开发者想适配更多的驱动, 请在对应目录下增加驱动适配支持。 - GD32VF103的驱动适配开关在 `menuconfig -> Hardware Drivers Config -> On-chip Peripheral Drivers` 可以找到。 -- HWTIMER和PWM都是采用的TIMER模块进行功能实现，所以在使用驱动时，请务必注意不要重叠使用相同模块。 +- CLOCK_TIMER和PWM都是采用的TIMER模块进行功能实现，所以在使用驱动时，请务必注意不要重叠使用相同模块。 ## 联系人信息 diff --git a/bsp/nuclei/gd32vf103_rvstar/board/Kconfig b/bsp/nuclei/gd32vf103_rvstar/board/Kconfig index 2e90c8d681d..4005486bbdc 100644 --- a/bsp/nuclei/gd32vf103_rvstar/board/Kconfig +++ b/bsp/nuclei/gd32vf103_rvstar/board/Kconfig @@ -68,30 +68,30 @@ menu "On-chip Peripheral Drivers" default n endif - menuconfig BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER bool "Enable TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER - config BSP_USING_HWTIMER0 + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER0 bool "Enable TIMER0" default n - config BSP_USING_HWTIMER1 + config BSP_USING_CLOCK_TIMER1 bool "Enable TIMER1" default n - config BSP_USING_HWTIMER2 + config BSP_USING_CLOCK_TIMER2 bool "Enable TIMER2" default n - config BSP_USING_HWTIMER3 + config BSP_USING_CLOCK_TIMER3 bool "Enable TIMER3" default n - config BSP_USING_HWTIMER4 + config BSP_USING_CLOCK_TIMER4 bool "Enable TIMER4" default n - config BSP_USING_HWTIMER5 + config BSP_USING_CLOCK_TIMER5 bool "Enable TIMER5" default n - config BSP_USING_HWTIMER6 + config BSP_USING_CLOCK_TIMER6 bool "Enable TIMER6" default n endif diff --git a/bsp/nuclei/gd32vf103_rvstar/board/board.c b/bsp/nuclei/gd32vf103_rvstar/board/board.c index 3c0aaad1717..054206bffd7 100644 --- a/bsp/nuclei/gd32vf103_rvstar/board/board.c +++ b/bsp/nuclei/gd32vf103_rvstar/board/board.c @@ -37,7 +37,7 @@ extern void _init(void); /* * - Check MCU pin assignment here https://doc.nucleisys.com/nuclei_board_labs/hw/hw.html * - If you changed menuconfig to use different peripherals such as SPI, ADC, GPIO, - * HWTIMER, I2C, PWM, UART, WDT, RTC, please add or change related pinmux configuration + * CLOCK_TIMER, I2C, PWM, UART, WDT, RTC, please add or change related pinmux configuration * code in functions(rt_hw_*_drvinit) below */ @@ -62,7 +62,7 @@ void rt_hw_gpio_drvinit(void) rcu_periph_clock_enable(RCU_AF); } -void rt_hw_hwtimer_drvinit(void) +void rt_hw_clock_timer_drvinit(void) { } @@ -116,8 +116,8 @@ void rt_hw_drivers_init(void) #ifdef BSP_USING_RTC rt_hw_rtc_drvinit(); #endif -#ifdef BSP_USING_HWTIMER - rt_hw_hwtimer_drvinit(); +#ifdef BSP_USING_CLOCK_TIMER + rt_hw_clock_timer_drvinit(); #endif #ifdef BSP_USING_PWM rt_hw_pwm_drvinit(); diff --git a/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/SConscript b/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/SConscript index b9cdd5b795a..ee3e2a3ea8c 100644 --- a/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/SConscript +++ b/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/SConscript @@ -20,8 +20,8 @@ if GetDepend(['RT_USING_I2C']): if GetDepend(['RT_USING_SPI']): src += ['drv_spi.c'] -if GetDepend(['RT_USING_HWTIMER']): - src += ['drv_hwtimer.c'] +if GetDepend(['RT_USING_CLOCK_TIME']): + src += ['drv_timer.c'] if GetDepend(['RT_USING_ADC']): src += ['drv_adc.c'] diff --git a/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_hwtimer.c b/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_hwtimer.c deleted file mode 100644 index dd351ee1466..00000000000 --- a/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_hwtimer.c +++ /dev/null @@ -1,315 +0,0 @@ -/* - * Copyright (c) 2006-2018, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2020-05-12 hqfang first version - */ - -#include "drv_hwtimer.h" - -#ifdef BSP_USING_HWTIMER - -#if !defined(BSP_USING_HWTIMER0) && !defined(BSP_USING_HWTIMER1) && !defined(BSP_USING_HWTIMER2) \ - && !defined(BSP_USING_HWTIMER3) && !defined(BSP_USING_HWTIMER4) - #error "Please define at least one BSP_USING_HWTIMERx" - /* this driver can be disabled at menuconfig -> Hardware Drivers Config -> On-chip Peripheral Drivers -> Enable HWTIMER */ -#endif - -static struct gd32_hwtimer_config hwtimer_config[] = -{ -#ifdef BSP_USING_HWTIMER0 - { - "timer0", - TIMER0, - TIMER0_UP_IRQn, - }, -#endif -#ifdef BSP_USING_HWTIMER1 - { - "timer1", - TIMER1, - TIMER1_IRQn, - }, -#endif -#ifdef BSP_USING_HWTIMER2 - { - "timer2", - TIMER2, - TIMER2_IRQn, - }, -#endif -#ifdef BSP_USING_HWTIMER3 - { - "timer3", - TIMER3, - TIMER3_IRQn, - }, -#endif -#ifdef BSP_USING_HWTIMER4 - { - "timer4", - TIMER4, - TIMER4_IRQn, - }, -#endif -#ifdef BSP_USING_HWTIMER5 - { - "timer5", - TIMER5, - TIMER5_IRQn, - }, -#endif -#ifdef BSP_USING_HWTIMER6 - { - "timer6", - TIMER6, - TIMER6_IRQn, - }, -#endif -}; - -static struct gd32_hwtimer hwtimer_obj[sizeof(hwtimer_config) / sizeof(hwtimer_config[0])] = {0}; - -static rt_err_t gd32_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) -{ - rt_err_t err = RT_EOK; - struct gd32_hwtimer_config *config; - RT_ASSERT(timer != RT_NULL); - - config = (struct gd32_hwtimer_config *)timer->parent.user_data; - - switch (cmd) - { - case HWTIMER_CTRL_FREQ_SET: - { - uint32_t clk; - uint8_t clkpre; - uint32_t pre; - if (config->timer_periph != TIMER0) - { - clk = rcu_clock_freq_get(CK_APB1); - clkpre = GET_BITS(RCU_CFG0, 8, 10); - } - else - { - clk = rcu_clock_freq_get(CK_APB2); - clkpre = GET_BITS(RCU_CFG0, 11, 13); - } - if (clkpre >= 4) - { - clk = clk * 2; - } - pre = (clk / * ((uint32_t *)args)) - 1; - TIMER_PSC(config->timer_periph) = (uint32_t)pre; - } - break; - case HWTIMER_CTRL_STOP: - timer_disable(config->timer_periph); - break; - default: - err = -RT_ENOSYS; - break; - } - return err; -} - -static rt_uint32_t gd32_hwtimer_count_get(rt_hwtimer_t *timer) -{ - rt_uint32_t CurrentTimer_Count; - struct gd32_hwtimer_config *config; - RT_ASSERT(timer != RT_NULL); - - config = (struct gd32_hwtimer_config *)timer->parent.user_data; - - CurrentTimer_Count = timer_counter_read(config->timer_periph); - - return CurrentTimer_Count; -} - -static void gd32_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) -{ - struct gd32_hwtimer_config *config; - timer_parameter_struct initpara; - RT_ASSERT(timer != RT_NULL); - config = (struct gd32_hwtimer_config *)timer->parent.user_data; - - if (state == 1) - { - timer_deinit(config->timer_periph); - timer_struct_para_init(&initpara); - timer_init(config->timer_periph, &initpara); - } - else - { - timer_disable(config->timer_periph); - timer_interrupt_enable(config->timer_periph, TIMER_INT_FLAG_UP); - ECLIC_DisableIRQ(config->irqn); - } -} - -static rt_err_t gd32_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) -{ - struct gd32_hwtimer_config *config; - RT_ASSERT(timer != RT_NULL); - config = (struct gd32_hwtimer_config *)timer->parent.user_data; - - if (mode == HWTIMER_MODE_ONESHOT) - { - timer_single_pulse_mode_config(config->timer_periph, TIMER_SP_MODE_SINGLE); - } - else - { - timer_single_pulse_mode_config(config->timer_periph, TIMER_SP_MODE_REPETITIVE); - } - timer_counter_value_config(config->timer_periph, 0); - timer_autoreload_value_config(config->timer_periph, cnt); - timer_interrupt_enable(config->timer_periph, TIMER_INT_FLAG_UP); - timer_enable(config->timer_periph); - ECLIC_EnableIRQ(config->irqn); - - return RT_EOK; -} - -static void gd32_hwtimer_stop(rt_hwtimer_t *timer) -{ - struct gd32_hwtimer_config *config; - RT_ASSERT(timer != RT_NULL); - config = (struct gd32_hwtimer_config *)timer->parent.user_data; - - timer_disable(config->timer_periph); - - ECLIC_DisableIRQ(config->irqn); -} - -static const struct rt_hwtimer_ops gd32_hwtimer_ops = -{ - .init = gd32_hwtimer_init, - .start = gd32_hwtimer_start, - .stop = gd32_hwtimer_stop, - .count_get = gd32_hwtimer_count_get, - .control = gd32_hwtimer_control, -}; - -static const struct rt_hwtimer_info gd32_hwtimer_info = -{ - 54000000, /* the maximum count frequency can be set */ - 1000, /* the minimum count frequency can be set */ - 0xFFFF, - HWTIMER_CNTMODE_UP, -}; - -#ifdef BSP_USING_HWTIMER0 - -void TIMER0_UP_IRQHandler(void) -{ - timer_interrupt_flag_clear(hwtimer_obj[0].config->timer_periph, TIMER_INT_FLAG_UP); - rt_device_hwtimer_isr(&hwtimer_obj[0].time_device); -} - -#endif - -#ifdef BSP_USING_HWTIMER1 - -void TIMER1_IRQHandler(void) -{ - timer_interrupt_flag_clear(hwtimer_obj[1].config->timer_periph, TIMER_INT_FLAG_UP); - rt_device_hwtimer_isr(&hwtimer_obj[1].time_device); -} - -#endif - -#ifdef BSP_USING_HWTIMER2 - -void TIMER2_IRQHandler(void) -{ - timer_interrupt_flag_clear(hwtimer_obj[2].config->timer_periph, TIMER_INT_FLAG_UP); - rt_device_hwtimer_isr(&hwtimer_obj[2].time_device); -} - -#endif - -#ifdef BSP_USING_HWTIMER3 - -void TIMER3_IRQHandler(void) -{ - timer_interrupt_flag_clear(hwtimer_obj[3].config->timer_periph, TIMER_INT_FLAG_UP); - rt_device_hwtimer_isr(&hwtimer_obj[3].time_device); -} - -#endif - -#ifdef BSP_USING_HWTIMER4 - -void TIMER4_IRQHandler(void) -{ - timer_interrupt_flag_clear(hwtimer_obj[4].config->timer_periph, TIMER_INT_FLAG_UP); - rt_device_hwtimer_isr(&hwtimer_obj[4].time_device); -} - -#endif - -#ifdef BSP_USING_HWTIMER5 - -void TIMER5_IRQHandler(void) -{ - timer_interrupt_flag_clear(hwtimer_obj[5].config->timer_periph, TIMER_INT_FLAG_UP); - rt_device_hwtimer_isr(&hwtimer_obj[5].time_device); -} - -#endif - -#ifdef BSP_USING_HWTIMER6 - -void TIMER6_IRQHandler(void) -{ - timer_interrupt_flag_clear(hwtimer_obj[6].config->timer_periph, TIMER_INT_FLAG_UP); - rt_device_hwtimer_isr(&hwtimer_obj[6].time_device); -} - -#endif - -static int rt_hwtimer_init(void) -{ - int i = 0; - int result = RT_EOK; - -#ifdef BSP_USING_HWTIMER0 - rcu_periph_clock_enable(RCU_TIMER0); -#endif -#ifdef BSP_USING_HWTIMER1 - rcu_periph_clock_enable(RCU_TIMER1); -#endif -#ifdef BSP_USING_HWTIMER2 - rcu_periph_clock_enable(RCU_TIMER2); -#endif -#ifdef BSP_USING_HWTIMER3 - rcu_periph_clock_enable(RCU_TIMER3); -#endif -#ifdef BSP_USING_HWTIMER4 - rcu_periph_clock_enable(RCU_TIMER4); -#endif -#ifdef BSP_USING_HWTIMER5 - rcu_periph_clock_enable(RCU_TIMER5); -#endif -#ifdef BSP_USING_HWTIMER6 - rcu_periph_clock_enable(RCU_TIMER6); -#endif - - for (i = 0; i < sizeof(hwtimer_obj) / sizeof(hwtimer_obj[0]); i++) - { - hwtimer_obj[i].time_device.info = &gd32_hwtimer_info; - hwtimer_obj[i].time_device.ops = &gd32_hwtimer_ops; - hwtimer_obj[i].config = &hwtimer_config[i]; - rt_device_hwtimer_register(&hwtimer_obj[i].time_device, \ - hwtimer_obj[i].config->name, hwtimer_obj[i].config); - } - - return result; -} - -INIT_DEVICE_EXPORT(rt_hwtimer_init); - -#endif /* RT_USING_HWTIMER */ diff --git a/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_timer.c b/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_timer.c new file mode 100644 index 00000000000..1beb8994374 --- /dev/null +++ b/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_timer.c @@ -0,0 +1,315 @@ +/* + * Copyright (c) 2006-2018, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2020-05-12 hqfang first version + */ + +#include "drv_timer.h" + +#ifdef BSP_USING_CLOCK_TIMER + +#if !defined(BSP_USING_CLOCK_TIMER0) && !defined(BSP_USING_CLOCK_TIMER1) && !defined(BSP_USING_CLOCK_TIMER2) \ + && !defined(BSP_USING_CLOCK_TIMER3) && !defined(BSP_USING_CLOCK_TIMER4) + #error "Please define at least one BSP_USING_CLOCK_TIMERx" + /* this driver can be disabled at menuconfig -> Hardware Drivers Config -> On-chip Peripheral Drivers -> Enable CLOCK_TIMER */ +#endif + +static struct gd32_clock_timer_config clock_timer_config[] = +{ +#ifdef BSP_USING_CLOCK_TIMER0 + { + "timer0", + TIMER0, + TIMER0_UP_IRQn, + }, +#endif +#ifdef BSP_USING_CLOCK_TIMER1 + { + "timer1", + TIMER1, + TIMER1_IRQn, + }, +#endif +#ifdef BSP_USING_CLOCK_TIMER2 + { + "timer2", + TIMER2, + TIMER2_IRQn, + }, +#endif +#ifdef BSP_USING_CLOCK_TIMER3 + { + "timer3", + TIMER3, + TIMER3_IRQn, + }, +#endif +#ifdef BSP_USING_CLOCK_TIMER4 + { + "timer4", + TIMER4, + TIMER4_IRQn, + }, +#endif +#ifdef BSP_USING_CLOCK_TIMER5 + { + "timer5", + TIMER5, + TIMER5_IRQn, + }, +#endif +#ifdef BSP_USING_CLOCK_TIMER6 + { + "timer6", + TIMER6, + TIMER6_IRQn, + }, +#endif +}; + +static struct gd32_clock_timer clock_timer_obj[sizeof(clock_timer_config) / sizeof(clock_timer_config[0])] = {0}; + +static rt_err_t gd32_clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) +{ + rt_err_t err = RT_EOK; + struct gd32_clock_timer_config *config; + RT_ASSERT(timer != RT_NULL); + + config = (struct gd32_clock_timer_config *)timer->parent.user_data; + + switch (cmd) + { + case CLOCK_TIMER_CTRL_FREQ_SET: + { + uint32_t clk; + uint8_t clkpre; + uint32_t pre; + if (config->timer_periph != TIMER0) + { + clk = rcu_clock_freq_get(CK_APB1); + clkpre = GET_BITS(RCU_CFG0, 8, 10); + } + else + { + clk = rcu_clock_freq_get(CK_APB2); + clkpre = GET_BITS(RCU_CFG0, 11, 13); + } + if (clkpre >= 4) + { + clk = clk * 2; + } + pre = (clk / * ((uint32_t *)args)) - 1; + TIMER_PSC(config->timer_periph) = (uint32_t)pre; + } + break; + case CLOCK_TIMER_CTRL_STOP: + timer_disable(config->timer_periph); + break; + default: + err = -RT_ENOSYS; + break; + } + return err; +} + +static rt_uint32_t gd32_clock_timer_count_get(rt_clock_timer_t *timer) +{ + rt_uint32_t CurrentTimer_Count; + struct gd32_clock_timer_config *config; + RT_ASSERT(timer != RT_NULL); + + config = (struct gd32_clock_timer_config *)timer->parent.user_data; + + CurrentTimer_Count = timer_counter_read(config->timer_periph); + + return CurrentTimer_Count; +} + +static void gd32_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) +{ + struct gd32_clock_timer_config *config; + timer_parameter_struct initpara; + RT_ASSERT(timer != RT_NULL); + config = (struct gd32_clock_timer_config *)timer->parent.user_data; + + if (state == 1) + { + timer_deinit(config->timer_periph); + timer_struct_para_init(&initpara); + timer_init(config->timer_periph, &initpara); + } + else + { + timer_disable(config->timer_periph); + timer_interrupt_enable(config->timer_periph, TIMER_INT_FLAG_UP); + ECLIC_DisableIRQ(config->irqn); + } +} + +static rt_err_t gd32_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) +{ + struct gd32_clock_timer_config *config; + RT_ASSERT(timer != RT_NULL); + config = (struct gd32_clock_timer_config *)timer->parent.user_data; + + if (mode == CLOCK_TIMER_MODE_ONESHOT) + { + timer_single_pulse_mode_config(config->timer_periph, TIMER_SP_MODE_SINGLE); + } + else + { + timer_single_pulse_mode_config(config->timer_periph, TIMER_SP_MODE_REPETITIVE); + } + timer_counter_value_config(config->timer_periph, 0); + timer_autoreload_value_config(config->timer_periph, cnt); + timer_interrupt_enable(config->timer_periph, TIMER_INT_FLAG_UP); + timer_enable(config->timer_periph); + ECLIC_EnableIRQ(config->irqn); + + return RT_EOK; +} + +static void gd32_clock_timer_stop(rt_clock_timer_t *timer) +{ + struct gd32_clock_timer_config *config; + RT_ASSERT(timer != RT_NULL); + config = (struct gd32_clock_timer_config *)timer->parent.user_data; + + timer_disable(config->timer_periph); + + ECLIC_DisableIRQ(config->irqn); +} + +static const struct rt_clock_timer_ops gd32_clock_timer_ops = +{ + .init = gd32_clock_timer_init, + .start = gd32_clock_timer_start, + .stop = gd32_clock_timer_stop, + .count_get = gd32_clock_timer_count_get, + .control = gd32_clock_timer_control, +}; + +static const struct rt_clock_timer_info gd32_clock_timer_info = +{ + 54000000, /* the maximum count frequency can be set */ + 1000, /* the minimum count frequency can be set */ + 0xFFFF, + CLOCK_TIMER_CNTMODE_UP, +}; + +#ifdef BSP_USING_CLOCK_TIMER0 + +void TIMER0_UP_IRQHandler(void) +{ + timer_interrupt_flag_clear(clock_timer_obj[0].config->timer_periph, TIMER_INT_FLAG_UP); + rt_clock_timer_isr(&clock_timer_obj[0].time_device); +} + +#endif + +#ifdef BSP_USING_CLOCK_TIMER1 + +void TIMER1_IRQHandler(void) +{ + timer_interrupt_flag_clear(clock_timer_obj[1].config->timer_periph, TIMER_INT_FLAG_UP); + rt_clock_timer_isr(&clock_timer_obj[1].time_device); +} + +#endif + +#ifdef BSP_USING_CLOCK_TIMER2 + +void TIMER2_IRQHandler(void) +{ + timer_interrupt_flag_clear(clock_timer_obj[2].config->timer_periph, TIMER_INT_FLAG_UP); + rt_clock_timer_isr(&clock_timer_obj[2].time_device); +} + +#endif + +#ifdef BSP_USING_CLOCK_TIMER3 + +void TIMER3_IRQHandler(void) +{ + timer_interrupt_flag_clear(clock_timer_obj[3].config->timer_periph, TIMER_INT_FLAG_UP); + rt_clock_timer_isr(&clock_timer_obj[3].time_device); +} + +#endif + +#ifdef BSP_USING_CLOCK_TIMER4 + +void TIMER4_IRQHandler(void) +{ + timer_interrupt_flag_clear(clock_timer_obj[4].config->timer_periph, TIMER_INT_FLAG_UP); + rt_clock_timer_isr(&clock_timer_obj[4].time_device); +} + +#endif + +#ifdef BSP_USING_CLOCK_TIMER5 + +void TIMER5_IRQHandler(void) +{ + timer_interrupt_flag_clear(clock_timer_obj[5].config->timer_periph, TIMER_INT_FLAG_UP); + rt_clock_timer_isr(&clock_timer_obj[5].time_device); +} + +#endif + +#ifdef BSP_USING_CLOCK_TIMER6 + +void TIMER6_IRQHandler(void) +{ + timer_interrupt_flag_clear(clock_timer_obj[6].config->timer_periph, TIMER_INT_FLAG_UP); + rt_clock_timer_isr(&clock_timer_obj[6].time_device); +} + +#endif + +static int rt_clock_timer_init(void) +{ + int i = 0; + int result = RT_EOK; + +#ifdef BSP_USING_CLOCK_TIMER0 + rcu_periph_clock_enable(RCU_TIMER0); +#endif +#ifdef BSP_USING_CLOCK_TIMER1 + rcu_periph_clock_enable(RCU_TIMER1); +#endif +#ifdef BSP_USING_CLOCK_TIMER2 + rcu_periph_clock_enable(RCU_TIMER2); +#endif +#ifdef BSP_USING_CLOCK_TIMER3 + rcu_periph_clock_enable(RCU_TIMER3); +#endif +#ifdef BSP_USING_CLOCK_TIMER4 + rcu_periph_clock_enable(RCU_TIMER4); +#endif +#ifdef BSP_USING_CLOCK_TIMER5 + rcu_periph_clock_enable(RCU_TIMER5); +#endif +#ifdef BSP_USING_CLOCK_TIMER6 + rcu_periph_clock_enable(RCU_TIMER6); +#endif + + for (i = 0; i < sizeof(clock_timer_obj) / sizeof(clock_timer_obj[0]); i++) + { + clock_timer_obj[i].time_device.info = &gd32_clock_timer_info; + clock_timer_obj[i].time_device.ops = &gd32_clock_timer_ops; + clock_timer_obj[i].config = &clock_timer_config[i]; + rt_clock_timer_register(&clock_timer_obj[i].time_device, \ + clock_timer_obj[i].config->name, clock_timer_obj[i].config); + } + + return result; +} + +INIT_DEVICE_EXPORT(rt_clock_timer_init); + +#endif /* RT_USING_CLOCK_TIME */ diff --git a/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_hwtimer.h b/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_timer.h similarity index 68% rename from bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_hwtimer.h rename to bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_timer.h index f4664c9d384..53b2e1e45ed 100644 --- a/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_hwtimer.h +++ b/bsp/nuclei/libraries/gd32vf103/HAL_Drivers/drv_timer.h @@ -8,8 +8,8 @@ * 2029-05-06 hqfang first implementation. */ -#ifndef __DRV_HWTIMER__ -#define __DRV_HWTIMER__ +#ifndef __DRV_CLOCK_TIMER__ +#define __DRV_CLOCK_TIMER__ #include #include @@ -17,17 +17,17 @@ #include /* gd32 config class */ -struct gd32_hwtimer_config +struct gd32_clock_timer_config { const char *name; rt_uint32_t timer_periph; IRQn_Type irqn; }; -struct gd32_hwtimer +struct gd32_clock_timer { - rt_hwtimer_t time_device; - struct gd32_hwtimer_config *config; + rt_clock_timer_t time_device; + struct gd32_clock_timer_config *config; }; #endif diff --git a/bsp/nuvoton/libraries/m031/rtt_port/Kconfig b/bsp/nuvoton/libraries/m031/rtt_port/Kconfig index ea590078a7a..6a640a19788 100644 --- a/bsp/nuvoton/libraries/m031/rtt_port/Kconfig +++ b/bsp/nuvoton/libraries/m031/rtt_port/Kconfig @@ -92,7 +92,7 @@ config SOC_SERIES_M032 config BSP_USING_TIMER0 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -117,7 +117,7 @@ config SOC_SERIES_M032 config BSP_USING_TIMER1 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -141,7 +141,7 @@ config SOC_SERIES_M032 config BSP_USING_TIMER2 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -165,7 +165,7 @@ config SOC_SERIES_M032 config BSP_USING_TIMER3 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. diff --git a/bsp/nuvoton/libraries/m031/rtt_port/drv_timer.c b/bsp/nuvoton/libraries/m031/rtt_port/drv_timer.c index 02b5a1ea949..403889ec46d 100644 --- a/bsp/nuvoton/libraries/m031/rtt_port/drv_timer.c +++ b/bsp/nuvoton/libraries/m031/rtt_port/drv_timer.c @@ -12,7 +12,7 @@ #include -#if (defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)) +#if (defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME)) #include #include "NuMicro.h" @@ -24,17 +24,17 @@ /* Private typedef --------------------------------------------------------------*/ typedef struct nu_timer { - rt_hwtimer_t parent; + rt_clock_timer_t parent; TIMER_T *timer_periph; IRQn_Type IRQn; } nu_timer_t; /* Private functions ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode); -static void nu_timer_stop(rt_hwtimer_t *timer); -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer); -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode); +static void nu_timer_stop(rt_clock_timer_t *timer); +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer); +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); /* Public functions -------------------------------------------------------------*/ @@ -56,15 +56,15 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg static nu_timer_t nu_timer3; #endif -static struct rt_hwtimer_info nu_timer_info = +static struct rt_clock_timer_info nu_timer_info = { 12000000, /* maximum count frequency */ 46875, /* minimum count frequency */ 0xFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_UP,/* Increment or Decreasing count mode */ + CLOCK_TIMER_CNTMODE_UP,/* Increment or Decreasing count mode */ }; -static struct rt_hwtimer_ops nu_timer_ops = +static struct rt_clock_timer_ops nu_timer_ops = { nu_timer_init, nu_timer_start, @@ -74,7 +74,7 @@ static struct rt_hwtimer_ops nu_timer_ops = }; /* Functions define ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { RT_ASSERT(timer != RT_NULL); @@ -85,7 +85,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) if (1 == state) { uint32_t timer_clk; - struct rt_hwtimer_info *info = &nu_timer_info; + struct rt_clock_timer_info *info = &nu_timer_info; timer_clk = TIMER_GetModuleClock(nu_timer->timer_periph); info->maxfreq = timer_clk; @@ -102,7 +102,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode) +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode) { rt_err_t err = RT_EOK; RT_ASSERT(timer != RT_NULL); @@ -121,11 +121,11 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ err = -RT_ERROR; } - if (HWTIMER_MODE_PERIOD == opmode) + if (CLOCK_TIMER_MODE_PERIOD == opmode) { TIMER_SET_OPMODE(nu_timer->timer_periph, TIMER_PERIODIC_MODE); } - else if (HWTIMER_MODE_ONESHOT == opmode) + else if (CLOCK_TIMER_MODE_ONESHOT == opmode) { TIMER_SET_OPMODE(nu_timer->timer_periph, TIMER_ONESHOT_MODE); } @@ -140,7 +140,7 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ return err; } -static void nu_timer_stop(rt_hwtimer_t *timer) +static void nu_timer_stop(rt_clock_timer_t *timer) { RT_ASSERT(timer != RT_NULL); @@ -151,7 +151,7 @@ static void nu_timer_stop(rt_hwtimer_t *timer) TIMER_Stop(nu_timer->timer_periph); } -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer) { RT_ASSERT(timer != RT_NULL); @@ -162,7 +162,7 @@ static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) return TIMER_GetCounter(nu_timer->timer_periph); } -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t ret = RT_EOK; @@ -174,7 +174,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; @@ -186,7 +186,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg } break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: TIMER_Stop(nu_timer->timer_periph); break; @@ -207,7 +207,7 @@ int rt_hw_timer_init(void) nu_timer0.parent.info = &nu_timer_info; nu_timer0.parent.ops = &nu_timer_ops; nu_timer0.IRQn = TMR0_IRQn; - ret = rt_device_hwtimer_register(&nu_timer0.parent, "timer0", &nu_timer0); + ret = rt_clock_timer_register(&nu_timer0.parent, "timer0", &nu_timer0); if (ret != RT_EOK) { rt_kprintf("timer0 register failed\n"); @@ -221,7 +221,7 @@ int rt_hw_timer_init(void) nu_timer1.parent.info = &nu_timer_info; nu_timer1.parent.ops = &nu_timer_ops; nu_timer1.IRQn = TMR1_IRQn; - ret = rt_device_hwtimer_register(&nu_timer1.parent, "timer1", &nu_timer1); + ret = rt_clock_timer_register(&nu_timer1.parent, "timer1", &nu_timer1); if (ret != RT_EOK) { rt_kprintf("timer1 register failed\n"); @@ -235,7 +235,7 @@ int rt_hw_timer_init(void) nu_timer2.parent.info = &nu_timer_info; nu_timer2.parent.ops = &nu_timer_ops; nu_timer2.IRQn = TMR2_IRQn; - ret = rt_device_hwtimer_register(&nu_timer2.parent, "timer2", &nu_timer2); + ret = rt_clock_timer_register(&nu_timer2.parent, "timer2", &nu_timer2); if (ret != RT_EOK) { rt_kprintf("timer2 register failed\n"); @@ -249,7 +249,7 @@ int rt_hw_timer_init(void) nu_timer3.parent.info = &nu_timer_info; nu_timer3.parent.ops = &nu_timer_ops; nu_timer3.IRQn = TMR3_IRQn; - ret = rt_device_hwtimer_register(&nu_timer3.parent, "timer3", &nu_timer3); + ret = rt_clock_timer_register(&nu_timer3.parent, "timer3", &nu_timer3); if (ret != RT_EOK) { rt_kprintf("timer3 register failed\n"); @@ -271,7 +271,7 @@ void TMR0_IRQHandler(void) if (TIMER_GetIntFlag(TIMER0)) { TIMER_ClearIntFlag(TIMER0); - rt_device_hwtimer_isr(&nu_timer0.parent); + rt_clock_timer_isr(&nu_timer0.parent); } rt_interrupt_leave(); @@ -286,7 +286,7 @@ void TMR1_IRQHandler(void) if (TIMER_GetIntFlag(TIMER1)) { TIMER_ClearIntFlag(TIMER1); - rt_device_hwtimer_isr(&nu_timer1.parent); + rt_clock_timer_isr(&nu_timer1.parent); } rt_interrupt_leave(); @@ -301,7 +301,7 @@ void TMR2_IRQHandler(void) if (TIMER_GetIntFlag(TIMER2)) { TIMER_ClearIntFlag(TIMER2); - rt_device_hwtimer_isr(&nu_timer2.parent); + rt_clock_timer_isr(&nu_timer2.parent); } rt_interrupt_leave(); @@ -316,11 +316,11 @@ void TMR3_IRQHandler(void) if (TIMER_GetIntFlag(TIMER3)) { TIMER_ClearIntFlag(TIMER3); - rt_device_hwtimer_isr(&nu_timer3.parent); + rt_clock_timer_isr(&nu_timer3.parent); } rt_interrupt_leave(); } #endif -#endif //#if (defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)) +#endif //#if (defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME)) diff --git a/bsp/nuvoton/libraries/m2354/rtt_port/Kconfig b/bsp/nuvoton/libraries/m2354/rtt_port/Kconfig index e37055919f1..67632a47544 100644 --- a/bsp/nuvoton/libraries/m2354/rtt_port/Kconfig +++ b/bsp/nuvoton/libraries/m2354/rtt_port/Kconfig @@ -97,7 +97,7 @@ config SOC_SERIES_M2354 config BSP_USING_TIMER0 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -129,7 +129,7 @@ config SOC_SERIES_M2354 config BSP_USING_TIMER1 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -160,7 +160,7 @@ config SOC_SERIES_M2354 config BSP_USING_TIMER2 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -191,7 +191,7 @@ config SOC_SERIES_M2354 config BSP_USING_TIMER3 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -222,7 +222,7 @@ config SOC_SERIES_M2354 config BSP_USING_TIMER4 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -253,7 +253,7 @@ config SOC_SERIES_M2354 config BSP_USING_TIMER5 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. diff --git a/bsp/nuvoton/libraries/m2354/rtt_port/drv_timer.c b/bsp/nuvoton/libraries/m2354/rtt_port/drv_timer.c index 1a27a5dc097..3ca6aab4542 100644 --- a/bsp/nuvoton/libraries/m2354/rtt_port/drv_timer.c +++ b/bsp/nuvoton/libraries/m2354/rtt_port/drv_timer.c @@ -12,7 +12,7 @@ #include -#if (defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)) +#if (defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME)) #include #include "NuMicro.h" @@ -23,17 +23,17 @@ /* Private typedef --------------------------------------------------------------*/ typedef struct nu_timer { - rt_hwtimer_t parent; + rt_clock_timer_t parent; TIMER_T *timer_periph; IRQn_Type IRQn; } nu_timer_t; /* Private functions ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode); -static void nu_timer_stop(rt_hwtimer_t *timer); -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer); -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode); +static void nu_timer_stop(rt_clock_timer_t *timer); +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer); +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); /* Public functions -------------------------------------------------------------*/ @@ -63,15 +63,15 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg static nu_timer_t nu_timer5; #endif -static struct rt_hwtimer_info nu_timer_info = +static struct rt_clock_timer_info nu_timer_info = { 12000000, /* maximum count frequency */ 46875, /* minimum count frequency */ 0xFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_UP,/* Increment or Decreasing count mode */ + CLOCK_TIMER_CNTMODE_UP,/* Increment or Decreasing count mode */ }; -static struct rt_hwtimer_ops nu_timer_ops = +static struct rt_clock_timer_ops nu_timer_ops = { nu_timer_init, nu_timer_start, @@ -81,7 +81,7 @@ static struct rt_hwtimer_ops nu_timer_ops = }; /* Functions define ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { RT_ASSERT(timer != RT_NULL); @@ -92,7 +92,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) if (1 == state) { uint32_t timer_clk; - struct rt_hwtimer_info *info = &nu_timer_info; + struct rt_clock_timer_info *info = &nu_timer_info; timer_clk = TIMER_GetModuleClock(nu_timer->timer_periph); info->maxfreq = timer_clk; @@ -109,7 +109,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode) +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode) { rt_err_t err = RT_EOK; RT_ASSERT(timer != RT_NULL); @@ -128,11 +128,11 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ err = -RT_ERROR; } - if (HWTIMER_MODE_PERIOD == opmode) + if (CLOCK_TIMER_MODE_PERIOD == opmode) { TIMER_SET_OPMODE(nu_timer->timer_periph, TIMER_PERIODIC_MODE); } - else if (HWTIMER_MODE_ONESHOT == opmode) + else if (CLOCK_TIMER_MODE_ONESHOT == opmode) { TIMER_SET_OPMODE(nu_timer->timer_periph, TIMER_ONESHOT_MODE); } @@ -147,7 +147,7 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ return err; } -static void nu_timer_stop(rt_hwtimer_t *timer) +static void nu_timer_stop(rt_clock_timer_t *timer) { RT_ASSERT(timer != RT_NULL); @@ -158,7 +158,7 @@ static void nu_timer_stop(rt_hwtimer_t *timer) TIMER_Stop(nu_timer->timer_periph); } -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer) { RT_ASSERT(timer != RT_NULL); @@ -169,7 +169,7 @@ static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) return TIMER_GetCounter(nu_timer->timer_periph); } -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t ret = RT_EOK; @@ -181,7 +181,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; @@ -193,7 +193,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg } break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: TIMER_Stop(nu_timer->timer_periph); break; @@ -214,7 +214,7 @@ int rt_hw_timer_init(void) nu_timer0.parent.info = &nu_timer_info; nu_timer0.parent.ops = &nu_timer_ops; nu_timer0.IRQn = TMR0_IRQn; - ret = rt_device_hwtimer_register(&nu_timer0.parent, "timer0", &nu_timer0); + ret = rt_clock_timer_register(&nu_timer0.parent, "timer0", &nu_timer0); if (ret != RT_EOK) { rt_kprintf("timer0 register failed\n"); @@ -228,7 +228,7 @@ int rt_hw_timer_init(void) nu_timer1.parent.info = &nu_timer_info; nu_timer1.parent.ops = &nu_timer_ops; nu_timer1.IRQn = TMR1_IRQn; - ret = rt_device_hwtimer_register(&nu_timer1.parent, "timer1", &nu_timer1); + ret = rt_clock_timer_register(&nu_timer1.parent, "timer1", &nu_timer1); if (ret != RT_EOK) { rt_kprintf("timer1 register failed\n"); @@ -242,7 +242,7 @@ int rt_hw_timer_init(void) nu_timer2.parent.info = &nu_timer_info; nu_timer2.parent.ops = &nu_timer_ops; nu_timer2.IRQn = TMR2_IRQn; - ret = rt_device_hwtimer_register(&nu_timer2.parent, "timer2", &nu_timer2); + ret = rt_clock_timer_register(&nu_timer2.parent, "timer2", &nu_timer2); if (ret != RT_EOK) { rt_kprintf("timer2 register failed\n"); @@ -256,7 +256,7 @@ int rt_hw_timer_init(void) nu_timer3.parent.info = &nu_timer_info; nu_timer3.parent.ops = &nu_timer_ops; nu_timer3.IRQn = TMR3_IRQn; - ret = rt_device_hwtimer_register(&nu_timer3.parent, "timer3", &nu_timer3); + ret = rt_clock_timer_register(&nu_timer3.parent, "timer3", &nu_timer3); if (ret != RT_EOK) { rt_kprintf("timer3 register failed\n"); @@ -270,7 +270,7 @@ int rt_hw_timer_init(void) nu_timer4.parent.info = &nu_timer_info; nu_timer4.parent.ops = &nu_timer_ops; nu_timer4.IRQn = TMR4_IRQn; - ret = rt_device_hwtimer_register(&nu_timer4.parent, "timer4", &nu_timer4); + ret = rt_clock_timer_register(&nu_timer4.parent, "timer4", &nu_timer4); if (ret != RT_EOK) { rt_kprintf("timer4 register failed\n"); @@ -284,7 +284,7 @@ int rt_hw_timer_init(void) nu_timer5.parent.info = &nu_timer_info; nu_timer5.parent.ops = &nu_timer_ops; nu_timer5.IRQn = TMR5_IRQn; - ret = rt_device_hwtimer_register(&nu_timer5.parent, "timer5", &nu_timer5); + ret = rt_clock_timer_register(&nu_timer5.parent, "timer5", &nu_timer5); if (ret != RT_EOK) { rt_kprintf("timer5 register failed\n"); @@ -306,7 +306,7 @@ void TMR0_IRQHandler(void) if (TIMER_GetIntFlag(TIMER0)) { TIMER_ClearIntFlag(TIMER0); - rt_device_hwtimer_isr(&nu_timer0.parent); + rt_clock_timer_isr(&nu_timer0.parent); } rt_interrupt_leave(); @@ -321,7 +321,7 @@ void TMR1_IRQHandler(void) if (TIMER_GetIntFlag(TIMER1)) { TIMER_ClearIntFlag(TIMER1); - rt_device_hwtimer_isr(&nu_timer1.parent); + rt_clock_timer_isr(&nu_timer1.parent); } rt_interrupt_leave(); @@ -336,7 +336,7 @@ void TMR2_IRQHandler(void) if (TIMER_GetIntFlag(TIMER2)) { TIMER_ClearIntFlag(TIMER2); - rt_device_hwtimer_isr(&nu_timer2.parent); + rt_clock_timer_isr(&nu_timer2.parent); } rt_interrupt_leave(); @@ -351,7 +351,7 @@ void TMR3_IRQHandler(void) if (TIMER_GetIntFlag(TIMER3)) { TIMER_ClearIntFlag(TIMER3); - rt_device_hwtimer_isr(&nu_timer3.parent); + rt_clock_timer_isr(&nu_timer3.parent); } rt_interrupt_leave(); @@ -366,7 +366,7 @@ void TMR4_IRQHandler(void) if (TIMER_GetIntFlag(TIMER4)) { TIMER_ClearIntFlag(TIMER4); - rt_device_hwtimer_isr(&nu_timer4.parent); + rt_clock_timer_isr(&nu_timer4.parent); } rt_interrupt_leave(); @@ -381,11 +381,11 @@ void TMR5_IRQHandler(void) if (TIMER_GetIntFlag(TIMER5)) { TIMER_ClearIntFlag(TIMER5); - rt_device_hwtimer_isr(&nu_timer5.parent); + rt_clock_timer_isr(&nu_timer5.parent); } rt_interrupt_leave(); } #endif -#endif //#if (defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)) +#endif //#if (defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME)) diff --git a/bsp/nuvoton/libraries/m460/rtt_port/Kconfig b/bsp/nuvoton/libraries/m460/rtt_port/Kconfig index e13519e10e7..e4a2ec8b7d0 100644 --- a/bsp/nuvoton/libraries/m460/rtt_port/Kconfig +++ b/bsp/nuvoton/libraries/m460/rtt_port/Kconfig @@ -113,7 +113,7 @@ config SOC_SERIES_M460 config BSP_USING_TIMER0 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -144,7 +144,7 @@ config SOC_SERIES_M460 config BSP_USING_TIMER1 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -174,7 +174,7 @@ config SOC_SERIES_M460 config BSP_USING_TIMER2 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -204,7 +204,7 @@ config SOC_SERIES_M460 config BSP_USING_TIMER3 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. diff --git a/bsp/nuvoton/libraries/m460/rtt_port/drv_timer.c b/bsp/nuvoton/libraries/m460/rtt_port/drv_timer.c index b9f4c7bbea2..3d9172c5402 100644 --- a/bsp/nuvoton/libraries/m460/rtt_port/drv_timer.c +++ b/bsp/nuvoton/libraries/m460/rtt_port/drv_timer.c @@ -12,7 +12,7 @@ #include -#if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER) +#if defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME) #include #include "NuMicro.h" @@ -41,7 +41,7 @@ enum /* Private typedef --------------------------------------------------------------*/ struct nu_timer { - rt_hwtimer_t parent; + rt_clock_timer_t parent; char *name; TIMER_T *base; IRQn_Type irqn; @@ -51,11 +51,11 @@ struct nu_timer typedef struct nu_timer *nu_timer_t; /* Private functions ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode); -static void nu_timer_stop(rt_hwtimer_t *timer); -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer); -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode); +static void nu_timer_stop(rt_clock_timer_t *timer); +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer); +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); /* Public functions -------------------------------------------------------------*/ @@ -77,15 +77,15 @@ static struct nu_timer nu_timer_arr [] = #endif }; -static struct rt_hwtimer_info nu_timer_info = +static struct rt_clock_timer_info nu_timer_info = { 12000000, /* maximum count frequency */ 46875, /* minimum count frequency */ 0xFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_UP, /* Increment or Decreasing count mode */ + CLOCK_TIMER_CNTMODE_UP, /* Increment or Decreasing count mode */ }; -static struct rt_hwtimer_ops nu_timer_ops = +static struct rt_clock_timer_ops nu_timer_ops = { nu_timer_init, nu_timer_start, @@ -95,7 +95,7 @@ static struct rt_hwtimer_ops nu_timer_ops = }; /* Functions define ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuTmr != RT_NULL); @@ -103,7 +103,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) if (1 == state) { uint32_t timer_clk; - struct rt_hwtimer_info *info = &nu_timer_info; + struct rt_clock_timer_info *info = &nu_timer_info; timer_clk = TIMER_GetModuleClock(psNuTmr->base); info->maxfreq = timer_clk; @@ -120,7 +120,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode) +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode) { rt_err_t ret = -RT_EINVAL; rt_uint32_t u32OpMode; @@ -135,11 +135,11 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ switch (opmode) { - case HWTIMER_MODE_PERIOD: + case CLOCK_TIMER_MODE_PERIOD: u32OpMode = TIMER_PERIODIC_MODE; break; - case HWTIMER_MODE_ONESHOT: + case CLOCK_TIMER_MODE_ONESHOT: u32OpMode = TIMER_ONESHOT_MODE; break; @@ -161,7 +161,7 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ return -(ret); } -static void nu_timer_stop(rt_hwtimer_t *timer) +static void nu_timer_stop(rt_clock_timer_t *timer) { nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuTmr != RT_NULL); @@ -172,7 +172,7 @@ static void nu_timer_stop(rt_hwtimer_t *timer) TIMER_ResetCounter(psNuTmr->base); } -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer) { nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuTmr != RT_NULL); @@ -180,7 +180,7 @@ static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) return TIMER_GetCounter(psNuTmr->base); } -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t ret = RT_EOK; nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); @@ -188,7 +188,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; @@ -200,7 +200,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg } break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: TIMER_Stop(psNuTmr->base); break; @@ -222,7 +222,7 @@ static void nu_timer_isr(nu_timer_t psNuTmr) if (TIMER_GetIntFlag(psNuTmr->base)) { TIMER_ClearIntFlag(psNuTmr->base); - rt_device_hwtimer_isr(&psNuTmr->parent); + rt_clock_timer_isr(&psNuTmr->parent); } } @@ -242,8 +242,8 @@ int rt_hw_timer_init(void) /* Register Timer operation. */ nu_timer_arr[i].parent.ops = &nu_timer_ops; - /* Register RT hwtimer device. */ - ret = rt_device_hwtimer_register(&nu_timer_arr[i].parent, nu_timer_arr[i].name, &nu_timer_arr[i]); + /* Register RT clock_timer device. */ + ret = rt_clock_timer_register(&nu_timer_arr[i].parent, nu_timer_arr[i].name, &nu_timer_arr[i]); RT_ASSERT(ret == RT_EOK); } return 0; @@ -295,4 +295,4 @@ void TMR3_IRQHandler(void) } #endif -#endif //#if (defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)) +#endif //#if (defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME)) diff --git a/bsp/nuvoton/libraries/m480/rtt_port/Kconfig b/bsp/nuvoton/libraries/m480/rtt_port/Kconfig index cc9de1b5700..87a82cf98b5 100644 --- a/bsp/nuvoton/libraries/m480/rtt_port/Kconfig +++ b/bsp/nuvoton/libraries/m480/rtt_port/Kconfig @@ -115,7 +115,7 @@ config SOC_SERIES_M480 config BSP_USING_TIMER0 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -147,7 +147,7 @@ config SOC_SERIES_M480 config BSP_USING_TIMER1 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -178,7 +178,7 @@ config SOC_SERIES_M480 config BSP_USING_TIMER2 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -209,7 +209,7 @@ config SOC_SERIES_M480 config BSP_USING_TIMER3 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. diff --git a/bsp/nuvoton/libraries/m480/rtt_port/drv_timer.c b/bsp/nuvoton/libraries/m480/rtt_port/drv_timer.c index 59509c3dbc7..3052e5e7b68 100644 --- a/bsp/nuvoton/libraries/m480/rtt_port/drv_timer.c +++ b/bsp/nuvoton/libraries/m480/rtt_port/drv_timer.c @@ -12,7 +12,7 @@ #include -#if (defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)) +#if (defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME)) #include #include "NuMicro.h" @@ -23,17 +23,17 @@ /* Private typedef --------------------------------------------------------------*/ typedef struct nu_timer { - rt_hwtimer_t parent; + rt_clock_timer_t parent; TIMER_T *timer_periph; IRQn_Type IRQn; } nu_timer_t; /* Private functions ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode); -static void nu_timer_stop(rt_hwtimer_t *timer); -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer); -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode); +static void nu_timer_stop(rt_clock_timer_t *timer); +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer); +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); /* Public functions -------------------------------------------------------------*/ @@ -55,15 +55,15 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg static nu_timer_t nu_timer3; #endif -static struct rt_hwtimer_info nu_timer_info = +static struct rt_clock_timer_info nu_timer_info = { 12000000, /* maximum count frequency */ 46875, /* minimum count frequency */ 0xFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_UP,/* Increment or Decreasing count mode */ + CLOCK_TIMER_CNTMODE_UP,/* Increment or Decreasing count mode */ }; -static struct rt_hwtimer_ops nu_timer_ops = +static struct rt_clock_timer_ops nu_timer_ops = { nu_timer_init, nu_timer_start, @@ -73,7 +73,7 @@ static struct rt_hwtimer_ops nu_timer_ops = }; /* Functions define ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { RT_ASSERT(timer != RT_NULL); @@ -84,7 +84,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) if (1 == state) { uint32_t timer_clk; - struct rt_hwtimer_info *info = &nu_timer_info; + struct rt_clock_timer_info *info = &nu_timer_info; timer_clk = TIMER_GetModuleClock(nu_timer->timer_periph); info->maxfreq = timer_clk; @@ -101,7 +101,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode) +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode) { rt_err_t err = RT_EOK; RT_ASSERT(timer != RT_NULL); @@ -120,11 +120,11 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ err = -RT_ERROR; } - if (HWTIMER_MODE_PERIOD == opmode) + if (CLOCK_TIMER_MODE_PERIOD == opmode) { TIMER_SET_OPMODE(nu_timer->timer_periph, TIMER_PERIODIC_MODE); } - else if (HWTIMER_MODE_ONESHOT == opmode) + else if (CLOCK_TIMER_MODE_ONESHOT == opmode) { TIMER_SET_OPMODE(nu_timer->timer_periph, TIMER_ONESHOT_MODE); } @@ -139,7 +139,7 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ return err; } -static void nu_timer_stop(rt_hwtimer_t *timer) +static void nu_timer_stop(rt_clock_timer_t *timer) { RT_ASSERT(timer != RT_NULL); @@ -150,7 +150,7 @@ static void nu_timer_stop(rt_hwtimer_t *timer) TIMER_Stop(nu_timer->timer_periph); } -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer) { RT_ASSERT(timer != RT_NULL); @@ -161,7 +161,7 @@ static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) return TIMER_GetCounter(nu_timer->timer_periph); } -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t ret = RT_EOK; @@ -173,7 +173,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; @@ -185,7 +185,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg } break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: TIMER_Stop(nu_timer->timer_periph); break; @@ -206,7 +206,7 @@ int rt_hw_timer_init(void) nu_timer0.parent.info = &nu_timer_info; nu_timer0.parent.ops = &nu_timer_ops; nu_timer0.IRQn = TMR0_IRQn; - ret = rt_device_hwtimer_register(&nu_timer0.parent, "timer0", &nu_timer0); + ret = rt_clock_timer_register(&nu_timer0.parent, "timer0", &nu_timer0); if (ret != RT_EOK) { rt_kprintf("timer0 register failed\n"); @@ -220,7 +220,7 @@ int rt_hw_timer_init(void) nu_timer1.parent.info = &nu_timer_info; nu_timer1.parent.ops = &nu_timer_ops; nu_timer1.IRQn = TMR1_IRQn; - ret = rt_device_hwtimer_register(&nu_timer1.parent, "timer1", &nu_timer1); + ret = rt_clock_timer_register(&nu_timer1.parent, "timer1", &nu_timer1); if (ret != RT_EOK) { rt_kprintf("timer1 register failed\n"); @@ -234,7 +234,7 @@ int rt_hw_timer_init(void) nu_timer2.parent.info = &nu_timer_info; nu_timer2.parent.ops = &nu_timer_ops; nu_timer2.IRQn = TMR2_IRQn; - ret = rt_device_hwtimer_register(&nu_timer2.parent, "timer2", &nu_timer2); + ret = rt_clock_timer_register(&nu_timer2.parent, "timer2", &nu_timer2); if (ret != RT_EOK) { rt_kprintf("timer2 register failed\n"); @@ -248,7 +248,7 @@ int rt_hw_timer_init(void) nu_timer3.parent.info = &nu_timer_info; nu_timer3.parent.ops = &nu_timer_ops; nu_timer3.IRQn = TMR3_IRQn; - ret = rt_device_hwtimer_register(&nu_timer3.parent, "timer3", &nu_timer3); + ret = rt_clock_timer_register(&nu_timer3.parent, "timer3", &nu_timer3); if (ret != RT_EOK) { rt_kprintf("timer3 register failed\n"); @@ -270,7 +270,7 @@ void TMR0_IRQHandler(void) if (TIMER_GetIntFlag(TIMER0)) { TIMER_ClearIntFlag(TIMER0); - rt_device_hwtimer_isr(&nu_timer0.parent); + rt_clock_timer_isr(&nu_timer0.parent); } rt_interrupt_leave(); @@ -285,7 +285,7 @@ void TMR1_IRQHandler(void) if (TIMER_GetIntFlag(TIMER1)) { TIMER_ClearIntFlag(TIMER1); - rt_device_hwtimer_isr(&nu_timer1.parent); + rt_clock_timer_isr(&nu_timer1.parent); } rt_interrupt_leave(); @@ -300,7 +300,7 @@ void TMR2_IRQHandler(void) if (TIMER_GetIntFlag(TIMER2)) { TIMER_ClearIntFlag(TIMER2); - rt_device_hwtimer_isr(&nu_timer2.parent); + rt_clock_timer_isr(&nu_timer2.parent); } rt_interrupt_leave(); @@ -315,11 +315,11 @@ void TMR3_IRQHandler(void) if (TIMER_GetIntFlag(TIMER3)) { TIMER_ClearIntFlag(TIMER3); - rt_device_hwtimer_isr(&nu_timer3.parent); + rt_clock_timer_isr(&nu_timer3.parent); } rt_interrupt_leave(); } #endif -#endif //#if (defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER)) +#endif //#if (defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME)) diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/Kconfig b/bsp/nuvoton/libraries/ma35/rtt_port/Kconfig index fb6ca917cae..ef43e5c16dc 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/Kconfig +++ b/bsp/nuvoton/libraries/ma35/rtt_port/Kconfig @@ -173,7 +173,7 @@ config BSP_USING_TIMER0 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. @@ -198,7 +198,7 @@ config BSP_USING_TIMER1 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. @@ -222,7 +222,7 @@ config BSP_USING_TIMER2 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. @@ -246,7 +246,7 @@ config BSP_USING_TIMER3 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. @@ -270,7 +270,7 @@ config BSP_USING_TIMER4 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. @@ -295,7 +295,7 @@ config BSP_USING_TIMER5 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. @@ -320,7 +320,7 @@ config BSP_USING_TIMER6 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. @@ -346,7 +346,7 @@ config BSP_USING_TIMER7 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. @@ -371,7 +371,7 @@ config BSP_USING_TIMER8 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. @@ -396,7 +396,7 @@ config BSP_USING_TIMER9 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. @@ -421,7 +421,7 @@ config BSP_USING_TIMER10 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. @@ -446,7 +446,7 @@ config BSP_USING_TIMER11 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "Timer" help Choose this option if you need TIMER function mode. diff --git a/bsp/nuvoton/libraries/ma35/rtt_port/drv_timer.c b/bsp/nuvoton/libraries/ma35/rtt_port/drv_timer.c index fe590fec3b5..58b31f81616 100644 --- a/bsp/nuvoton/libraries/ma35/rtt_port/drv_timer.c +++ b/bsp/nuvoton/libraries/ma35/rtt_port/drv_timer.c @@ -12,7 +12,7 @@ #include -#if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER) +#if defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME) #include #include "NuMicro.h" @@ -66,7 +66,7 @@ enum /* Private typedef --------------------------------------------------------------*/ struct nu_timer { - rt_hwtimer_t parent; + rt_clock_timer_t parent; char *name; TIMER_T *base; IRQn_Type irqn; @@ -76,11 +76,11 @@ struct nu_timer typedef struct nu_timer *nu_timer_t; /* Private functions ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode); -static void nu_timer_stop(rt_hwtimer_t *timer); -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer); -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode); +static void nu_timer_stop(rt_clock_timer_t *timer); +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer); +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); /* Public functions -------------------------------------------------------------*/ @@ -126,15 +126,15 @@ static struct nu_timer nu_timer_arr [] = #endif }; -static struct rt_hwtimer_info nu_timer_info = +static struct rt_clock_timer_info nu_timer_info = { __HXT, /* maximum count frequency */ (__HXT / 256), /* minimum count frequency */ 0xFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_UP, /* Increment or Decreasing count mode */ + CLOCK_TIMER_CNTMODE_UP, /* Increment or Decreasing count mode */ }; -static struct rt_hwtimer_ops nu_timer_ops = +static struct rt_clock_timer_ops nu_timer_ops = { nu_timer_init, nu_timer_start, @@ -144,7 +144,7 @@ static struct rt_hwtimer_ops nu_timer_ops = }; /* Functions define ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuTmr != RT_NULL); @@ -152,7 +152,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) if (1 == state) { uint32_t timer_clk; - struct rt_hwtimer_info *info = &nu_timer_info; + struct rt_clock_timer_info *info = &nu_timer_info; timer_clk = TIMER_GetModuleClock(psNuTmr->base); info->maxfreq = timer_clk; @@ -169,7 +169,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode) +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode) { rt_err_t ret = -RT_EINVAL; rt_uint32_t u32OpMode; @@ -184,11 +184,11 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ switch (opmode) { - case HWTIMER_MODE_PERIOD: + case CLOCK_TIMER_MODE_PERIOD: u32OpMode = TIMER_PERIODIC_MODE; break; - case HWTIMER_MODE_ONESHOT: + case CLOCK_TIMER_MODE_ONESHOT: u32OpMode = TIMER_ONESHOT_MODE; break; @@ -210,7 +210,7 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ return -(ret); } -static void nu_timer_stop(rt_hwtimer_t *timer) +static void nu_timer_stop(rt_clock_timer_t *timer) { nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuTmr != RT_NULL); @@ -221,7 +221,7 @@ static void nu_timer_stop(rt_hwtimer_t *timer) TIMER_ResetCounter(psNuTmr->base); } -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer) { nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuTmr != RT_NULL); @@ -229,7 +229,7 @@ static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) return TIMER_GetCounter(psNuTmr->base); } -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t ret = RT_EOK; nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); @@ -237,7 +237,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; @@ -249,7 +249,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg } break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: TIMER_Stop(psNuTmr->base); break; @@ -272,7 +272,7 @@ static void nu_timer_isr(int vector, void *param) if (TIMER_GetIntFlag(psNuTmr->base)) { TIMER_ClearIntFlag(psNuTmr->base); - rt_device_hwtimer_isr(&psNuTmr->parent); + rt_clock_timer_isr(&psNuTmr->parent); } } @@ -295,8 +295,8 @@ int rt_hw_timer_init(void) /* Register Timer interrupt service routine. */ rt_hw_interrupt_install(nu_timer_arr[i].irqn, nu_timer_isr, &nu_timer_arr[i], nu_timer_arr[i].name); - /* Register RT hwtimer device. */ - ret = rt_device_hwtimer_register(&nu_timer_arr[i].parent, nu_timer_arr[i].name, &nu_timer_arr[i]); + /* Register RT clock_timer device. */ + ret = rt_clock_timer_register(&nu_timer_arr[i].parent, nu_timer_arr[i].name, &nu_timer_arr[i]); RT_ASSERT(ret == RT_EOK); } return 0; @@ -304,4 +304,4 @@ int rt_hw_timer_init(void) INIT_BOARD_EXPORT(rt_hw_timer_init); -#endif //#if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER) +#endif //#if defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME) diff --git a/bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig b/bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig index aab564422ef..a05652a923e 100644 --- a/bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig +++ b/bsp/nuvoton/libraries/n9h30/rtt_port/Kconfig @@ -93,7 +93,7 @@ config SOC_SERIES_N9H30 config BSP_USING_ETIMER0 select BSP_USING_ETIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "ETIMER" help Choose this option if you need TIMER function mode. @@ -118,7 +118,7 @@ config SOC_SERIES_N9H30 config BSP_USING_ETIMER1 select BSP_USING_ETIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "ETIMER" help Choose this option if you need TIMER function mode. @@ -142,7 +142,7 @@ config SOC_SERIES_N9H30 config BSP_USING_ETIMER2 select BSP_USING_ETIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "ETIMER" help Choose this option if you need TIMER function mode. @@ -166,7 +166,7 @@ config SOC_SERIES_N9H30 config BSP_USING_ETIMER3 select BSP_USING_ETIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "ETIMER" help Choose this option if you need TIMER function mode. @@ -197,28 +197,28 @@ config SOC_SERIES_N9H30 config BSP_USING_TIMER0 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER0" help Choose this option if you need TIMER function mode. config BSP_USING_TIMER1 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER1" help Choose this option if you need TIMER function mode. config BSP_USING_TIMER2 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER2" help Choose this option if you need TIMER function mode. config BSP_USING_TIMER3 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER3" help Choose this option if you need TIMER function mode. diff --git a/bsp/nuvoton/libraries/n9h30/rtt_port/drv_etimer.c b/bsp/nuvoton/libraries/n9h30/rtt_port/drv_etimer.c index e132600f958..ac75810bfdd 100644 --- a/bsp/nuvoton/libraries/n9h30/rtt_port/drv_etimer.c +++ b/bsp/nuvoton/libraries/n9h30/rtt_port/drv_etimer.c @@ -12,7 +12,7 @@ #include -#if defined(BSP_USING_ETIMER) && defined(RT_USING_HWTIMER) +#if defined(BSP_USING_ETIMER) && defined(RT_USING_CLOCK_TIME) #include #include "NuMicro.h" @@ -42,7 +42,7 @@ enum /* Private typedef --------------------------------------------------------------*/ struct nu_etimer { - rt_hwtimer_t parent; + rt_clock_timer_t parent; char *name; uint32_t idx; IRQn_Type irqn; @@ -52,11 +52,11 @@ struct nu_etimer typedef struct nu_etimer *nu_etimer_t; /* Private functions ------------------------------------------------------------*/ -static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode); -static void nu_etimer_stop(rt_hwtimer_t *timer); -static rt_uint32_t nu_etimer_count_get(rt_hwtimer_t *timer); -static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void nu_etimer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t nu_etimer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode); +static void nu_etimer_stop(rt_clock_timer_t *timer); +static rt_uint32_t nu_etimer_count_get(rt_clock_timer_t *timer); +static rt_err_t nu_etimer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); /* Public functions -------------------------------------------------------------*/ @@ -102,15 +102,15 @@ static struct nu_etimer nu_etimer_arr [] = #endif }; -static struct rt_hwtimer_info nu_etimer_info = +static struct rt_clock_timer_info nu_etimer_info = { 12000000, /* maximum count frequency */ 46875, /* minimum count frequency */ 0xFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_UP, /* Increment or Decreasing count mode */ + CLOCK_TIMER_CNTMODE_UP, /* Increment or Decreasing count mode */ }; -static struct rt_hwtimer_ops nu_etimer_ops = +static struct rt_clock_timer_ops nu_etimer_ops = { nu_etimer_init, nu_etimer_start, @@ -120,7 +120,7 @@ static struct rt_hwtimer_ops nu_etimer_ops = }; /* Functions define ------------------------------------------------------------*/ -static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void nu_etimer_init(rt_clock_timer_t *timer, rt_uint32_t state) { nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuETmr != RT_NULL); @@ -128,7 +128,7 @@ static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state) if (1 == state) { uint32_t timer_clk; - struct rt_hwtimer_info *info = &nu_etimer_info; + struct rt_clock_timer_info *info = &nu_etimer_info; timer_clk = ETIMER_GetModuleClock(psNuETmr->idx); info->maxfreq = timer_clk; @@ -145,7 +145,7 @@ static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode) +static rt_err_t nu_etimer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode) { rt_err_t ret = -RT_EINVAL; rt_uint32_t u32OpMode; @@ -160,11 +160,11 @@ static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer switch (opmode) { - case HWTIMER_MODE_PERIOD: + case CLOCK_TIMER_MODE_PERIOD: u32OpMode = ETIMER_PERIODIC_MODE; break; - case HWTIMER_MODE_ONESHOT: + case CLOCK_TIMER_MODE_ONESHOT: u32OpMode = ETIMER_ONESHOT_MODE; break; @@ -186,7 +186,7 @@ static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer return -(ret); } -static void nu_etimer_stop(rt_hwtimer_t *timer) +static void nu_etimer_stop(rt_clock_timer_t *timer) { nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuETmr != RT_NULL); @@ -197,7 +197,7 @@ static void nu_etimer_stop(rt_hwtimer_t *timer) ETIMER_ClearCounter(psNuETmr->idx); } -static rt_uint32_t nu_etimer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t nu_etimer_count_get(rt_clock_timer_t *timer) { nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuETmr != RT_NULL); @@ -205,7 +205,7 @@ static rt_uint32_t nu_etimer_count_get(rt_hwtimer_t *timer) return ETIMER_GetCounter(psNuETmr->idx); } -static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t nu_etimer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t ret = RT_EOK; nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer); @@ -213,7 +213,7 @@ static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *ar switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; @@ -225,7 +225,7 @@ static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *ar } break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: ETIMER_Stop(psNuETmr->idx); break; @@ -248,7 +248,7 @@ static void nu_etimer_isr(int vector, void *param) if (ETIMER_GetIntFlag(psNuETmr->idx)) { ETIMER_ClearIntFlag(psNuETmr->idx); - rt_device_hwtimer_isr(&psNuETmr->parent); + rt_clock_timer_isr(&psNuETmr->parent); } } @@ -271,8 +271,8 @@ int rt_hw_etimer_init(void) /* Register Etimer interrupt service routine. */ rt_hw_interrupt_install(nu_etimer_arr[i].irqn, nu_etimer_isr, &nu_etimer_arr[i], nu_etimer_arr[i].name); - /* Register RT hwtimer device. */ - ret = rt_device_hwtimer_register(&nu_etimer_arr[i].parent, nu_etimer_arr[i].name, &nu_etimer_arr[i]); + /* Register RT clock_timer device. */ + ret = rt_clock_timer_register(&nu_etimer_arr[i].parent, nu_etimer_arr[i].name, &nu_etimer_arr[i]); RT_ASSERT(ret == RT_EOK); } return 0; @@ -280,4 +280,4 @@ int rt_hw_etimer_init(void) INIT_BOARD_EXPORT(rt_hw_etimer_init); -#endif //#if defined(BSP_USING_ETIMER) && defined(RT_USING_HWTIMER) +#endif //#if defined(BSP_USING_ETIMER) && defined(RT_USING_CLOCK_TIME) diff --git a/bsp/nuvoton/libraries/n9h30/rtt_port/drv_timer.c b/bsp/nuvoton/libraries/n9h30/rtt_port/drv_timer.c index 38ea1b9e490..df3d4a1dd22 100644 --- a/bsp/nuvoton/libraries/n9h30/rtt_port/drv_timer.c +++ b/bsp/nuvoton/libraries/n9h30/rtt_port/drv_timer.c @@ -12,7 +12,7 @@ #include -#if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER) +#if defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME) #include #include "NuMicro.h" @@ -44,7 +44,7 @@ enum /* Private typedef --------------------------------------------------------------*/ struct nu_timer { - rt_hwtimer_t parent; + rt_clock_timer_t parent; char *name; uint32_t idx; IRQn_Type irqn; @@ -54,11 +54,11 @@ struct nu_timer typedef struct nu_timer *nu_timer_t; /* Private functions ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode); -static void nu_timer_stop(rt_hwtimer_t *timer); -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer); -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode); +static void nu_timer_stop(rt_clock_timer_t *timer); +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer); +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); /* Public functions -------------------------------------------------------------*/ @@ -105,15 +105,15 @@ static struct nu_timer nu_timer_arr [] = /* BSP_USING_TIMER4 is reserved for Systick usage. */ }; -static struct rt_hwtimer_info nu_timer_info = +static struct rt_clock_timer_info nu_timer_info = { 12000000, /* maximum count frequency */ 46875, /* minimum count frequency */ 0xFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_UP, /* Increment or Decreasing count mode */ + CLOCK_TIMER_CNTMODE_UP, /* Increment or Decreasing count mode */ }; -static struct rt_hwtimer_ops nu_timer_ops = +static struct rt_clock_timer_ops nu_timer_ops = { nu_timer_init, nu_timer_start, @@ -123,7 +123,7 @@ static struct rt_hwtimer_ops nu_timer_ops = }; /* Functions define ------------------------------------------------------------*/ -static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void nu_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuTmr != RT_NULL); @@ -131,7 +131,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) if (1 == state) { uint32_t timer_clk; - struct rt_hwtimer_info *info = &nu_timer_info; + struct rt_clock_timer_info *info = &nu_timer_info; timer_clk = TIMER_GetModuleClock(psNuTmr->idx); info->maxfreq = timer_clk; @@ -148,7 +148,7 @@ static void nu_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode) +static rt_err_t nu_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode) { rt_err_t ret = -RT_EINVAL; rt_uint32_t u32OpMode; @@ -163,11 +163,11 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ switch (opmode) { - case HWTIMER_MODE_PERIOD: + case CLOCK_TIMER_MODE_PERIOD: u32OpMode = TIMER_PERIODIC_MODE; break; - case HWTIMER_MODE_ONESHOT: + case CLOCK_TIMER_MODE_ONESHOT: u32OpMode = TIMER_ONESHOT_MODE; break; @@ -189,7 +189,7 @@ static rt_err_t nu_timer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ return -(ret); } -static void nu_timer_stop(rt_hwtimer_t *timer) +static void nu_timer_stop(rt_clock_timer_t *timer) { nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuTmr != RT_NULL); @@ -200,7 +200,7 @@ static void nu_timer_stop(rt_hwtimer_t *timer) TIMER_ClearCounter(psNuTmr->idx); } -static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t nu_timer_count_get(rt_clock_timer_t *timer) { nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuTmr != RT_NULL); @@ -208,7 +208,7 @@ static rt_uint32_t nu_timer_count_get(rt_hwtimer_t *timer) return TIMER_GetCounter(psNuTmr->idx); } -static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t nu_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t ret = RT_EOK; nu_timer_t psNuTmr = NU_TIMER_DEVICE(timer); @@ -216,7 +216,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; @@ -228,7 +228,7 @@ static rt_err_t nu_timer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg } break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: TIMER_Stop(psNuTmr->idx); break; @@ -251,7 +251,7 @@ static void nu_timer_isr(int vector, void *param) if (TIMER_GetIntFlag(psNuTmr->idx)) { TIMER_ClearIntFlag(psNuTmr->idx); - rt_device_hwtimer_isr(&psNuTmr->parent); + rt_clock_timer_isr(&psNuTmr->parent); } } @@ -274,12 +274,12 @@ int rt_hw_timer_init(void) /* Register Etimer interrupt service routine. */ rt_hw_interrupt_install(nu_timer_arr[i].irqn, nu_timer_isr, &nu_timer_arr[i], nu_timer_arr[i].name); - /* Register RT hwtimer device. */ - ret = rt_device_hwtimer_register(&nu_timer_arr[i].parent, nu_timer_arr[i].name, &nu_timer_arr[i]); + /* Register RT clock_timer device. */ + ret = rt_clock_timer_register(&nu_timer_arr[i].parent, nu_timer_arr[i].name, &nu_timer_arr[i]); RT_ASSERT(ret == RT_EOK); } return 0; } INIT_BOARD_EXPORT(rt_hw_timer_init); -#endif //#if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER) +#endif //#if defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME) diff --git a/bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig b/bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig index 379c5e84fcf..c4945642852 100644 --- a/bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig +++ b/bsp/nuvoton/libraries/nuc980/rtt_port/Kconfig @@ -103,7 +103,7 @@ config SOC_SERIES_NUC980 config BSP_USING_TIMER0 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -128,7 +128,7 @@ config SOC_SERIES_NUC980 config BSP_USING_TIMER1 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -152,7 +152,7 @@ config SOC_SERIES_NUC980 config BSP_USING_TIMER2 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -176,7 +176,7 @@ config SOC_SERIES_NUC980 config BSP_USING_TIMER3 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. @@ -200,7 +200,7 @@ config SOC_SERIES_NUC980 config BSP_USING_TIMER4 select BSP_USING_TIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME bool "TIMER" help Choose this option if you need TIMER function mode. diff --git a/bsp/nuvoton/libraries/nuc980/rtt_port/drv_etimer.c b/bsp/nuvoton/libraries/nuc980/rtt_port/drv_etimer.c index 93942edd547..64fcdc1dd4a 100644 --- a/bsp/nuvoton/libraries/nuc980/rtt_port/drv_etimer.c +++ b/bsp/nuvoton/libraries/nuc980/rtt_port/drv_etimer.c @@ -12,7 +12,7 @@ #include -#if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER) +#if defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME) #include #include "NuMicro.h" @@ -46,7 +46,7 @@ enum /* Private typedef --------------------------------------------------------------*/ struct nu_etimer { - rt_hwtimer_t parent; + rt_clock_timer_t parent; char *name; uint32_t idx; IRQn_Type irqn; @@ -56,11 +56,11 @@ struct nu_etimer typedef struct nu_etimer *nu_etimer_t; /* Private functions ------------------------------------------------------------*/ -static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode); -static void nu_etimer_stop(rt_hwtimer_t *timer); -static rt_uint32_t nu_etimer_count_get(rt_hwtimer_t *timer); -static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void nu_etimer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t nu_etimer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode); +static void nu_etimer_stop(rt_clock_timer_t *timer); +static rt_uint32_t nu_etimer_count_get(rt_clock_timer_t *timer); +static rt_err_t nu_etimer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); /* Public functions -------------------------------------------------------------*/ @@ -116,15 +116,15 @@ static struct nu_etimer nu_etimer_arr [] = /* BSP_USING_TIMER5 is reserved for Systick usage. */ }; -static struct rt_hwtimer_info nu_etimer_info = +static struct rt_clock_timer_info nu_etimer_info = { 12000000, /* maximum count frequency */ 46875, /* minimum count frequency */ 0xFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_UP, /* Increment or Decreasing count mode */ + CLOCK_TIMER_CNTMODE_UP, /* Increment or Decreasing count mode */ }; -static struct rt_hwtimer_ops nu_etimer_ops = +static struct rt_clock_timer_ops nu_etimer_ops = { nu_etimer_init, nu_etimer_start, @@ -134,7 +134,7 @@ static struct rt_hwtimer_ops nu_etimer_ops = }; /* Functions define ------------------------------------------------------------*/ -static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void nu_etimer_init(rt_clock_timer_t *timer, rt_uint32_t state) { nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuETmr != RT_NULL); @@ -142,7 +142,7 @@ static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state) if (1 == state) { uint32_t timer_clk; - struct rt_hwtimer_info *info = &nu_etimer_info; + struct rt_clock_timer_info *info = &nu_etimer_info; timer_clk = ETIMER_GetModuleClock(psNuETmr->idx); info->maxfreq = timer_clk; @@ -159,7 +159,7 @@ static void nu_etimer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t opmode) +static rt_err_t nu_etimer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t opmode) { rt_err_t ret = -RT_EINVAL; rt_uint32_t u32OpMode; @@ -174,11 +174,11 @@ static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer switch (opmode) { - case HWTIMER_MODE_PERIOD: + case CLOCK_TIMER_MODE_PERIOD: u32OpMode = ETIMER_PERIODIC_MODE; break; - case HWTIMER_MODE_ONESHOT: + case CLOCK_TIMER_MODE_ONESHOT: u32OpMode = ETIMER_ONESHOT_MODE; break; @@ -200,7 +200,7 @@ static rt_err_t nu_etimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer return -(ret); } -static void nu_etimer_stop(rt_hwtimer_t *timer) +static void nu_etimer_stop(rt_clock_timer_t *timer) { nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuETmr != RT_NULL); @@ -211,7 +211,7 @@ static void nu_etimer_stop(rt_hwtimer_t *timer) ETIMER_ClearCounter(psNuETmr->idx); } -static rt_uint32_t nu_etimer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t nu_etimer_count_get(rt_clock_timer_t *timer) { nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer); RT_ASSERT(psNuETmr != RT_NULL); @@ -219,7 +219,7 @@ static rt_uint32_t nu_etimer_count_get(rt_hwtimer_t *timer) return ETIMER_GetCounter(psNuETmr->idx); } -static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t nu_etimer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t ret = RT_EOK; nu_etimer_t psNuETmr = NU_TIMER_DEVICE(timer); @@ -227,7 +227,7 @@ static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *ar switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; @@ -239,7 +239,7 @@ static rt_err_t nu_etimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *ar } break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: ETIMER_Stop(psNuETmr->idx); break; @@ -262,7 +262,7 @@ static void nu_etimer_isr(int vector, void *param) if (ETIMER_GetIntFlag(psNuETmr->idx)) { ETIMER_ClearIntFlag(psNuETmr->idx); - rt_device_hwtimer_isr(&psNuETmr->parent); + rt_clock_timer_isr(&psNuETmr->parent); } } @@ -285,8 +285,8 @@ int rt_hw_etimer_init(void) /* Register Etimer interrupt service routine. */ rt_hw_interrupt_install(nu_etimer_arr[i].irqn, nu_etimer_isr, &nu_etimer_arr[i], nu_etimer_arr[i].name); - /* Register RT hwtimer device. */ - ret = rt_device_hwtimer_register(&nu_etimer_arr[i].parent, nu_etimer_arr[i].name, &nu_etimer_arr[i]); + /* Register RT clock_timer device. */ + ret = rt_clock_timer_register(&nu_etimer_arr[i].parent, nu_etimer_arr[i].name, &nu_etimer_arr[i]); RT_ASSERT(ret == RT_EOK); } return 0; @@ -294,4 +294,4 @@ int rt_hw_etimer_init(void) INIT_BOARD_EXPORT(rt_hw_etimer_init); -#endif //#if defined(BSP_USING_TIMER) && defined(RT_USING_HWTIMER) +#endif //#if defined(BSP_USING_TIMER) && defined(RT_USING_CLOCK_TIME) diff --git a/bsp/nuvoton/nk-980iot/config_lvgl b/bsp/nuvoton/nk-980iot/config_lvgl index 8c65963bbbf..87d581b3217 100644 --- a/bsp/nuvoton/nk-980iot/config_lvgl +++ b/bsp/nuvoton/nk-980iot/config_lvgl @@ -170,9 +170,8 @@ CONFIG_RT_SERIAL_RB_BUFSZ=2048 CONFIG_RT_USING_CAN=y CONFIG_RT_CAN_USING_HDR=y # CONFIG_RT_CAN_USING_CANFD is not set -CONFIG_RT_USING_HWTIMER=y -CONFIG_RT_USING_CPUTIME=y -CONFIG_CPUTIME_TIMER_FREQ=0 +CONFIG_RT_USING_CLOCK_TIME=y +CONFIG_CLOCK_TIMER_FREQ=0 CONFIG_RT_USING_I2C=y # CONFIG_RT_I2C_DEBUG is not set CONFIG_RT_USING_I2C_BITOPS=y diff --git a/bsp/nuvoton/nk-980iot/project.uvopt b/bsp/nuvoton/nk-980iot/project.uvopt index 730a5777d36..baed90281bf 100644 --- a/bsp/nuvoton/nk-980iot/project.uvopt +++ b/bsp/nuvoton/nk-980iot/project.uvopt @@ -391,8 +391,8 @@ 0 0 0 - ..\..\..\components\drivers\cputime\cputime.c - cputime.c + ..\..\..\components\drivers\clock_time\clock_time_core.c + clock_time_core.c 0 0 @@ -403,8 +403,8 @@ 0 0 0 - ..\..\..\components\drivers\cputime\cputimer.c - cputimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 @@ -463,8 +463,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nuvoton/nk-980iot/project.uvoptx b/bsp/nuvoton/nk-980iot/project.uvoptx index f3c2426a2c9..51644e26953 100644 --- a/bsp/nuvoton/nk-980iot/project.uvoptx +++ b/bsp/nuvoton/nk-980iot/project.uvoptx @@ -391,8 +391,8 @@ 0 0 0 - ..\..\..\components\drivers\cputime\cputime.c - cputime.c + ..\..\..\components\drivers\clock_time\clock_time_core.c + clock_time_core.c 0 0 @@ -403,8 +403,8 @@ 0 0 0 - ..\..\..\components\drivers\cputime\cputimer.c - cputimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 @@ -463,8 +463,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nuvoton/nk-980iot/project.uvproj b/bsp/nuvoton/nk-980iot/project.uvproj index 32ca527fec3..6be5063e787 100644 --- a/bsp/nuvoton/nk-980iot/project.uvproj +++ b/bsp/nuvoton/nk-980iot/project.uvproj @@ -723,9 +723,9 @@ - cputime.c + clock_time_core.c 1 - ..\..\..\components\drivers\cputime\cputime.c + ..\..\..\components\drivers\clock_time\clock_time_core.c 2 @@ -779,9 +779,9 @@ - cputimer.c + clock_timer.c 1 - ..\..\..\components\drivers\cputime\cputimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 @@ -1059,9 +1059,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nuvoton/nk-980iot/project.uvprojx b/bsp/nuvoton/nk-980iot/project.uvprojx index 9aec0381166..048e0231274 100644 --- a/bsp/nuvoton/nk-980iot/project.uvprojx +++ b/bsp/nuvoton/nk-980iot/project.uvprojx @@ -682,9 +682,9 @@ - cputime.c + clock_time_core.c 1 - ..\..\..\components\drivers\cputime\cputime.c + ..\..\..\components\drivers\clock_time\clock_time_core.c 2 @@ -738,9 +738,9 @@ - cputimer.c + clock_timer.c 1 - ..\..\..\components\drivers\cputime\cputimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 @@ -1018,9 +1018,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nuvoton/nk-980iot/spinor.config b/bsp/nuvoton/nk-980iot/spinor.config index 73ca797816b..6a888d02144 100644 --- a/bsp/nuvoton/nk-980iot/spinor.config +++ b/bsp/nuvoton/nk-980iot/spinor.config @@ -175,9 +175,8 @@ CONFIG_RT_SERIAL_RB_BUFSZ=2048 CONFIG_RT_USING_CAN=y CONFIG_RT_CAN_USING_HDR=y # CONFIG_RT_CAN_USING_CANFD is not set -CONFIG_RT_USING_HWTIMER=y -CONFIG_RT_USING_CPUTIME=y -CONFIG_CPUTIME_TIMER_FREQ=0 +CONFIG_RT_USING_CLOCK_TIME=y +CONFIG_CLOCK_TIMER_FREQ=0 CONFIG_RT_USING_I2C=y # CONFIG_RT_I2C_DEBUG is not set CONFIG_RT_USING_I2C_BITOPS=y diff --git a/bsp/nuvoton/nk-n9h30/project.uvopt b/bsp/nuvoton/nk-n9h30/project.uvopt index 246d751843e..81d2f4f59dc 100644 --- a/bsp/nuvoton/nk-n9h30/project.uvopt +++ b/bsp/nuvoton/nk-n9h30/project.uvopt @@ -391,8 +391,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nuvoton/nk-n9h30/project.uvproj b/bsp/nuvoton/nk-n9h30/project.uvproj index edf97f9ebd8..04314bbd0b5 100644 --- a/bsp/nuvoton/nk-n9h30/project.uvproj +++ b/bsp/nuvoton/nk-n9h30/project.uvproj @@ -723,9 +723,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nuvoton/nk-rtu980/project.uvopt b/bsp/nuvoton/nk-rtu980/project.uvopt index 05e93fcc1f1..ace3ba31064 100644 --- a/bsp/nuvoton/nk-rtu980/project.uvopt +++ b/bsp/nuvoton/nk-rtu980/project.uvopt @@ -367,8 +367,8 @@ 0 0 0 - ..\..\..\components\drivers\cputime\cputime.c - cputime.c + ..\..\..\components\drivers\clock_time\clock_time_core.c + clock_time_core.c 0 0 @@ -379,8 +379,8 @@ 0 0 0 - ..\..\..\components\drivers\cputime\cputimer.c - cputimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 @@ -439,8 +439,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nuvoton/nk-rtu980/project.uvproj b/bsp/nuvoton/nk-rtu980/project.uvproj index c0b81bb7536..0fd0e92b88a 100644 --- a/bsp/nuvoton/nk-rtu980/project.uvproj +++ b/bsp/nuvoton/nk-rtu980/project.uvproj @@ -611,9 +611,9 @@ - cputime.c + clock_time_core.c 1 - ..\..\..\components\drivers\cputime\cputime.c + ..\..\..\components\drivers\clock_time\clock_time_core.c 2 @@ -667,9 +667,9 @@ - cputimer.c + clock_timer.c 1 - ..\..\..\components\drivers\cputime\cputimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 @@ -947,9 +947,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nuvoton/numaker-iot-m467/config_lvgl b/bsp/nuvoton/numaker-iot-m467/config_lvgl index 84fce8720aa..dbe4cda107a 100644 --- a/bsp/nuvoton/numaker-iot-m467/config_lvgl +++ b/bsp/nuvoton/numaker-iot-m467/config_lvgl @@ -165,8 +165,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=512 CONFIG_RT_USING_CAN=y # CONFIG_RT_CAN_USING_HDR is not set # CONFIG_RT_CAN_USING_CANFD is not set -CONFIG_RT_USING_HWTIMER=y -# CONFIG_RT_USING_CPUTIME is not set +CONFIG_RT_USING_CLOCK_TIME=y CONFIG_RT_USING_I2C=y # CONFIG_RT_I2C_DEBUG is not set CONFIG_RT_USING_I2C_BITOPS=y diff --git a/bsp/nuvoton/numaker-iot-m467/project.ewp b/bsp/nuvoton/numaker-iot-m467/project.ewp index fc84f282c74..8cc03027b5d 100644 --- a/bsp/nuvoton/numaker-iot-m467/project.ewp +++ b/bsp/nuvoton/numaker-iot-m467/project.ewp @@ -1224,7 +1224,7 @@ $PROJ_DIR$\..\..\..\components\drivers\hwcrypto\hwcrypto.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c diff --git a/bsp/nuvoton/numaker-iot-m467/project.uvoptx b/bsp/nuvoton/numaker-iot-m467/project.uvoptx index 687323ec13c..ff6de66129b 100644 --- a/bsp/nuvoton/numaker-iot-m467/project.uvoptx +++ b/bsp/nuvoton/numaker-iot-m467/project.uvoptx @@ -610,8 +610,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nuvoton/numaker-iot-m467/project.uvprojx b/bsp/nuvoton/numaker-iot-m467/project.uvprojx index 194029c15be..55b50db848e 100644 --- a/bsp/nuvoton/numaker-iot-m467/project.uvprojx +++ b/bsp/nuvoton/numaker-iot-m467/project.uvprojx @@ -1336,9 +1336,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nuvoton/numaker-iot-m487/config_lvgl b/bsp/nuvoton/numaker-iot-m487/config_lvgl index bbeb858b34a..02d41f87380 100644 --- a/bsp/nuvoton/numaker-iot-m487/config_lvgl +++ b/bsp/nuvoton/numaker-iot-m487/config_lvgl @@ -158,8 +158,7 @@ CONFIG_RT_SERIAL_USING_DMA=y CONFIG_RT_SERIAL_RB_BUFSZ=2048 CONFIG_RT_USING_CAN=y # CONFIG_RT_CAN_USING_HDR is not set -CONFIG_RT_USING_HWTIMER=y -# CONFIG_RT_USING_CPUTIME is not set +CONFIG_RT_USING_CLOCK_TIME=y CONFIG_RT_USING_I2C=y # CONFIG_RT_I2C_DEBUG is not set CONFIG_RT_USING_I2C_BITOPS=y diff --git a/bsp/nuvoton/numaker-iot-m487/project.ewp b/bsp/nuvoton/numaker-iot-m487/project.ewp index b5966f89f15..4fb48b1255b 100644 --- a/bsp/nuvoton/numaker-iot-m487/project.ewp +++ b/bsp/nuvoton/numaker-iot-m487/project.ewp @@ -1222,7 +1222,7 @@ $PROJ_DIR$\..\..\..\components\drivers\hwcrypto\hwcrypto.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c diff --git a/bsp/nuvoton/numaker-iot-m487/project.uvoptx b/bsp/nuvoton/numaker-iot-m487/project.uvoptx index 1512157524b..c4768e1d4b6 100644 --- a/bsp/nuvoton/numaker-iot-m487/project.uvoptx +++ b/bsp/nuvoton/numaker-iot-m487/project.uvoptx @@ -610,8 +610,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nuvoton/numaker-iot-m487/project.uvproj b/bsp/nuvoton/numaker-iot-m487/project.uvproj index b7a1f759219..c307afedce3 100644 --- a/bsp/nuvoton/numaker-iot-m487/project.uvproj +++ b/bsp/nuvoton/numaker-iot-m487/project.uvproj @@ -788,9 +788,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c diff --git a/bsp/nuvoton/numaker-iot-m487/project.uvprojx b/bsp/nuvoton/numaker-iot-m487/project.uvprojx index 6ac30b4f4ee..b820f880b23 100644 --- a/bsp/nuvoton/numaker-iot-m487/project.uvprojx +++ b/bsp/nuvoton/numaker-iot-m487/project.uvprojx @@ -1335,9 +1335,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nuvoton/numaker-m032ki/config_lvgl b/bsp/nuvoton/numaker-m032ki/config_lvgl index 122f5aa244f..374031f2bbc 100644 --- a/bsp/nuvoton/numaker-m032ki/config_lvgl +++ b/bsp/nuvoton/numaker-m032ki/config_lvgl @@ -135,8 +135,7 @@ CONFIG_RT_USING_SERIAL_V1=y CONFIG_RT_SERIAL_USING_DMA=y CONFIG_RT_SERIAL_RB_BUFSZ=64 # CONFIG_RT_USING_CAN is not set -CONFIG_RT_USING_HWTIMER=y -# CONFIG_RT_USING_CPUTIME is not set +CONFIG_RT_USING_CLOCK_TIME=y # CONFIG_RT_USING_I2C is not set # CONFIG_RT_USING_PHY is not set CONFIG_RT_USING_PIN=y diff --git a/bsp/nuvoton/numaker-m032ki/project.ewp b/bsp/nuvoton/numaker-m032ki/project.ewp index 3b83ff3f263..d46d6fa38c8 100644 --- a/bsp/nuvoton/numaker-m032ki/project.ewp +++ b/bsp/nuvoton/numaker-m032ki/project.ewp @@ -1159,7 +1159,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\ipc\completion_comm.c diff --git a/bsp/nuvoton/numaker-m032ki/project.uvoptx b/bsp/nuvoton/numaker-m032ki/project.uvoptx index 850f005e80c..06b22ba7fb3 100644 --- a/bsp/nuvoton/numaker-m032ki/project.uvoptx +++ b/bsp/nuvoton/numaker-m032ki/project.uvoptx @@ -374,8 +374,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nuvoton/numaker-m032ki/project.uvprojx b/bsp/nuvoton/numaker-m032ki/project.uvprojx index 24c12cd0607..2e4c8e868b5 100644 --- a/bsp/nuvoton/numaker-m032ki/project.uvprojx +++ b/bsp/nuvoton/numaker-m032ki/project.uvprojx @@ -522,9 +522,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nuvoton/numaker-m2354/config_lvgl b/bsp/nuvoton/numaker-m2354/config_lvgl index 6db987d3761..57e8f347ba2 100644 --- a/bsp/nuvoton/numaker-m2354/config_lvgl +++ b/bsp/nuvoton/numaker-m2354/config_lvgl @@ -172,8 +172,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=2048 CONFIG_RT_USING_CAN=y # CONFIG_RT_CAN_USING_HDR is not set # CONFIG_RT_CAN_USING_CANFD is not set -CONFIG_RT_USING_HWTIMER=y -# CONFIG_RT_USING_CPUTIME is not set +CONFIG_RT_USING_CLOCK_TIME=y CONFIG_RT_USING_I2C=y # CONFIG_RT_I2C_DEBUG is not set CONFIG_RT_USING_I2C_BITOPS=y @@ -383,7 +382,7 @@ CONFIG_UTEST_THR_PRIORITY=20 # CONFIG_RT_USING_ADT is not set # CONFIG_RT_USING_RT_LINK is not set # CONFIG_RT_USING_VBUS is not set -# CONFIG_RT_USING_KTIME is not set +# CONFIG_RT_USING_CLOCK_TIME is not set # # RT-Thread Utestcases diff --git a/bsp/nuvoton/numaker-m2354/project.ewp b/bsp/nuvoton/numaker-m2354/project.ewp index aefdd38f517..1955f42c851 100644 --- a/bsp/nuvoton/numaker-m2354/project.ewp +++ b/bsp/nuvoton/numaker-m2354/project.ewp @@ -2325,7 +2325,7 @@ $PROJ_DIR$\..\..\..\components\drivers\hwcrypto\hwcrypto.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c diff --git a/bsp/nuvoton/numaker-m2354/project.uvoptx b/bsp/nuvoton/numaker-m2354/project.uvoptx index 1780fbee3ca..2e633109e04 100644 --- a/bsp/nuvoton/numaker-m2354/project.uvoptx +++ b/bsp/nuvoton/numaker-m2354/project.uvoptx @@ -654,8 +654,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nuvoton/numaker-m2354/project.uvprojx b/bsp/nuvoton/numaker-m2354/project.uvprojx index fc79bd4fbfc..5294c23efd1 100644 --- a/bsp/nuvoton/numaker-m2354/project.uvprojx +++ b/bsp/nuvoton/numaker-m2354/project.uvprojx @@ -1355,9 +1355,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nuvoton/numaker-m467hj/config_lvgl b/bsp/nuvoton/numaker-m467hj/config_lvgl index e2aae5679cc..ff2e60bf01b 100644 --- a/bsp/nuvoton/numaker-m467hj/config_lvgl +++ b/bsp/nuvoton/numaker-m467hj/config_lvgl @@ -175,8 +175,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=128 CONFIG_RT_USING_CAN=y # CONFIG_RT_CAN_USING_HDR is not set # CONFIG_RT_CAN_USING_CANFD is not set -# CONFIG_RT_USING_HWTIMER is not set -# CONFIG_RT_USING_CPUTIME is not set +# CONFIG_RT_USING_CLOCK_TIME is not set CONFIG_RT_USING_I2C=y # CONFIG_RT_I2C_DEBUG is not set CONFIG_RT_USING_I2C_BITOPS=y diff --git a/bsp/nuvoton/numaker-m467hj/project.ewp b/bsp/nuvoton/numaker-m467hj/project.ewp index 596c6a8d77b..1d707e59645 100644 --- a/bsp/nuvoton/numaker-m467hj/project.ewp +++ b/bsp/nuvoton/numaker-m467hj/project.ewp @@ -1207,7 +1207,7 @@ $PROJ_DIR$\..\..\..\components\drivers\hwcrypto\hwcrypto.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c diff --git a/bsp/nuvoton/numaker-m467hj/project.uvoptx b/bsp/nuvoton/numaker-m467hj/project.uvoptx index 3cdcc758655..67245e901b9 100644 --- a/bsp/nuvoton/numaker-m467hj/project.uvoptx +++ b/bsp/nuvoton/numaker-m467hj/project.uvoptx @@ -498,8 +498,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nuvoton/numaker-m467hj/project.uvprojx b/bsp/nuvoton/numaker-m467hj/project.uvprojx index c02697c63a7..68f7852be4a 100644 --- a/bsp/nuvoton/numaker-m467hj/project.uvprojx +++ b/bsp/nuvoton/numaker-m467hj/project.uvprojx @@ -1285,9 +1285,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nuvoton/numaker-pfm-m487/config_lvgl b/bsp/nuvoton/numaker-pfm-m487/config_lvgl index 7c6f2839725..c6b879ba153 100644 --- a/bsp/nuvoton/numaker-pfm-m487/config_lvgl +++ b/bsp/nuvoton/numaker-pfm-m487/config_lvgl @@ -159,8 +159,7 @@ CONFIG_RT_USING_SERIAL_V1=y CONFIG_RT_SERIAL_USING_DMA=y CONFIG_RT_SERIAL_RB_BUFSZ=128 # CONFIG_RT_USING_CAN is not set -CONFIG_RT_USING_HWTIMER=y -# CONFIG_RT_USING_CPUTIME is not set +CONFIG_RT_USING_CLOCK_TIME=y CONFIG_RT_USING_I2C=y # CONFIG_RT_I2C_DEBUG is not set CONFIG_RT_USING_I2C_BITOPS=y diff --git a/bsp/nuvoton/numaker-pfm-m487/project.ewp b/bsp/nuvoton/numaker-pfm-m487/project.ewp index ff0c072d8a3..fc5f7c43f37 100644 --- a/bsp/nuvoton/numaker-pfm-m487/project.ewp +++ b/bsp/nuvoton/numaker-pfm-m487/project.ewp @@ -1205,7 +1205,7 @@ $PROJ_DIR$\..\..\..\components\drivers\hwcrypto\hwcrypto.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c diff --git a/bsp/nuvoton/numaker-pfm-m487/project.uvoptx b/bsp/nuvoton/numaker-pfm-m487/project.uvoptx index 4b9bd78d2d8..a36f1e28b08 100644 --- a/bsp/nuvoton/numaker-pfm-m487/project.uvoptx +++ b/bsp/nuvoton/numaker-pfm-m487/project.uvoptx @@ -498,8 +498,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nuvoton/numaker-pfm-m487/project.uvproj b/bsp/nuvoton/numaker-pfm-m487/project.uvproj index 002e03a2bfa..0ccb2abf44d 100644 --- a/bsp/nuvoton/numaker-pfm-m487/project.uvproj +++ b/bsp/nuvoton/numaker-pfm-m487/project.uvproj @@ -757,9 +757,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c diff --git a/bsp/nuvoton/numaker-pfm-m487/project.uvprojx b/bsp/nuvoton/numaker-pfm-m487/project.uvprojx index 2f4a6c85a3f..d37d5ebbf9e 100644 --- a/bsp/nuvoton/numaker-pfm-m487/project.uvprojx +++ b/bsp/nuvoton/numaker-pfm-m487/project.uvprojx @@ -1285,9 +1285,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nxp/imx/imxrt/imxrt1021-nxp-evk/board/Kconfig b/bsp/nxp/imx/imxrt/imxrt1021-nxp-evk/board/Kconfig index 4e7ad9aad19..ae3d9590d2e 100644 --- a/bsp/nxp/imx/imxrt/imxrt1021-nxp-evk/board/Kconfig +++ b/bsp/nxp/imx/imxrt/imxrt1021-nxp-evk/board/Kconfig @@ -69,16 +69,16 @@ menu "On-chip Peripheral Drivers" int "Set LPUART1 TX DMA channel (0-32)" default 1 endif - menuconfig BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER bool "Enable GPT" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM - config BSP_USING_HWTIMER1 + config BSP_USING_CLOCK_TIMER1 bool "Enable GPT1" default n - config BSP_USING_HWTIMER2 + config BSP_USING_CLOCK_TIMER2 bool "Enable GPT2" default n endif diff --git a/bsp/nxp/imx/imxrt/imxrt1052-fire-pro/board/Kconfig b/bsp/nxp/imx/imxrt/imxrt1052-fire-pro/board/Kconfig index 2e071dbb34b..bf6b8137135 100644 --- a/bsp/nxp/imx/imxrt/imxrt1052-fire-pro/board/Kconfig +++ b/bsp/nxp/imx/imxrt/imxrt1052-fire-pro/board/Kconfig @@ -92,16 +92,16 @@ menu "On-chip Peripheral Drivers" default 3 endif - menuconfig BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER bool "Enable GPT" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM - config BSP_USING_HWTIMER1 + config BSP_USING_CLOCK_TIMER1 bool "Enable GPT1" default n - config BSP_USING_HWTIMER2 + config BSP_USING_CLOCK_TIMER2 bool "Enable GPT2" default n endif diff --git a/bsp/nxp/imx/imxrt/imxrt1052-fire-pro/project.ewt b/bsp/nxp/imx/imxrt/imxrt1052-fire-pro/project.ewt index f2e841061a0..af86848631f 100644 --- a/bsp/nxp/imx/imxrt/imxrt1052-fire-pro/project.ewt +++ b/bsp/nxp/imx/imxrt/imxrt1052-fire-pro/project.ewt @@ -1215,7 +1215,7 @@ $PROJ_DIR$\..\..\..\components\drivers\src\completion.c - $PROJ_DIR$\..\..\..\components\drivers\cputime\cputime.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_time_core.c $PROJ_DIR$\..\..\..\components\drivers\src\dataqueue.c diff --git a/bsp/nxp/imx/imxrt/libraries/drivers/SConscript b/bsp/nxp/imx/imxrt/libraries/drivers/SConscript index 233837fc365..9cc4b48ad6c 100644 --- a/bsp/nxp/imx/imxrt/libraries/drivers/SConscript +++ b/bsp/nxp/imx/imxrt/libraries/drivers/SConscript @@ -15,8 +15,8 @@ if GetDepend('BSP_USING_GPIO'): if GetDepend('BSP_USING_LPUART'): src += ['drv_uart.c'] -if GetDepend('BSP_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('BSP_USING_CLOCK_TIMER'): + src += ['drv_timer.c'] if GetDepend('BSP_USING_RTC'): src += ['drv_rtc.c'] diff --git a/bsp/nxp/imx/imxrt/libraries/drivers/drv_hwtimer.c b/bsp/nxp/imx/imxrt/libraries/drivers/drv_timer.c similarity index 58% rename from bsp/nxp/imx/imxrt/libraries/drivers/drv_hwtimer.c rename to bsp/nxp/imx/imxrt/libraries/drivers/drv_timer.c index aae7fa7a182..860c483e92f 100644 --- a/bsp/nxp/imx/imxrt/libraries/drivers/drv_hwtimer.c +++ b/bsp/nxp/imx/imxrt/libraries/drivers/drv_timer.c @@ -11,13 +11,13 @@ */ #include -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER -#define LOG_TAG "drv.hwtimer" +#define LOG_TAG "drv.clock_timer" #include #include -#include "drv_hwtimer.h" +#include "drv_timer.h" #include "fsl_gpt.h" #if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL @@ -40,32 +40,32 @@ static void NVIC_Configuration(void) { -#ifdef BSP_USING_HWTIMER1 +#ifdef BSP_USING_CLOCK_TIMER1 EnableIRQ(GPT1_IRQn); #endif -#ifdef BSP_USING_HWTIMER2 +#ifdef BSP_USING_CLOCK_TIMER2 EnableIRQ(GPT2_IRQn); #endif } -static rt_err_t imxrt_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t imxrt_clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t err = RT_EOK; - GPT_Type *hwtimer_dev; - hwtimer_dev = (GPT_Type *)timer->parent.user_data; + GPT_Type *clock_timer_dev; + clock_timer_dev = (GPT_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; clk = EXAMPLE_GPT_CLK_FREQ; pre = clk / *((uint32_t *)args) - 1; - GPT_SetClockDivider(hwtimer_dev, pre); + GPT_SetClockDivider(clock_timer_dev, pre); } break; default: @@ -75,36 +75,36 @@ static rt_err_t imxrt_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void return err; } -static rt_uint32_t imxrt_hwtimer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t imxrt_clock_timer_count_get(rt_clock_timer_t *timer) { rt_uint32_t CurrentTimer_Count; - GPT_Type *hwtimer_dev; - hwtimer_dev = (GPT_Type *)timer->parent.user_data; + GPT_Type *clock_timer_dev; + clock_timer_dev = (GPT_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); - CurrentTimer_Count = GPT_GetCurrentTimerCount(hwtimer_dev); + CurrentTimer_Count = GPT_GetCurrentTimerCount(clock_timer_dev); return CurrentTimer_Count; } -static void imxrt_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void imxrt_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { - GPT_Type *hwtimer_dev; + GPT_Type *clock_timer_dev; gpt_config_t gptConfig; - hwtimer_dev = (GPT_Type *)timer->parent.user_data; + clock_timer_dev = (GPT_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); if (state == 1) { #ifdef SOC_IMXRT1170_SERIES - #ifdef BSP_USING_HWTIMER1 + #ifdef BSP_USING_CLOCK_TIMER1 /*Clock setting for GPT*/ CLOCK_SetRootClockMux(kCLOCK_Root_Gpt1, EXAMPLE_GPT_CLOCK_SOURCE_SELECT); CLOCK_SetRootClockDiv(kCLOCK_Root_Gpt1, EXAMPLE_GPT_CLOCK_DIVIDER_SELECT); #endif - #ifdef BSP_USING_HWTIMER2 + #ifdef BSP_USING_CLOCK_TIMER2 /*Clock setting for GPT*/ CLOCK_SetRootClockMux(kCLOCK_Root_Gpt2, EXAMPLE_GPT_CLOCK_SOURCE_SELECT); CLOCK_SetRootClockDiv(kCLOCK_Root_Gpt2, EXAMPLE_GPT_CLOCK_DIVIDER_SELECT); @@ -117,73 +117,73 @@ static void imxrt_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) /* Initialize GPT module by default config */ GPT_GetDefaultConfig(&gptConfig); - GPT_Init(hwtimer_dev, &gptConfig); + GPT_Init(clock_timer_dev, &gptConfig); } } -static rt_err_t imxrt_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t imxrt_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { - GPT_Type *hwtimer_dev; - hwtimer_dev = (GPT_Type *)timer->parent.user_data; + GPT_Type *clock_timer_dev; + clock_timer_dev = (GPT_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); - hwtimer_dev->CR |= (mode != HWTIMER_MODE_PERIOD) ? GPT_CR_FRR_MASK : 0U; + clock_timer_dev->CR |= (mode != CLOCK_TIMER_MODE_PERIOD) ? GPT_CR_FRR_MASK : 0U; - GPT_SetOutputCompareValue(hwtimer_dev, kGPT_OutputCompare_Channel1, cnt); + GPT_SetOutputCompareValue(clock_timer_dev, kGPT_OutputCompare_Channel1, cnt); - GPT_EnableInterrupts(hwtimer_dev, kGPT_OutputCompare1InterruptEnable); + GPT_EnableInterrupts(clock_timer_dev, kGPT_OutputCompare1InterruptEnable); NVIC_Configuration(); - GPT_StartTimer(hwtimer_dev); + GPT_StartTimer(clock_timer_dev); return RT_EOK; } -static void imxrt_hwtimer_stop(rt_hwtimer_t *timer) +static void imxrt_clock_timer_stop(rt_clock_timer_t *timer) { - GPT_Type *hwtimer_dev; - hwtimer_dev = (GPT_Type *)timer->parent.user_data; + GPT_Type *clock_timer_dev; + clock_timer_dev = (GPT_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); - GPT_StopTimer(hwtimer_dev); + GPT_StopTimer(clock_timer_dev); } -static const struct rt_hwtimer_ops imxrt_hwtimer_ops = +static const struct rt_clock_timer_ops imxrt_clock_timer_ops = { - .init = imxrt_hwtimer_init, - .start = imxrt_hwtimer_start, - .stop = imxrt_hwtimer_stop, - .count_get = imxrt_hwtimer_count_get, - .control = imxrt_hwtimer_control, + .init = imxrt_clock_timer_init, + .start = imxrt_clock_timer_start, + .stop = imxrt_clock_timer_stop, + .count_get = imxrt_clock_timer_count_get, + .control = imxrt_clock_timer_control, }; -static const struct rt_hwtimer_info imxrt_hwtimer_info = +static const struct rt_clock_timer_info imxrt_clock_timer_info = { 25000000, /* the maximum count frequency can be set */ 6103, /* the minimum count frequency can be set */ 0xFFFFFFFF, - HWTIMER_CNTMODE_UP, + CLOCK_TIMER_CNTMODE_UP, }; -#ifdef BSP_USING_HWTIMER1 -static rt_hwtimer_t GPT_timer1; -#endif /*BSP_USING_HWTIMER1*/ +#ifdef BSP_USING_CLOCK_TIMER1 +static rt_clock_timer_t GPT_timer1; +#endif /*BSP_USING_CLOCK_TIMER1*/ -#ifdef BSP_USING_HWTIMER2 -static rt_hwtimer_t GPT_timer2; +#ifdef BSP_USING_CLOCK_TIMER2 +static rt_clock_timer_t GPT_timer2; #endif -int rt_hw_hwtimer_init(void) +int rt_hw_clock_timer_init(void) { int ret = RT_EOK; -#ifdef BSP_USING_HWTIMER1 - GPT_timer1.info = &imxrt_hwtimer_info; - GPT_timer1.ops = &imxrt_hwtimer_ops; - ret = rt_device_hwtimer_register(&GPT_timer1, "gpt1", GPT1); +#ifdef BSP_USING_CLOCK_TIMER1 + GPT_timer1.info = &imxrt_clock_timer_info; + GPT_timer1.ops = &imxrt_clock_timer_ops; + ret = rt_clock_timer_register(&GPT_timer1, "gpt1", GPT1); if (ret != RT_EOK) { @@ -191,10 +191,10 @@ int rt_hw_hwtimer_init(void) } #endif -#ifdef BSP_USING_HWTIMER2 - GPT_timer2.info = &imxrt_hwtimer_info; - GPT_timer2.ops = &imxrt_hwtimer_ops; - ret = rt_device_hwtimer_register(&GPT_timer2, "gpt2", GPT2); +#ifdef BSP_USING_CLOCK_TIMER2 + GPT_timer2.info = &imxrt_clock_timer_info; + GPT_timer2.ops = &imxrt_clock_timer_ops; + ret = rt_clock_timer_register(&GPT_timer2, "gpt2", GPT2); if (ret != RT_EOK) { @@ -205,14 +205,14 @@ int rt_hw_hwtimer_init(void) return ret; } -#ifdef BSP_USING_HWTIMER1 +#ifdef BSP_USING_CLOCK_TIMER1 void GPT1_IRQHandler(void) { if (GPT_GetStatusFlags(GPT1, kGPT_OutputCompare1Flag) != 0) { GPT_ClearStatusFlags(GPT1, kGPT_OutputCompare1Flag); - rt_device_hwtimer_isr(&GPT_timer1); + rt_clock_timer_isr(&GPT_timer1); } /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F, Cortex-M7, Cortex-M7F Store immediate overlapping @@ -222,16 +222,16 @@ void GPT1_IRQHandler(void) #endif } -#endif /*BSP_USING_HWTIMER1*/ +#endif /*BSP_USING_CLOCK_TIMER1*/ -#ifdef BSP_USING_HWTIMER2 +#ifdef BSP_USING_CLOCK_TIMER2 void GPT2_IRQHandler(void) { if (GPT_GetStatusFlags(GPT2, kGPT_OutputCompare1Flag) != 0) { GPT_ClearStatusFlags(GPT2, kGPT_OutputCompare1Flag); - rt_device_hwtimer_isr(&GPT_timer2); + rt_clock_timer_isr(&GPT_timer2); } /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F, Cortex-M7, Cortex-M7F Store immediate overlapping @@ -240,8 +240,8 @@ void GPT2_IRQHandler(void) __DSB(); #endif } -#endif /*BSP_USING_HWTIMER2*/ +#endif /*BSP_USING_CLOCK_TIMER2*/ -INIT_DEVICE_EXPORT(rt_hw_hwtimer_init); +INIT_DEVICE_EXPORT(rt_hw_clock_timer_init); -#endif /* BSP_USING_HWTIMER */ +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/nxp/imx/imxrt/libraries/drivers/drv_hwtimer.h b/bsp/nxp/imx/imxrt/libraries/drivers/drv_timer.h similarity index 83% rename from bsp/nxp/imx/imxrt/libraries/drivers/drv_hwtimer.h rename to bsp/nxp/imx/imxrt/libraries/drivers/drv_timer.h index 22dd018347c..dc95a020b64 100644 --- a/bsp/nxp/imx/imxrt/libraries/drivers/drv_hwtimer.h +++ b/bsp/nxp/imx/imxrt/libraries/drivers/drv_timer.h @@ -8,8 +8,8 @@ * 2018-04-17 WangBing the first version. */ -#ifndef DRV_HWTIMER_H__ -#define DRV_HWTIMER_H__ +#ifndef DRV_CLOCK_TIMER_H__ +#define DRV_CLOCK_TIMER_H__ #include #include diff --git a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/board/Kconfig b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/board/Kconfig index 33e35d2ac55..02b973dfa93 100644 --- a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/board/Kconfig +++ b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/board/Kconfig @@ -53,16 +53,16 @@ menu "On-chip Peripheral Drivers" default 1 endif - menuconfig BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER bool "Enable GPT" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM - config BSP_USING_HWTIMER1 + config BSP_USING_CLOCK_TIMER1 bool "Enable GPT1" default n - config BSP_USING_HWTIMER2 + config BSP_USING_CLOCK_TIMER2 bool "Enable GPT2" default n endif diff --git a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.ewp b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.ewp index f5a716af31d..3e1756ee273 100644 --- a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.ewp +++ b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.ewp @@ -1151,7 +1151,7 @@ DeviceDrivers - $PROJ_DIR$\..\..\..\components\drivers\cputime\cputime.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_time_core.c $PROJ_DIR$\..\..\..\components\drivers\misc\pin.c diff --git a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.uvoptx b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.uvoptx index c1f392aa34d..38789ef8842 100644 --- a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.uvoptx +++ b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.uvoptx @@ -536,8 +536,8 @@ 0 0 0 - ..\..\..\components\drivers\cputime\cputime.c - cputime.c + ..\..\..\components\drivers\clock_time\clock_time_core.c + clock_time_core.c 0 0 diff --git a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.uvprojx b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.uvprojx index e15669351df..e89ac7373d4 100644 --- a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.uvprojx +++ b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1050xxx/project.uvprojx @@ -533,9 +533,9 @@ DeviceDrivers - cputime.c + clock_time_core.c 1 - ..\..\..\components\drivers\cputime\cputime.c + ..\..\..\components\drivers\clock_time\clock_time_core.c pin.c diff --git a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.ewp b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.ewp index 2a6b63a8a6b..9d417419e39 100644 --- a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.ewp +++ b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.ewp @@ -1167,7 +1167,7 @@ DeviceDrivers - $PROJ_DIR$\..\..\..\..\..\..\NXP\RTT_BSP\imxrt_bsp\components\drivers\cputime\cputime.c + $PROJ_DIR$\..\..\..\..\..\..\NXP\RTT_BSP\imxrt_bsp\components\drivers\clock_time\clock_time_core.c $PROJ_DIR$\..\..\..\..\..\..\NXP\RTT_BSP\imxrt_bsp\components\drivers\misc\pin.c diff --git a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.uvoptx b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.uvoptx index c4218d5d924..d6fee8bb74e 100644 --- a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.uvoptx +++ b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.uvoptx @@ -575,8 +575,8 @@ 0 0 0 - ..\..\..\..\..\..\NXP\RTT_BSP\imxrt_bsp\components\drivers\cputime\cputime.c - cputime.c + ..\..\..\..\..\..\NXP\RTT_BSP\imxrt_bsp\components\drivers\clock_time\clock_time_core.c + clock_time_core.c 0 0 diff --git a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.uvprojx b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.uvprojx index 9874343b6b9..357075c7812 100644 --- a/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.uvprojx +++ b/bsp/nxp/imx/imxrt/libraries/templates/imxrt1064xxx/project.uvprojx @@ -552,9 +552,9 @@ DeviceDrivers - cputime.c + clock_time_core.c 1 - ..\..\..\..\..\..\NXP\RTT_BSP\imxrt_bsp\components\drivers\cputime\cputime.c + ..\..\..\..\..\..\NXP\RTT_BSP\imxrt_bsp\components\drivers\clock_time\clock_time_core.c pin.c diff --git a/bsp/nxp/lpc/lpc408x/drivers/Kconfig b/bsp/nxp/lpc/lpc408x/drivers/Kconfig index 3e9b19fb816..cc4f6f52120 100644 --- a/bsp/nxp/lpc/lpc408x/drivers/Kconfig +++ b/bsp/nxp/lpc/lpc408x/drivers/Kconfig @@ -7,9 +7,9 @@ menu "Hardware Drivers Config" select RT_USING_LWIP default n - config BSP_USING_HWTIMER0 + config BSP_USING_CLOCK_TIMER0 bool "Using timer0" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n config BSP_USING_ADC diff --git a/bsp/nxp/lpc/lpc408x/drivers/SConscript b/bsp/nxp/lpc/lpc408x/drivers/SConscript index 6557de9c16a..70ac821c74e 100644 --- a/bsp/nxp/lpc/lpc408x/drivers/SConscript +++ b/bsp/nxp/lpc/lpc408x/drivers/SConscript @@ -11,8 +11,8 @@ board.c if GetDepend(['BSP_USING_EMAC']): src += ['drv_emac.c'] -if GetDepend(['BSP_USING_HWTIMER0']): - src += ['drv_hwtimer.c'] +if GetDepend(['BSP_USING_CLOCK_TIMER0']): + src += ['drv_timer.c'] if GetDepend(['BSP_USING_LED']): src += ['drv_led.c'] diff --git a/bsp/nxp/lpc/lpc408x/drivers/drv_hwtimer.c b/bsp/nxp/lpc/lpc408x/drivers/drv_timer.c similarity index 70% rename from bsp/nxp/lpc/lpc408x/drivers/drv_hwtimer.c rename to bsp/nxp/lpc/lpc408x/drivers/drv_timer.c index 0357c2c1f90..70a64679b83 100644 --- a/bsp/nxp/lpc/lpc408x/drivers/drv_hwtimer.c +++ b/bsp/nxp/lpc/lpc408x/drivers/drv_timer.c @@ -12,16 +12,16 @@ #include #include "lpc_timer.h" #include "lpc_clkpwr.h" -#include "drv_hwtimer.h" +#include "drv_timer.h" -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME static void NVIC_Configuration(void) { NVIC_EnableIRQ(TIMER0_IRQn); } -static void timer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { LPC_TIM_TypeDef *tim; TIM_TIMERCFG_Type cfg; @@ -40,7 +40,7 @@ static void timer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode) { LPC_TIM_TypeDef *tim; TIM_MATCHCFG_Type match; @@ -50,7 +50,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ match.MatchChannel = 0; match.IntOnMatch = ENABLE; match.ResetOnMatch = ENABLE; - match.StopOnMatch = (opmode == HWTIMER_MODE_ONESHOT) ? ENABLE : DISABLE; + match.StopOnMatch = (opmode == CLOCK_TIMER_MODE_ONESHOT) ? ENABLE : DISABLE; match.ExtMatchOutputType = 0; match.MatchValue = t; @@ -60,7 +60,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ return RT_EOK; } -static void timer_stop(rt_hwtimer_t *timer) +static void timer_stop(rt_clock_timer_t *timer) { LPC_TIM_TypeDef *tim; @@ -69,7 +69,7 @@ static void timer_stop(rt_hwtimer_t *timer) TIM_Cmd(tim, DISABLE); } -static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { LPC_TIM_TypeDef *tim; rt_err_t err = RT_EOK; @@ -78,7 +78,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; @@ -98,7 +98,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) return err; } -static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t timer_counter_get(rt_clock_timer_t *timer) { LPC_TIM_TypeDef *tim; @@ -107,15 +107,15 @@ static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) return tim->TC; } -static const struct rt_hwtimer_info _info = +static const struct rt_clock_timer_info _info = { 1000000, /* the maximum count frequency can be set */ 2000, /* the minimum count frequency can be set */ 0xFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_UP,/* Increment or Decreasing count mode */ + CLOCK_TIMER_CNTMODE_UP,/* Increment or Decreasing count mode */ }; -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_ops _ops = { timer_init, timer_start, @@ -124,14 +124,14 @@ static const struct rt_hwtimer_ops _ops = timer_ctrl, }; -static rt_hwtimer_t _timer0; +static rt_clock_timer_t _timer0; -int rt_hw_hwtimer_init(void) +int rt_hw_clock_timer_init(void) { _timer0.info = &_info; _timer0.ops = &_ops; - rt_device_hwtimer_register(&_timer0, "timer0", LPC_TIM0); + rt_clock_timer_register(&_timer0, "timer0", LPC_TIM0); return 0; } @@ -141,10 +141,10 @@ void TIMER0_IRQHandler(void) if (TIM_GetIntStatus(LPC_TIM0, TIM_MR0_INT) != RESET) { TIM_ClearIntPending(LPC_TIM0, TIM_MR0_INT); - rt_device_hwtimer_isr(&_timer0); + rt_clock_timer_isr(&_timer0); } } -INIT_BOARD_EXPORT(rt_hw_hwtimer_init); +INIT_BOARD_EXPORT(rt_hw_clock_timer_init); -#endif /* RT_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME */ diff --git a/bsp/nxp/lpc/lpc408x/drivers/drv_hwtimer.h b/bsp/nxp/lpc/lpc408x/drivers/drv_timer.h similarity index 63% rename from bsp/nxp/lpc/lpc408x/drivers/drv_hwtimer.h rename to bsp/nxp/lpc/lpc408x/drivers/drv_timer.h index ca34816a771..bd63fab1acb 100644 --- a/bsp/nxp/lpc/lpc408x/drivers/drv_hwtimer.h +++ b/bsp/nxp/lpc/lpc408x/drivers/drv_timer.h @@ -8,9 +8,9 @@ * 2015-09-02 heyuanjie87 the first version */ -#ifndef DRV_HWTIMER_H__ -#define DRV_HWTIMER_H__ +#ifndef DRV_CLOCK_TIMER_H__ +#define DRV_CLOCK_TIMER_H__ -int rt_hw_hwtimer_init(void); +int rt_hw_clock_timer_init(void); -#endif /* DRV_HWTIMER_H__ */ +#endif /* DRV_CLOCK_TIMER_H__ */ diff --git a/bsp/nxp/lpc/lpc408x/project.uvproj b/bsp/nxp/lpc/lpc408x/project.uvproj index ab66c409a25..45028c721b4 100644 --- a/bsp/nxp/lpc/lpc408x/project.uvproj +++ b/bsp/nxp/lpc/lpc408x/project.uvproj @@ -359,7 +359,7 @@ __STDC_LIMIT_MACROS, CORE_M4, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, RT_USING_ARMLIBC - ..\..\..\..\libcpu\arm\cortex-m4;..\..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\..\components\libc\posix\io\poll;..\..\..\..\components\drivers\ktime\inc;.;..\..\..\..\components\libc\compilers\common\include;..\..\..\..\components\drivers\ktime;..\..\..\..\components\dfs\dfs_v1\filesystems\elmfat;..\..\..\..\libcpu\arm\common;..\..\..\..\components\finsh;..\..\..\..\components\libc\posix\io\epoll;..\..\..\..\components\dfs\dfs_v1\filesystems\devfs;drivers;..\..\..\..\components\drivers\include;..\..\..\..\include;..\..\..\..\components\libc\posix\io\eventfd;Libraries\Drivers\include;..\..\..\..\components\libc\posix\ipc;Libraries\CMSIS\Include;applications;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\compilers\common\extension;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\posix\delay;..\..\..\..\components\drivers\include;..\..\..\..\components\dfs\dfs_v1\include;Libraries\Device\NXP\LPC407x_8x_177x_8x\Include + ..\..\..\..\libcpu\arm\cortex-m4;..\..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\..\components\libc\posix\io\poll;..\..\..\..\components\drivers\clock_time\inc;.;..\..\..\..\components\libc\compilers\common\include;..\..\..\..\components\drivers\clock_time;..\..\..\..\components\dfs\dfs_v1\filesystems\elmfat;..\..\..\..\libcpu\arm\common;..\..\..\..\components\finsh;..\..\..\..\components\libc\posix\io\epoll;..\..\..\..\components\dfs\dfs_v1\filesystems\devfs;drivers;..\..\..\..\components\drivers\include;..\..\..\..\include;..\..\..\..\components\libc\posix\io\eventfd;Libraries\Drivers\include;..\..\..\..\components\libc\posix\ipc;Libraries\CMSIS\Include;applications;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\compilers\common\extension;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\posix\delay;..\..\..\..\components\drivers\include;..\..\..\..\components\dfs\dfs_v1\include;Libraries\Device\NXP\LPC407x_8x_177x_8x\Include @@ -1064,26 +1064,26 @@ - ktime + clock_time - hrtimer.c + clock_hrtimer.c 1 - ..\..\..\..\components\drivers\ktime\src\hrtimer.c + ..\..\..\..\components\drivers\clock_time\clock_hrtimer.c - boottime.c + clock_boottime.c 1 - ..\..\..\..\components\drivers\ktime\src\boottime.c + ..\..\..\..\components\drivers\clock_time\clock_boottime.c - cputimer.c + clock_time_core.c 1 - ..\..\..\..\components\drivers\ktime\src\cputimer.c + ..\..\..\..\components\drivers\clock_time\clock_time_core.c diff --git a/bsp/nxp/lpc/lpc408x/project.uvprojx b/bsp/nxp/lpc/lpc408x/project.uvprojx index f3c2dfa9cfb..fa15f6e1094 100644 --- a/bsp/nxp/lpc/lpc408x/project.uvprojx +++ b/bsp/nxp/lpc/lpc408x/project.uvprojx @@ -333,7 +333,7 @@ --library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186 __STDC_LIMIT_MACROS, CORE_M4, RT_USING_LIBC, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, RT_USING_ARMLIBC - ..\..\..\..\libcpu\arm\cortex-m4;..\..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\..\components\libc\posix\io\poll;..\..\..\..\components\drivers\ktime\inc;.;..\..\..\..\components\libc\compilers\common\include;..\..\..\..\components\drivers\ktime;..\..\..\..\components\dfs\dfs_v1\filesystems\elmfat;..\..\..\..\libcpu\arm\common;..\..\..\..\components\finsh;..\..\..\..\components\libc\posix\io\epoll;..\..\..\..\components\dfs\dfs_v1\filesystems\devfs;drivers;..\..\..\..\components\drivers\include;..\..\..\..\include;..\..\..\..\components\libc\posix\io\eventfd;Libraries\Drivers\include;..\..\..\..\components\libc\posix\ipc;Libraries\CMSIS\Include;applications;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\compilers\common\extension;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\posix\delay;..\..\..\..\components\drivers\include;..\..\..\..\components\dfs\dfs_v1\include;Libraries\Device\NXP\LPC407x_8x_177x_8x\Include + ..\..\..\..\libcpu\arm\cortex-m4;..\..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\..\components\libc\posix\io\poll;..\..\..\..\components\drivers\clock_time\inc;.;..\..\..\..\components\libc\compilers\common\include;..\..\..\..\components\drivers\clock_time;..\..\..\..\components\dfs\dfs_v1\filesystems\elmfat;..\..\..\..\libcpu\arm\common;..\..\..\..\components\finsh;..\..\..\..\components\libc\posix\io\epoll;..\..\..\..\components\dfs\dfs_v1\filesystems\devfs;drivers;..\..\..\..\components\drivers\include;..\..\..\..\include;..\..\..\..\components\libc\posix\io\eventfd;Libraries\Drivers\include;..\..\..\..\components\libc\posix\ipc;Libraries\CMSIS\Include;applications;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\compilers\common\extension;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\posix\delay;..\..\..\..\components\drivers\include;..\..\..\..\components\dfs\dfs_v1\include;Libraries\Device\NXP\LPC407x_8x_177x_8x\Include @@ -1039,26 +1039,26 @@ - ktime + clock_time - cputimer.c + clock_time_core.c 1 - ..\..\..\..\components\drivers\ktime\src\cputimer.c + ..\..\..\..\components\drivers\clock_time\clock_time_core.c - boottime.c + clock_boottime.c 1 - ..\..\..\..\components\drivers\ktime\src\boottime.c + ..\..\..\..\components\drivers\clock_time\clock_boottime.c - hrtimer.c + clock_hrtimer.c 1 - ..\..\..\..\components\drivers\ktime\src\hrtimer.c + ..\..\..\..\components\drivers\clock_time\clock_hrtimer.c diff --git a/bsp/nxp/lpc/lpc54608-LPCXpresso/project.uvprojx b/bsp/nxp/lpc/lpc54608-LPCXpresso/project.uvprojx index e091a4f64fa..d0bdb76eaf7 100644 --- a/bsp/nxp/lpc/lpc54608-LPCXpresso/project.uvprojx +++ b/bsp/nxp/lpc/lpc54608-LPCXpresso/project.uvprojx @@ -332,7 +332,7 @@ --library_interface=armcc --library_type=standardlib --diag_suppress=66,1296,186 RT_USING_LIBC, CPU_LPC54608, RT_USING_ARMLIBC, SDK_DEBUGCONSOLE=0, __STDC_LIMIT_MACROS, __CLK_TCK=RT_TICK_PER_SECOND, __RTTHREAD__, CORE_M4, CPU_LPC54608J512ET180=1 - ..\..\..\..\libcpu\arm\cortex-m4;SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers;..\..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\..\components\net\lwip\lwip-2.0.3\src\include;..\..\..\..\components\drivers\include;..\..\..\..\components\drivers\include;drivers;..\..\..\..\components\net\sal\include\socket\sys_socket;..\..\..\..\components\libc\posix\pthreads;..\..\..\..\components\net\lwip\lwip-2.0.3\src\include\ipv4;applications;..\..\..\..\components\dfs\dfs_v1\filesystems\elmfat;..\..\..\..\components\libc\compilers\common\include;..\..\..\..\components\drivers\ktime;..\..\..\..\components\drivers\include;..\..\..\..\components\drivers\include;..\..\..\..\libcpu\arm\common;SDK_2.2_LPCXpresso54608\CMSIS\Include;..\..\..\..\components\net\sal\include\dfs_net;SDK_2.2_LPCXpresso54608\sdmmc_2.1.2\inc;..\..\..\..\components\net\sal\include;..\..\..\..\components\net\sal\include\socket;..\..\..\..\components\finsh;.;..\..\..\..\components\libc\posix\io\epoll;..\..\..\..\components\dfs\dfs_v1\filesystems\devfs;..\..\..\..\components\libc\posix\ipc;..\..\..\..\components\drivers\include;..\..\..\..\include;..\..\..\..\components\net\netdev\include;..\..\..\..\components\libc\posix\io\eventfd;SDK_2.2_LPCXpresso54608\sdmmc_2.1.2\src;..\..\..\..\components\net\lwip\port;..\..\..\..\components\libc\posix\io\poll;..\..\..\..\components\drivers\include;SDK_2.2_LPCXpresso54608\devices\LPC54608;..\..\..\..\components\drivers\include;..\..\..\..\components\drivers\spi;..\..\..\..\components\libc\cplusplus;..\..\..\..\components\net\sal\impl;..\..\..\..\components\libc\compilers\common\extension;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\posix\delay;..\..\..\..\components\drivers\include;..\..\..\..\components\dfs\dfs_v1\include;..\..\..\..\components\net\lwip\lwip-2.0.3\src\include\netif;SDK_2.2_LPCXpresso54608\devices\LPC54608\utilities;..\..\..\..\components\drivers\ktime\inc + ..\..\..\..\libcpu\arm\cortex-m4;SDK_2.2_LPCXpresso54608\devices\LPC54608\drivers;..\..\..\..\components\libc\compilers\common\extension\fcntl\octal;..\..\..\..\components\net\lwip\lwip-2.0.3\src\include;..\..\..\..\components\drivers\include;..\..\..\..\components\drivers\include;drivers;..\..\..\..\components\net\sal\include\socket\sys_socket;..\..\..\..\components\libc\posix\pthreads;..\..\..\..\components\net\lwip\lwip-2.0.3\src\include\ipv4;applications;..\..\..\..\components\dfs\dfs_v1\filesystems\elmfat;..\..\..\..\components\libc\compilers\common\include;..\..\..\..\components\drivers\clock_time;..\..\..\..\components\drivers\include;..\..\..\..\components\drivers\include;..\..\..\..\libcpu\arm\common;SDK_2.2_LPCXpresso54608\CMSIS\Include;..\..\..\..\components\net\sal\include\dfs_net;SDK_2.2_LPCXpresso54608\sdmmc_2.1.2\inc;..\..\..\..\components\net\sal\include;..\..\..\..\components\net\sal\include\socket;..\..\..\..\components\finsh;.;..\..\..\..\components\libc\posix\io\epoll;..\..\..\..\components\dfs\dfs_v1\filesystems\devfs;..\..\..\..\components\libc\posix\ipc;..\..\..\..\components\drivers\include;..\..\..\..\include;..\..\..\..\components\net\netdev\include;..\..\..\..\components\libc\posix\io\eventfd;SDK_2.2_LPCXpresso54608\sdmmc_2.1.2\src;..\..\..\..\components\net\lwip\port;..\..\..\..\components\libc\posix\io\poll;..\..\..\..\components\drivers\include;SDK_2.2_LPCXpresso54608\devices\LPC54608;..\..\..\..\components\drivers\include;..\..\..\..\components\drivers\spi;..\..\..\..\components\libc\cplusplus;..\..\..\..\components\net\sal\impl;..\..\..\..\components\libc\compilers\common\extension;..\..\..\..\components\drivers\include;..\..\..\..\components\libc\posix\delay;..\..\..\..\components\drivers\include;..\..\..\..\components\dfs\dfs_v1\include;..\..\..\..\components\net\lwip\lwip-2.0.3\src\include\netif;SDK_2.2_LPCXpresso54608\devices\LPC54608\utilities;..\..\..\..\components\drivers\clock_time\inc @@ -1422,26 +1422,26 @@ - ktime + clock_time - boottime.c + clock_boottime.c 1 - ..\..\..\..\components\drivers\ktime\src\boottime.c + ..\..\..\..\components\drivers\clock_time\clock_boottime.c - cputimer.c + clock_time_core.c 1 - ..\..\..\..\components\drivers\ktime\src\cputimer.c + ..\..\..\..\components\drivers\clock_time\clock_time_core.c - hrtimer.c + clock_hrtimer.c 1 - ..\..\..\..\components\drivers\ktime\src\hrtimer.c + ..\..\..\..\components\drivers\clock_time\clock_hrtimer.c diff --git a/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/SConscript b/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/SConscript index db8bd4d4096..772d3452bb4 100644 --- a/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/SConscript +++ b/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/SConscript @@ -28,8 +28,8 @@ if GetDepend('BSP_USING_MMA8562I2C'): if GetDepend('BSP_USING_ADC'): src += ['drv_adc.c'] -if GetDepend('BSP_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('BSP_USING_CLOCK_TIMER'): + src += ['drv_timer.c'] if GetDepend('BSP_USING_WDT'): src += ['drv_wdt.c'] diff --git a/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_hwtimer.c b/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_timer.c similarity index 52% rename from bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_hwtimer.c rename to bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_timer.c index de082d8d15e..7c7a75bc577 100644 --- a/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_hwtimer.c +++ b/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_timer.c @@ -12,13 +12,13 @@ */ #include -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER -#define LOG_TAG "drv.hwtimer" +#define LOG_TAG "drv.clock_timer" #include #include -#include "drv_hwtimer.h" +#include "drv_timer.h" #include "fsl_ctimer.h" enum @@ -34,15 +34,15 @@ enum #endif }; -struct lpc_hwtimer +struct lpc_clock_timer { - rt_hwtimer_t time_device; + rt_clock_timer_t time_device; CTIMER_Type* tim_handle; enum IRQn tim_irqn; char* name; }; -static struct lpc_hwtimer lpc_hwtimer_obj[] = +static struct lpc_clock_timer lpc_clock_timer_obj[] = { #ifdef BSP_USING_CTIMER0 TIM1_CONFIG, @@ -72,27 +72,27 @@ static void NVIC_Configuration(void) #endif } -static rt_err_t lpc_ctimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t lpc_ctimer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t err = RT_EOK; - CTIMER_Type *hwtimer_dev; - hwtimer_dev = (CTIMER_Type *)timer->parent.user_data; + CTIMER_Type *clock_timer_dev; + clock_timer_dev = (CTIMER_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; - if(hwtimer_dev == CTIMER0) clk = CLOCK_GetCTimerClkFreq(0U); - if(hwtimer_dev == CTIMER3) clk = CLOCK_GetCTimerClkFreq(3U); - if(hwtimer_dev == CTIMER4) clk = CLOCK_GetCTimerClkFreq(4U); + if(clock_timer_dev == CTIMER0) clk = CLOCK_GetCTimerClkFreq(0U); + if(clock_timer_dev == CTIMER3) clk = CLOCK_GetCTimerClkFreq(3U); + if(clock_timer_dev == CTIMER4) clk = CLOCK_GetCTimerClkFreq(4U); pre = clk / *((uint32_t *)args) - 1; - hwtimer_dev->PR = pre; + clock_timer_dev->PR = pre; } break; default: @@ -102,46 +102,46 @@ static rt_err_t lpc_ctimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *a return err; } -static rt_uint32_t lpc_ctimer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t lpc_ctimer_count_get(rt_clock_timer_t *timer) { rt_uint32_t CurrentTimer_Count; - CTIMER_Type *hwtimer_dev; - hwtimer_dev = (CTIMER_Type *)timer->parent.user_data; + CTIMER_Type *clock_timer_dev; + clock_timer_dev = (CTIMER_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); - CurrentTimer_Count = hwtimer_dev->TC; + CurrentTimer_Count = clock_timer_dev->TC; return CurrentTimer_Count; } -static void lpc_ctimer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void lpc_ctimer_init(rt_clock_timer_t *timer, rt_uint32_t state) { - CTIMER_Type *hwtimer_dev; + CTIMER_Type *clock_timer_dev; ctimer_config_t cfg; - hwtimer_dev = (CTIMER_Type *)timer->parent.user_data; + clock_timer_dev = (CTIMER_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); /* Use Main clock for some of the Ctimers */ - if(hwtimer_dev == CTIMER0) CLOCK_AttachClk(kMAIN_CLK_to_CTIMER0); - if(hwtimer_dev == CTIMER3) CLOCK_AttachClk(kMAIN_CLK_to_CTIMER3); - if(hwtimer_dev == CTIMER4) CLOCK_AttachClk(kMAIN_CLK_to_CTIMER4); + if(clock_timer_dev == CTIMER0) CLOCK_AttachClk(kMAIN_CLK_to_CTIMER0); + if(clock_timer_dev == CTIMER3) CLOCK_AttachClk(kMAIN_CLK_to_CTIMER3); + if(clock_timer_dev == CTIMER4) CLOCK_AttachClk(kMAIN_CLK_to_CTIMER4); - CTIMER_Deinit(hwtimer_dev); + CTIMER_Deinit(clock_timer_dev); if (state == 1) { NVIC_Configuration(); CTIMER_GetDefaultConfig(&cfg); - CTIMER_Init(hwtimer_dev, &cfg); + CTIMER_Init(clock_timer_dev, &cfg); } } -static rt_err_t lpc_ctimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t lpc_ctimer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { - CTIMER_Type *hwtimer_dev; - hwtimer_dev = (CTIMER_Type *)timer->parent.user_data; + CTIMER_Type *clock_timer_dev; + clock_timer_dev = (CTIMER_Type *)timer->parent.user_data; /* Match Configuration for Channel 0 */ ctimer_match_config_t matchCfg; @@ -149,32 +149,32 @@ static rt_err_t lpc_ctimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtime /* Configuration*/ matchCfg.enableCounterReset = true; - matchCfg.enableCounterStop = (mode == HWTIMER_MODE_ONESHOT) ? true : false;; + matchCfg.enableCounterStop = (mode == CLOCK_TIMER_MODE_ONESHOT) ? true : false;; matchCfg.matchValue = cnt; matchCfg.outControl = kCTIMER_Output_NoAction; matchCfg.outPinInitState = false; matchCfg.enableInterrupt = true; - CTIMER_SetupMatch(hwtimer_dev, kCTIMER_Match_1, &matchCfg); + CTIMER_SetupMatch(clock_timer_dev, kCTIMER_Match_1, &matchCfg); NVIC_Configuration(); - CTIMER_StartTimer(hwtimer_dev); + CTIMER_StartTimer(clock_timer_dev); return RT_EOK; } -static void lpc_ctimer_stop(rt_hwtimer_t *timer) +static void lpc_ctimer_stop(rt_clock_timer_t *timer) { - CTIMER_Type *hwtimer_dev; - hwtimer_dev = (CTIMER_Type *)timer->parent.user_data; + CTIMER_Type *clock_timer_dev; + clock_timer_dev = (CTIMER_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); - CTIMER_StopTimer(hwtimer_dev); + CTIMER_StopTimer(clock_timer_dev); } -static const struct rt_hwtimer_ops lpc_hwtimer_ops = +static const struct rt_clock_timer_ops lpc_clock_timer_ops = { .init = lpc_ctimer_init, .start = lpc_ctimer_start, @@ -183,31 +183,31 @@ static const struct rt_hwtimer_ops lpc_hwtimer_ops = .control = lpc_ctimer_control, }; -static const struct rt_hwtimer_info lpc_hwtimer_info = +static const struct rt_clock_timer_info lpc_clock_timer_info = { 25000000, /* the maximum count frequency can be set */ 6103, /* the minimum count frequency can be set */ 0xFFFFFFFF, - HWTIMER_CNTMODE_UP, + CLOCK_TIMER_CNTMODE_UP, }; -int rt_hw_hwtimer_init(void) +int rt_hw_clock_timer_init(void) { int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(lpc_hwtimer_obj) / sizeof(lpc_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(lpc_clock_timer_obj) / sizeof(lpc_clock_timer_obj[0]); i++) { - lpc_hwtimer_obj[i].time_device.info = &lpc_hwtimer_info; - lpc_hwtimer_obj[i].time_device.ops = &lpc_hwtimer_ops; - if (rt_device_hwtimer_register(&lpc_hwtimer_obj[i].time_device, - lpc_hwtimer_obj[i].name, lpc_hwtimer_obj[i].tim_handle) == RT_EOK) + lpc_clock_timer_obj[i].time_device.info = &lpc_clock_timer_info; + lpc_clock_timer_obj[i].time_device.ops = &lpc_clock_timer_ops; + if (rt_clock_timer_register(&lpc_clock_timer_obj[i].time_device, + lpc_clock_timer_obj[i].name, lpc_clock_timer_obj[i].tim_handle) == RT_EOK) { - LOG_D("%s register success", lpc_hwtimer_obj[i].name); + LOG_D("%s register success", lpc_clock_timer_obj[i].name); } else { - LOG_E("%s register failed", lpc_hwtimer_obj[i].name); + LOG_E("%s register failed", lpc_clock_timer_obj[i].name); result = -RT_ERROR; } } @@ -215,7 +215,7 @@ int rt_hw_hwtimer_init(void) return result; } -INIT_DEVICE_EXPORT(rt_hw_hwtimer_init); +INIT_DEVICE_EXPORT(rt_hw_clock_timer_init); #ifdef BSP_USING_CTIMER0 void CTIMER0_IRQHandler(void) @@ -225,10 +225,10 @@ void CTIMER0_IRQHandler(void) int_stat = CTIMER_GetStatusFlags(CTIMER0); /* Clear the status flags that were set */ CTIMER_ClearStatusFlags(CTIMER0, int_stat); - rt_device_hwtimer_isr(&lpc_hwtimer_obj[TIM1_INDEX].time_device); + rt_clock_timer_isr(&lpc_clock_timer_obj[TIM1_INDEX].time_device); } -#endif /* BSP_USING_HWTIMER0 */ +#endif /* BSP_USING_CLOCK_TIMER0 */ #ifdef BSP_USING_CTIMER3 void CTIMER3_IRQHandler(void) @@ -238,10 +238,10 @@ void CTIMER3_IRQHandler(void) int_stat = CTIMER_GetStatusFlags(CTIMER3); /* Clear the status flags that were set */ CTIMER_ClearStatusFlags(CTIMER3, int_stat); - rt_device_hwtimer_isr(&lpc_hwtimer_obj[TIM2_INDEX].time_device); + rt_clock_timer_isr(&lpc_clock_timer_obj[TIM2_INDEX].time_device); } -#endif /* BSP_USING_HWTIMER3 */ +#endif /* BSP_USING_CLOCK_TIMER3 */ #ifdef BSP_USING_CTIMER4 void CTIMER4_IRQHandler(void) @@ -251,10 +251,10 @@ void CTIMER4_IRQHandler(void) int_stat = CTIMER_GetStatusFlags(CTIMER4); /* Clear the status flags that were set */ CTIMER_ClearStatusFlags(CTIMER4, int_stat); - rt_device_hwtimer_isr(&lpc_hwtimer_obj[TIM3_INDEX].time_device); + rt_clock_timer_isr(&lpc_clock_timer_obj[TIM3_INDEX].time_device); } -#endif /* BSP_USING_HWTIMER4 */ +#endif /* BSP_USING_CLOCK_TIMER4 */ -#endif /* BSP_USING_HWTIMER */ +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_hwtimer.h b/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_timer.h similarity index 91% rename from bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_hwtimer.h rename to bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_timer.h index f73aa0ca464..413bd46f778 100644 --- a/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_hwtimer.h +++ b/bsp/nxp/lpc/lpc55sxx/Libraries/drivers/drv_timer.h @@ -8,8 +8,8 @@ * 2018-04-17 WangBing the first version. */ -#ifndef DRV_HWTIMER_H__ -#define DRV_HWTIMER_H__ +#ifndef DRV_CLOCK_TIMER_H__ +#define DRV_CLOCK_TIMER_H__ #include #include @@ -41,7 +41,7 @@ } #endif /* TIM4_CONFIG */ -int rt_hw_hwtimer_init(void); +int rt_hw_clock_timer_init(void); -#endif /* __DRV_HWTIMER_H__ */ +#endif /* __DRV_CLOCK_TIMER_H__ */ diff --git a/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/board/Kconfig b/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/board/Kconfig index 3527467baf5..c593e8e0d3b 100644 --- a/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/board/Kconfig +++ b/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/board/Kconfig @@ -147,13 +147,13 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default y - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config BSP_USING_CTIMER0 bool "Enable CIMER0" default y diff --git a/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.ewp b/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.ewp index bb13acc40fb..5c256fabc33 100644 --- a/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.ewp +++ b/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.ewp @@ -1161,7 +1161,7 @@ $PROJ_DIR$\..\Libraries\drivers\drv_mma8562.c - $PROJ_DIR$\..\Libraries\drivers\drv_hwtimer.c + $PROJ_DIR$\..\Libraries\drivers\drv_timer.c $PROJ_DIR$\..\Libraries\drivers\drv_wdt.c @@ -1221,7 +1221,7 @@ DeviceDrivers - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\i2c_core.c diff --git a/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.uvoptx b/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.uvoptx index 47b39900a16..4974afa91f5 100644 --- a/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.uvoptx +++ b/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.uvoptx @@ -561,8 +561,8 @@ 0 0 0 - ..\Libraries\drivers\drv_hwtimer.c - drv_hwtimer.c + ..\Libraries\drivers\drv_timer.c + drv_timer.c 0 0 @@ -753,8 +753,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.uvprojx b/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.uvprojx index 875610e51f6..0f3ff2ad97f 100644 --- a/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.uvprojx +++ b/bsp/nxp/lpc/lpc55sxx/Libraries/template/lpc55s6xxxx/project.uvprojx @@ -534,9 +534,9 @@ ..\Libraries\drivers\drv_adc.c - drv_hwtimer.c + drv_timer.c 1 - ..\Libraries\drivers\drv_hwtimer.c + ..\Libraries\drivers\drv_timer.c drv_pwm.c @@ -688,9 +688,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c i2c_core.c diff --git a/bsp/nxp/lpc/lpc55sxx/lpc55s06_nxp_evk/board/Kconfig b/bsp/nxp/lpc/lpc55sxx/lpc55s06_nxp_evk/board/Kconfig index 74bdcb8a947..7c47c538fd6 100644 --- a/bsp/nxp/lpc/lpc55sxx/lpc55s06_nxp_evk/board/Kconfig +++ b/bsp/nxp/lpc/lpc55sxx/lpc55s06_nxp_evk/board/Kconfig @@ -149,13 +149,13 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config BSP_USING_CTIMER0 bool "Enable CIMER0" default n diff --git a/bsp/nxp/lpc/lpc55sxx/lpc55s16_nxp_evk/board/Kconfig b/bsp/nxp/lpc/lpc55sxx/lpc55s16_nxp_evk/board/Kconfig index fb85eb0a808..70155de00a4 100644 --- a/bsp/nxp/lpc/lpc55sxx/lpc55s16_nxp_evk/board/Kconfig +++ b/bsp/nxp/lpc/lpc55sxx/lpc55s16_nxp_evk/board/Kconfig @@ -149,13 +149,13 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config BSP_USING_CTIMER0 bool "Enable CIMER0" default n diff --git a/bsp/nxp/lpc/lpc55sxx/lpc55s28_nxp_evk/board/Kconfig b/bsp/nxp/lpc/lpc55sxx/lpc55s28_nxp_evk/board/Kconfig index 4e80e5ec154..0a30acb27c5 100644 --- a/bsp/nxp/lpc/lpc55sxx/lpc55s28_nxp_evk/board/Kconfig +++ b/bsp/nxp/lpc/lpc55sxx/lpc55s28_nxp_evk/board/Kconfig @@ -149,13 +149,13 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config BSP_USING_CTIMER0 bool "Enable CIMER0" default n diff --git a/bsp/nxp/lpc/lpc55sxx/lpc55s36_nxp_evk/board/Kconfig b/bsp/nxp/lpc/lpc55sxx/lpc55s36_nxp_evk/board/Kconfig index 0215acf5303..5862fe32173 100644 --- a/bsp/nxp/lpc/lpc55sxx/lpc55s36_nxp_evk/board/Kconfig +++ b/bsp/nxp/lpc/lpc55sxx/lpc55s36_nxp_evk/board/Kconfig @@ -149,13 +149,13 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config BSP_USING_CTIMER0 bool "Enable CIMER0" default n diff --git a/bsp/nxp/lpc/lpc55sxx/lpc55s69_nxp_evk/board/Kconfig b/bsp/nxp/lpc/lpc55sxx/lpc55s69_nxp_evk/board/Kconfig index 1ca764c2950..10269eb496b 100644 --- a/bsp/nxp/lpc/lpc55sxx/lpc55s69_nxp_evk/board/Kconfig +++ b/bsp/nxp/lpc/lpc55sxx/lpc55s69_nxp_evk/board/Kconfig @@ -260,13 +260,13 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config BSP_USING_CTIMER0 bool "Enable CIMER0" default n diff --git a/bsp/nxp/mcx/mcxa/Libraries/drivers/SConscript b/bsp/nxp/mcx/mcxa/Libraries/drivers/SConscript index da702a27eff..23c9d21d69e 100644 --- a/bsp/nxp/mcx/mcxa/Libraries/drivers/SConscript +++ b/bsp/nxp/mcx/mcxa/Libraries/drivers/SConscript @@ -25,8 +25,8 @@ if GetDepend('BSP_USING_I2C'): if GetDepend('BSP_USING_ADC'): src += ['drv_adc.c'] -if GetDepend('BSP_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('BSP_USING_CLOCK_TIMER'): + src += ['drv_timer.c'] if GetDepend('BSP_USING_WDT'): src += ['drv_wdt.c'] diff --git a/bsp/nxp/mcx/mcxa/Libraries/drivers/drv_hwtimer.c b/bsp/nxp/mcx/mcxa/Libraries/drivers/drv_timer.c similarity index 59% rename from bsp/nxp/mcx/mcxa/Libraries/drivers/drv_hwtimer.c rename to bsp/nxp/mcx/mcxa/Libraries/drivers/drv_timer.c index 78b1e1e49a2..e6d9a70bd4c 100644 --- a/bsp/nxp/mcx/mcxa/Libraries/drivers/drv_hwtimer.c +++ b/bsp/nxp/mcx/mcxa/Libraries/drivers/drv_timer.c @@ -10,9 +10,9 @@ */ #include -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER -#define LOG_TAG "drv.hwtimer" +#define LOG_TAG "drv.clock_timer" #include #include #include "fsl_ctimer.h" @@ -57,15 +57,15 @@ enum } #endif /* TIM2_CONFIG */ -struct mcxa_hwtimer +struct mcxa_clock_timer { - rt_hwtimer_t time_device; + rt_clock_timer_t time_device; CTIMER_Type* tim_handle; enum IRQn tim_irqn; char* name; }; -static struct mcxa_hwtimer mcxa_hwtimer_obj[] = +static struct mcxa_clock_timer mcxa_clock_timer_obj[] = { #ifdef BSP_USING_CTIMER0 TIM0_CONFIG, @@ -95,27 +95,27 @@ static void NVIC_Configuration(void) #endif } -static rt_err_t mcxa_ctimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t mcxa_ctimer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t err = RT_EOK; - CTIMER_Type *hwtimer_dev; - hwtimer_dev = (CTIMER_Type *)timer->parent.user_data; + CTIMER_Type *clock_timer_dev; + clock_timer_dev = (CTIMER_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { uint32_t clk; uint32_t pre; - if(hwtimer_dev == CTIMER0) clk = CLOCK_GetCTimerClkFreq(0U); - if(hwtimer_dev == CTIMER1) clk = CLOCK_GetCTimerClkFreq(1U); - if(hwtimer_dev == CTIMER2) clk = CLOCK_GetCTimerClkFreq(2U); + if(clock_timer_dev == CTIMER0) clk = CLOCK_GetCTimerClkFreq(0U); + if(clock_timer_dev == CTIMER1) clk = CLOCK_GetCTimerClkFreq(1U); + if(clock_timer_dev == CTIMER2) clk = CLOCK_GetCTimerClkFreq(2U); pre = clk / *((uint32_t *)args) - 1; - hwtimer_dev->PR = pre; + clock_timer_dev->PR = pre; } break; default: @@ -125,46 +125,46 @@ static rt_err_t mcxa_ctimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void * return err; } -static rt_uint32_t mcxa_ctimer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t mcxa_ctimer_count_get(rt_clock_timer_t *timer) { rt_uint32_t CurrentTimer_Count; - CTIMER_Type *hwtimer_dev; - hwtimer_dev = (CTIMER_Type *)timer->parent.user_data; + CTIMER_Type *clock_timer_dev; + clock_timer_dev = (CTIMER_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); - CurrentTimer_Count = hwtimer_dev->TC; + CurrentTimer_Count = clock_timer_dev->TC; return CurrentTimer_Count; } -static void mcxa_ctimer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void mcxa_ctimer_init(rt_clock_timer_t *timer, rt_uint32_t state) { - CTIMER_Type *hwtimer_dev; + CTIMER_Type *clock_timer_dev; ctimer_config_t cfg; - hwtimer_dev = (CTIMER_Type *)timer->parent.user_data; + clock_timer_dev = (CTIMER_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); /* Use Main clock for some of the Ctimers */ - if(hwtimer_dev == CTIMER0) CLOCK_AttachClk(kFRO_HF_to_CTIMER0); - if(hwtimer_dev == CTIMER1) CLOCK_AttachClk(kFRO_HF_to_CTIMER1); - if(hwtimer_dev == CTIMER2) CLOCK_AttachClk(kFRO_HF_to_CTIMER2); + if(clock_timer_dev == CTIMER0) CLOCK_AttachClk(kFRO_HF_to_CTIMER0); + if(clock_timer_dev == CTIMER1) CLOCK_AttachClk(kFRO_HF_to_CTIMER1); + if(clock_timer_dev == CTIMER2) CLOCK_AttachClk(kFRO_HF_to_CTIMER2); - CTIMER_Init(hwtimer_dev, &cfg); + CTIMER_Init(clock_timer_dev, &cfg); if (state == 1) { NVIC_Configuration(); CTIMER_GetDefaultConfig(&cfg); - CTIMER_Init(hwtimer_dev, &cfg); + CTIMER_Init(clock_timer_dev, &cfg); } } -static rt_err_t mcxa_ctimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t mcxa_ctimer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { - CTIMER_Type *hwtimer_dev; - hwtimer_dev = (CTIMER_Type *)timer->parent.user_data; + CTIMER_Type *clock_timer_dev; + clock_timer_dev = (CTIMER_Type *)timer->parent.user_data; /* Match Configuration for Channel 0 */ ctimer_match_config_t matchCfg; @@ -172,32 +172,32 @@ static rt_err_t mcxa_ctimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtim /* Configuration*/ matchCfg.enableCounterReset = true; - matchCfg.enableCounterStop = (mode == HWTIMER_MODE_ONESHOT) ? true : false;; + matchCfg.enableCounterStop = (mode == CLOCK_TIMER_MODE_ONESHOT) ? true : false;; matchCfg.matchValue = cnt; matchCfg.outControl = kCTIMER_Output_NoAction; matchCfg.outPinInitState = false; matchCfg.enableInterrupt = true; - CTIMER_SetupMatch(hwtimer_dev, kCTIMER_Match_1, &matchCfg); + CTIMER_SetupMatch(clock_timer_dev, kCTIMER_Match_1, &matchCfg); NVIC_Configuration(); - CTIMER_StartTimer(hwtimer_dev); + CTIMER_StartTimer(clock_timer_dev); return RT_EOK; } -static void mcxa_ctimer_stop(rt_hwtimer_t *timer) +static void mcxa_ctimer_stop(rt_clock_timer_t *timer) { - CTIMER_Type *hwtimer_dev; - hwtimer_dev = (CTIMER_Type *)timer->parent.user_data; + CTIMER_Type *clock_timer_dev; + clock_timer_dev = (CTIMER_Type *)timer->parent.user_data; RT_ASSERT(timer != RT_NULL); - CTIMER_StopTimer(hwtimer_dev); + CTIMER_StopTimer(clock_timer_dev); } -static const struct rt_hwtimer_ops mcxa_hwtimer_ops = +static const struct rt_clock_timer_ops mcxa_clock_timer_ops = { .init = mcxa_ctimer_init, .start = mcxa_ctimer_start, @@ -206,31 +206,31 @@ static const struct rt_hwtimer_ops mcxa_hwtimer_ops = .control = mcxa_ctimer_control, }; -static const struct rt_hwtimer_info mcxa_hwtimer_info = +static const struct rt_clock_timer_info mcxa_clock_timer_info = { 96000000, /* the maximum count frequency can be set */ 6103, /* the minimum count frequency can be set */ 0xFFFFFFFF, - HWTIMER_CNTMODE_UP, + CLOCK_TIMER_CNTMODE_UP, }; -int rt_hw_hwtimer_init(void) +int rt_hw_clock_timer_init(void) { int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(mcxa_hwtimer_obj) / sizeof(mcxa_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(mcxa_clock_timer_obj) / sizeof(mcxa_clock_timer_obj[0]); i++) { - mcxa_hwtimer_obj[i].time_device.info = &mcxa_hwtimer_info; - mcxa_hwtimer_obj[i].time_device.ops = &mcxa_hwtimer_ops; - if (rt_device_hwtimer_register(&mcxa_hwtimer_obj[i].time_device, - mcxa_hwtimer_obj[i].name, mcxa_hwtimer_obj[i].tim_handle) == RT_EOK) + mcxa_clock_timer_obj[i].time_device.info = &mcxa_clock_timer_info; + mcxa_clock_timer_obj[i].time_device.ops = &mcxa_clock_timer_ops; + if (rt_clock_timer_register(&mcxa_clock_timer_obj[i].time_device, + mcxa_clock_timer_obj[i].name, mcxa_clock_timer_obj[i].tim_handle) == RT_EOK) { - LOG_D("%s register success", mcxa_hwtimer_obj[i].name); + LOG_D("%s register success", mcxa_clock_timer_obj[i].name); } else { - LOG_E("%s register failed", mcxa_hwtimer_obj[i].name); + LOG_E("%s register failed", mcxa_clock_timer_obj[i].name); result = -RT_ERROR; } } @@ -238,7 +238,7 @@ int rt_hw_hwtimer_init(void) return result; } -INIT_DEVICE_EXPORT(rt_hw_hwtimer_init); +INIT_DEVICE_EXPORT(rt_hw_clock_timer_init); #ifdef BSP_USING_CTIMER0 void CTIMER0_IRQHandler(void) @@ -249,10 +249,10 @@ void CTIMER0_IRQHandler(void) int_stat = CTIMER_GetStatusFlags(CTIMER0); /* Clear the status flags that were set */ CTIMER_ClearStatusFlags(CTIMER0, int_stat); - rt_device_hwtimer_isr(&mcxa_hwtimer_obj[TIM0_INDEX].time_device); + rt_clock_timer_isr(&mcxa_clock_timer_obj[TIM0_INDEX].time_device); rt_interrupt_leave(); } -#endif /* BSP_USING_HWTIMER0 */ +#endif /* BSP_USING_CLOCK_TIMER0 */ #ifdef BSP_USING_CTIMER1 void CTIMER1_IRQHandler(void) @@ -263,10 +263,10 @@ void CTIMER1_IRQHandler(void) int_stat = CTIMER_GetStatusFlags(CTIMER1); /* Clear the status flags that were set */ CTIMER_ClearStatusFlags(CTIMER1, int_stat); - rt_device_hwtimer_isr(&mcxa_hwtimer_obj[TIM1_INDEX].time_device); + rt_clock_timer_isr(&mcxa_clock_timer_obj[TIM1_INDEX].time_device); rt_interrupt_leave(); } -#endif /* BSP_USING_HWTIMER1 */ +#endif /* BSP_USING_CLOCK_TIMER1 */ #ifdef BSP_USING_CTIMER2 void CTIMER2_IRQHandler(void) @@ -277,10 +277,10 @@ void CTIMER2_IRQHandler(void) int_stat = CTIMER_GetStatusFlags(CTIMER2); /* Clear the status flags that were set */ CTIMER_ClearStatusFlags(CTIMER2, int_stat); - rt_device_hwtimer_isr(&mcxa_hwtimer_obj[TIM2_INDEX].time_device); + rt_clock_timer_isr(&mcxa_clock_timer_obj[TIM2_INDEX].time_device); rt_interrupt_leave(); } -#endif /* BSP_USING_HWTIMER2 */ +#endif /* BSP_USING_CLOCK_TIMER2 */ -#endif /* BSP_USING_HWTIMER */ +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa153/board/Kconfig b/bsp/nxp/mcx/mcxa/frdm-mcxa153/board/Kconfig index bfb840f9309..0f2b4d1af68 100644 --- a/bsp/nxp/mcx/mcxa/frdm-mcxa153/board/Kconfig +++ b/bsp/nxp/mcx/mcxa/frdm-mcxa153/board/Kconfig @@ -101,13 +101,13 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Hardware Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default y - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config BSP_USING_CTIMER0 bool "Enable CIMER0" default y diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa153/project.uvprojx b/bsp/nxp/mcx/mcxa/frdm-mcxa153/project.uvprojx index a5b1108738b..314e0b45f28 100644 --- a/bsp/nxp/mcx/mcxa/frdm-mcxa153/project.uvprojx +++ b/bsp/nxp/mcx/mcxa/frdm-mcxa153/project.uvprojx @@ -470,9 +470,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\..\..\components\drivers\clock_time\clock_timer.c diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/Kconfig b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/Kconfig index bc13fcdb5c8..87f3becb62f 100644 --- a/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/Kconfig +++ b/bsp/nxp/mcx/mcxa/frdm-mcxa156/board/Kconfig @@ -108,13 +108,13 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default y - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config BSP_USING_CTIMER0 bool "Enable CIMER0" default y diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa156/project.uvoptx b/bsp/nxp/mcx/mcxa/frdm-mcxa156/project.uvoptx index 41ae9542dc6..f857145a920 100644 --- a/bsp/nxp/mcx/mcxa/frdm-mcxa156/project.uvoptx +++ b/bsp/nxp/mcx/mcxa/frdm-mcxa156/project.uvoptx @@ -325,8 +325,8 @@ 0 0 0 - ..\..\..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa156/project.uvprojx b/bsp/nxp/mcx/mcxa/frdm-mcxa156/project.uvprojx index 4e8d74e1291..2f93edb8109 100644 --- a/bsp/nxp/mcx/mcxa/frdm-mcxa156/project.uvprojx +++ b/bsp/nxp/mcx/mcxa/frdm-mcxa156/project.uvprojx @@ -496,9 +496,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa346/board/Kconfig b/bsp/nxp/mcx/mcxa/frdm-mcxa346/board/Kconfig index a8eb2bd4bda..dc23ca3fc56 100644 --- a/bsp/nxp/mcx/mcxa/frdm-mcxa346/board/Kconfig +++ b/bsp/nxp/mcx/mcxa/frdm-mcxa346/board/Kconfig @@ -80,13 +80,13 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default y - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config BSP_USING_CTIMER0 bool "Enable CIMER0" default y diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa346/project.uvoptx b/bsp/nxp/mcx/mcxa/frdm-mcxa346/project.uvoptx index 56d3a78b4df..181dd9c7abb 100644 --- a/bsp/nxp/mcx/mcxa/frdm-mcxa346/project.uvoptx +++ b/bsp/nxp/mcx/mcxa/frdm-mcxa346/project.uvoptx @@ -342,8 +342,8 @@ 0 0 0 - ..\..\..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nxp/mcx/mcxa/frdm-mcxa346/project.uvprojx b/bsp/nxp/mcx/mcxa/frdm-mcxa346/project.uvprojx index a4553409c63..4d66d9c031f 100644 --- a/bsp/nxp/mcx/mcxa/frdm-mcxa346/project.uvprojx +++ b/bsp/nxp/mcx/mcxa/frdm-mcxa346/project.uvprojx @@ -501,9 +501,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nxp/mcx/mcxc/Libraries/drivers/SConscript b/bsp/nxp/mcx/mcxc/Libraries/drivers/SConscript index aedc385849a..fc9fc7c0d50 100644 --- a/bsp/nxp/mcx/mcxc/Libraries/drivers/SConscript +++ b/bsp/nxp/mcx/mcxc/Libraries/drivers/SConscript @@ -28,8 +28,8 @@ if GetDepend('BSP_USING_ADC'): if GetDepend('BSP_USING_DAC'): src += ['drv_dac.c'] -if GetDepend('BSP_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('BSP_USING_CLOCK_TIMER'): + src += ['drv_timer.c'] if GetDepend('BSP_USING_WDT'): src += ['drv_wdt.c'] diff --git a/bsp/nxp/mcx/mcxc/frdm-mcxc444/board/Kconfig b/bsp/nxp/mcx/mcxc/frdm-mcxc444/board/Kconfig index 7800112a42c..5a3a20c92ba 100644 --- a/bsp/nxp/mcx/mcxc/frdm-mcxc444/board/Kconfig +++ b/bsp/nxp/mcx/mcxc/frdm-mcxc444/board/Kconfig @@ -75,10 +75,10 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default y menuconfig BSP_USING_PWM diff --git a/bsp/nxp/mcx/mcxc/frdm-mcxc444/project.ewp b/bsp/nxp/mcx/mcxc/frdm-mcxc444/project.ewp index 3d335daa094..9159d378345 100644 --- a/bsp/nxp/mcx/mcxc/frdm-mcxc444/project.ewp +++ b/bsp/nxp/mcx/mcxc/frdm-mcxc444/project.ewp @@ -2318,7 +2318,7 @@ $PROJ_DIR$\..\..\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\..\..\components\drivers\i2c\dev_i2c_bit_ops.c diff --git a/bsp/nxp/mcx/mcxc/frdm-mcxc444/project.uvprojx b/bsp/nxp/mcx/mcxc/frdm-mcxc444/project.uvprojx index ac03bd3d3db..6bde6e67c0e 100644 --- a/bsp/nxp/mcx/mcxc/frdm-mcxc444/project.uvprojx +++ b/bsp/nxp/mcx/mcxc/frdm-mcxc444/project.uvprojx @@ -470,9 +470,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\..\..\components\drivers\clock_time\clock_timer.c diff --git a/bsp/nxp/mcx/mcxe/Libraries/drivers/SConscript b/bsp/nxp/mcx/mcxe/Libraries/drivers/SConscript index 9a9f0979d13..3f71a3e0bbb 100644 --- a/bsp/nxp/mcx/mcxe/Libraries/drivers/SConscript +++ b/bsp/nxp/mcx/mcxe/Libraries/drivers/SConscript @@ -22,8 +22,8 @@ if GetDepend('BSP_USING_I2C'): if GetDepend('BSP_USING_ADC'): src += ['drv_adc.c'] -if GetDepend('BSP_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('BSP_USING_CLOCK_TIMER'): + src += ['drv_timer.c'] if GetDepend('BSP_USING_WDT'): src += ['drv_wdt.c'] diff --git a/bsp/nxp/mcx/mcxe/frdm-mcxe247/board/Kconfig b/bsp/nxp/mcx/mcxe/frdm-mcxe247/board/Kconfig index 2738f1136a0..de3a7a083a4 100644 --- a/bsp/nxp/mcx/mcxe/frdm-mcxe247/board/Kconfig +++ b/bsp/nxp/mcx/mcxe/frdm-mcxe247/board/Kconfig @@ -97,13 +97,13 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default y - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config BSP_USING_CTIMER0 bool "Enable CIMER0" default y diff --git a/bsp/nxp/mcx/mcxe/frdm-mcxe247/project.uvoptx b/bsp/nxp/mcx/mcxe/frdm-mcxe247/project.uvoptx index d8f793c2436..d87e74043cf 100644 --- a/bsp/nxp/mcx/mcxe/frdm-mcxe247/project.uvoptx +++ b/bsp/nxp/mcx/mcxe/frdm-mcxe247/project.uvoptx @@ -335,8 +335,8 @@ 0 0 0 - ..\..\..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nxp/mcx/mcxe/frdm-mcxe247/project.uvprojx b/bsp/nxp/mcx/mcxe/frdm-mcxe247/project.uvprojx index b800d913226..9b1fce77b09 100644 --- a/bsp/nxp/mcx/mcxe/frdm-mcxe247/project.uvprojx +++ b/bsp/nxp/mcx/mcxe/frdm-mcxe247/project.uvprojx @@ -501,9 +501,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nxp/mcx/mcxn/Libraries/drivers/SConscript b/bsp/nxp/mcx/mcxn/Libraries/drivers/SConscript index c193f1f106d..1dee3db3560 100644 --- a/bsp/nxp/mcx/mcxn/Libraries/drivers/SConscript +++ b/bsp/nxp/mcx/mcxn/Libraries/drivers/SConscript @@ -34,8 +34,8 @@ if GetDepend('BSP_USING_DAC'): if GetDepend('BSP_USING_CAN'): src += ['drv_can.c'] -if GetDepend('BSP_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('BSP_USING_CLOCK_TIMER'): + src += ['drv_timer.c'] if GetDepend('BSP_USING_WDT'): src += ['drv_wdt.c'] diff --git a/bsp/nxp/mcx/mcxn/Libraries/drivers/drv_hwtimer.c b/bsp/nxp/mcx/mcxn/Libraries/drivers/drv_timer.c similarity index 50% rename from bsp/nxp/mcx/mcxn/Libraries/drivers/drv_hwtimer.c rename to bsp/nxp/mcx/mcxn/Libraries/drivers/drv_timer.c index cd65c534c67..82aa231f4e8 100644 --- a/bsp/nxp/mcx/mcxn/Libraries/drivers/drv_hwtimer.c +++ b/bsp/nxp/mcx/mcxn/Libraries/drivers/drv_timer.c @@ -8,29 +8,29 @@ * 2024-02-21 Yilin Sun Initial revision. */ -#include "drv_hwtimer.h" +#include "drv_timer.h" -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER #include "fsl_mrt.h" typedef struct { - rt_hwtimer_t timer_device; + rt_clock_timer_t timer_device; mrt_chnl_t channel; char *name; -} mcx_hwtimer_obj_t; +} mcx_clock_timer_obj_t; -static inline rt_err_t mcx_hwtimer_mode_set(mcx_hwtimer_obj_t *handle, rt_hwtimer_mode_t mode) +static inline rt_err_t mcx_clock_timer_mode_set(mcx_clock_timer_obj_t *handle, rt_clock_timer_mode_t mode) { mrt_timer_mode_t mrt_mode; switch (mode) { - case HWTIMER_MODE_ONESHOT: + case CLOCK_TIMER_MODE_ONESHOT: mrt_mode = kMRT_OneShotMode; break; - case HWTIMER_MODE_PERIOD: + case CLOCK_TIMER_MODE_PERIOD: mrt_mode = kMRT_RepeatMode; break; @@ -43,7 +43,7 @@ static inline rt_err_t mcx_hwtimer_mode_set(mcx_hwtimer_obj_t *handle, rt_hwtime return RT_EOK; } -static void mcx_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void mcx_clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { mrt_config_t mrt_config; MRT_GetDefaultConfig(&mrt_config); @@ -51,15 +51,15 @@ static void mcx_hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) MRT_Init(MRT0, &mrt_config); } -static rt_err_t mcx_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t mcx_clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { rt_err_t ret = RT_EOK; - mcx_hwtimer_obj_t *handle = timer->parent.user_data; + mcx_clock_timer_obj_t *handle = timer->parent.user_data; MRT_StopTimer(MRT0, handle->channel); - ret = mcx_hwtimer_mode_set(handle, mode); + ret = mcx_clock_timer_mode_set(handle, mode); if (ret != RT_EOK) { return ret; @@ -71,33 +71,33 @@ static rt_err_t mcx_hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtim return ret; } -static void mcx_hwtimer_stop(rt_hwtimer_t *timer) +static void mcx_clock_timer_stop(rt_clock_timer_t *timer) { - mcx_hwtimer_obj_t *handle = timer->parent.user_data; + mcx_clock_timer_obj_t *handle = timer->parent.user_data; MRT_StopTimer(MRT0, handle->channel); MRT_DisableInterrupts(MRT0, handle->channel, kMRT_TimerInterruptEnable); } -static rt_uint32_t mcx_hwtimer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t mcx_clock_timer_count_get(rt_clock_timer_t *timer) { - mcx_hwtimer_obj_t *handle = timer->parent.user_data; + mcx_clock_timer_obj_t *handle = timer->parent.user_data; return MRT_GetCurrentTimerCount(MRT0, handle->channel); } -static rt_err_t mcx_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t mcx_clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t ret = RT_EOK; - mcx_hwtimer_obj_t *handle = timer->parent.user_data; + mcx_clock_timer_obj_t *handle = timer->parent.user_data; switch (cmd) { - case HWTIMER_CTRL_STOP: - mcx_hwtimer_stop(timer); + case CLOCK_TIMER_CTRL_STOP: + mcx_clock_timer_stop(timer); break; - case HWTIMER_CTRL_MODE_SET: - ret = mcx_hwtimer_mode_set(handle, *(rt_hwtimer_mode_t *)args); + case CLOCK_TIMER_CTRL_MODE_SET: + ret = mcx_clock_timer_mode_set(handle, *(rt_clock_timer_mode_t *)args); if (ret != RT_EOK) { return ret; @@ -111,7 +111,7 @@ static rt_err_t mcx_hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void * return RT_EOK; } -static mcx_hwtimer_obj_t mcx_hwtimer_list[] = +static mcx_clock_timer_obj_t mcx_clock_timer_list[] = { { .name = "timer0", .channel = kMRT_Channel_0, }, { .name = "timer1", .channel = kMRT_Channel_1, }, @@ -119,37 +119,37 @@ static mcx_hwtimer_obj_t mcx_hwtimer_list[] = { .name = "timer3", .channel = kMRT_Channel_3, }, }; -static struct rt_hwtimer_info mcx_hwtimer_info = +static struct rt_clock_timer_info mcx_clock_timer_info = { - .cntmode = HWTIMER_CNTMODE_DW, + .cntmode = CLOCK_TIMER_CNTMODE_DW, .maxcnt = 0x00FFFFFF, /* 24bit counter */ .minfreq = 150000000, .maxfreq = 150000000, }; -static const struct rt_hwtimer_ops mcx_hwtimer_ops = +static const struct rt_clock_timer_ops mcx_clock_timer_ops = { - .init = mcx_hwtimer_init, - .control = mcx_hwtimer_control, - .start = mcx_hwtimer_start, - .stop = mcx_hwtimer_stop, - .count_get = mcx_hwtimer_count_get, + .init = mcx_clock_timer_init, + .control = mcx_clock_timer_control, + .start = mcx_clock_timer_start, + .stop = mcx_clock_timer_stop, + .count_get = mcx_clock_timer_count_get, }; -int rt_hw_hwtimer_init(void) +int rt_hw_clock_timer_init(void) { /* MRT frequency is fixed to AHB clock */ uint32_t mrt_freq = CLOCK_GetFreq(kCLOCK_BusClk); - mcx_hwtimer_info.minfreq = mrt_freq; - mcx_hwtimer_info.maxfreq = mrt_freq; + mcx_clock_timer_info.minfreq = mrt_freq; + mcx_clock_timer_info.maxfreq = mrt_freq; - for (uint8_t i = 0; i < ARRAY_SIZE(mcx_hwtimer_list); i++) + for (uint8_t i = 0; i < ARRAY_SIZE(mcx_clock_timer_list); i++) { - mcx_hwtimer_list[i].timer_device.info = &mcx_hwtimer_info; - mcx_hwtimer_list[i].timer_device.ops = &mcx_hwtimer_ops; + mcx_clock_timer_list[i].timer_device.info = &mcx_clock_timer_info; + mcx_clock_timer_list[i].timer_device.ops = &mcx_clock_timer_ops; - rt_err_t ret = rt_device_hwtimer_register(&mcx_hwtimer_list[i].timer_device, mcx_hwtimer_list[i].name, &mcx_hwtimer_list[i]); + rt_err_t ret = rt_clock_timer_register(&mcx_clock_timer_list[i].timer_device, mcx_clock_timer_list[i].name, &mcx_clock_timer_list[i]); if (ret != RT_EOK) { return ret; @@ -173,11 +173,11 @@ void MRT0_IRQHandler(void) { if (mrt_flag & (1U << i)) { - rt_device_hwtimer_isr(&mcx_hwtimer_list[i].timer_device); + rt_clock_timer_isr(&mcx_clock_timer_list[i].timer_device); } } } -INIT_DEVICE_EXPORT(rt_hw_hwtimer_init); +INIT_DEVICE_EXPORT(rt_hw_clock_timer_init); -#endif /* BSP_USING_HWTIMER */ +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/nxp/mcx/mcxn/Libraries/drivers/drv_hwtimer.h b/bsp/nxp/mcx/mcxn/Libraries/drivers/drv_timer.h similarity index 66% rename from bsp/nxp/mcx/mcxn/Libraries/drivers/drv_hwtimer.h rename to bsp/nxp/mcx/mcxn/Libraries/drivers/drv_timer.h index 5a9c5cbebac..ab1dfb444e5 100644 --- a/bsp/nxp/mcx/mcxn/Libraries/drivers/drv_hwtimer.h +++ b/bsp/nxp/mcx/mcxn/Libraries/drivers/drv_timer.h @@ -8,13 +8,13 @@ * 2024-02-21 Yilin Sun Initial revision. */ -#ifndef __DRV_HWTIMER_H__ -#define __DRV_HWTIMER_H__ +#ifndef __DRV_CLOCK_TIMER_H__ +#define __DRV_CLOCK_TIMER_H__ #include #include -int rt_hw_hwtimer_init(void); +int rt_hw_clock_timer_init(void); -#endif /* __DRV_HWTIMER_H__ */ +#endif /* __DRV_CLOCK_TIMER_H__ */ diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn236/board/Kconfig b/bsp/nxp/mcx/mcxn/frdm-mcxn236/board/Kconfig index 7a99272d420..95d456e6256 100644 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn236/board/Kconfig +++ b/bsp/nxp/mcx/mcxn/frdm-mcxn236/board/Kconfig @@ -187,10 +187,10 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default y menuconfig BSP_USING_PWM diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.ewp b/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.ewp index cebc66c1d8b..5b802c56507 100644 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.ewp +++ b/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.ewp @@ -2296,7 +2296,7 @@ $PROJ_DIR$\..\..\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\..\..\components\drivers\ipc\completion_comm.c diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.uvoptx b/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.uvoptx index 7b158725d5c..72917fbb7dd 100644 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.uvoptx +++ b/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.uvoptx @@ -337,8 +337,8 @@ 0 0 0 - ..\..\..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.uvprojx b/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.uvprojx index 95bd03e7333..96bf0522ad5 100644 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.uvprojx +++ b/bsp/nxp/mcx/mcxn/frdm-mcxn236/project.uvprojx @@ -552,9 +552,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\..\..\components\drivers\clock_time\clock_timer.c 2 diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/Kconfig b/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/Kconfig index 3457ec51b19..5717cd092fe 100644 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/Kconfig +++ b/bsp/nxp/mcx/mcxn/frdm-mcxn947/board/Kconfig @@ -166,10 +166,10 @@ menu "On-chip Peripheral Drivers" select RT_USING_WDT default n - menuconfig BSP_USING_HWTIMER - config BSP_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + config BSP_USING_CLOCK_TIMER bool "Enable Timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default y menuconfig BSP_USING_PWM diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn947/project.ewp b/bsp/nxp/mcx/mcxn/frdm-mcxn947/project.ewp index 4ae265a7ecb..76c5d5b8351 100644 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn947/project.ewp +++ b/bsp/nxp/mcx/mcxn/frdm-mcxn947/project.ewp @@ -2332,7 +2332,7 @@ $PROJ_DIR$\..\..\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\..\..\components\drivers\ipc\completion_comm.c diff --git a/bsp/nxp/mcx/mcxn/frdm-mcxn947/project.uvprojx b/bsp/nxp/mcx/mcxn/frdm-mcxn947/project.uvprojx index c06d4f4eac3..df92d1e302e 100644 --- a/bsp/nxp/mcx/mcxn/frdm-mcxn947/project.uvprojx +++ b/bsp/nxp/mcx/mcxn/frdm-mcxn947/project.uvprojx @@ -470,9 +470,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\..\..\components\drivers\clock_time\clock_timer.c diff --git a/bsp/raspberry-pi/raspi3-32/applications/test_device.c b/bsp/raspberry-pi/raspi3-32/applications/test_device.c index 69b6e840fa5..a071bf88440 100644 --- a/bsp/raspberry-pi/raspi3-32/applications/test_device.c +++ b/bsp/raspberry-pi/raspi3-32/applications/test_device.c @@ -13,7 +13,7 @@ #include #include #include -#include +#include #include #include @@ -237,15 +237,15 @@ static rt_err_t timer_timeout_cb(rt_device_t dev, rt_size_t size) return 0; } #endif -rt_err_t test_hwtimer(void) +rt_err_t test_clock_timer(void) { #ifdef BSP_USING_SYSTIMER rt_kprintf("Hello Test HW Timer!\n"); rt_err_t err; - rt_hwtimerval_t val; + rt_clock_timerval_t val; rt_device_t dev = RT_NULL; rt_tick_t tick; - rt_hwtimer_mode_t mode; + rt_clock_timer_mode_t mode; int t = 5; if ((dev = rt_device_find(TIMER)) == RT_NULL) @@ -260,8 +260,8 @@ rt_err_t test_hwtimer(void) return -1; } - mode = HWTIMER_MODE_PERIOD; - err = rt_device_control(dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + err = rt_device_control(dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); tick = rt_tick_get(); rt_kprintf("Start Timer> Tick: %d\n", tick); @@ -277,7 +277,7 @@ rt_err_t test_hwtimer(void) rt_kprintf("Sleep %d sec\n", t); rt_thread_delay(t*RT_TICK_PER_SECOND); - err = rt_device_control(dev, HWTIMER_CTRL_STOP, RT_NULL); + err = rt_device_control(dev, CLOCK_TIMER_CTRL_STOP, RT_NULL); rt_kprintf("Timer Stoped\n"); rt_device_read(dev, 0, &val, sizeof(val)); @@ -285,8 +285,8 @@ rt_err_t test_hwtimer(void) rt_device_set_rx_indicate(dev, timer_timeout_cb); - mode = HWTIMER_MODE_PERIOD; - err = rt_device_control(dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + err = rt_device_control(dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); val.sec = t; val.usec = 0; @@ -436,9 +436,9 @@ void test_device(int argc, char**argv) return; } - if (0 == strcmp(argv[1],"hwtimer")) + if (0 == strcmp(argv[1],"clock_timer")) { - test_hwtimer(); + test_clock_timer(); return; } @@ -458,6 +458,6 @@ void test_device(int argc, char**argv) test_hdmi(); return; } - rt_kprintf("param err, please entry test_device \n"); + rt_kprintf("param err, please entry test_device \n"); } -MSH_CMD_EXPORT(test_device, sample: test_device ); +MSH_CMD_EXPORT(test_device, sample: test_device ); diff --git a/bsp/raspberry-pi/raspi3-32/driver/Kconfig b/bsp/raspberry-pi/raspi3-32/driver/Kconfig index c7e7c85597f..098082732e0 100644 --- a/bsp/raspberry-pi/raspi3-32/driver/Kconfig +++ b/bsp/raspberry-pi/raspi3-32/driver/Kconfig @@ -22,7 +22,7 @@ menu "Hardware Drivers Config" menuconfig BSP_USING_SYSTIMER bool "Enable SYSTIMER" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n if BSP_USING_SYSTIMER diff --git a/bsp/raspberry-pi/raspi3-32/driver/drv_timer.c b/bsp/raspberry-pi/raspi3-32/driver/drv_timer.c index 117026e91c0..edecb51ed50 100644 --- a/bsp/raspberry-pi/raspi3-32/driver/drv_timer.c +++ b/bsp/raspberry-pi/raspi3-32/driver/drv_timer.c @@ -12,19 +12,19 @@ #ifdef BSP_USING_SYSTIMER -static void raspi_systimer_init(rt_hwtimer_t *hwtimer, rt_uint32_t state) +static void raspi_systimer_init(rt_clock_timer_t *clock_timer, rt_uint32_t state) { if (state == 0) - hwtimer->ops->stop(hwtimer); + clock_timer->ops->stop(clock_timer); } -static rt_err_t raspi_systimer_start(rt_hwtimer_t *hwtimer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t raspi_systimer_start(rt_clock_timer_t *clock_timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { rt_err_t result = RT_EOK; - rt_systimer_t *timer = (rt_systimer_t *)hwtimer->parent.user_data; + rt_systimer_t *timer = (rt_systimer_t *)clock_timer->parent.user_data; int timer_id = timer->timer_id; - if (mode == HWTIMER_MODE_PERIOD) + if (mode == CLOCK_TIMER_MODE_PERIOD) timer->cnt = cnt; else timer->cnt = 0; @@ -48,9 +48,9 @@ static rt_err_t raspi_systimer_start(rt_hwtimer_t *hwtimer, rt_uint32_t cnt, rt_ return result; } -static void raspi_systimer_stop(rt_hwtimer_t *hwtimer) +static void raspi_systimer_stop(rt_clock_timer_t *clock_timer) { - rt_systimer_t *timer = (rt_systimer_t *)hwtimer->parent.user_data; + rt_systimer_t *timer = (rt_systimer_t *)clock_timer->parent.user_data; int timer_id = timer->timer_id; if (timer_id == 1) rt_hw_interrupt_mask(IRQ_SYSTEM_TIMER_1); @@ -59,10 +59,10 @@ static void raspi_systimer_stop(rt_hwtimer_t *hwtimer) } -static rt_err_t raspi_systimer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t raspi_systimer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { /* The frequency value is an immutable value. */ - if (cmd == HWTIMER_CTRL_FREQ_SET) + if (cmd == CLOCK_TIMER_CTRL_FREQ_SET) { return RT_EOK; } @@ -76,8 +76,8 @@ static rt_err_t raspi_systimer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void * void rt_device_systimer_isr(int vector, void *param) { - rt_hwtimer_t *hwtimer = (rt_hwtimer_t *) param; - rt_systimer_t *timer = (rt_systimer_t *)hwtimer->parent.user_data; + rt_clock_timer_t *clock_timer = (rt_clock_timer_t *) param; + rt_systimer_t *timer = (rt_systimer_t *)clock_timer->parent.user_data; RT_ASSERT(timer != RT_NULL); int timer_id = timer->timer_id; @@ -95,16 +95,16 @@ void rt_device_systimer_isr(int vector, void *param) } __sync_synchronize(); - rt_device_hwtimer_isr(hwtimer); + rt_clock_timer_isr(clock_timer); } -static struct rt_hwtimer_device _hwtimer1; -static struct rt_hwtimer_device _hwtimer3; +static struct rt_clock_timer_device _clock_timer1; +static struct rt_clock_timer_device _clock_timer3; static rt_systimer_t _systimer1; static rt_systimer_t _systimer3; -const static struct rt_hwtimer_ops systimer_ops = +const static struct rt_clock_timer_ops systimer_ops = { raspi_systimer_init, raspi_systimer_start, @@ -113,12 +113,12 @@ const static struct rt_hwtimer_ops systimer_ops = raspi_systimer_ctrl }; -static const struct rt_hwtimer_info _info = +static const struct rt_clock_timer_info _info = { 1000000, /* the maxinum count frequency can be set */ 1000000, /* the maxinum count frequency can be set */ 0xFFFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_UP /* count mode (inc/dec) */ + CLOCK_TIMER_CNTMODE_UP /* count mode (inc/dec) */ }; #endif @@ -130,19 +130,19 @@ int rt_hw_systimer_init(void) #ifdef RT_USING_SYSTIMER1 _systimer1.timer_id =1; - _hwtimer1.ops = &systimer_ops; - _hwtimer1.info = &_info; - rt_device_hwtimer_register(&_hwtimer1, "timer1",&_systimer1); - rt_hw_interrupt_install(IRQ_SYSTEM_TIMER_1, rt_device_systimer_isr, &_hwtimer1, "systimer1"); + _clock_timer1.ops = &systimer_ops; + _clock_timer1.info = &_info; + rt_clock_timer_register(&_clock_timer1, "timer1",&_systimer1); + rt_hw_interrupt_install(IRQ_SYSTEM_TIMER_1, rt_device_systimer_isr, &_clock_timer1, "systimer1"); rt_hw_interrupt_umask(IRQ_SYSTEM_TIMER_1); #endif #ifdef RT_USING_SYSTIMER3 _systimer3.timer_id =3; - _hwtimer3.ops = &systimer_ops; - _hwtimer3.info = &_info; - rt_device_hwtimer_register(&_hwtimer3, "timer3",&_systimer3); - rt_hw_interrupt_install(IRQ_SYSTEM_TIMER_3, rt_device_systimer_isr, &_hwtimer3, "systimer3"); + _clock_timer3.ops = &systimer_ops; + _clock_timer3.info = &_info; + rt_clock_timer_register(&_clock_timer3, "timer3",&_systimer3); + rt_hw_interrupt_install(IRQ_SYSTEM_TIMER_3, rt_device_systimer_isr, &_clock_timer3, "systimer3"); rt_hw_interrupt_umask(IRQ_SYSTEM_TIMER_3); #endif diff --git a/bsp/raspberry-pi/raspi3-64/driver/drv_timer.c b/bsp/raspberry-pi/raspi3-64/driver/drv_timer.c index a8cb5149d44..eff6fe5417f 100644 --- a/bsp/raspberry-pi/raspi3-64/driver/drv_timer.c +++ b/bsp/raspberry-pi/raspi3-64/driver/drv_timer.c @@ -14,19 +14,19 @@ #ifdef BSP_USING_SYSTIMER -static void raspi_systimer_init(rt_hwtimer_t *hwtimer, rt_uint32_t state) +static void raspi_systimer_init(rt_clock_timer_t *clock_timer, rt_uint32_t state) { if (state == 0) - hwtimer->ops->stop(hwtimer); + clock_timer->ops->stop(clock_timer); } -static rt_err_t raspi_systimer_start(rt_hwtimer_t *hwtimer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t raspi_systimer_start(rt_clock_timer_t *clock_timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { rt_err_t result = RT_EOK; - rt_systimer_t *timer = (rt_systimer_t *)hwtimer->parent.user_data; + rt_systimer_t *timer = (rt_systimer_t *)clock_timer->parent.user_data; int timer_id = timer->timer_id; - if (mode == HWTIMER_MODE_PERIOD) + if (mode == CLOCK_TIMER_MODE_PERIOD) timer->cnt = cnt; else timer->cnt = 0; @@ -50,9 +50,9 @@ static rt_err_t raspi_systimer_start(rt_hwtimer_t *hwtimer, rt_uint32_t cnt, rt_ return result; } -static void raspi_systimer_stop(rt_hwtimer_t *hwtimer) +static void raspi_systimer_stop(rt_clock_timer_t *clock_timer) { - rt_systimer_t *timer = (rt_systimer_t *)hwtimer->parent.user_data; + rt_systimer_t *timer = (rt_systimer_t *)clock_timer->parent.user_data; int timer_id = timer->timer_id; if (timer_id == 1) rt_hw_interrupt_mask(IRQ_SYSTEM_TIMER_1); @@ -61,10 +61,10 @@ static void raspi_systimer_stop(rt_hwtimer_t *hwtimer) } -static rt_err_t raspi_systimer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t raspi_systimer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { /* The frequency value is an immutable value. */ - if (cmd == HWTIMER_CTRL_FREQ_SET) + if (cmd == CLOCK_TIMER_CTRL_FREQ_SET) { return RT_EOK; } @@ -78,8 +78,8 @@ static rt_err_t raspi_systimer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void * void rt_device_systimer_isr(int vector, void *param) { - rt_hwtimer_t *hwtimer = (rt_hwtimer_t *) param; - rt_systimer_t *timer = (rt_systimer_t *)hwtimer->parent.user_data; + rt_clock_timer_t *clock_timer = (rt_clock_timer_t *) param; + rt_systimer_t *timer = (rt_systimer_t *)clock_timer->parent.user_data; RT_ASSERT(timer != RT_NULL); int timer_id = timer->timer_id; @@ -97,20 +97,20 @@ void rt_device_systimer_isr(int vector, void *param) } __sync_synchronize(); - rt_device_hwtimer_isr(hwtimer); + rt_clock_timer_isr(clock_timer); } #ifdef RT_USING_SYSTIMER1 -static struct rt_hwtimer_device _hwtimer1; +static struct rt_clock_timer_device _clock_timer1; static rt_systimer_t _systimer1; #endif #ifdef RT_USING_SYSTIMER3 -static struct rt_hwtimer_device _hwtimer3; +static struct rt_clock_timer_device _clock_timer3; static rt_systimer_t _systimer3; #endif -const static struct rt_hwtimer_ops systimer_ops = +const static struct rt_clock_timer_ops systimer_ops = { raspi_systimer_init, raspi_systimer_start, @@ -119,12 +119,12 @@ const static struct rt_hwtimer_ops systimer_ops = raspi_systimer_ctrl }; -static const struct rt_hwtimer_info _info = +static const struct rt_clock_timer_info _info = { 1000000, /* the maxinum count frequency can be set */ 1000000, /* the maxinum count frequency can be set */ 0xFFFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_UP /* count mode (inc/dec) */ + CLOCK_TIMER_CNTMODE_UP /* count mode (inc/dec) */ }; #endif @@ -136,19 +136,19 @@ int rt_hw_systimer_init(void) #ifdef RT_USING_SYSTIMER1 _systimer1.timer_id =1; - _hwtimer1.ops = &systimer_ops; - _hwtimer1.info = &_info; - rt_device_hwtimer_register(&_hwtimer1, "timer1",&_systimer1); - rt_hw_interrupt_install(IRQ_SYSTEM_TIMER_1, rt_device_systimer_isr, &_hwtimer1, "systimer1"); + _clock_timer1.ops = &systimer_ops; + _clock_timer1.info = &_info; + rt_clock_timer_register(&_clock_timer1, "timer1",&_systimer1); + rt_hw_interrupt_install(IRQ_SYSTEM_TIMER_1, rt_device_systimer_isr, &_clock_timer1, "systimer1"); rt_hw_interrupt_umask(IRQ_SYSTEM_TIMER_1); #endif #ifdef RT_USING_SYSTIMER3 _systimer3.timer_id =3; - _hwtimer3.ops = &systimer_ops; - _hwtimer3.info = &_info; - rt_device_hwtimer_register(&_hwtimer3, "timer3",&_systimer3); - rt_hw_interrupt_install(IRQ_SYSTEM_TIMER_3, rt_device_systimer_isr, &_hwtimer3, "systimer3"); + _clock_timer3.ops = &systimer_ops; + _clock_timer3.info = &_info; + rt_clock_timer_register(&_clock_timer3, "timer3",&_systimer3); + rt_hw_interrupt_install(IRQ_SYSTEM_TIMER_3, rt_device_systimer_isr, &_clock_timer3, "systimer3"); rt_hw_interrupt_umask(IRQ_SYSTEM_TIMER_3); #endif diff --git a/bsp/raspberry-pico/Drivers/SConscript b/bsp/raspberry-pico/Drivers/SConscript index dbd1b4f6544..5afbe70b28d 100644 --- a/bsp/raspberry-pico/Drivers/SConscript +++ b/bsp/raspberry-pico/Drivers/SConscript @@ -34,8 +34,8 @@ if GetDepend('BSP_USING_ON_CHIP_FLASH'): if GetDepend('BSP_USING_PWM'): src += ['drv_pwm.c'] -if GetDepend('BSP_USING_HWTIMER'): - src += ['drv_hwtimer.c'] +if GetDepend('BSP_USING_CLOCK_TIMER'): + src += ['drv_timer.c'] if GetDepend('BSP_USING_RTC'): src += ['drv_rtc.c'] diff --git a/bsp/raspberry-pico/Drivers/drv_hwtimer.c b/bsp/raspberry-pico/Drivers/drv_timer.c similarity index 57% rename from bsp/raspberry-pico/Drivers/drv_hwtimer.c rename to bsp/raspberry-pico/Drivers/drv_timer.c index cefacd54774..4fd9d737891 100644 --- a/bsp/raspberry-pico/Drivers/drv_hwtimer.c +++ b/bsp/raspberry-pico/Drivers/drv_timer.c @@ -8,43 +8,43 @@ * 2023-10-30 ChuShicheng first version */ -#include "drv_hwtimer.h" +#include "drv_timer.h" #include "board.h" -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER #define DBG_LEVEL DBG_LOG #include -#define LOG_TAG "DRV.HWTIMER" +#define LOG_TAG "DRV.CLOCK_TIMER" typedef struct _timer { char *name; struct repeating_timer repeat_timer; alarm_id_t alarm_id; - rt_hwtimer_t timer; + rt_clock_timer_t timer; }_timer_t; -static void _hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state); -static rt_err_t _hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode); -static void _hwtimer_stop(rt_hwtimer_t *timer); -static rt_uint32_t _hwtimer_count_get(rt_hwtimer_t *timer); -static rt_err_t _hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args); +static void _clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state); +static rt_err_t _clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode); +static void _clock_timer_stop(rt_clock_timer_t *timer); +static rt_uint32_t _clock_timer_count_get(rt_clock_timer_t *timer); +static rt_err_t _clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args); static int64_t _hwtmr_isr(alarm_id_t id, void *user_data); -static const struct rt_hwtimer_ops _hwtimer_ops = { - .init = _hwtimer_init, - .start = _hwtimer_start, - .stop = _hwtimer_stop, - .count_get = _hwtimer_count_get, - .control = _hwtimer_control +static const struct rt_clock_timer_ops _clock_timer_ops = { + .init = _clock_timer_init, + .start = _clock_timer_start, + .stop = _clock_timer_stop, + .count_get = _clock_timer_count_get, + .control = _clock_timer_control }; -static const struct rt_hwtimer_info _hwtimer_info = { +static const struct rt_clock_timer_info _clock_timer_info = { .maxfreq = 1000000UL, .minfreq = 1000000UL, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_MODE_PERIOD + .cntmode = CLOCK_TIMER_MODE_PERIOD }; #ifdef BSP_USING_TIMER0 @@ -78,26 +78,26 @@ static _timer_t *_timer_obj[] = { static int64_t _hwtmr_isr(alarm_id_t id, void *user_data) { _timer_t *_tmr = rt_container_of(id, _timer_t, alarm_id); - rt_device_hwtimer_isr(&_tmr->timer); + rt_clock_timer_isr(&_tmr->timer); return RT_TRUE; } static bool _repeat_timer_isr(struct repeating_timer *t) { _timer_t *_tmr = rt_container_of(t, _timer_t, repeat_timer); - rt_device_hwtimer_isr(&_tmr->timer); + rt_clock_timer_isr(&_tmr->timer); return RT_TRUE; } -static void _hwtimer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void _clock_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { } -static rt_err_t _hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t _clock_timer_start(rt_clock_timer_t *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { _timer_t *_tmr = rt_container_of(timer, _timer_t, timer); - if(mode == HWTIMER_MODE_ONESHOT) + if(mode == CLOCK_TIMER_MODE_ONESHOT) _tmr->alarm_id = add_alarm_in_us(cnt, _hwtmr_isr, RT_NULL, RT_TRUE); else add_repeating_timer_us(cnt, _repeat_timer_isr, RT_NULL, &_tmr->repeat_timer); @@ -105,55 +105,55 @@ static rt_err_t _hwtimer_start(rt_hwtimer_t *timer, rt_uint32_t cnt, rt_hwtimer_ return RT_EOK; } -static void _hwtimer_stop(rt_hwtimer_t *timer) +static void _clock_timer_stop(rt_clock_timer_t *timer) { _timer_t *_tmr = rt_container_of(timer, _timer_t, timer); - if(timer->mode == HWTIMER_MODE_ONESHOT) + if(timer->mode == CLOCK_TIMER_MODE_ONESHOT) cancel_alarm(_tmr->alarm_id); else cancel_repeating_timer(&_tmr->repeat_timer); } -static rt_uint32_t _hwtimer_count_get(rt_hwtimer_t *timer) +static rt_uint32_t _clock_timer_count_get(rt_clock_timer_t *timer) { _timer_t *_tmr = rt_container_of(timer, _timer_t, timer); return timer_hw->alarm[_tmr->alarm_id]; } -static rt_err_t _hwtimer_control(rt_hwtimer_t *timer, rt_uint32_t cmd, void *args) +static rt_err_t _clock_timer_control(rt_clock_timer_t *timer, rt_uint32_t cmd, void *args) { rt_err_t err = RT_EOK; _timer_t *_tmr = rt_container_of(timer, _timer_t, timer); switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: err = -RT_ERROR; break; - case HWTIMER_CTRL_INFO_GET: - *(rt_hwtimer_t*)args = _tmr->timer; + case CLOCK_TIMER_CTRL_INFO_GET: + *(rt_clock_timer_t*)args = _tmr->timer; break; - case HWTIMER_CTRL_MODE_SET: + case CLOCK_TIMER_CTRL_MODE_SET: _tmr->timer.mode = *(rt_uint32_t*)args; break; - case HWTIMER_CTRL_STOP: - _hwtimer_stop(timer); + case CLOCK_TIMER_CTRL_STOP: + _clock_timer_stop(timer); break; } return err; } -int rt_hw_hwtimer_init(void) +int rt_hw_clock_timer_init(void) { int ret = RT_EOK; for (uint32_t i = 0; i < sizeof(_timer_obj) / sizeof(_timer_obj[0]); i++) { - _timer_obj[i]->timer.info = &_hwtimer_info; - _timer_obj[i]->timer.ops = &_hwtimer_ops; - ret = rt_device_hwtimer_register(&_timer_obj[i]->timer, _timer_obj[i]->name, _timer_obj[i]); + _timer_obj[i]->timer.info = &_clock_timer_info; + _timer_obj[i]->timer.ops = &_clock_timer_ops; + ret = rt_clock_timer_register(&_timer_obj[i]->timer, _timer_obj[i]->name, _timer_obj[i]); if (ret != RT_EOK) { LOG_E("%s register failed", _timer_obj[i]->name); @@ -163,5 +163,5 @@ int rt_hw_hwtimer_init(void) return ret; } -INIT_DEVICE_EXPORT(rt_hw_hwtimer_init); -#endif /* BSP_USING_HWTIMER */ +INIT_DEVICE_EXPORT(rt_hw_clock_timer_init); +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/raspberry-pico/Drivers/drv_hwtimer.h b/bsp/raspberry-pico/Drivers/drv_timer.h similarity index 67% rename from bsp/raspberry-pico/Drivers/drv_hwtimer.h rename to bsp/raspberry-pico/Drivers/drv_timer.h index e84eb568cf8..2b6c0c1c75a 100644 --- a/bsp/raspberry-pico/Drivers/drv_hwtimer.h +++ b/bsp/raspberry-pico/Drivers/drv_timer.h @@ -7,11 +7,11 @@ * Date Author Notes * 2023-10-30 ChuShicheng first version */ -#ifndef DRV_HWTIMER_H -#define DRV_HWTIMER_H +#ifndef DRV_CLOCK_TIMER_H +#define DRV_CLOCK_TIMER_H #include -int rt_hw_hwtimer_init(void); +int rt_hw_clock_timer_init(void); -#endif /* DRV_HWTIMER_H */ +#endif /* DRV_CLOCK_TIMER_H */ diff --git a/bsp/raspberry-pico/RP2040/board/Kconfig b/bsp/raspberry-pico/RP2040/board/Kconfig index bffb545386a..b1b70a9a389 100644 --- a/bsp/raspberry-pico/RP2040/board/Kconfig +++ b/bsp/raspberry-pico/RP2040/board/Kconfig @@ -659,25 +659,25 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_TIMER0 - bool "Enable HWTIMER0" + bool "Enable CLOCK_TIMER0" default n config BSP_USING_TIMER1 - bool "Enable HWTIMER1" + bool "Enable CLOCK_TIMER1" default n config BSP_USING_TIMER2 - bool "Enable HWTIMER2" + bool "Enable CLOCK_TIMER2" default n config BSP_USING_TIMER3 - bool "Enable HWTIMER3" + bool "Enable CLOCK_TIMER3" default n endif diff --git a/bsp/raspberry-pico/RP2350/board/Kconfig b/bsp/raspberry-pico/RP2350/board/Kconfig index bffb545386a..b1b70a9a389 100644 --- a/bsp/raspberry-pico/RP2350/board/Kconfig +++ b/bsp/raspberry-pico/RP2350/board/Kconfig @@ -659,25 +659,25 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER - if BSP_USING_HWTIMER + select RT_USING_CLOCK_TIME + if BSP_USING_CLOCK_TIMER config BSP_USING_TIMER0 - bool "Enable HWTIMER0" + bool "Enable CLOCK_TIMER0" default n config BSP_USING_TIMER1 - bool "Enable HWTIMER1" + bool "Enable CLOCK_TIMER1" default n config BSP_USING_TIMER2 - bool "Enable HWTIMER2" + bool "Enable CLOCK_TIMER2" default n config BSP_USING_TIMER3 - bool "Enable HWTIMER3" + bool "Enable CLOCK_TIMER3" default n endif diff --git a/bsp/renesas/libraries/HAL_Drivers/drivers/SConscript b/bsp/renesas/libraries/HAL_Drivers/drivers/SConscript index 75e41c133a4..128ac93982b 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drivers/SConscript +++ b/bsp/renesas/libraries/HAL_Drivers/drivers/SConscript @@ -48,7 +48,7 @@ if GetDepend(['BSP_USING_PWM']): src += ['drv_pwm.c'] if GetDepend(['BSP_USING_TIM']): - src += ['drv_hwtimer.c'] + src += ['drv_timer.c'] if GetDepend(['BSP_USING_ETH']): src += ['drv_eth.c'] diff --git a/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra6e2/timer_config.h b/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra6e2/timer_config.h index cf707670d73..2669a521eb1 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra6e2/timer_config.h +++ b/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra6e2/timer_config.h @@ -37,7 +37,7 @@ extern "C" .maxfreq = 120000000, \ .minfreq = 1875000, \ .maxcnt = 0XFFFFFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra6m3/timer_config.h b/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra6m3/timer_config.h index cf707670d73..2669a521eb1 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra6m3/timer_config.h +++ b/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra6m3/timer_config.h @@ -37,7 +37,7 @@ extern "C" .maxfreq = 120000000, \ .minfreq = 1875000, \ .maxcnt = 0XFFFFFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/timer_config.h b/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/timer_config.h index 9e2d62b51f3..aa946162cc4 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/timer_config.h +++ b/bsp/renesas/libraries/HAL_Drivers/drivers/config/ra8/timer_config.h @@ -38,7 +38,7 @@ extern "C" .maxfreq = 250000000, \ .minfreq = 1562500, \ .maxcnt = 0XFFFFFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drivers/config/rzt/timer_config.h b/bsp/renesas/libraries/HAL_Drivers/drivers/config/rzt/timer_config.h index 842a3eba59e..090aed51700 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drivers/config/rzt/timer_config.h +++ b/bsp/renesas/libraries/HAL_Drivers/drivers/config/rzt/timer_config.h @@ -38,7 +38,7 @@ extern "C" .maxfreq = 400000000, \ .minfreq = 1562500, \ .maxcnt = 0XFFFFFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drivers/drv_hwtimer.c b/bsp/renesas/libraries/HAL_Drivers/drivers/drv_timer.c similarity index 69% rename from bsp/renesas/libraries/HAL_Drivers/drivers/drv_hwtimer.c rename to bsp/renesas/libraries/HAL_Drivers/drivers/drv_timer.c index bf7f2c79a29..8a4e71cd86c 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drivers/drv_hwtimer.c +++ b/bsp/renesas/libraries/HAL_Drivers/drivers/drv_timer.c @@ -9,15 +9,15 @@ */ #include "board.h" -#include "drv_hwtimer.h" +#include "drv_timer.h" //#define DRV_DEBUG #define LOG_TAG "drv.timer" #include -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME -static struct ra_hwtimer ra_hwtimer_obj[BSP_TIMERS_NUM] = +static struct ra_clock_timer ra_clock_timer_obj[BSP_TIMERS_NUM] = { #ifdef BSP_USING_TIM0 [BSP_TIMER0_INDEX] = TIMER_DRV_INITIALIZER(0), @@ -60,12 +60,12 @@ const rt_uint32_t PLCKD_FREQ_PRESCALER[PLCKD_PRESCALER_MAX_SELECT] = #endif }; -static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { RT_ASSERT(timer != RT_NULL); - struct ra_hwtimer *tim; - tim = (struct ra_hwtimer *)timer->parent.user_data; + struct ra_clock_timer *tim; + tim = (struct ra_clock_timer *)timer->parent.user_data; if (state) { @@ -80,13 +80,13 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) } } -static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t pr, rt_hwtimer_mode_t opmode) +static rt_err_t timer_start(rt_clock_timer_t *timer, rt_uint32_t pr, rt_clock_timer_mode_t opmode) { RT_ASSERT(timer != RT_NULL); RT_ASSERT(opmode != RT_NULL); - struct ra_hwtimer *tim; - tim = (struct ra_hwtimer *)timer->parent.user_data; + struct ra_clock_timer *tim; + tim = (struct ra_clock_timer *)timer->parent.user_data; fsp_err_t err = FSP_SUCCESS; /* set timer count */ @@ -105,12 +105,12 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t pr, rt_hwtimer_mode return (err == FSP_SUCCESS) ? RT_EOK : -RT_ERROR; } -static void timer_stop(rt_hwtimer_t *timer) +static void timer_stop(rt_clock_timer_t *timer) { - struct ra_hwtimer *tim = RT_NULL; + struct ra_clock_timer *tim = RT_NULL; RT_ASSERT(timer != RT_NULL); - tim = (struct ra_hwtimer *)timer->parent.user_data; + tim = (struct ra_clock_timer *)timer->parent.user_data; /* stop timer */ R_GPT_Stop(tim->g_ctrl); @@ -119,13 +119,13 @@ static void timer_stop(rt_hwtimer_t *timer) R_GPT_CounterSet(tim->g_ctrl, 0); } -static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t timer_counter_get(rt_clock_timer_t *timer) { - struct ra_hwtimer *tim = RT_NULL; + struct ra_clock_timer *tim = RT_NULL; RT_ASSERT(timer != RT_NULL); - tim = (struct ra_hwtimer *)timer->parent.user_data; + tim = (struct ra_clock_timer *)timer->parent.user_data; #if defined(SOC_SERIES_R7KA8P1) timer_info_t info; @@ -142,19 +142,19 @@ static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) #endif } -static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { rt_err_t result = RT_EOK; - struct ra_hwtimer *tim = RT_NULL; + struct ra_clock_timer *tim = RT_NULL; RT_ASSERT(timer != RT_NULL); RT_ASSERT(arg != RT_NULL); - tim = (struct ra_hwtimer *)timer->parent.user_data; + tim = (struct ra_clock_timer *)timer->parent.user_data; switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { rt_uint8_t index = 0; rt_uint32_t freq = *((rt_uint32_t *)arg); @@ -209,7 +209,7 @@ void timer0_callback(timer_callback_args_t *p_args) if (TIMER_EVENT_CYCLE_END == p_args->event) { - rt_device_hwtimer_isr(&ra_hwtimer_obj[BSP_TIMER0_INDEX].tmr_device); + rt_clock_timer_isr(&ra_clock_timer_obj[BSP_TIMER0_INDEX].tmr_device); timer_one_shot_check(); } @@ -227,7 +227,7 @@ void timer1_callback(timer_callback_args_t *p_args) if (TIMER_EVENT_CYCLE_END == p_args->event) { - rt_device_hwtimer_isr(&ra_hwtimer_obj[BSP_TIMER1_INDEX].tmr_device); + rt_clock_timer_isr(&ra_clock_timer_obj[BSP_TIMER1_INDEX].tmr_device); timer_one_shot_check(); } @@ -237,7 +237,7 @@ void timer1_callback(timer_callback_args_t *p_args) } #endif -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_ops _ops = { .init = timer_init, .start = timer_start, @@ -246,70 +246,70 @@ static const struct rt_hwtimer_ops _ops = .control = timer_ctrl, }; -static const struct rt_hwtimer_info _info = TMR_DEV_INFO_CONFIG; +static const struct rt_clock_timer_info _info = TMR_DEV_INFO_CONFIG; -static int rt_hw_hwtimer_init(void) +static int rt_hw_clock_timer_init(void) { int result = RT_EOK; - for (int i = 0; i < sizeof(ra_hwtimer_obj) / sizeof(ra_hwtimer_obj[0]); i++) + for (int i = 0; i < sizeof(ra_clock_timer_obj) / sizeof(ra_clock_timer_obj[0]); i++) { - ra_hwtimer_obj[i].tmr_device.info = &_info; - ra_hwtimer_obj[i].tmr_device.ops = &_ops; - if (rt_device_hwtimer_register(&ra_hwtimer_obj[i].tmr_device, ra_hwtimer_obj[i].name, &ra_hwtimer_obj[i]) == RT_EOK) + ra_clock_timer_obj[i].tmr_device.info = &_info; + ra_clock_timer_obj[i].tmr_device.ops = &_ops; + if (rt_clock_timer_register(&ra_clock_timer_obj[i].tmr_device, ra_clock_timer_obj[i].name, &ra_clock_timer_obj[i]) == RT_EOK) { - LOG_D("%s register success", ra_hwtimer_obj[i].name); + LOG_D("%s register success", ra_clock_timer_obj[i].name); } else { - LOG_E("%s register failed", ra_hwtimer_obj[i].name); + LOG_E("%s register failed", ra_clock_timer_obj[i].name); result = -RT_ERROR; } } return result; } -INIT_BOARD_EXPORT(rt_hw_hwtimer_init); +INIT_BOARD_EXPORT(rt_hw_clock_timer_init); -/* This is a hwtimer example */ -#define HWTIMER_DEV_NAME "timer0" /* device name */ +/* This is a clock_timer example */ +#define CLOCK_TIMER_DEV_NAME "timer0" /* device name */ static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) { - rt_kprintf("this is hwtimer timeout callback fucntion!\n"); + rt_kprintf("this is clock_timer timeout callback fucntion!\n"); rt_kprintf("tick is :%d !\n", rt_tick_get()); return RT_EOK; } -int hwtimer_sample(void) +int clock_timer_sample(void) { rt_err_t ret = RT_EOK; - rt_hwtimerval_t timeout_s; + rt_clock_timerval_t timeout_s; rt_device_t hw_dev = RT_NULL; - rt_hwtimer_mode_t mode; + rt_clock_timer_mode_t mode; rt_uint32_t freq = 1875000; /* 1Mhz */ - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); return -RT_ERROR; } ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); if (ret != RT_EOK) { - rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME); + rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME); return ret; } rt_device_set_rx_indicate(hw_dev, timeout_cb); - rt_device_control(hw_dev, HWTIMER_CTRL_FREQ_SET, &freq); + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_FREQ_SET, &freq); - mode = HWTIMER_MODE_PERIOD; - ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); if (ret != RT_EOK) { rt_kprintf("set mode failed! ret is :%d\n", ret); @@ -325,12 +325,12 @@ int hwtimer_sample(void) return -RT_ERROR; } - /* read hwtimer value */ + /* read clock_timer value */ rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s)); rt_kprintf("Read: Sec = %d, Usec = %d\n", timeout_s.sec, timeout_s.usec); return ret; } -MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample); +MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample); -#endif /* BSP_USING_HWTIMER */ +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/renesas/libraries/HAL_Drivers/drivers/drv_hwtimer.h b/bsp/renesas/libraries/HAL_Drivers/drivers/drv_timer.h similarity index 85% rename from bsp/renesas/libraries/HAL_Drivers/drivers/drv_hwtimer.h rename to bsp/renesas/libraries/HAL_Drivers/drivers/drv_timer.h index 8ef599f11a1..6959cf14a26 100644 --- a/bsp/renesas/libraries/HAL_Drivers/drivers/drv_hwtimer.h +++ b/bsp/renesas/libraries/HAL_Drivers/drivers/drv_timer.h @@ -12,7 +12,7 @@ #define __TMR_CONFIG_H__ #include -#include +#include #include #include @@ -21,9 +21,9 @@ extern "C" { #endif -struct ra_hwtimer +struct ra_clock_timer { - rt_hwtimer_t tmr_device; + rt_clock_timer_t tmr_device; gpt_instance_ctrl_t *g_ctrl; timer_instance_t const *const g_timer; timer_cfg_t const *const g_cfg; diff --git a/bsp/renesas/ra4m1-ek/board/Kconfig b/bsp/renesas/ra4m1-ek/board/Kconfig index ca3cf60f242..5b4af52dcac 100644 --- a/bsp/renesas/ra4m1-ek/board/Kconfig +++ b/bsp/renesas/ra4m1-ek/board/Kconfig @@ -102,7 +102,7 @@ menu "Hardware Drivers Config" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM0 bool "Enable TIM0" diff --git a/bsp/renesas/ra6m3-ek/board/Kconfig b/bsp/renesas/ra6m3-ek/board/Kconfig index 8f521ddd57d..e9c001c0ba6 100644 --- a/bsp/renesas/ra6m3-ek/board/Kconfig +++ b/bsp/renesas/ra6m3-ek/board/Kconfig @@ -108,7 +108,7 @@ menu "Hardware Drivers Config" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM0 bool "Enable TIM0" diff --git a/bsp/renesas/ra8p1-titan-board/README.md b/bsp/renesas/ra8p1-titan-board/README.md index ac88be7d63b..57c3f4cc72c 100644 --- a/bsp/renesas/ra8p1-titan-board/README.md +++ b/bsp/renesas/ra8p1-titan-board/README.md @@ -33,7 +33,7 @@ The current peripheral support status in this BSP is as follows: | ---------------------- | ------------------ | --------------------------- | ------------------ | | UART | Supported | LWIP | Supported | | GPIO | Supported | TCP/UDP | Supported | -| HWTIMER | Supported | MQTT | Supported | +| CLOCK_TIMER | Supported | MQTT | Supported | | I2C | Supported | TFTP | Supported | | WDT | Supported | Telnet | Supported | | RTC | Supported | **Multicore Communication** | **Support Status** | diff --git a/bsp/renesas/ra8p1-titan-board/README_zh.md b/bsp/renesas/ra8p1-titan-board/README_zh.md index 10640f7a387..6d718343bb7 100644 --- a/bsp/renesas/ra8p1-titan-board/README_zh.md +++ b/bsp/renesas/ra8p1-titan-board/README_zh.md @@ -33,7 +33,7 @@ Titan Board 搭载频率 1GHz Arm® Cortex®-M85 与 250MHz Arm® Cortex®-M33 | ------------ | ------------ | -------- | ------------ | | UART | 支持 | LWIP | 支持 | | GPIO | 支持 | TCP/UDP | 支持 | -| HWTIMER | 支持 | MQTT | 支持 | +| CLOCK_TIMER | 支持 | MQTT | 支持 | | IIC | 支持 | TFTP | 支持 | | WDT | 支持 | Telnet | 支持 | | RTC | 支持 | **多核通信** | **支持情况** | diff --git a/bsp/renesas/ra8p1-titan-board/board/Kconfig b/bsp/renesas/ra8p1-titan-board/board/Kconfig index 0deed2ea176..7d1e754f491 100644 --- a/bsp/renesas/ra8p1-titan-board/board/Kconfig +++ b/bsp/renesas/ra8p1-titan-board/board/Kconfig @@ -638,7 +638,7 @@ menu "Hardware Drivers Config" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM0 bool "Enable TIM0" diff --git a/bsp/renesas/rzn2l_etherkit/board/Kconfig b/bsp/renesas/rzn2l_etherkit/board/Kconfig index c003e8fb1f7..e4cff331160 100644 --- a/bsp/renesas/rzn2l_etherkit/board/Kconfig +++ b/bsp/renesas/rzn2l_etherkit/board/Kconfig @@ -497,7 +497,7 @@ menu "Hardware Drivers Config" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM0 bool "Enable TIM0" diff --git a/bsp/renesas/rzn2l_rsk/board/Kconfig b/bsp/renesas/rzn2l_rsk/board/Kconfig index 46693461ebd..9060c7c18dc 100644 --- a/bsp/renesas/rzn2l_rsk/board/Kconfig +++ b/bsp/renesas/rzn2l_rsk/board/Kconfig @@ -136,7 +136,7 @@ menu "Hardware Drivers Config" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM0 bool "Enable TIM0" diff --git a/bsp/renesas/rzt2m_rsk/board/Kconfig b/bsp/renesas/rzt2m_rsk/board/Kconfig index 89f3b5435f0..aa374df16f4 100644 --- a/bsp/renesas/rzt2m_rsk/board/Kconfig +++ b/bsp/renesas/rzt2m_rsk/board/Kconfig @@ -84,7 +84,7 @@ menu "Hardware Drivers Config" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM0 bool "Enable TIM0" diff --git a/bsp/rockchip/rk3500/driver/Kconfig b/bsp/rockchip/rk3500/driver/Kconfig index d0730821614..9e044728913 100644 --- a/bsp/rockchip/rk3500/driver/Kconfig +++ b/bsp/rockchip/rk3500/driver/Kconfig @@ -2,5 +2,5 @@ menu "RT-Thread rockchip RK3500 drivers" source "$BSP_DIR/driver/clk/Kconfig" source "$BSP_DIR/driver/uart8250/Kconfig" -source "$BSP_DIR/driver/hwtimer/Kconfig" +source "$BSP_DIR/driver/clock_timer/Kconfig" endmenu diff --git a/bsp/rockchip/rk3500/driver/hwtimer/Kconfig b/bsp/rockchip/rk3500/driver/clock_timer/Kconfig similarity index 50% rename from bsp/rockchip/rk3500/driver/hwtimer/Kconfig rename to bsp/rockchip/rk3500/driver/clock_timer/Kconfig index 3dfe6bf159b..7bfac13baf8 100755 --- a/bsp/rockchip/rk3500/driver/hwtimer/Kconfig +++ b/bsp/rockchip/rk3500/driver/clock_timer/Kconfig @@ -1,5 +1,5 @@ -config RT_HWTIMER_ROCKCHIP +config RT_CLOCK_TIMER_ROCKCHIP bool "RockChip Timer" depends on RT_USING_DM - depends on RT_USING_HWTIMER + depends on RT_USING_CLOCK_TIME default n diff --git a/bsp/rockchip/rk3500/driver/hwtimer/SConscript b/bsp/rockchip/rk3500/driver/clock_timer/SConscript similarity index 65% rename from bsp/rockchip/rk3500/driver/hwtimer/SConscript rename to bsp/rockchip/rk3500/driver/clock_timer/SConscript index 90934983d56..3363516ad95 100644 --- a/bsp/rockchip/rk3500/driver/hwtimer/SConscript +++ b/bsp/rockchip/rk3500/driver/clock_timer/SConscript @@ -5,8 +5,8 @@ CPPPATH = [cwd] src = [] -if GetDepend(['RT_HWTIMER_ROCKCHIP']): - src += ['hwtimer-rockchip_timer.c'] +if GetDepend(['RT_CLOCK_TIMER_ROCKCHIP']): + src += ['clock_timer-rockchip_timer.c'] group = DefineGroup('DeviceDrivers', src, depend = [''], CPPPATH = CPPPATH) diff --git a/bsp/rockchip/rk3500/driver/hwtimer/hwtimer-rockchip_timer.c b/bsp/rockchip/rk3500/driver/clock_timer/clock_timer-rockchip_timer.c similarity index 83% rename from bsp/rockchip/rk3500/driver/hwtimer/hwtimer-rockchip_timer.c rename to bsp/rockchip/rk3500/driver/clock_timer/clock_timer-rockchip_timer.c index 33ad9cd51bd..889c1edc746 100644 --- a/bsp/rockchip/rk3500/driver/hwtimer/hwtimer-rockchip_timer.c +++ b/bsp/rockchip/rk3500/driver/clock_timer/clock_timer-rockchip_timer.c @@ -16,8 +16,8 @@ #include #include -#ifdef RT_USING_KTIME -#include +#ifdef RT_USING_CLOCK_TIME +#include #endif #define HZ 100 @@ -41,7 +41,7 @@ struct rk_timer { - struct rt_hwtimer_device parent; + struct rt_clock_timer_device parent; void *base; void *ctrl; @@ -53,9 +53,9 @@ struct rk_timer rt_uint32_t cycle; rt_bool_t status; - struct rt_hwtimer_info info; + struct rt_clock_timer_info info; }; -#ifdef RT_USING_KTIME +#ifdef RT_USING_CLOCK_TIME struct hrt_timer { struct rk_timer *timer; @@ -99,24 +99,24 @@ static void rk_timer_interrupt_clear(struct rk_timer *timer) HWREG32(timer->base + TIMER_INT_STATUS) = 1; } -static void rk_timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void rk_timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { } -static rt_err_t rk_timer_start(struct rt_hwtimer_device *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t rk_timer_start(struct rt_clock_timer_device *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { rt_err_t err = RT_EOK; struct rk_timer *rk_timer = raw_to_rk_timer(timer); switch (mode) { - case HWTIMER_MODE_ONESHOT: + case CLOCK_TIMER_MODE_ONESHOT: rk_timer_disable(rk_timer); rk_timer_update_counter(cnt, rk_timer); rk_timer_enable(rk_timer, TIMER_MODE_USER_DEFINED_COUNT | TIMER_INT_UNMASK); break; - case HWTIMER_MODE_PERIOD: + case CLOCK_TIMER_MODE_PERIOD: rk_timer_disable(rk_timer); rk_timer_update_counter(rk_timer->freq / HZ - 1, rk_timer); rk_timer_enable(rk_timer, TIMER_MODE_FREE_RUNNING | TIMER_INT_UNMASK); @@ -136,7 +136,7 @@ static rt_err_t rk_timer_start(struct rt_hwtimer_device *timer, rt_uint32_t cnt, return err; } -static void rk_timer_stop(struct rt_hwtimer_device *timer) +static void rk_timer_stop(struct rt_clock_timer_device *timer) { struct rk_timer *rk_timer = raw_to_rk_timer(timer); @@ -144,29 +144,29 @@ static void rk_timer_stop(struct rt_hwtimer_device *timer) rk_timer_disable(rk_timer); } -static rt_uint32_t rk_timer_count_get(struct rt_hwtimer_device *timer) +static rt_uint32_t rk_timer_count_get(struct rt_clock_timer_device *timer) { struct rk_timer *rk_timer = raw_to_rk_timer(timer); return rk_timer_current_value(rk_timer); } -static rt_err_t rk_timer_ctrl(struct rt_hwtimer_device *timer, rt_uint32_t cmd, void *args) +static rt_err_t rk_timer_ctrl(struct rt_clock_timer_device *timer, rt_uint32_t cmd, void *args) { rt_err_t err = RT_EOK; struct rk_timer *rk_timer = raw_to_rk_timer(timer); switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: err = -RT_ENOSYS; break; - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: rk_timer_stop(timer); break; - case HWTIMER_CTRL_INFO_GET: + case CLOCK_TIMER_CTRL_INFO_GET: if (args) { rt_memcpy(args, &rk_timer->info, sizeof(rk_timer->info)); @@ -177,8 +177,8 @@ static rt_err_t rk_timer_ctrl(struct rt_hwtimer_device *timer, rt_uint32_t cmd, } break; - case HWTIMER_CTRL_MODE_SET: - err = rk_timer_start(timer, rk_timer->cycle, (rt_hwtimer_mode_t)args); + case CLOCK_TIMER_CTRL_MODE_SET: + err = rk_timer_start(timer, rk_timer->cycle, (rt_clock_timer_mode_t)args); break; default: @@ -189,7 +189,7 @@ static rt_err_t rk_timer_ctrl(struct rt_hwtimer_device *timer, rt_uint32_t cmd, return err; } -const static struct rt_hwtimer_ops rk_timer_ops = +const static struct rt_clock_timer_ops rk_timer_ops = { .init = rk_timer_init, .start = rk_timer_start, @@ -205,10 +205,10 @@ static void rk_timer_isr(int irqno, void *param) rk_timer_interrupt_clear(time); - rt_ktime_hrtimer_process(); + rt_clock_hrtimer_process(); } -void rt_ktime_hrtimer_bind(rt_bitmap_t *affinity) +void rt_clock_hrtimer_bind(rt_bitmap_t *affinity) { struct rk_timer *timer = _timer0.timer; @@ -233,7 +233,7 @@ static rt_err_t rk_timer_probe(struct rt_platform_device *pdev) { return -RT_ENOMEM; } -#ifdef RT_USING_KTIME +#ifdef RT_USING_CLOCK_TIME _timer0.timer = timer; rt_spin_lock_init(&_spinlock); #endif @@ -276,16 +276,16 @@ static rt_err_t rk_timer_probe(struct rt_platform_device *pdev) timer->info.maxfreq = timer->freq; timer->info.minfreq = timer->freq; timer->info.maxcnt = 0xffffffff; - timer->info.cntmode = HWTIMER_CNTMODE_DW; + timer->info.cntmode = CLOCK_TIMER_CNTMODE_DW; rt_dm_dev_set_name_auto(&timer->parent.parent, "timer"); dev_name = rt_dm_dev_get_name(&timer->parent.parent); - rt_device_hwtimer_register(&timer->parent, dev_name, RT_NULL); + rt_clock_timer_register(&timer->parent, dev_name, RT_NULL); RT_BITMAP_DECLARE(affinity, RT_CPUS_NR) = { 0 }; rt_bitmap_set_bit(affinity, RT_CPUS_NR - 1); - rt_ktime_hrtimer_bind(affinity); + rt_clock_hrtimer_bind(affinity); rt_pic_attach_irq(timer->irq, rk_timer_isr, timer, dev_name, RT_IRQ_F_NONE); rt_pic_irq_unmask(timer->irq); @@ -326,16 +326,16 @@ static const struct rk_timer_data rk3399_timer_data = .ctrl_reg = TIMER_CONTROL_REG3399, }; -#ifdef RT_USING_KTIME +#ifdef RT_USING_CLOCK_TIME -uint64_t rt_ktime_hrtimer_getfrq(void) +uint64_t rt_clock_hrtimer_getfrq(void) { return (24 * 1000 * 1000UL); } -uint64_t rt_ktime_hrtimer_getres(void) +uint64_t rt_clock_hrtimer_getres(void) { - return ((1000UL * 1000 * 1000) * RT_KTIME_RESMUL) / (24 * 1000 * 1000UL); + return ((1000UL * 1000 * 1000) * RT_CLOCK_TIME_RESMUL) / (24 * 1000 * 1000UL); } /** @@ -346,7 +346,7 @@ uint64_t rt_ktime_hrtimer_getres(void) * @param cnt the count of timer dealy * @return rt_err_t 0 forever */ -rt_err_t rt_ktime_hrtimer_settimeout(unsigned long cnt) +rt_err_t rt_clock_hrtimer_settimeout(unsigned long cnt) { struct hrt_timer *timer = &_timer0; struct rk_timer *time = timer->timer; @@ -373,7 +373,7 @@ static const struct rt_ofw_node_id rk_timer_ofw_ids[] = static struct rt_platform_driver rk_timer_driver = { - .name = "hwtimer-rockchip", + .name = "clock_timer-rockchip", .ids = rk_timer_ofw_ids, .probe = rk_timer_probe, diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f0/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f0/tim_config.h index 82f0a2375f6..55abb162374 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f0/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f0/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/tim_config.h index 735bf7b70db..d3a685ac284 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f1/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f2/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f2/tim_config.h index 3e2a606f6e3..19347c25f33 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f2/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f2/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 3000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f3/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f3/tim_config.h index a80ce58de6c..68e0ec2c6a5 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f3/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f3/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 3000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f4/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f4/tim_config.h index 08646d9af74..c6e1ee581a4 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f4/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f4/tim_config.h @@ -24,7 +24,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 3000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f7/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f7/tim_config.h index 6c397f087b5..bf7fd577b8c 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/f7/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/f7/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 3000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/g0/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/g0/tim_config.h index 4c3691353b1..200255dfb45 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/g0/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/g0/tim_config.h @@ -24,7 +24,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/g4/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/g4/tim_config.h index 856a437d0b2..6e450ccde79 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/g4/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/g4/tim_config.h @@ -24,7 +24,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 3000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/lptim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/lptim_config.h index 794289d88a1..507bcff446a 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/lptim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/lptim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 3000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/tim_config.h index 6c397f087b5..bf7fd577b8c 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/h7/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 3000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/l1/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/l1/tim_config.h index 735bf7b70db..d3a685ac284 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/l1/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/l1/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/l4/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/l4/tim_config.h index ed4100a9c78..0024d418231 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/l4/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/l4/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/l5/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/l5/tim_config.h index eca2f6dddee..f049572c2aa 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/l5/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/l5/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/mp1/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/mp1/tim_config.h index 2742f70c71b..15288170333 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/mp1/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/mp1/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 3000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/u5/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/u5/tim_config.h index eca2f6dddee..f049572c2aa 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/u5/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/u5/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/wb/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/wb/tim_config.h index 1c8c178bd0a..87996f5b935 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/wb/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/wb/tim_config.h @@ -23,7 +23,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/config/wl/tim_config.h b/bsp/stm32/libraries/HAL_Drivers/drivers/config/wl/tim_config.h index f85bea7b1c7..05118d7ac51 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/config/wl/tim_config.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/config/wl/tim_config.h @@ -24,7 +24,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFFFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #else #define TIM_DEV_INFO_CONFIG \ @@ -32,7 +32,7 @@ extern "C" { .maxfreq = 1000000, \ .minfreq = 2000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif #endif /* TIM_DEV_INFO_CONFIG */ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_lptim.c b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_lptim.c index 192343f5bed..cfcf540531f 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_lptim.c +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_lptim.c @@ -6,7 +6,7 @@ * Change Logs: * Date Author Notes * 2019-05-06 Zero-Free first version - * 2024-07-04 wdfk-prog lptimer is register with hwtimer, only supports pm calls,the timer function is not supported + * 2024-07-04 wdfk-prog lptimer is register with clock_timer, only supports pm calls,the timer function is not supported */ #include @@ -37,7 +37,7 @@ enum struct stm32_hw_lptimer { - rt_hwtimer_t time_device; + rt_clock_timer_t time_device; LPTIM_HandleTypeDef tim_handle; IRQn_Type tim_irqn; char *name; @@ -56,9 +56,9 @@ static struct stm32_hw_lptimer stm32_hw_lptimer_obj[] = #endif }; -static const struct rt_hwtimer_info _info = LPTIM_DEV_INFO_CONFIG; +static const struct rt_clock_timer_info _info = LPTIM_DEV_INFO_CONFIG; -static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { if(timer == RT_NULL) { @@ -118,7 +118,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) } } -static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode) { if(timer == RT_NULL) { @@ -153,7 +153,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ } } -static void timer_stop(rt_hwtimer_t *timer) +static void timer_stop(rt_clock_timer_t *timer) { if(timer == RT_NULL) { @@ -193,13 +193,13 @@ static rt_uint32_t timer_get_freq(LPTIM_HandleTypeDef *tim) } -static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t timer_counter_get(rt_clock_timer_t *timer) { LPTIM_HandleTypeDef *tim = (LPTIM_HandleTypeDef *)timer->parent.user_data; return HAL_LPTIM_ReadCounter(tim); } -static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { if(timer == RT_NULL) { @@ -236,7 +236,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) } case DRV_HW_LPTIMER_CTRL_START: { - timer_start(timer, *(rt_uint32_t *)arg, HWTIMER_MODE_ONESHOT); + timer_start(timer, *(rt_uint32_t *)arg, CLOCK_TIMER_MODE_ONESHOT); break; } case DRV_HW_LPTIMER_CTRL_GET_COUNT: @@ -281,7 +281,7 @@ void LPTIM3_IRQHandler(void) } #endif -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_ops _ops = { .init = timer_init, .start = timer_start, @@ -302,7 +302,7 @@ static int stm32_hw_lptim_init(void) { stm32_hw_lptimer_obj[i].time_device.info = &_info; stm32_hw_lptimer_obj[i].time_device.ops = &_ops; - if (rt_device_hwtimer_register(&stm32_hw_lptimer_obj[i].time_device, stm32_hw_lptimer_obj[i].name, &stm32_hw_lptimer_obj[i].tim_handle) == RT_EOK) + if (rt_clock_timer_register(&stm32_hw_lptimer_obj[i].time_device, stm32_hw_lptimer_obj[i].name, &stm32_hw_lptimer_obj[i].tim_handle) == RT_EOK) { LOG_D("%s register success", stm32_hw_lptimer_obj[i].name); } diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_lptim.h b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_lptim.h index 124242abb55..203edba4391 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_lptim.h +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_lptim.h @@ -6,7 +6,7 @@ * Change Logs: * Date Author Notes * 2019-05-06 Zero-Free first version - * 2024-07-04 wdfk-prog lptimer is register with hwtimer, only supports pm calls,the timer function is not supported + * 2024-07-04 wdfk-prog lptimer is register with clock_timer, only supports pm calls,the timer function is not supported */ #ifndef __DRV_PMTIMER_H__ diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_pm.c b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_pm.c index 2b93c30f94d..eaf39d8b146 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_pm.c +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_pm.c @@ -203,7 +203,7 @@ static void pm_timer_stop(struct rt_pm *pm) RT_ASSERT(pm != RT_NULL); /* Reset pmtimer status */ - rt_device_control(timer, HWTIMER_CTRL_STOP, RT_NULL); + rt_device_control(timer, CLOCK_TIMER_CTRL_STOP, RT_NULL); } /** diff --git a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_tim.c b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_tim.c index 5ff70057915..8f82d1b4805 100644 --- a/bsp/stm32/libraries/HAL_Drivers/drivers/drv_tim.c +++ b/bsp/stm32/libraries/HAL_Drivers/drivers/drv_tim.c @@ -298,15 +298,15 @@ enum #endif }; -struct stm32_hwtimer +struct stm32_clock_timer { - rt_hwtimer_t time_device; + rt_clock_timer_t time_device; TIM_HandleTypeDef tim_handle; IRQn_Type tim_irqn; char *name; }; -static struct stm32_hwtimer stm32_hwtimer_obj[] = +static struct stm32_clock_timer stm32_clock_timer_obj[] = { #ifdef BSP_USING_TIM1 TIM1_CONFIG, @@ -377,18 +377,18 @@ static struct stm32_hwtimer stm32_hwtimer_obj[] = #endif }; -static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { uint32_t prescaler_value = 0; uint32_t pclk1_doubler, pclk2_doubler; TIM_HandleTypeDef *tim = RT_NULL; - struct stm32_hwtimer *tim_device = RT_NULL; + struct stm32_clock_timer *tim_device = RT_NULL; RT_ASSERT(timer != RT_NULL); if (state) { tim = (TIM_HandleTypeDef *)timer->parent.user_data; - tim_device = (struct stm32_hwtimer *)timer; + tim_device = (struct stm32_clock_timer *)timer; stm32_tim_pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler); @@ -409,7 +409,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) tim->Init.Period = 10000 - 1; tim->Init.Prescaler = prescaler_value; tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - if (timer->info->cntmode == HWTIMER_CNTMODE_UP) + if (timer->info->cntmode == CLOCK_TIMER_CNTMODE_UP) { tim->Init.CounterMode = TIM_COUNTERMODE_UP; } @@ -436,7 +436,7 @@ static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) } } -static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode) { rt_err_t result = RT_EOK; TIM_HandleTypeDef *tim = RT_NULL; @@ -450,7 +450,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ /* set tim arr */ __HAL_TIM_SET_AUTORELOAD(tim, t - 1); - if (opmode == HWTIMER_MODE_ONESHOT) + if (opmode == CLOCK_TIMER_MODE_ONESHOT) { /* set timer to single mode */ tim->Instance->CR1 |= TIM_OPMODE_SINGLE; @@ -470,7 +470,7 @@ static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_ return result; } -static void timer_stop(rt_hwtimer_t *timer) +static void timer_stop(rt_clock_timer_t *timer) { TIM_HandleTypeDef *tim = RT_NULL; @@ -485,7 +485,7 @@ static void timer_stop(rt_hwtimer_t *timer) __HAL_TIM_SET_COUNTER(tim, 0); } -static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { TIM_HandleTypeDef *tim = RT_NULL; rt_err_t result = -RT_ERROR; @@ -498,7 +498,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { rt_uint32_t freq; rt_uint16_t val=0; @@ -591,7 +591,7 @@ static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) return result; } -static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) +static rt_uint32_t timer_counter_get(rt_clock_timer_t *timer) { TIM_HandleTypeDef *tim = RT_NULL; @@ -602,9 +602,9 @@ static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer) return tim->Instance->CNT; } -static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG; +static const struct rt_clock_timer_info _info = TIM_DEV_INFO_CONFIG; -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_ops _ops = { .init = timer_init, .start = timer_start, @@ -618,7 +618,7 @@ void TIM2_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM2_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM2_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -630,10 +630,10 @@ void TIM3_TIM4_IRQHandler(void) /* enter interrupt */ rt_interrupt_enter(); #ifdef BSP_USING_TIM3 - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM3_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM3_INDEX].tim_handle); #endif #ifdef BSP_USING_TIM4 - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM4_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM4_INDEX].tim_handle); #endif /* leave interrupt */ rt_interrupt_leave(); @@ -645,7 +645,7 @@ void TIM3_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM3_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM3_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -655,7 +655,7 @@ void TIM4_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM4_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM4_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -666,7 +666,7 @@ void TIM5_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM5_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM5_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -676,7 +676,7 @@ void TIM6_DAC_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM6_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM6_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -686,7 +686,7 @@ void TIM7_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM7_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM7_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -696,7 +696,7 @@ void TIM8_UP_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM8_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM8_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -706,7 +706,7 @@ void TIM1_TRG_COM_TIM11_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM11_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM11_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -716,7 +716,7 @@ void TIM8_UP_TIM13_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM13_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM13_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -730,7 +730,7 @@ void TIM8_UP_TIM13_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM14_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM14_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -740,7 +740,7 @@ void TIM1_BRK_TIM15_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM15_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM15_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -754,7 +754,7 @@ void TIM1_BRK_TIM15_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM16_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM16_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -768,7 +768,7 @@ void TIM1_BRK_TIM15_IRQHandler(void) { /* enter interrupt */ rt_interrupt_enter(); - HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM17_INDEX].tim_handle); + HAL_TIM_IRQHandler(&stm32_clock_timer_obj[TIM17_INDEX].tim_handle); /* leave interrupt */ rt_interrupt_leave(); } @@ -779,106 +779,106 @@ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) #ifdef BSP_USING_TIM2 if (htim->Instance == TIM2) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM2_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM2_INDEX].time_device); } #endif #ifdef BSP_USING_TIM3 if (htim->Instance == TIM3) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM3_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM3_INDEX].time_device); } #endif #ifdef BSP_USING_TIM4 if (htim->Instance == TIM4) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM4_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM4_INDEX].time_device); } #endif #ifdef BSP_USING_TIM5 if (htim->Instance == TIM5) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM5_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM5_INDEX].time_device); } #endif #ifdef BSP_USING_TIM6 if (htim->Instance == TIM6) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM6_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM6_INDEX].time_device); } #endif #ifdef BSP_USING_TIM7 if (htim->Instance == TIM7) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM7_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM7_INDEX].time_device); } #endif #ifdef BSP_USING_TIM8 if (htim->Instance == TIM8) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM8_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM8_INDEX].time_device); } #endif #ifdef BSP_USING_TIM11 if (htim->Instance == TIM11) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM11_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM11_INDEX].time_device); } #endif #ifdef BSP_USING_TIM13 if (htim->Instance == TIM13) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM13_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM13_INDEX].time_device); } #endif #ifdef BSP_USING_TIM14 if (htim->Instance == TIM14) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM14_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM14_INDEX].time_device); } #endif #ifdef BSP_USING_TIM15 if (htim->Instance == TIM15) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM15_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM15_INDEX].time_device); } #endif #ifdef BSP_USING_TIM16 if (htim->Instance == TIM16) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM16_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM16_INDEX].time_device); } #endif #ifdef BSP_USING_TIM17 if (htim->Instance == TIM17) { - rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM17_INDEX].time_device); + rt_clock_timer_isr(&stm32_clock_timer_obj[TIM17_INDEX].time_device); } #endif } -static int stm32_hwtimer_init(void) +static int stm32_clock_timer_init(void) { rt_uint32_t i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(stm32_hwtimer_obj) / sizeof(stm32_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(stm32_clock_timer_obj) / sizeof(stm32_clock_timer_obj[0]); i++) { - stm32_hwtimer_obj[i].time_device.info = &_info; - stm32_hwtimer_obj[i].time_device.ops = &_ops; - if (rt_device_hwtimer_register(&stm32_hwtimer_obj[i].time_device, - stm32_hwtimer_obj[i].name, &stm32_hwtimer_obj[i].tim_handle) == RT_EOK) + stm32_clock_timer_obj[i].time_device.info = &_info; + stm32_clock_timer_obj[i].time_device.ops = &_ops; + if (rt_clock_timer_register(&stm32_clock_timer_obj[i].time_device, + stm32_clock_timer_obj[i].name, &stm32_clock_timer_obj[i].tim_handle) == RT_EOK) { - LOG_D("%s register success", stm32_hwtimer_obj[i].name); + LOG_D("%s register success", stm32_clock_timer_obj[i].name); } else { - LOG_E("%s register failed", stm32_hwtimer_obj[i].name); + LOG_E("%s register failed", stm32_clock_timer_obj[i].name); result = -RT_ERROR; } } return result; } -INIT_BOARD_EXPORT(stm32_hwtimer_init); +INIT_BOARD_EXPORT(stm32_clock_timer_init); #endif /* BSP_USING_TIM */ diff --git a/bsp/stm32/libraries/STM32L1xx_HAL/SConscript b/bsp/stm32/libraries/STM32L1xx_HAL/SConscript index 7859bc2332d..7c2b1d785d1 100644 --- a/bsp/stm32/libraries/STM32L1xx_HAL/SConscript +++ b/bsp/stm32/libraries/STM32L1xx_HAL/SConscript @@ -43,7 +43,7 @@ if GetDepend(['RT_USING_USB']): if GetDepend(['RT_USING_CAN']): src += ['STM32L1xx_HAL_Driver/Src/stm32L1xx_hal_can.c'] -if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']) or GetDepend(['RT_USING_PULSE_ENCODER']): +if GetDepend(['RT_USING_CLOCK_TIME']) or GetDepend(['RT_USING_PWM']) or GetDepend(['RT_USING_PULSE_ENCODER']): src += ['STM32L1xx_HAL_Driver/Src/stm32L1xx_hal_tim.c'] src += ['STM32L1xx_HAL_Driver/Src/stm32L1xx_hal_tim_ex.c'] diff --git a/bsp/stm32/libraries/templates/stm32f3xx/project.uvoptx b/bsp/stm32/libraries/templates/stm32f3xx/project.uvoptx index ccbafccdba7..3d774f94f1c 100644 --- a/bsp/stm32/libraries/templates/stm32f3xx/project.uvoptx +++ b/bsp/stm32/libraries/templates/stm32f3xx/project.uvoptx @@ -282,8 +282,8 @@ 0 0 0 - ..\..\..\components\drivers\hwtimer\hwtimer.c - hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c + clock_timer.c 0 0 @@ -482,8 +482,8 @@ 0 0 0 - ..\libraries\HAL_Drivers\drv_hwtimer.c - drv_hwtimer.c + ..\libraries\HAL_Drivers\drv_timer.c + drv_timer.c 0 0 diff --git a/bsp/stm32/libraries/templates/stm32l1xx/board/Kconfig b/bsp/stm32/libraries/templates/stm32l1xx/board/Kconfig index 0650b2dbc49..d95f206f822 100644 --- a/bsp/stm32/libraries/templates/stm32l1xx/board/Kconfig +++ b/bsp/stm32/libraries/templates/stm32l1xx/board/Kconfig @@ -88,7 +88,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM2 bool "Enable TIM2" diff --git a/bsp/stm32/libraries/templates/stm32wbxx/board/Kconfig b/bsp/stm32/libraries/templates/stm32wbxx/board/Kconfig index e20043c1728..1287e9a63fe 100644 --- a/bsp/stm32/libraries/templates/stm32wbxx/board/Kconfig +++ b/bsp/stm32/libraries/templates/stm32wbxx/board/Kconfig @@ -123,7 +123,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM16 diff --git a/bsp/stm32/libraries/templates/stm32xx_board_Kconfig b/bsp/stm32/libraries/templates/stm32xx_board_Kconfig index 0cc7a077baa..62fe69fab02 100644 --- a/bsp/stm32/libraries/templates/stm32xx_board_Kconfig +++ b/bsp/stm32/libraries/templates/stm32xx_board_Kconfig @@ -116,7 +116,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM15 bool "Enable TIM15" diff --git a/bsp/stm32/stm32f072-st-nucleo/board/Kconfig b/bsp/stm32/stm32f072-st-nucleo/board/Kconfig index 4aa69b91f28..69900f4061c 100644 --- a/bsp/stm32/stm32f072-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32f072-st-nucleo/board/Kconfig @@ -135,7 +135,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM7 bool "Enable TIM7" diff --git a/bsp/stm32/stm32f091-st-nucleo/board/Kconfig b/bsp/stm32/stm32f091-st-nucleo/board/Kconfig index 0cd4e496034..d5ea59755e9 100644 --- a/bsp/stm32/stm32f091-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32f091-st-nucleo/board/Kconfig @@ -137,7 +137,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM14 bool "Enable TIM14" diff --git a/bsp/stm32/stm32f103-100ask-pro/board/Kconfig b/bsp/stm32/stm32f103-100ask-pro/board/Kconfig index 60b4bd11df5..65919379fc1 100644 --- a/bsp/stm32/stm32f103-100ask-pro/board/Kconfig +++ b/bsp/stm32/stm32f103-100ask-pro/board/Kconfig @@ -237,7 +237,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM2 bool "Enable TIM2" diff --git a/bsp/stm32/stm32f103-atk-nano/board/Kconfig b/bsp/stm32/stm32f103-atk-nano/board/Kconfig index b30a684c214..282086aecdc 100644 --- a/bsp/stm32/stm32f103-atk-nano/board/Kconfig +++ b/bsp/stm32/stm32f103-atk-nano/board/Kconfig @@ -149,7 +149,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM2 bool "Enable TIM2" diff --git a/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig b/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig index c8d95d40c66..0d7330f082b 100644 --- a/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig +++ b/bsp/stm32/stm32f103-atk-warshipv3/board/Kconfig @@ -162,7 +162,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM2 bool "Enable TIM2" diff --git a/bsp/stm32/stm32f103-fire-arbitrary/board/Kconfig b/bsp/stm32/stm32f103-fire-arbitrary/board/Kconfig index 9482489e816..75787559a1f 100644 --- a/bsp/stm32/stm32f103-fire-arbitrary/board/Kconfig +++ b/bsp/stm32/stm32f103-fire-arbitrary/board/Kconfig @@ -277,7 +277,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM2 bool "Enable TIM2" diff --git a/bsp/stm32/stm32f401-st-nucleo/applications/arduino_pinout/pins_arduino.h b/bsp/stm32/stm32f401-st-nucleo/applications/arduino_pinout/pins_arduino.h index 2b80505e245..1a314d4fc48 100644 --- a/bsp/stm32/stm32f401-st-nucleo/applications/arduino_pinout/pins_arduino.h +++ b/bsp/stm32/stm32f401-st-nucleo/applications/arduino_pinout/pins_arduino.h @@ -50,6 +50,6 @@ #define SS D10 #define RTDUINO_DEFAULT_SPI_BUS_NAME "spi1" -#define RTDUINO_TONE_HWTIMER_DEVICE_NAME "timer9" +#define RTDUINO_TONE_CLOCK_TIMER_DEVICE_NAME "timer9" #endif /* Pins_Arduino_h */ diff --git a/bsp/stm32/stm32f401-st-nucleo/board/Kconfig b/bsp/stm32/stm32f401-st-nucleo/board/Kconfig index e03d2d28143..a4ddfc0c2c0 100644 --- a/bsp/stm32/stm32f401-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32f401-st-nucleo/board/Kconfig @@ -104,7 +104,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM9 diff --git a/bsp/stm32/stm32f405zg-mini-template/board/Kconfig b/bsp/stm32/stm32f405zg-mini-template/board/Kconfig index 8e3876b0263..80bb0b0522c 100644 --- a/bsp/stm32/stm32f405zg-mini-template/board/Kconfig +++ b/bsp/stm32/stm32f405zg-mini-template/board/Kconfig @@ -107,7 +107,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM6 bool "Enable TIM6" diff --git a/bsp/stm32/stm32f407-armfly-v5/board/Kconfig b/bsp/stm32/stm32f407-armfly-v5/board/Kconfig index 5055463e327..613d1cfb85a 100644 --- a/bsp/stm32/stm32f407-armfly-v5/board/Kconfig +++ b/bsp/stm32/stm32f407-armfly-v5/board/Kconfig @@ -164,7 +164,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32f407-atk-explorer/board/Kconfig b/bsp/stm32/stm32f407-atk-explorer/board/Kconfig index b88d55f8cd6..1cd3f3eb679 100644 --- a/bsp/stm32/stm32f407-atk-explorer/board/Kconfig +++ b/bsp/stm32/stm32f407-atk-explorer/board/Kconfig @@ -384,7 +384,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32f407-fk407m2-zgt6/board/Kconfig b/bsp/stm32/stm32f407-fk407m2-zgt6/board/Kconfig index 6669b21f72e..97bf737ac20 100644 --- a/bsp/stm32/stm32f407-fk407m2-zgt6/board/Kconfig +++ b/bsp/stm32/stm32f407-fk407m2-zgt6/board/Kconfig @@ -242,7 +242,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32f407-lckfb-skystar/board/Kconfig b/bsp/stm32/stm32f407-lckfb-skystar/board/Kconfig index 9b8c3bbb194..606c7725517 100644 --- a/bsp/stm32/stm32f407-lckfb-skystar/board/Kconfig +++ b/bsp/stm32/stm32f407-lckfb-skystar/board/Kconfig @@ -269,7 +269,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32f407-micu/board/Kconfig b/bsp/stm32/stm32f407-micu/board/Kconfig index 0ce9e220b63..2645400773e 100644 --- a/bsp/stm32/stm32f407-micu/board/Kconfig +++ b/bsp/stm32/stm32f407-micu/board/Kconfig @@ -160,7 +160,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32f407-rt-spark/board/Kconfig b/bsp/stm32/stm32f407-rt-spark/board/Kconfig index ca3ab2c3218..a003330564f 100644 --- a/bsp/stm32/stm32f407-rt-spark/board/Kconfig +++ b/bsp/stm32/stm32f407-rt-spark/board/Kconfig @@ -490,7 +490,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32f411-atk-nano/board/Kconfig b/bsp/stm32/stm32f411-atk-nano/board/Kconfig index ec936d9025b..fbb264b09df 100644 --- a/bsp/stm32/stm32f411-atk-nano/board/Kconfig +++ b/bsp/stm32/stm32f411-atk-nano/board/Kconfig @@ -116,7 +116,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM2 bool "Enable TIM2" diff --git a/bsp/stm32/stm32f411-st-nucleo/applications/arduino_pinout/pins_arduino.h b/bsp/stm32/stm32f411-st-nucleo/applications/arduino_pinout/pins_arduino.h index 42815786595..504b7464275 100644 --- a/bsp/stm32/stm32f411-st-nucleo/applications/arduino_pinout/pins_arduino.h +++ b/bsp/stm32/stm32f411-st-nucleo/applications/arduino_pinout/pins_arduino.h @@ -50,6 +50,6 @@ #define SS D10 #define RTDUINO_DEFAULT_SPI_BUS_NAME "spi1" -#define RTDUINO_TONE_HWTIMER_DEVICE_NAME "timer9" +#define RTDUINO_TONE_CLOCK_TIMER_DEVICE_NAME "timer9" #endif /* Pins_Arduino_h */ diff --git a/bsp/stm32/stm32f411-st-nucleo/board/Kconfig b/bsp/stm32/stm32f411-st-nucleo/board/Kconfig index ae4f9ac01ea..9c4c0c3466d 100644 --- a/bsp/stm32/stm32f411-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32f411-st-nucleo/board/Kconfig @@ -210,7 +210,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM9 bool "Enable TIM9" diff --git a/bsp/stm32/stm32f411-weact-blackpill/board/Kconfig b/bsp/stm32/stm32f411-weact-blackpill/board/Kconfig index afdbf51658c..691cabbf34b 100644 --- a/bsp/stm32/stm32f411-weact-blackpill/board/Kconfig +++ b/bsp/stm32/stm32f411-weact-blackpill/board/Kconfig @@ -211,7 +211,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM10 bool "Enable TIM10" diff --git a/bsp/stm32/stm32f412-st-nucleo/applications/arduino_pinout/pins_arduino.h b/bsp/stm32/stm32f412-st-nucleo/applications/arduino_pinout/pins_arduino.h index 249f0e7e77a..9840fd7f993 100644 --- a/bsp/stm32/stm32f412-st-nucleo/applications/arduino_pinout/pins_arduino.h +++ b/bsp/stm32/stm32f412-st-nucleo/applications/arduino_pinout/pins_arduino.h @@ -53,6 +53,6 @@ #define SS D10 #define RTDUINO_DEFAULT_SPI_BUS_NAME "spi1" -#define RTDUINO_TONE_HWTIMER_DEVICE_NAME "timer6" +#define RTDUINO_TONE_CLOCK_TIMER_DEVICE_NAME "timer6" #endif /* Pins_Arduino_h */ diff --git a/bsp/stm32/stm32f412-st-nucleo/board/Kconfig b/bsp/stm32/stm32f412-st-nucleo/board/Kconfig index 38b77b90f9a..28d5f0e1981 100644 --- a/bsp/stm32/stm32f412-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32f412-st-nucleo/board/Kconfig @@ -183,7 +183,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM6 bool "Enable TIM6" diff --git a/bsp/stm32/stm32f413-st-nucleo/board/Kconfig b/bsp/stm32/stm32f413-st-nucleo/board/Kconfig index c5738e58e51..cd009d2fe29 100644 --- a/bsp/stm32/stm32f413-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32f413-st-nucleo/board/Kconfig @@ -136,7 +136,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32f429-armfly-v6/board/Kconfig b/bsp/stm32/stm32f429-armfly-v6/board/Kconfig index 3373a8fd27c..99b09d498de 100644 --- a/bsp/stm32/stm32f429-armfly-v6/board/Kconfig +++ b/bsp/stm32/stm32f429-armfly-v6/board/Kconfig @@ -166,7 +166,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32f429-atk-apollo/board/Kconfig b/bsp/stm32/stm32f429-atk-apollo/board/Kconfig index 0cd7bc4fde2..151792707e2 100644 --- a/bsp/stm32/stm32f429-atk-apollo/board/Kconfig +++ b/bsp/stm32/stm32f429-atk-apollo/board/Kconfig @@ -278,7 +278,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32f429-fire-challenger/board/Kconfig b/bsp/stm32/stm32f429-fire-challenger/board/Kconfig index bfe8cff519b..c56a1b6a85f 100644 --- a/bsp/stm32/stm32f429-fire-challenger/board/Kconfig +++ b/bsp/stm32/stm32f429-fire-challenger/board/Kconfig @@ -186,7 +186,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32f469-st-disco/applications/arduino_pinout/pins_arduino.h b/bsp/stm32/stm32f469-st-disco/applications/arduino_pinout/pins_arduino.h index ad1360cd07d..8dd4453fd46 100644 --- a/bsp/stm32/stm32f469-st-disco/applications/arduino_pinout/pins_arduino.h +++ b/bsp/stm32/stm32f469-st-disco/applications/arduino_pinout/pins_arduino.h @@ -54,6 +54,6 @@ #define SS D10 #define RTDUINO_DEFAULT_SPI_BUS_NAME "spi2" -#define RTDUINO_TONE_HWTIMER_DEVICE_NAME "timer6" +#define RTDUINO_TONE_CLOCK_TIMER_DEVICE_NAME "timer6" #endif /* Pins_Arduino_h */ diff --git a/bsp/stm32/stm32f469-st-disco/board/Kconfig b/bsp/stm32/stm32f469-st-disco/board/Kconfig index d1c8dbe9629..93b561d4744 100644 --- a/bsp/stm32/stm32f469-st-disco/board/Kconfig +++ b/bsp/stm32/stm32f469-st-disco/board/Kconfig @@ -183,7 +183,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM6 bool "Enable TIM6" diff --git a/bsp/stm32/stm32f723-st-disco/project.ewp b/bsp/stm32/stm32f723-st-disco/project.ewp index 174f59043d9..6aec2928272 100644 --- a/bsp/stm32/stm32f723-st-disco/project.ewp +++ b/bsp/stm32/stm32f723-st-disco/project.ewp @@ -2151,7 +2151,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\ipc\completion.c diff --git a/bsp/stm32/stm32f723-st-disco/project.uvprojx b/bsp/stm32/stm32f723-st-disco/project.uvprojx index 5298f594c07..4b0e3f910f5 100644 --- a/bsp/stm32/stm32f723-st-disco/project.uvprojx +++ b/bsp/stm32/stm32f723-st-disco/project.uvprojx @@ -469,9 +469,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c diff --git a/bsp/stm32/stm32f746-st-disco/board/Kconfig b/bsp/stm32/stm32f746-st-disco/board/Kconfig index 120807deb2e..dd1f0d0bf64 100644 --- a/bsp/stm32/stm32f746-st-disco/board/Kconfig +++ b/bsp/stm32/stm32f746-st-disco/board/Kconfig @@ -111,7 +111,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32f746-st-disco/project.ewp b/bsp/stm32/stm32f746-st-disco/project.ewp index 1b0a508120b..1e709e6ceab 100644 --- a/bsp/stm32/stm32f746-st-disco/project.ewp +++ b/bsp/stm32/stm32f746-st-disco/project.ewp @@ -2151,7 +2151,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\ipc\completion.c diff --git a/bsp/stm32/stm32f746-st-disco/project.uvprojx b/bsp/stm32/stm32f746-st-disco/project.uvprojx index 40a682b162d..b2bc254a6c2 100644 --- a/bsp/stm32/stm32f746-st-disco/project.uvprojx +++ b/bsp/stm32/stm32f746-st-disco/project.uvprojx @@ -468,9 +468,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c diff --git a/bsp/stm32/stm32f746-st-nucleo/board/Kconfig b/bsp/stm32/stm32f746-st-nucleo/board/Kconfig index 2d7eacf7535..224cd13c3c3 100644 --- a/bsp/stm32/stm32f746-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32f746-st-nucleo/board/Kconfig @@ -183,7 +183,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM2 bool "Enable TIM2" diff --git a/bsp/stm32/stm32f767-atk-apollo/board/Kconfig b/bsp/stm32/stm32f767-atk-apollo/board/Kconfig index b864a41c2c8..0bb7894b0ca 100644 --- a/bsp/stm32/stm32f767-atk-apollo/board/Kconfig +++ b/bsp/stm32/stm32f767-atk-apollo/board/Kconfig @@ -186,7 +186,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM11 bool "Enable TIM11" diff --git a/bsp/stm32/stm32g070-st-nucleo/board/Kconfig b/bsp/stm32/stm32g070-st-nucleo/board/Kconfig index 8d6190005ec..bbf6869bc49 100644 --- a/bsp/stm32/stm32g070-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32g070-st-nucleo/board/Kconfig @@ -129,7 +129,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM1 diff --git a/bsp/stm32/stm32g071-st-nucleo/board/Kconfig b/bsp/stm32/stm32g071-st-nucleo/board/Kconfig index 2f18269e648..899c308fb49 100644 --- a/bsp/stm32/stm32g071-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32g071-st-nucleo/board/Kconfig @@ -121,7 +121,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM2 diff --git a/bsp/stm32/stm32g491-st-nucleo/board/Kconfig b/bsp/stm32/stm32g491-st-nucleo/board/Kconfig index c1c027d8d26..9f0dcc53738 100644 --- a/bsp/stm32/stm32g491-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32g491-st-nucleo/board/Kconfig @@ -235,7 +235,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM7 bool "Enable TIM7" diff --git a/bsp/stm32/stm32h743-openmv-h7plus/project.ewp b/bsp/stm32/stm32h743-openmv-h7plus/project.ewp index 2f62b9c880b..74475b8ee59 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/project.ewp +++ b/bsp/stm32/stm32h743-openmv-h7plus/project.ewp @@ -2165,7 +2165,7 @@ $PROJ_DIR$\..\..\..\components\drivers\core\device.c - $PROJ_DIR$\..\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\..\components\drivers\i2c\i2c-bit-ops.c diff --git a/bsp/stm32/stm32h743-openmv-h7plus/project.uvprojx b/bsp/stm32/stm32h743-openmv-h7plus/project.uvprojx index 7577c5e1446..d6b51695b2d 100644 --- a/bsp/stm32/stm32h743-openmv-h7plus/project.uvprojx +++ b/bsp/stm32/stm32h743-openmv-h7plus/project.uvprojx @@ -469,9 +469,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\components\drivers\clock_time\clock_timer.c diff --git a/bsp/stm32/stm32h750-artpi/board/Kconfig b/bsp/stm32/stm32h750-artpi/board/Kconfig index 54f1c97c05a..68b2ed588d8 100644 --- a/bsp/stm32/stm32h750-artpi/board/Kconfig +++ b/bsp/stm32/stm32h750-artpi/board/Kconfig @@ -242,7 +242,7 @@ menu "On-chip Peripheral Drivers" bool "Enable lptimer" default n select RT_USING_LPTIMER - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_LPTIM config BSP_USING_LPTIM1 bool "Enable LPTIM1" diff --git a/bsp/stm32/stm32l433-ali-startkit/board/Kconfig b/bsp/stm32/stm32l433-ali-startkit/board/Kconfig index e435fd49a70..d42f7465c51 100644 --- a/bsp/stm32/stm32l433-ali-startkit/board/Kconfig +++ b/bsp/stm32/stm32l433-ali-startkit/board/Kconfig @@ -203,7 +203,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM15 bool "Enable TIM15" diff --git a/bsp/stm32/stm32l475-atk-pandora/applications/arduino_pinout/pins_arduino.h b/bsp/stm32/stm32l475-atk-pandora/applications/arduino_pinout/pins_arduino.h index 69578f337fd..79fe8c6ce49 100644 --- a/bsp/stm32/stm32l475-atk-pandora/applications/arduino_pinout/pins_arduino.h +++ b/bsp/stm32/stm32l475-atk-pandora/applications/arduino_pinout/pins_arduino.h @@ -70,7 +70,7 @@ /* Serial2 - PA2-TX PA3-RX */ #define RTDUINO_SERIAL2_DEVICE_NAME "uart2" -#define RTDUINO_TONE_HWTIMER_DEVICE_NAME "timer7" +#define RTDUINO_TONE_CLOCK_TIMER_DEVICE_NAME "timer7" /* I2C */ #if defined(BSP_USING_ARDUINO_AHT10) diff --git a/bsp/stm32/stm32l475-atk-pandora/board/Kconfig b/bsp/stm32/stm32l475-atk-pandora/board/Kconfig index bb300ec0e29..de2fc8ce25f 100644 --- a/bsp/stm32/stm32l475-atk-pandora/board/Kconfig +++ b/bsp/stm32/stm32l475-atk-pandora/board/Kconfig @@ -478,7 +478,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM7 bool "Enable TIM7" diff --git a/bsp/stm32/stm32l476-st-nucleo/applications/arduino_pinout/pins_arduino.h b/bsp/stm32/stm32l476-st-nucleo/applications/arduino_pinout/pins_arduino.h index e7362a43d0d..4c004252032 100644 --- a/bsp/stm32/stm32l476-st-nucleo/applications/arduino_pinout/pins_arduino.h +++ b/bsp/stm32/stm32l476-st-nucleo/applications/arduino_pinout/pins_arduino.h @@ -50,6 +50,6 @@ #define SS D10 #define RTDUINO_DEFAULT_SPI_BUS_NAME "spi1" -#define RTDUINO_TONE_HWTIMER_DEVICE_NAME "timer7" +#define RTDUINO_TONE_CLOCK_TIMER_DEVICE_NAME "timer7" #endif /* Pins_Arduino_h */ diff --git a/bsp/stm32/stm32l476-st-nucleo/board/Kconfig b/bsp/stm32/stm32l476-st-nucleo/board/Kconfig index ebbeebb534c..a8e9ee55f38 100644 --- a/bsp/stm32/stm32l476-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32l476-st-nucleo/board/Kconfig @@ -188,7 +188,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM7 bool "Enable TIM7" diff --git a/bsp/stm32/stm32l496-ali-developer/board/Kconfig b/bsp/stm32/stm32l496-ali-developer/board/Kconfig index 7c554b11aeb..56643f8cdd2 100644 --- a/bsp/stm32/stm32l496-ali-developer/board/Kconfig +++ b/bsp/stm32/stm32l496-ali-developer/board/Kconfig @@ -211,7 +211,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM15 bool "Enable TIM15" diff --git a/bsp/stm32/stm32l496-st-nucleo/board/Kconfig b/bsp/stm32/stm32l496-st-nucleo/board/Kconfig index 2787a7174b2..f0c35b330a8 100644 --- a/bsp/stm32/stm32l496-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32l496-st-nucleo/board/Kconfig @@ -207,7 +207,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM7 bool "Enable TIM7" diff --git a/bsp/stm32/stm32l4r5-st-nucleo/board/Kconfig b/bsp/stm32/stm32l4r5-st-nucleo/board/Kconfig index 1858c87a37b..24bbfa43516 100644 --- a/bsp/stm32/stm32l4r5-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32l4r5-st-nucleo/board/Kconfig @@ -323,7 +323,7 @@ menu "Hardware Drivers Config" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM1 bool "Enable TIM1" diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/Kconfig b/bsp/stm32/stm32mp157a-st-discovery/board/Kconfig index 8a564292bf1..05c61bf8b95 100644 --- a/bsp/stm32/stm32mp157a-st-discovery/board/Kconfig +++ b/bsp/stm32/stm32mp157a-st-discovery/board/Kconfig @@ -183,7 +183,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM14 bool "Enable TIM14" diff --git a/bsp/stm32/stm32mp157a-st-discovery/board/ports/timer_sample.c b/bsp/stm32/stm32mp157a-st-discovery/board/ports/timer_sample.c index 50c87ad0c86..402902db3f7 100644 --- a/bsp/stm32/stm32mp157a-st-discovery/board/ports/timer_sample.c +++ b/bsp/stm32/stm32mp157a-st-discovery/board/ports/timer_sample.c @@ -15,7 +15,7 @@ #include #include -#define HWTIMER_DEV_NAME "timer14" +#define CLOCK_TIMER_DEV_NAME "timer14" #define HWADC_DEV_NAME "adc2" #define REFER_VOLTAGE 330 /* voltage reference */ #define CONVERT_BITS (1 << 12) /* Conversion digit */ @@ -37,22 +37,22 @@ static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) return 0; } -static int hwtimer_stop(void) +static int clock_timer_stop(void) { rt_err_t ret = RT_EOK; rt_device_t hw_dev = RT_NULL; - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); return -RT_ERROR; } ret = rt_device_close(hw_dev); if (ret != RT_EOK) { - rt_kprintf("close %s device failed!\n", HWTIMER_DEV_NAME); + rt_kprintf("close %s device failed!\n", CLOCK_TIMER_DEV_NAME); return ret; } @@ -62,18 +62,18 @@ static int hwtimer_stop(void) return ret; } -static int hwtimer_start(void) +static int clock_timer_start(void) { rt_err_t ret = RT_EOK; - rt_hwtimerval_t timeout_s; + rt_clock_timerval_t timeout_s; rt_device_t hw_dev = RT_NULL; - rt_hwtimer_mode_t mode; + rt_clock_timer_mode_t mode; - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); return -RT_ERROR; } @@ -81,7 +81,7 @@ static int hwtimer_start(void) adc_dev = (rt_adc_device_t)rt_device_find(HWADC_DEV_NAME); if (adc_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWADC_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", HWADC_DEV_NAME); return -RT_ERROR; } @@ -89,7 +89,7 @@ static int hwtimer_start(void) ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); if (ret != RT_EOK) { - rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME); + rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME); return ret; } @@ -97,8 +97,8 @@ static int hwtimer_start(void) rt_device_set_rx_indicate(hw_dev, timeout_cb); /* Set the mode to periodic timer */ - mode = HWTIMER_MODE_PERIOD; - ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); if (ret != RT_EOK) { rt_kprintf("set mode failed! ret is :%d\n", ret); @@ -132,12 +132,12 @@ static int tim_sample(int argc, char *argv[]) if (!rt_strcmp(argv[1], "start")) { rt_kprintf("tim14 will start\n"); - hwtimer_start(); + clock_timer_start(); return RT_EOK; } else if (!rt_strcmp(argv[1], "stop")) { - hwtimer_stop(); + clock_timer_stop(); rt_kprintf("stop tim14 success!\n"); return RT_EOK; } diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/Kconfig b/bsp/stm32/stm32mp157a-st-ev1/board/Kconfig index 153c1df159e..fb4c2cea1e3 100644 --- a/bsp/stm32/stm32mp157a-st-ev1/board/Kconfig +++ b/bsp/stm32/stm32mp157a-st-ev1/board/Kconfig @@ -233,7 +233,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM14 bool "Enable TIM14" diff --git a/bsp/stm32/stm32mp157a-st-ev1/board/ports/timer_sample.c b/bsp/stm32/stm32mp157a-st-ev1/board/ports/timer_sample.c index 50c87ad0c86..402902db3f7 100644 --- a/bsp/stm32/stm32mp157a-st-ev1/board/ports/timer_sample.c +++ b/bsp/stm32/stm32mp157a-st-ev1/board/ports/timer_sample.c @@ -15,7 +15,7 @@ #include #include -#define HWTIMER_DEV_NAME "timer14" +#define CLOCK_TIMER_DEV_NAME "timer14" #define HWADC_DEV_NAME "adc2" #define REFER_VOLTAGE 330 /* voltage reference */ #define CONVERT_BITS (1 << 12) /* Conversion digit */ @@ -37,22 +37,22 @@ static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) return 0; } -static int hwtimer_stop(void) +static int clock_timer_stop(void) { rt_err_t ret = RT_EOK; rt_device_t hw_dev = RT_NULL; - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); return -RT_ERROR; } ret = rt_device_close(hw_dev); if (ret != RT_EOK) { - rt_kprintf("close %s device failed!\n", HWTIMER_DEV_NAME); + rt_kprintf("close %s device failed!\n", CLOCK_TIMER_DEV_NAME); return ret; } @@ -62,18 +62,18 @@ static int hwtimer_stop(void) return ret; } -static int hwtimer_start(void) +static int clock_timer_start(void) { rt_err_t ret = RT_EOK; - rt_hwtimerval_t timeout_s; + rt_clock_timerval_t timeout_s; rt_device_t hw_dev = RT_NULL; - rt_hwtimer_mode_t mode; + rt_clock_timer_mode_t mode; - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); return -RT_ERROR; } @@ -81,7 +81,7 @@ static int hwtimer_start(void) adc_dev = (rt_adc_device_t)rt_device_find(HWADC_DEV_NAME); if (adc_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWADC_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", HWADC_DEV_NAME); return -RT_ERROR; } @@ -89,7 +89,7 @@ static int hwtimer_start(void) ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); if (ret != RT_EOK) { - rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME); + rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME); return ret; } @@ -97,8 +97,8 @@ static int hwtimer_start(void) rt_device_set_rx_indicate(hw_dev, timeout_cb); /* Set the mode to periodic timer */ - mode = HWTIMER_MODE_PERIOD; - ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); if (ret != RT_EOK) { rt_kprintf("set mode failed! ret is :%d\n", ret); @@ -132,12 +132,12 @@ static int tim_sample(int argc, char *argv[]) if (!rt_strcmp(argv[1], "start")) { rt_kprintf("tim14 will start\n"); - hwtimer_start(); + clock_timer_start(); return RT_EOK; } else if (!rt_strcmp(argv[1], "stop")) { - hwtimer_stop(); + clock_timer_stop(); rt_kprintf("stop tim14 success!\n"); return RT_EOK; } diff --git a/bsp/stm32/stm32wb55-st-nucleo/board/Kconfig b/bsp/stm32/stm32wb55-st-nucleo/board/Kconfig index c57500c423d..1351db70619 100644 --- a/bsp/stm32/stm32wb55-st-nucleo/board/Kconfig +++ b/bsp/stm32/stm32wb55-st-nucleo/board/Kconfig @@ -116,7 +116,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM16 diff --git a/bsp/synwit/libraries/SWM320_drivers/SConscript b/bsp/synwit/libraries/SWM320_drivers/SConscript index 9c20c550a4c..c4beaaac5b0 100644 --- a/bsp/synwit/libraries/SWM320_drivers/SConscript +++ b/bsp/synwit/libraries/SWM320_drivers/SConscript @@ -12,8 +12,8 @@ if GetDepend(['RT_USING_PIN']): if GetDepend(['RT_USING_ADC']): src += ['drv_adc.c'] -if GetDepend(['RT_USING_HWTIMER']): - src += ['drv_hwtimer.c'] +if GetDepend(['RT_USING_CLOCK_TIME']): + src += ['drv_timer.c'] if GetDepend(['RT_USING_I2C']): src += ['drv_soft_i2c.c'] diff --git a/bsp/synwit/libraries/SWM320_drivers/drv_hwtimer.c b/bsp/synwit/libraries/SWM320_drivers/drv_timer.c similarity index 59% rename from bsp/synwit/libraries/SWM320_drivers/drv_hwtimer.c rename to bsp/synwit/libraries/SWM320_drivers/drv_timer.c index 2970dc5e16f..a1ec811ee06 100644 --- a/bsp/synwit/libraries/SWM320_drivers/drv_hwtimer.c +++ b/bsp/synwit/libraries/SWM320_drivers/drv_timer.c @@ -9,13 +9,13 @@ * 2020-07-10 lik format file */ -#include "drv_hwtimer.h" +#include "drv_timer.h" -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME #ifdef BSP_USING_TIM //#define DRV_DEBUG -#define LOG_TAG "drv.hwtimer" +#define LOG_TAG "drv.clock_timer" #include #if !defined(BSP_USING_TIM0) && !defined(BSP_USING_TIM1) && !defined(BSP_USING_TIM2) && !defined(BSP_USING_TIM3) \ @@ -30,7 +30,7 @@ .maxfreq = 120000000, \ .minfreq = 120000000, \ .maxcnt = 0xFFFFFFFF, \ - .cntmode = HWTIMER_CNTMODE_DW, \ + .cntmode = CLOCK_TIMER_CNTMODE_DW, \ } #endif /* TIM_DEV_INFO_CONFIG */ @@ -94,16 +94,16 @@ #endif /* TIM5_CFG */ #endif /* BSP_USING_TIM5 */ -struct swm_hwtimer_cfg +struct swm_clock_timer_cfg { char *name; TIMR_TypeDef *TIMRx; }; -struct swm_hwtimer_device +struct swm_clock_timer_device { - struct swm_hwtimer_cfg *hwtimer_cfg; - rt_hwtimer_t time_device; + struct swm_clock_timer_cfg *clock_timer_cfg; + rt_clock_timer_t time_device; }; enum @@ -128,7 +128,7 @@ enum #endif }; -static struct swm_hwtimer_cfg swm_hwtimer_cfg[] = +static struct swm_clock_timer_cfg swm_clock_timer_cfg[] = { #ifdef BSP_USING_TIM0 TIM0_CFG, @@ -150,79 +150,79 @@ static struct swm_hwtimer_cfg swm_hwtimer_cfg[] = #endif }; -static struct swm_hwtimer_device hwtimer_obj[sizeof(swm_hwtimer_cfg) / sizeof(swm_hwtimer_cfg[0])] = {0}; +static struct swm_clock_timer_device clock_timer_obj[sizeof(swm_clock_timer_cfg) / sizeof(swm_clock_timer_cfg[0])] = {0}; -static void swm_timer_configure(struct rt_hwtimer_device *timer_device, rt_uint32_t state) +static void swm_timer_configure(struct rt_clock_timer_device *timer_device, rt_uint32_t state) { - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; RT_ASSERT(timer_device != RT_NULL); if (state) { - hwtimer_cfg = timer_device->parent.user_data; - TIMR_Init(hwtimer_cfg->TIMRx, TIMR_MODE_TIMER, SystemCoreClock, 1); + clock_timer_cfg = timer_device->parent.user_data; + TIMR_Init(clock_timer_cfg->TIMRx, TIMR_MODE_TIMER, SystemCoreClock, 1); timer_device->freq = SystemCoreClock; } } -static rt_err_t swm_timer_start(rt_hwtimer_t *timer_device, rt_uint32_t cnt, rt_hwtimer_mode_t opmode) +static rt_err_t swm_timer_start(rt_clock_timer_t *timer_device, rt_uint32_t cnt, rt_clock_timer_mode_t opmode) { rt_err_t result = RT_EOK; - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; RT_ASSERT(timer_device != RT_NULL); - hwtimer_cfg = timer_device->parent.user_data; + clock_timer_cfg = timer_device->parent.user_data; - if (opmode == HWTIMER_MODE_ONESHOT) + if (opmode == CLOCK_TIMER_MODE_ONESHOT) { /* set timer to single mode */ - timer_device->mode = HWTIMER_MODE_ONESHOT; + timer_device->mode = CLOCK_TIMER_MODE_ONESHOT; } else { - timer_device->mode = HWTIMER_MODE_PERIOD; + timer_device->mode = CLOCK_TIMER_MODE_PERIOD; } - TIMR_SetPeriod(hwtimer_cfg->TIMRx, cnt); - TIMR_Stop(hwtimer_cfg->TIMRx); - TIMR_Start(hwtimer_cfg->TIMRx); + TIMR_SetPeriod(clock_timer_cfg->TIMRx, cnt); + TIMR_Stop(clock_timer_cfg->TIMRx); + TIMR_Start(clock_timer_cfg->TIMRx); return result; } -static void swm_timer_stop(rt_hwtimer_t *timer_device) +static void swm_timer_stop(rt_clock_timer_t *timer_device) { - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; RT_ASSERT(timer_device != RT_NULL); - hwtimer_cfg = timer_device->parent.user_data; + clock_timer_cfg = timer_device->parent.user_data; /* stop timer */ - TIMR_Stop(hwtimer_cfg->TIMRx); + TIMR_Stop(clock_timer_cfg->TIMRx); } -static rt_uint32_t swm_timer_count_get(rt_hwtimer_t *timer_device) +static rt_uint32_t swm_timer_count_get(rt_clock_timer_t *timer_device) { - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; RT_ASSERT(timer_device != RT_NULL); - hwtimer_cfg = timer_device->parent.user_data; + clock_timer_cfg = timer_device->parent.user_data; - return TIMR_GetCurValue(hwtimer_cfg->TIMRx); + return TIMR_GetCurValue(clock_timer_cfg->TIMRx); } -static rt_err_t swm_timer_control(rt_hwtimer_t *timer_device, rt_uint32_t cmd, void *args) +static rt_err_t swm_timer_control(rt_clock_timer_t *timer_device, rt_uint32_t cmd, void *args) { - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; rt_err_t result = RT_EOK; RT_ASSERT(timer_device != RT_NULL); RT_ASSERT(args != RT_NULL); - hwtimer_cfg = timer_device->parent.user_data; + clock_timer_cfg = timer_device->parent.user_data; switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { rt_uint32_t freq; freq = *(rt_uint32_t *)args; - TIMR_Init(hwtimer_cfg->TIMRx, TIMR_MODE_TIMER, SystemCoreClock / freq, 1); + TIMR_Init(clock_timer_cfg->TIMRx, TIMR_MODE_TIMER, SystemCoreClock / freq, 1); } break; default: @@ -235,9 +235,9 @@ static rt_err_t swm_timer_control(rt_hwtimer_t *timer_device, rt_uint32_t cmd, v return result; } -static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG; +static const struct rt_clock_timer_info _info = TIM_DEV_INFO_CONFIG; -static const struct rt_hwtimer_ops swm_timer_ops = +static const struct rt_clock_timer_ops swm_timer_ops = { .init = swm_timer_configure, .start = swm_timer_start, @@ -245,14 +245,14 @@ static const struct rt_hwtimer_ops swm_timer_ops = .count_get = swm_timer_count_get, .control = swm_timer_control}; -void swm_timer_isr(rt_hwtimer_t *timer_device) +void swm_timer_isr(rt_clock_timer_t *timer_device) { - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; RT_ASSERT(timer_device != RT_NULL); - hwtimer_cfg = timer_device->parent.user_data; + clock_timer_cfg = timer_device->parent.user_data; - TIMR_INTClr(hwtimer_cfg->TIMRx); - rt_device_hwtimer_isr(timer_device); + TIMR_INTClr(clock_timer_cfg->TIMRx); + rt_clock_timer_isr(timer_device); } #ifdef BSP_USING_TIM0 @@ -260,7 +260,7 @@ void TIMR0_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[TIM0_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[TIM0_INDEX].time_device)); /* leave interrupt */ rt_interrupt_leave(); } @@ -271,7 +271,7 @@ void TIMR1_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[TIM1_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[TIM1_INDEX].time_device)); /* leave interrupt */ rt_interrupt_leave(); } @@ -282,7 +282,7 @@ void TIMR2_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[TIM2_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[TIM2_INDEX].time_device)); /* leave interrupt */ rt_interrupt_leave(); } @@ -293,7 +293,7 @@ void TIMR3_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[TIM3_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[TIM3_INDEX].time_device)); /* leave interrupt */ rt_interrupt_leave(); } @@ -304,7 +304,7 @@ void TIMR4_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[TIM4_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[TIM4_INDEX].time_device)); /* leave interrupt */ rt_interrupt_leave(); } @@ -315,7 +315,7 @@ void TIMR5_Handler(void) { /* enter interrupt */ rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[TIM5_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[TIM5_INDEX].time_device)); /* leave interrupt */ rt_interrupt_leave(); } @@ -326,19 +326,19 @@ static int swm_timer_init(void) int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(swm_hwtimer_cfg) / sizeof(swm_hwtimer_cfg[0]); i++) + for (i = 0; i < sizeof(swm_clock_timer_cfg) / sizeof(swm_clock_timer_cfg[0]); i++) { - hwtimer_obj[i].hwtimer_cfg = &swm_hwtimer_cfg[i]; - hwtimer_obj[i].time_device.info = &_info; - hwtimer_obj[i].time_device.ops = &swm_timer_ops; - result = rt_device_hwtimer_register(&hwtimer_obj[i].time_device, hwtimer_obj[i].hwtimer_cfg->name, hwtimer_obj[i].hwtimer_cfg); + clock_timer_obj[i].clock_timer_cfg = &swm_clock_timer_cfg[i]; + clock_timer_obj[i].time_device.info = &_info; + clock_timer_obj[i].time_device.ops = &swm_timer_ops; + result = rt_clock_timer_register(&clock_timer_obj[i].time_device, clock_timer_obj[i].clock_timer_cfg->name, clock_timer_obj[i].clock_timer_cfg); if (result != RT_EOK) { - LOG_E("%s register fail.", hwtimer_obj[i].hwtimer_cfg->name); + LOG_E("%s register fail.", clock_timer_obj[i].clock_timer_cfg->name); } else { - LOG_D("%s register success.", hwtimer_obj[i].hwtimer_cfg->name); + LOG_D("%s register success.", clock_timer_obj[i].clock_timer_cfg->name); } } @@ -347,4 +347,4 @@ static int swm_timer_init(void) INIT_BOARD_EXPORT(swm_timer_init); #endif /* BSP_USING_TIM */ -#endif /* RT_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME */ diff --git a/bsp/synwit/libraries/SWM320_drivers/drv_hwtimer.h b/bsp/synwit/libraries/SWM320_drivers/drv_timer.h similarity index 75% rename from bsp/synwit/libraries/SWM320_drivers/drv_hwtimer.h rename to bsp/synwit/libraries/SWM320_drivers/drv_timer.h index fa74a2a68f6..0d2818ac14b 100644 --- a/bsp/synwit/libraries/SWM320_drivers/drv_hwtimer.h +++ b/bsp/synwit/libraries/SWM320_drivers/drv_timer.h @@ -9,11 +9,11 @@ * 2020-07-10 lik rewrite */ -#ifndef __DRV_HWTIMER_H__ -#define __DRV_HWTIMER_H__ +#ifndef __DRV_CLOCK_TIMER_H__ +#define __DRV_CLOCK_TIMER_H__ #include "board.h" int swm_timer_init(void); -#endif /* __DRV_HWTIMER_H__ */ +#endif /* __DRV_CLOCK_TIMER_H__ */ diff --git a/bsp/synwit/libraries/SWM341_drivers/SConscript b/bsp/synwit/libraries/SWM341_drivers/SConscript index 8aacb2087fc..26bef4ca2bc 100644 --- a/bsp/synwit/libraries/SWM341_drivers/SConscript +++ b/bsp/synwit/libraries/SWM341_drivers/SConscript @@ -18,8 +18,8 @@ if GetDepend(['RT_USING_DAC']): if GetDepend(['RT_USING_CAN']): src += ['drv_can.c'] -if GetDepend(['RT_USING_HWTIMER']): - src += ['drv_hwtimer.c'] +if GetDepend(['RT_USING_CLOCK_TIME']): + src += ['drv_timer.c'] if GetDepend(['RT_USING_I2C']): src += ['drv_soft_i2c.c'] diff --git a/bsp/synwit/libraries/SWM341_drivers/drv_hwtimer.c b/bsp/synwit/libraries/SWM341_drivers/drv_timer.c similarity index 70% rename from bsp/synwit/libraries/SWM341_drivers/drv_hwtimer.c rename to bsp/synwit/libraries/SWM341_drivers/drv_timer.c index c66836b32fb..507190caacf 100644 --- a/bsp/synwit/libraries/SWM341_drivers/drv_hwtimer.c +++ b/bsp/synwit/libraries/SWM341_drivers/drv_timer.c @@ -8,13 +8,13 @@ * 2021-07-01 lik first version */ -#include "drv_hwtimer.h" +#include "drv_timer.h" -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME #ifdef BSP_USING_TIM //#define DRV_DEBUG -#define LOG_TAG "drv.hwtimer" +#define LOG_TAG "drv.clock_timer" #include #if !defined(BSP_USING_TIM0) && !defined(BSP_USING_TIM1) && !defined(BSP_USING_TIM2) && !defined(BSP_USING_TIM3) \ @@ -32,7 +32,7 @@ .maxfreq = 1000000, \ .minfreq = 1000000, \ .maxcnt = 0xFFFFFFFF, \ - .cntmode = HWTIMER_CNTMODE_DW, \ + .cntmode = CLOCK_TIMER_CNTMODE_DW, \ } #endif /* TIM_DEV_INFO_CONFIG */ @@ -206,16 +206,16 @@ #endif /* BTIM11_CFG */ #endif /* BSP_USING_BTIM11 */ -struct swm_hwtimer_cfg +struct swm_clock_timer_cfg { char *name; TIMR_TypeDef *TIMRx; }; -struct swm_hwtimer_device +struct swm_clock_timer_device { - struct swm_hwtimer_cfg *hwtimer_cfg; - rt_hwtimer_t time_device; + struct swm_clock_timer_cfg *clock_timer_cfg; + rt_clock_timer_t time_device; }; enum @@ -273,7 +273,7 @@ enum #endif }; -static struct swm_hwtimer_cfg swm_hwtimer_cfg[] = +static struct swm_clock_timer_cfg swm_clock_timer_cfg[] = { #ifdef BSP_USING_TIM0 TIM0_CFG, @@ -328,79 +328,79 @@ static struct swm_hwtimer_cfg swm_hwtimer_cfg[] = #endif }; -static struct swm_hwtimer_device hwtimer_obj[sizeof(swm_hwtimer_cfg) / sizeof(swm_hwtimer_cfg[0])] = {0}; +static struct swm_clock_timer_device clock_timer_obj[sizeof(swm_clock_timer_cfg) / sizeof(swm_clock_timer_cfg[0])] = {0}; -static void swm_timer_configure(struct rt_hwtimer_device *timer_device, rt_uint32_t state) +static void swm_timer_configure(struct rt_clock_timer_device *timer_device, rt_uint32_t state) { - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; RT_ASSERT(timer_device != RT_NULL); if (state) { - hwtimer_cfg = timer_device->parent.user_data; - TIMR_Init(hwtimer_cfg->TIMRx, TIMR_MODE_TIMER, CyclesPerUs, 1000000, 1); + clock_timer_cfg = timer_device->parent.user_data; + TIMR_Init(clock_timer_cfg->TIMRx, TIMR_MODE_TIMER, CyclesPerUs, 1000000, 1); timer_device->freq = 1000000; } } -static rt_err_t swm_timer_start(rt_hwtimer_t *timer_device, rt_uint32_t cnt, rt_hwtimer_mode_t opmode) +static rt_err_t swm_timer_start(rt_clock_timer_t *timer_device, rt_uint32_t cnt, rt_clock_timer_mode_t opmode) { rt_err_t result = RT_EOK; - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; RT_ASSERT(timer_device != RT_NULL); - hwtimer_cfg = timer_device->parent.user_data; + clock_timer_cfg = timer_device->parent.user_data; - if (opmode == HWTIMER_MODE_ONESHOT) + if (opmode == CLOCK_TIMER_MODE_ONESHOT) { /* set timer to single mode */ - timer_device->mode = HWTIMER_MODE_ONESHOT; + timer_device->mode = CLOCK_TIMER_MODE_ONESHOT; } else { - timer_device->mode = HWTIMER_MODE_PERIOD; + timer_device->mode = CLOCK_TIMER_MODE_PERIOD; } - hwtimer_cfg->TIMRx->LOAD = cnt - 1; - TIMR_Stop(hwtimer_cfg->TIMRx); - TIMR_Start(hwtimer_cfg->TIMRx); + clock_timer_cfg->TIMRx->LOAD = cnt - 1; + TIMR_Stop(clock_timer_cfg->TIMRx); + TIMR_Start(clock_timer_cfg->TIMRx); return result; } -static void swm_timer_stop(rt_hwtimer_t *timer_device) +static void swm_timer_stop(rt_clock_timer_t *timer_device) { - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; RT_ASSERT(timer_device != RT_NULL); - hwtimer_cfg = timer_device->parent.user_data; + clock_timer_cfg = timer_device->parent.user_data; /* stop timer */ - TIMR_Stop(hwtimer_cfg->TIMRx); + TIMR_Stop(clock_timer_cfg->TIMRx); } -static rt_uint32_t swm_timer_count_get(rt_hwtimer_t *timer_device) +static rt_uint32_t swm_timer_count_get(rt_clock_timer_t *timer_device) { - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; RT_ASSERT(timer_device != RT_NULL); - hwtimer_cfg = timer_device->parent.user_data; + clock_timer_cfg = timer_device->parent.user_data; - return TIMR_GetCurValue(hwtimer_cfg->TIMRx); + return TIMR_GetCurValue(clock_timer_cfg->TIMRx); } -static rt_err_t swm_timer_control(rt_hwtimer_t *timer_device, rt_uint32_t cmd, void *args) +static rt_err_t swm_timer_control(rt_clock_timer_t *timer_device, rt_uint32_t cmd, void *args) { - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; rt_err_t result = RT_EOK; RT_ASSERT(timer_device != RT_NULL); RT_ASSERT(args != RT_NULL); - hwtimer_cfg = timer_device->parent.user_data; + clock_timer_cfg = timer_device->parent.user_data; switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { rt_uint32_t freq; freq = *(rt_uint32_t *)args; - TIMR_Init(hwtimer_cfg->TIMRx, TIMR_MODE_TIMER, CyclesPerUs, freq, 1); + TIMR_Init(clock_timer_cfg->TIMRx, TIMR_MODE_TIMER, CyclesPerUs, freq, 1); } break; default: @@ -413,9 +413,9 @@ static rt_err_t swm_timer_control(rt_hwtimer_t *timer_device, rt_uint32_t cmd, v return result; } -static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG; +static const struct rt_clock_timer_info _info = TIM_DEV_INFO_CONFIG; -static const struct rt_hwtimer_ops swm_timer_ops = +static const struct rt_clock_timer_ops swm_timer_ops = { .init = swm_timer_configure, .start = swm_timer_start, @@ -423,21 +423,21 @@ static const struct rt_hwtimer_ops swm_timer_ops = .count_get = swm_timer_count_get, .control = swm_timer_control}; -void swm_timer_isr(rt_hwtimer_t *timer_device) +void swm_timer_isr(rt_clock_timer_t *timer_device) { - struct swm_hwtimer_cfg *hwtimer_cfg = RT_NULL; + struct swm_clock_timer_cfg *clock_timer_cfg = RT_NULL; RT_ASSERT(timer_device != RT_NULL); - hwtimer_cfg = timer_device->parent.user_data; + clock_timer_cfg = timer_device->parent.user_data; - TIMR_INTClr(hwtimer_cfg->TIMRx); - rt_device_hwtimer_isr(timer_device); + TIMR_INTClr(clock_timer_cfg->TIMRx); + rt_clock_timer_isr(timer_device); } #ifdef BSP_USING_TIM0 void TIMR0_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[TIM0_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[TIM0_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_TIM0 @@ -446,7 +446,7 @@ void TIMR0_Handler(void) void TIMR1_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[TIM1_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[TIM1_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_TIM1 @@ -455,7 +455,7 @@ void TIMR1_Handler(void) void TIMR2_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[TIM2_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[TIM2_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_TIM2 @@ -464,7 +464,7 @@ void TIMR2_Handler(void) void TIMR3_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[TIM3_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[TIM3_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_TIM3 @@ -473,7 +473,7 @@ void TIMR3_Handler(void) void TIMR4_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[TIM4_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[TIM4_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_TIM4 @@ -482,7 +482,7 @@ void TIMR4_Handler(void) void BTIMR0_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM0_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM0_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM0 @@ -491,7 +491,7 @@ void BTIMR0_Handler(void) void BTIMR1_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM1_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM1_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM1 @@ -500,7 +500,7 @@ void BTIMR1_Handler(void) void BTIMR2_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM2_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM2_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM2 @@ -509,7 +509,7 @@ void BTIMR2_Handler(void) void BTIMR3_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM3_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM3_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM3 @@ -518,7 +518,7 @@ void BTIMR3_Handler(void) void BTIMR4_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM4_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM4_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM4 @@ -527,7 +527,7 @@ void BTIMR4_Handler(void) void BTIMR5_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM5_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM5_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM5 @@ -536,7 +536,7 @@ void BTIMR5_Handler(void) void BTIMR6_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM6_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM6_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM6 @@ -545,7 +545,7 @@ void BTIMR6_Handler(void) void BTIMR7_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM7_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM7_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM7 @@ -554,7 +554,7 @@ void BTIMR7_Handler(void) void BTIMR8_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM8_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM8_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM8 @@ -563,7 +563,7 @@ void BTIMR8_Handler(void) void BTIMR9_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM9_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM9_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM9 @@ -572,7 +572,7 @@ void BTIMR9_Handler(void) void BTIMR10_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM10_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM10_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM10 @@ -581,7 +581,7 @@ void BTIMR10_Handler(void) void BTIMR11_Handler(void) { rt_interrupt_enter(); - swm_timer_isr(&(hwtimer_obj[BTIM11_INDEX].time_device)); + swm_timer_isr(&(clock_timer_obj[BTIM11_INDEX].time_device)); rt_interrupt_leave(); } #endif // BSP_USING_BTIM11 @@ -591,19 +591,19 @@ int swm_timer_init(void) int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(swm_hwtimer_cfg) / sizeof(swm_hwtimer_cfg[0]); i++) + for (i = 0; i < sizeof(swm_clock_timer_cfg) / sizeof(swm_clock_timer_cfg[0]); i++) { - hwtimer_obj[i].hwtimer_cfg = &swm_hwtimer_cfg[i]; - hwtimer_obj[i].time_device.info = &_info; - hwtimer_obj[i].time_device.ops = &swm_timer_ops; - result = rt_device_hwtimer_register(&hwtimer_obj[i].time_device, hwtimer_obj[i].hwtimer_cfg->name, hwtimer_obj[i].hwtimer_cfg); + clock_timer_obj[i].clock_timer_cfg = &swm_clock_timer_cfg[i]; + clock_timer_obj[i].time_device.info = &_info; + clock_timer_obj[i].time_device.ops = &swm_timer_ops; + result = rt_clock_timer_register(&clock_timer_obj[i].time_device, clock_timer_obj[i].clock_timer_cfg->name, clock_timer_obj[i].clock_timer_cfg); if (result != RT_EOK) { - LOG_E("%s register fail.", hwtimer_obj[i].hwtimer_cfg->name); + LOG_E("%s register fail.", clock_timer_obj[i].clock_timer_cfg->name); } else { - LOG_D("%s register success.", hwtimer_obj[i].hwtimer_cfg->name); + LOG_D("%s register success.", clock_timer_obj[i].clock_timer_cfg->name); } } @@ -612,4 +612,4 @@ int swm_timer_init(void) INIT_BOARD_EXPORT(swm_timer_init); #endif /* BSP_USING_TIM */ -#endif /* RT_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME */ diff --git a/bsp/synwit/libraries/SWM341_drivers/drv_hwtimer.h b/bsp/synwit/libraries/SWM341_drivers/drv_timer.h similarity index 72% rename from bsp/synwit/libraries/SWM341_drivers/drv_hwtimer.h rename to bsp/synwit/libraries/SWM341_drivers/drv_timer.h index 861d447b7b1..745b8c74e31 100644 --- a/bsp/synwit/libraries/SWM341_drivers/drv_hwtimer.h +++ b/bsp/synwit/libraries/SWM341_drivers/drv_timer.h @@ -8,11 +8,11 @@ * 2021-07-01 lik first version */ -#ifndef __DRV_HWTIMER_H__ -#define __DRV_HWTIMER_H__ +#ifndef __DRV_CLOCK_TIMER_H__ +#define __DRV_CLOCK_TIMER_H__ #include "board.h" int swm_timer_init(void); -#endif /* __DRV_HWTIMER_H__ */ +#endif /* __DRV_CLOCK_TIMER_H__ */ diff --git a/bsp/synwit/swm320-mini/applications/main.c b/bsp/synwit/swm320-mini/applications/main.c index ee150569ff7..4350be85ed2 100644 --- a/bsp/synwit/swm320-mini/applications/main.c +++ b/bsp/synwit/swm320-mini/applications/main.c @@ -81,42 +81,42 @@ MSH_CMD_EXPORT(adc_vol_sample, adc voltage convert sample); #endif #ifdef BSP_USING_TIM -#define HWTIMER_DEV_NAME "timer0" +#define CLOCK_TIMER_DEV_NAME "timer0" static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) { - rt_kprintf("this is hwtimer timeout callback fucntion!\n"); + rt_kprintf("this is clock_timer timeout callback fucntion!\n"); rt_kprintf("tick is :%d !\n", rt_tick_get()); return 0; } -static int hwtimer_sample(int argc, char *argv[]) +static int clock_timer_sample(int argc, char *argv[]) { rt_err_t ret = RT_EOK; - rt_hwtimerval_t timeout_s; + rt_clock_timerval_t timeout_s; rt_device_t hw_dev = RT_NULL; - rt_hwtimer_mode_t mode; + rt_clock_timer_mode_t mode; - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); return -RT_ERROR; } ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); if (ret != RT_EOK) { - rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME); + rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME); return ret; } rt_device_set_rx_indicate(hw_dev, timeout_cb); - mode = HWTIMER_MODE_PERIOD; - //mode = HWTIMER_MODE_ONESHOT; - ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + //mode = CLOCK_TIMER_MODE_ONESHOT; + ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); if (ret != RT_EOK) { rt_kprintf("set mode failed! ret is :%d\n", ret); @@ -139,7 +139,7 @@ static int hwtimer_sample(int argc, char *argv[]) return ret; } -MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample); +MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample); #endif #ifdef BSP_USING_PWM @@ -553,9 +553,9 @@ static int norflash_sample(int argc, char *argv[]) rt_kprintf("id = %08x!\n", id); // rt_device_set_rx_indicate(hw_dev, timeout_cb); - // mode = HWTIMER_MODE_PERIOD; - // //mode = HWTIMER_MODE_ONESHOT; - // ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + // mode = CLOCK_TIMER_MODE_PERIOD; + // //mode = CLOCK_TIMER_MODE_ONESHOT; + // ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); // if (ret != RT_EOK) // { // rt_kprintf("set mode failed! ret is :%d\n", ret); diff --git a/bsp/synwit/swm320-mini/board/Kconfig b/bsp/synwit/swm320-mini/board/Kconfig index 6dab8a31efc..8a2c6875e16 100644 --- a/bsp/synwit/swm320-mini/board/Kconfig +++ b/bsp/synwit/swm320-mini/board/Kconfig @@ -99,9 +99,9 @@ menu "On-chip Peripheral Drivers" endif menuconfig BSP_USING_TIM - bool "Enable HWTIMER" + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM0 bool "Enable TIM0" diff --git a/bsp/synwit/swm341-mini/applications/main.c b/bsp/synwit/swm341-mini/applications/main.c index f46e4395cd5..4d32b758e2b 100644 --- a/bsp/synwit/swm341-mini/applications/main.c +++ b/bsp/synwit/swm341-mini/applications/main.c @@ -247,42 +247,42 @@ int can_sample(int argc, char *argv[]) MSH_CMD_EXPORT(can_sample, can device sample); #endif #ifdef BSP_USING_TIM -#define HWTIMER_DEV_NAME "timer0" +#define CLOCK_TIMER_DEV_NAME "timer0" static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) { - rt_kprintf("this is hwtimer timeout callback fucntion!\n"); + rt_kprintf("this is clock_timer timeout callback fucntion!\n"); rt_kprintf("tick is :%d !\n", rt_tick_get()); return 0; } -static int hwtimer_sample(int argc, char *argv[]) +static int clock_timer_sample(int argc, char *argv[]) { rt_err_t ret = RT_EOK; - rt_hwtimerval_t timeout_s; + rt_clock_timerval_t timeout_s; rt_device_t hw_dev = RT_NULL; - rt_hwtimer_mode_t mode; + rt_clock_timer_mode_t mode; - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); return -RT_ERROR; } ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); if (ret != RT_EOK) { - rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME); + rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME); return ret; } rt_device_set_rx_indicate(hw_dev, timeout_cb); - mode = HWTIMER_MODE_PERIOD; - //mode = HWTIMER_MODE_ONESHOT; - ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + //mode = CLOCK_TIMER_MODE_ONESHOT; + ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); if (ret != RT_EOK) { rt_kprintf("set mode failed! ret is :%d\n", ret); @@ -305,7 +305,7 @@ static int hwtimer_sample(int argc, char *argv[]) return ret; } -MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample); +MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample); #endif #ifdef BSP_USING_PWM diff --git a/bsp/synwit/swm341-mini/board/Kconfig b/bsp/synwit/swm341-mini/board/Kconfig index df36c1a65cc..6e6564850d4 100644 --- a/bsp/synwit/swm341-mini/board/Kconfig +++ b/bsp/synwit/swm341-mini/board/Kconfig @@ -126,9 +126,9 @@ menu "On-chip Peripheral Drivers" endif menuconfig BSP_USING_TIM - bool "Enable HWTIMER" + bool "Enable CLOCK_TIMER" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM0 bool "Enable TIM0" diff --git a/bsp/tae32f5300/Libraries/SConscript b/bsp/tae32f5300/Libraries/SConscript index c084d6df4b7..730c641e288 100644 --- a/bsp/tae32f5300/Libraries/SConscript +++ b/bsp/tae32f5300/Libraries/SConscript @@ -35,7 +35,7 @@ if GetDepend(['RT_USING_WDT']): src += ['TAE32F53xx_StdPeriph_Driver/src/tae32f53xx_ll_wwdg.c'] src += ['TAE32F53xx_StdPeriph_Driver/src/tae32f53xx_ll_iwdg.c'] -if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM'] or GetDepend(['RT_USING_PULSE_ENCODER'])): +if GetDepend(['RT_USING_CLOCK_TIME']) or GetDepend(['RT_USING_PWM'] or GetDepend(['RT_USING_PULSE_ENCODER'])): src += ['TAE32F53xx_StdPeriph_Driver/src/tae32f53xx_ll_tmr.c'] #add for startup script diff --git a/bsp/tae32f5300/drivers/Kconfig b/bsp/tae32f5300/drivers/Kconfig index 6d39184c1ae..29451af6c7f 100644 --- a/bsp/tae32f5300/drivers/Kconfig +++ b/bsp/tae32f5300/drivers/Kconfig @@ -233,7 +233,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIMER bool "Enable TIMER" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIMER config BSP_USING_TIMER5 bool "Enable TIMER5" diff --git a/bsp/tkm32F499/drivers/Kconfig b/bsp/tkm32F499/drivers/Kconfig index 4e7e9a19d66..d856bc73ff4 100644 --- a/bsp/tkm32F499/drivers/Kconfig +++ b/bsp/tkm32F499/drivers/Kconfig @@ -87,7 +87,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM2 bool "Enable TIM2" diff --git a/bsp/tm4c123bsp/board/Kconfig b/bsp/tm4c123bsp/board/Kconfig index b7356b7fade..2387534959a 100644 --- a/bsp/tm4c123bsp/board/Kconfig +++ b/bsp/tm4c123bsp/board/Kconfig @@ -262,7 +262,7 @@ menu "On-chip Peripheral Drivers" menuconfig BSP_USING_TIM bool "Enable timer" default n - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME if BSP_USING_TIM config BSP_USING_TIM2 bool "Enable TIM2" diff --git a/bsp/tm4c123bsp/libraries/Drivers/SConscript b/bsp/tm4c123bsp/libraries/Drivers/SConscript index 94e0d77ba12..99d85cd7f79 100644 --- a/bsp/tm4c123bsp/libraries/Drivers/SConscript +++ b/bsp/tm4c123bsp/libraries/Drivers/SConscript @@ -14,8 +14,8 @@ if GetDepend(['RT_USING_PIN']): if GetDepend(['RT_USING_SERIAL']): src += ['drv_uart.c'] -if GetDepend(['RT_USING_HWTIMER']): - src += ['drv_hwtimer.c'] +if GetDepend(['RT_USING_CLOCK_TIME']): + src += ['drv_timer.c'] if GetDepend(['RT_USING_PWM']): src += ['drv_pwm.c'] diff --git a/bsp/tm4c123bsp/libraries/TivaWare_C_series/SConscript b/bsp/tm4c123bsp/libraries/TivaWare_C_series/SConscript index 6bd89e4889a..f638750a741 100644 --- a/bsp/tm4c123bsp/libraries/TivaWare_C_series/SConscript +++ b/bsp/tm4c123bsp/libraries/TivaWare_C_series/SConscript @@ -33,7 +33,7 @@ if GetDepend(['RT_USING_SPI']): #if GetDepend(['RT_USING_CAN']): -#if GetDepend(['RT_USING_HWTIMER']) +#if GetDepend(['RT_USING_CLOCK_TIME']) if GetDepend(['RT_USING_PWM']) or GetDepend(['RT_USING_PULSE_ENCODER']): src += ['tm4c123_driverlib/src/pwm.c'] diff --git a/bsp/w60x/drivers/Kconfig b/bsp/w60x/drivers/Kconfig index 2a10fd89dcf..5c2b5c6d82a 100644 --- a/bsp/w60x/drivers/Kconfig +++ b/bsp/w60x/drivers/Kconfig @@ -108,12 +108,12 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig BSP_USING_HWTIMER - bool "Enable HWTIMER" - select RT_USING_HWTIMER + menuconfig BSP_USING_CLOCK_TIMER + bool "Enable CLOCK_TIMER" + select RT_USING_CLOCK_TIME default n - if BSP_USING_HWTIMER + if BSP_USING_CLOCK_TIMER config USING_HW_TIMER1 bool "Enable hw timer1" config USING_HW_TIMER2 diff --git a/bsp/w60x/drivers/SConscript b/bsp/w60x/drivers/SConscript index ef076132c33..44dd0267b38 100644 --- a/bsp/w60x/drivers/SConscript +++ b/bsp/w60x/drivers/SConscript @@ -20,7 +20,7 @@ if GetDepend(['BSP_USING_WIFI']): if GetDepend('BSP_USING_PIN'): src += ['drv_pin.c'] -if GetDepend('BSP_USING_HWTIMER'): +if GetDepend('BSP_USING_CLOCK_TIMER'): src += ['drv_hw_timer.c'] if GetDepend('BSP_USING_SOFT_I2C'): diff --git a/bsp/w60x/drivers/drv_hw_timer.c b/bsp/w60x/drivers/drv_hw_timer.c index d52c9c09a6e..0ae3b8bfe9c 100644 --- a/bsp/w60x/drivers/drv_hw_timer.c +++ b/bsp/w60x/drivers/drv_hw_timer.c @@ -14,7 +14,7 @@ #include "wm_timer.h" #include "drv_hw_timer.h" -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER struct wm_timer_Type { @@ -22,7 +22,7 @@ struct wm_timer_Type enum tls_timer_id id; }; -static void wm_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) +static void wm_timer_init(rt_clock_timer_t *timer, rt_uint32_t state) { struct tls_timer_cfg timer_cfg; struct wm_timer_Type *wm_timer = (struct wm_timer_Type *)timer->parent.user_data; @@ -43,35 +43,35 @@ static void wm_timer_init(rt_hwtimer_t *timer, rt_uint32_t state) } } -static rt_err_t wm_timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode) +static rt_err_t wm_timer_start(rt_clock_timer_t *timer, rt_uint32_t t, rt_clock_timer_mode_t opmode) { struct wm_timer_Type *wm_timer = (struct wm_timer_Type *)timer->parent.user_data; uint8_t m; tls_timer_change(wm_timer->id, t); - m = (opmode == HWTIMER_MODE_ONESHOT) ? 0 : 1; + m = (opmode == CLOCK_TIMER_MODE_ONESHOT) ? 0 : 1; tls_timer_set_mode(wm_timer->id, m); tls_timer_start(wm_timer->id); return RT_EOK; } -static void wm_timer_stop(rt_hwtimer_t *timer) +static void wm_timer_stop(rt_clock_timer_t *timer) { struct wm_timer_Type *wm_timer = (struct wm_timer_Type *)timer->parent.user_data; tls_timer_stop(wm_timer->id); } -static rt_uint32_t wm_timer_get(rt_hwtimer_t *timer) +static rt_uint32_t wm_timer_get(rt_clock_timer_t *timer) { return 0; } -static rt_err_t wm_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) +static rt_err_t wm_timer_ctrl(rt_clock_timer_t *timer, rt_uint32_t cmd, void *arg) { /* The frequency value is an immutable value. */ - if (cmd != HWTIMER_CTRL_FREQ_SET) + if (cmd != CLOCK_TIMER_CTRL_FREQ_SET) { return -RT_ENOSYS; } @@ -85,15 +85,15 @@ static rt_err_t wm_timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg) } } -static const struct rt_hwtimer_info _info = +static const struct rt_clock_timer_info _info = { 1000000, /* the maximum count frequency can be set */ 1000000, /* the minimum count frequency can be set */ 0xFFFFFFFF, /* the maximum counter value */ - HWTIMER_CNTMODE_DW, /* Increment or Decreasing count mode */ + CLOCK_TIMER_CNTMODE_DW, /* Increment or Decreasing count mode */ }; -static const struct rt_hwtimer_ops _ops = +static const struct rt_clock_timer_ops _ops = { wm_timer_init, wm_timer_start, @@ -103,23 +103,23 @@ static const struct rt_hwtimer_ops _ops = }; #ifdef USING_HW_TIMER1 -static rt_hwtimer_t _timer1; +static rt_clock_timer_t _timer1; static struct wm_timer_Type wm_timer1; #endif #ifdef USING_HW_TIMER2 -static rt_hwtimer_t _timer2; +static rt_clock_timer_t _timer2; static struct wm_timer_Type wm_timer2; #endif #ifdef USING_HW_TIMER3 -static rt_hwtimer_t _timer3; +static rt_clock_timer_t _timer3; static struct wm_timer_Type wm_timer3; #endif #ifdef USING_HW_TIMER4 -static rt_hwtimer_t _timer4; +static rt_clock_timer_t _timer4; static struct wm_timer_Type wm_timer4; #endif #ifdef USING_HW_TIMER5 -static rt_hwtimer_t _timer5; +static rt_clock_timer_t _timer5; static struct wm_timer_Type wm_timer5; #endif @@ -132,7 +132,7 @@ int wm_hw_timer_init(void) _timer1.info = &_info; _timer1.ops = &_ops; - rt_device_hwtimer_register(&_timer1, "timer1", &wm_timer1); + rt_clock_timer_register(&_timer1, "timer1", &wm_timer1); #endif #ifdef USING_HW_TIMER2 wm_timer2.id = TLS_TIMER_ID_2; @@ -141,7 +141,7 @@ int wm_hw_timer_init(void) _timer2.info = &_info; _timer2.ops = &_ops; - rt_device_hwtimer_register(&_timer2, "timer2", &wm_timer2); + rt_clock_timer_register(&_timer2, "timer2", &wm_timer2); #endif #ifdef USING_HW_TIMER3 wm_timer3.id = TLS_TIMER_ID_3; @@ -150,7 +150,7 @@ int wm_hw_timer_init(void) _timer3.info = &_info; _timer3.ops = &_ops; - rt_device_hwtimer_register(&_timer3, "timer3", &wm_timer3); + rt_clock_timer_register(&_timer3, "timer3", &wm_timer3); #endif #ifdef USING_HW_TIMER4 wm_timer4.id = TLS_TIMER_ID_4; @@ -159,7 +159,7 @@ int wm_hw_timer_init(void) _timer4.info = &_info; _timer4.ops = &_ops; - rt_device_hwtimer_register(&_timer4, "timer4", &wm_timer4); + rt_clock_timer_register(&_timer4, "timer4", &wm_timer4); #endif #ifdef USING_HW_TIMER5 wm_timer5.id = TLS_TIMER_ID_5; @@ -168,7 +168,7 @@ int wm_hw_timer_init(void) _timer5.info = &_info; _timer5.ops = &_ops; - rt_device_hwtimer_register(&_timer5, "timer5", &wm_timer5); + rt_clock_timer_register(&_timer5, "timer5", &wm_timer5); #endif return 0; } @@ -178,35 +178,35 @@ void TIM1_IRQHandler(void) { timer_clear_irq(1); #ifdef USING_HW_TIMER1 - rt_device_hwtimer_isr(&_timer1); + rt_clock_timer_isr(&_timer1); #endif } void TIM2_IRQHandler(void) { timer_clear_irq(2); #ifdef USING_HW_TIMER2 - rt_device_hwtimer_isr(&_timer2); + rt_clock_timer_isr(&_timer2); #endif } void TIM3_IRQHandler(void) { timer_clear_irq(3); #ifdef USING_HW_TIMER3 - rt_device_hwtimer_isr(&_timer3); + rt_clock_timer_isr(&_timer3); #endif } void TIM4_IRQHandler(void) { timer_clear_irq(4); #ifdef USING_HW_TIMER4 - rt_device_hwtimer_isr(&_timer4); + rt_clock_timer_isr(&_timer4); #endif } void TIM5_IRQHandler(void) { timer_clear_irq(5); #ifdef USING_HW_TIMER5 - rt_device_hwtimer_isr(&_timer5); + rt_clock_timer_isr(&_timer5); #endif } -#endif /* BSP_USING_HWTIMER */ +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/w60x/drivers/drv_hw_timer.h b/bsp/w60x/drivers/drv_hw_timer.h index 2856b5f5e4e..61caadc2c2d 100644 --- a/bsp/w60x/drivers/drv_hw_timer.h +++ b/bsp/w60x/drivers/drv_hw_timer.h @@ -8,8 +8,8 @@ * 2018-11-19 fanwenl 1st version */ -#ifndef __DRV_HWTIMER_H__ -#define __DRV_HWTIMER_H__ +#ifndef __DRV_CLOCK_TIMER_H__ +#define __DRV_CLOCK_TIMER_H__ int wm_hw_timer_init(void); diff --git a/bsp/w60x/project.ewp b/bsp/w60x/project.ewp index 01ab9f59a76..b86d2ce4c2c 100644 --- a/bsp/w60x/project.ewp +++ b/bsp/w60x/project.ewp @@ -2194,7 +2194,7 @@ $PROJ_DIR$\..\..\components\drivers\hwcrypto\hwcrypto.c - $PROJ_DIR$\..\..\components\drivers\hwtimer\hwtimer.c + $PROJ_DIR$\..\..\components\drivers\clock_time\clock_timer.c $PROJ_DIR$\..\..\components\drivers\i2c\dev_i2c_bit_ops.c diff --git a/bsp/w60x/project.uvprojx b/bsp/w60x/project.uvprojx index 3bbf4570340..4dff2a774bb 100644 --- a/bsp/w60x/project.uvprojx +++ b/bsp/w60x/project.uvprojx @@ -582,9 +582,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\components\drivers\hwtimer\hwtimer.c + ..\..\components\drivers\clock_time\clock_timer.c diff --git a/bsp/wch/arm/Libraries/ch32_drivers/SConscript b/bsp/wch/arm/Libraries/ch32_drivers/SConscript index bb4def6cabc..fdc304accc1 100644 --- a/bsp/wch/arm/Libraries/ch32_drivers/SConscript +++ b/bsp/wch/arm/Libraries/ch32_drivers/SConscript @@ -29,8 +29,8 @@ if GetDepend('SOC_ARM_SERIES_CH32F103'): if GetDepend(['RT_USING_WDT', 'BSP_USING_IWDT']): src += ['drv_iwdt_ch32f10x.c'] - if GetDepend(['RT_USING_HWTIMER', 'BSP_USING_HWTIMER']): - src += ['drv_hwtimer_ch32f10x.c'] + if GetDepend(['RT_USING_CLOCK_TIME', 'BSP_USING_CLOCK_TIMER']): + src += ['drv_timer_ch32f10x.c'] if GetDepend(['RT_USING_PWM', 'BSP_USING_PWM']): src += ['drv_pwm_ch32f10x.c'] @@ -56,8 +56,8 @@ if GetDepend('SOC_ARM_SERIES_CH32F203'): if GetDepend(['RT_USING_WDT', 'BSP_USING_IWDT']): src += ['drv_iwdt_ch32f20x.c'] - if GetDepend(['RT_USING_HWTIMER', 'BSP_USING_HWTIMER']): - src += ['drv_hwtimer_ch32f20x.c'] + if GetDepend(['RT_USING_CLOCK_TIME', 'BSP_USING_CLOCK_TIMER']): + src += ['drv_timer_ch32f20x.c'] if GetDepend(['RT_USING_PWM', 'BSP_USING_PWM']): src += ['drv_pwm_ch32f20x.c'] diff --git a/bsp/wch/arm/Libraries/ch32_drivers/drv_hwtimer_ch32f10x.c b/bsp/wch/arm/Libraries/ch32_drivers/drv_hwtimer_ch32f10x.c deleted file mode 100644 index 13ffe679d52..00000000000 --- a/bsp/wch/arm/Libraries/ch32_drivers/drv_hwtimer_ch32f10x.c +++ /dev/null @@ -1,368 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2021-08-10 charlown first version - */ - -#include -#include -#include - -#ifdef BSP_USING_HWTIMER - -#define LOG_TAG "drv.hwtimer" -#include - -struct hwtimer_device -{ - struct rt_hwtimer_device parent; - TIM_TypeDef *periph; - IRQn_Type irqn; - char *name; -}; - -#ifdef BSP_USING_TIM1_HWTIMER -struct hwtimer_device hwtimer_device1 = - { - .periph = TIM1, - .irqn = TIM1_UP_IRQn, - .name = "timer1"}; -#endif - -#ifdef BSP_USING_TIM2_HWTIMER -struct hwtimer_device hwtimer_device2 = - { - .periph = TIM2, - .irqn = TIM2_IRQn, - .name = "timer2"}; -#endif - -#ifdef BSP_USING_TIM3_HWTIMER -struct hwtimer_device hwtimer_device3 = - { - .periph = TIM3, - .irqn = TIM3_IRQn, - .name = "timer3"}; -#endif - -#ifdef BSP_USING_TIM4_HWTIMER -struct hwtimer_device hwtimer_device4 = - { - .periph = TIM4, - .irqn = TIM4_IRQn, - .name = "timer4"}; -#endif - -static void ch32f1_hwtimer_init(struct rt_hwtimer_device *device, rt_uint32_t state) -{ - struct hwtimer_device *hwtimer_dev; - struct rt_hwtimer_info *hwtimer_info; - rt_uint32_t clk = 0; - rt_uint16_t prescaler_value = 0; - - TIM_TimeBaseInitTypeDef TIM_TimeBaseInitType; - NVIC_InitTypeDef NVIC_InitStructure; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - if (state) - { - ch32f1_tim_clock_init(hwtimer_dev->periph); - - hwtimer_info = ch32f1_hwtimer_info_config_get(hwtimer_dev->periph); - - clk = ch32f1_tim_clock_get(hwtimer_dev->periph); - - prescaler_value = (rt_uint16_t)(clk / hwtimer_info->minfreq) - 1; - - /* - * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) - */ - - TIM_TimeBaseInitType.TIM_Period = hwtimer_info->maxcnt - 1; - TIM_TimeBaseInitType.TIM_Prescaler = prescaler_value; - TIM_TimeBaseInitType.TIM_ClockDivision = TIM_CKD_DIV1; - TIM_TimeBaseInitType.TIM_RepetitionCounter = 0; - - if (hwtimer_info == RT_NULL) - { - TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; - } - else - { - if (hwtimer_info->cntmode == HWTIMER_CNTMODE_UP) - { - TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; - } - else - { - TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Down; - } - } - - TIM_TimeBaseInit(hwtimer_dev->periph, &TIM_TimeBaseInitType); - - NVIC_InitStructure.NVIC_IRQChannel = hwtimer_dev->irqn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - TIM_ITConfig(hwtimer_dev->periph, TIM_IT_Update, ENABLE); - TIM_ClearITPendingBit(hwtimer_dev->periph, TIM_IT_Update); - - LOG_D("%s init success", hwtimer_dev->name); - } -} - -static rt_err_t ch32f1_hwtimer_start(struct rt_hwtimer_device *device, rt_uint32_t cnt, rt_hwtimer_mode_t mode) -{ - - struct hwtimer_device *hwtimer_dev; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - /* - * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) - */ - - TIM_SetCounter(hwtimer_dev->periph, 0); - TIM_SetAutoreload(hwtimer_dev->periph, cnt - 1); - - if (mode == HWTIMER_MODE_ONESHOT) - { - TIM_SelectOnePulseMode(hwtimer_dev->periph, TIM_OPMode_Single); - } - else - { - TIM_SelectOnePulseMode(hwtimer_dev->periph, TIM_OPMode_Repetitive); - } - - TIM_Cmd(hwtimer_dev->periph, ENABLE); - - LOG_D("%s start, cnt = %d", hwtimer_dev->name, cnt); - - return RT_EOK; -} - -static void ch32f1_hwtimer_stop(struct rt_hwtimer_device *device) -{ - struct hwtimer_device *hwtimer_dev; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - TIM_Cmd(hwtimer_dev->periph, DISABLE); - - TIM_SetCounter(hwtimer_dev->periph, 0); -} - -static rt_uint32_t ch32f1_hwtimer_counter_get(struct rt_hwtimer_device *device) -{ - struct hwtimer_device *hwtimer_dev; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - return hwtimer_dev->periph->CNT; -} - -static rt_err_t ch32f1_hwtimer_control(struct rt_hwtimer_device *device, rt_uint32_t cmd, void *arg) -{ - struct hwtimer_device *hwtimer_dev; - rt_err_t result = RT_EOK; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - switch (cmd) - { - case HWTIMER_CTRL_FREQ_SET: - { - rt_uint32_t freq = 0; - rt_uint32_t clk = 0; - rt_uint16_t prescaler_value = 0; - - /* - * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) - */ - if (arg != RT_NULL) - { - - freq = *((rt_uint32_t *)arg); - - clk = ch32f1_tim_clock_get(hwtimer_dev->periph); - - prescaler_value = (rt_uint16_t)(clk / freq) - 1; - - TIM_PrescalerConfig(hwtimer_dev->periph, prescaler_value, TIM_PSCReloadMode_Immediate); - } - else - { - result = -RT_EINVAL; - } - } - break; - - default: - result = -RT_ENOSYS; - break; - } - - return result; -} - -static const struct rt_hwtimer_ops hwtimer_ops = - { - .init = ch32f1_hwtimer_init, - .start = ch32f1_hwtimer_start, - .stop = ch32f1_hwtimer_stop, - .count_get = ch32f1_hwtimer_counter_get, - .control = ch32f1_hwtimer_control, -}; - -static int rt_hw_hwtimer_init(void) -{ - rt_err_t ret; - struct rt_hwtimer_info *hwtimer_info; - -#ifdef BSP_USING_TIM1_HWTIMER - hwtimer_info = ch32f1_hwtimer_info_config_get(hwtimer_device1.periph); - hwtimer_device1.parent.info = hwtimer_info; - hwtimer_device1.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device1.parent, hwtimer_device1.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device1.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device1.name); - } -#endif - -#ifdef BSP_USING_TIM2_HWTIMER - hwtimer_info = ch32f1_hwtimer_info_config_get(hwtimer_device2.periph); - hwtimer_device2.parent.info = hwtimer_info; - hwtimer_device2.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device2.parent, hwtimer_device2.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device2.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device2.name); - } -#endif - -#ifdef BSP_USING_TIM3_HWTIMER - hwtimer_info = ch32f1_hwtimer_info_config_get(hwtimer_device3.periph); - hwtimer_device3.parent.info = hwtimer_info; - hwtimer_device3.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device3.parent, hwtimer_device3.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device3.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device3.name); - } -#endif - -#ifdef BSP_USING_TIM4_HWTIMER - hwtimer_info = ch32f1_hwtimer_info_config_get(hwtimer_device4.periph); - hwtimer_device4.parent.info = hwtimer_info; - hwtimer_device4.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device4.parent, hwtimer_device4.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device4.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device4.name); - } -#endif - - return RT_EOK; -} -INIT_DEVICE_EXPORT(rt_hw_hwtimer_init); - -#ifdef BSP_USING_TIM1_HWTIMER -void TIM1_UP_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device1.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device1.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device1.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM2_HWTIMER -void TIM2_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device2.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device2.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device2.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM3_HWTIMER -void TIM3_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device3.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device3.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device3.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM4_HWTIMER -void TIM4_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device4.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device4.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device4.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#endif /* BSP_USING_HWTIMER */ diff --git a/bsp/wch/arm/Libraries/ch32_drivers/drv_hwtimer_ch32f20x.c b/bsp/wch/arm/Libraries/ch32_drivers/drv_hwtimer_ch32f20x.c deleted file mode 100644 index 5bb45e7b363..00000000000 --- a/bsp/wch/arm/Libraries/ch32_drivers/drv_hwtimer_ch32f20x.c +++ /dev/null @@ -1,602 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2022-01-21 charlown first version - */ - -#include -#include -#include - -#ifdef BSP_USING_HWTIMER - -#define LOG_TAG "drv.hwtimer" -#include - -struct hwtimer_device -{ - struct rt_hwtimer_device parent; - TIM_TypeDef *periph; - IRQn_Type irqn; - char *name; -}; - -#ifdef BSP_USING_TIM1_HWTIMER -struct hwtimer_device hwtimer_device1 = - { - .periph = TIM1, - .irqn = TIM1_UP_IRQn, - .name = "timer1"}; -#endif - -#ifdef BSP_USING_TIM2_HWTIMER -struct hwtimer_device hwtimer_device2 = - { - .periph = TIM2, - .irqn = TIM2_IRQn, - .name = "timer2"}; -#endif - -#ifdef BSP_USING_TIM3_HWTIMER -struct hwtimer_device hwtimer_device3 = - { - .periph = TIM3, - .irqn = TIM3_IRQn, - .name = "timer3"}; -#endif - -#ifdef BSP_USING_TIM4_HWTIMER -struct hwtimer_device hwtimer_device4 = - { - .periph = TIM4, - .irqn = TIM4_IRQn, - .name = "timer4"}; -#endif - -#ifdef BSP_USING_TIM5_HWTIMER -struct hwtimer_device hwtimer_device5 = - { - .periph = TIM5, - .irqn = TIM5_IRQn, - .name = "timer5"}; -#endif - -#ifdef BSP_USING_TIM6_HWTIMER -struct hwtimer_device hwtimer_device6 = - { - .periph = TIM6, - .irqn = TIM6_IRQn, - .name = "timer6"}; -#endif - -#ifdef BSP_USING_TIM7_HWTIMER -struct hwtimer_device hwtimer_device7 = - { - .periph = TIM7, - .irqn = TIM7_IRQn, - .name = "timer7"}; -#endif - -#ifdef BSP_USING_TIM8_HWTIMER -struct hwtimer_device hwtimer_device8 = - { - .periph = TIM8, - .irqn = TIM8_UP_IRQn, - .name = "timer8"}; -#endif - -#ifdef BSP_USING_TIM9_HWTIMER -struct hwtimer_device hwtimer_device9 = - { - .periph = TIM9, - .irqn = TIM9_UP_IRQn, - .name = "timer9"}; -#endif - -#ifdef BSP_USING_TIM10_HWTIMER -struct hwtimer_device hwtimer_device10 = - { - .periph = TIM10, - .irqn = TIM10_UP_IRQn, - .name = "timer10"}; -#endif - -static void ch32f2_hwtimer_init(struct rt_hwtimer_device *device, rt_uint32_t state) -{ - struct hwtimer_device *hwtimer_dev; - struct rt_hwtimer_info *hwtimer_info; - rt_uint32_t clk = 0; - rt_uint16_t prescaler_value = 0; - - TIM_TimeBaseInitTypeDef TIM_TimeBaseInitType; - NVIC_InitTypeDef NVIC_InitStructure; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - if (state) - { - ch32f2_tim_clock_init(hwtimer_dev->periph); - - hwtimer_info = ch32f2_hwtimer_info_config_get(hwtimer_dev->periph); - - clk = ch32f2_tim_clock_get(hwtimer_dev->periph); - - prescaler_value = (rt_uint16_t)(clk / hwtimer_info->minfreq) - 1; - - /* - * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) - */ - - TIM_TimeBaseInitType.TIM_Period = hwtimer_info->maxcnt - 1; - TIM_TimeBaseInitType.TIM_Prescaler = prescaler_value; - TIM_TimeBaseInitType.TIM_ClockDivision = TIM_CKD_DIV1; - TIM_TimeBaseInitType.TIM_RepetitionCounter = 0; - - if (hwtimer_info == RT_NULL) - { - TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; - } - else - { - if (hwtimer_info->cntmode == HWTIMER_CNTMODE_UP) - { - TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; - } - else - { - TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Down; - } - } - - TIM_TimeBaseInit(hwtimer_dev->periph, &TIM_TimeBaseInitType); - - NVIC_InitStructure.NVIC_IRQChannel = hwtimer_dev->irqn; - NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; - NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; - NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; - NVIC_Init(&NVIC_InitStructure); - - TIM_ITConfig(hwtimer_dev->periph, TIM_IT_Update, ENABLE); - TIM_ClearITPendingBit(hwtimer_dev->periph, TIM_IT_Update); - - LOG_D("%s init success", hwtimer_dev->name); - } -} - -static rt_err_t ch32f2_hwtimer_start(struct rt_hwtimer_device *device, rt_uint32_t cnt, rt_hwtimer_mode_t mode) -{ - - struct hwtimer_device *hwtimer_dev; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - /* - * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) - */ - - TIM_SetCounter(hwtimer_dev->periph, 0); - TIM_SetAutoreload(hwtimer_dev->periph, cnt - 1); - - if (mode == HWTIMER_MODE_ONESHOT) - { - TIM_SelectOnePulseMode(hwtimer_dev->periph, TIM_OPMode_Single); - } - else - { - TIM_SelectOnePulseMode(hwtimer_dev->periph, TIM_OPMode_Repetitive); - } - - TIM_Cmd(hwtimer_dev->periph, ENABLE); - - LOG_D("%s start, cnt = %d", hwtimer_dev->name, cnt); - - return RT_EOK; -} - -static void ch32f2_hwtimer_stop(struct rt_hwtimer_device *device) -{ - struct hwtimer_device *hwtimer_dev; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - TIM_Cmd(hwtimer_dev->periph, DISABLE); - - TIM_SetCounter(hwtimer_dev->periph, 0); -} - -static rt_uint32_t ch32f2_hwtimer_counter_get(struct rt_hwtimer_device *device) -{ - struct hwtimer_device *hwtimer_dev; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - return hwtimer_dev->periph->CNT; -} - -static rt_err_t ch32f2_hwtimer_control(struct rt_hwtimer_device *device, rt_uint32_t cmd, void *arg) -{ - struct hwtimer_device *hwtimer_dev; - rt_err_t result = RT_EOK; - - RT_ASSERT(device != RT_NULL); - - hwtimer_dev = (struct hwtimer_device *)device; - - switch (cmd) - { - case HWTIMER_CTRL_FREQ_SET: - { - rt_uint32_t freq = 0; - rt_uint32_t clk = 0; - rt_uint16_t prescaler_value = 0; - - /* - * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) - */ - if (arg != RT_NULL) - { - - freq = *((rt_uint32_t *)arg); - - clk = ch32f2_tim_clock_get(hwtimer_dev->periph); - - prescaler_value = (rt_uint16_t)(clk / freq) - 1; - - TIM_PrescalerConfig(hwtimer_dev->periph, prescaler_value, TIM_PSCReloadMode_Immediate); - } - else - { - result = -RT_EINVAL; - } - } - break; - - default: - result = -RT_ENOSYS; - break; - } - - return result; -} - -static const struct rt_hwtimer_ops hwtimer_ops = - { - .init = ch32f2_hwtimer_init, - .start = ch32f2_hwtimer_start, - .stop = ch32f2_hwtimer_stop, - .count_get = ch32f2_hwtimer_counter_get, - .control = ch32f2_hwtimer_control, -}; - -static int rt_hw_hwtimer_init(void) -{ - rt_err_t ret; - struct rt_hwtimer_info *hwtimer_info; - -#ifdef BSP_USING_TIM1_HWTIMER - hwtimer_info = ch32f2_hwtimer_info_config_get(hwtimer_device1.periph); - hwtimer_device1.parent.info = hwtimer_info; - hwtimer_device1.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device1.parent, hwtimer_device1.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device1.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device1.name); - } -#endif - -#ifdef BSP_USING_TIM2_HWTIMER - hwtimer_info = ch32f2_hwtimer_info_config_get(hwtimer_device2.periph); - hwtimer_device2.parent.info = hwtimer_info; - hwtimer_device2.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device2.parent, hwtimer_device2.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device2.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device2.name); - } -#endif - -#ifdef BSP_USING_TIM3_HWTIMER - hwtimer_info = ch32f2_hwtimer_info_config_get(hwtimer_device3.periph); - hwtimer_device3.parent.info = hwtimer_info; - hwtimer_device3.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device3.parent, hwtimer_device3.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device3.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device3.name); - } -#endif - -#ifdef BSP_USING_TIM4_HWTIMER - hwtimer_info = ch32f2_hwtimer_info_config_get(hwtimer_device4.periph); - hwtimer_device4.parent.info = hwtimer_info; - hwtimer_device4.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device4.parent, hwtimer_device4.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device4.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device4.name); - } -#endif - -#ifdef BSP_USING_TIM5_HWTIMER - hwtimer_info = ch32f2_hwtimer_info_config_get(hwtimer_device5.periph); - hwtimer_device5.parent.info = hwtimer_info; - hwtimer_device5.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device5.parent, hwtimer_device5.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device5.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device5.name); - } -#endif - -#ifdef BSP_USING_TIM6_HWTIMER - hwtimer_info = ch32f2_hwtimer_info_config_get(hwtimer_device6.periph); - hwtimer_device6.parent.info = hwtimer_info; - hwtimer_device6.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device6.parent, hwtimer_device6.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device6.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device6.name); - } -#endif - -#ifdef BSP_USING_TIM7_HWTIMER - hwtimer_info = ch32f2_hwtimer_info_config_get(hwtimer_device7.periph); - hwtimer_device7.parent.info = hwtimer_info; - hwtimer_device7.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device7.parent, hwtimer_device7.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device7.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device7.name); - } -#endif - -#ifdef BSP_USING_TIM8_HWTIMER - hwtimer_info = ch32f2_hwtimer_info_config_get(hwtimer_device8.periph); - hwtimer_device8.parent.info = hwtimer_info; - hwtimer_device8.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device8.parent, hwtimer_device8.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device8.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device8.name); - } -#endif - -#ifdef BSP_USING_TIM9_HWTIMER - hwtimer_info = ch32f2_hwtimer_info_config_get(hwtimer_device9.periph); - hwtimer_device9.parent.info = hwtimer_info; - hwtimer_device9.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device9.parent, hwtimer_device9.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device9.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device9.name); - } -#endif - -#ifdef BSP_USING_TIM10_HWTIMER - hwtimer_info = ch32f2_hwtimer_info_config_get(hwtimer_device10.periph); - hwtimer_device10.parent.info = hwtimer_info; - hwtimer_device10.parent.ops = &hwtimer_ops; - ret = rt_device_hwtimer_register(&hwtimer_device10.parent, hwtimer_device10.name, RT_NULL); - if (ret == RT_EOK) - { - LOG_D("hwtimer: %s register success.", hwtimer_device10.name); - } - else - { - LOG_D("hwtimer: %s register failed.", hwtimer_device10.name); - } -#endif - - return RT_EOK; -} -INIT_DEVICE_EXPORT(rt_hw_hwtimer_init); - -#ifdef BSP_USING_TIM1_HWTIMER -void TIM1_UP_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device1.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device1.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device1.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM2_HWTIMER -void TIM2_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device2.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device2.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device2.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM3_HWTIMER -void TIM3_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device3.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device3.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device3.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM4_HWTIMER -void TIM4_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device4.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device4.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device4.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM5_HWTIMER -void TIM5_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device5.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device5.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device5.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM6_HWTIMER -void TIM6_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device6.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device6.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device6.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM7_HWTIMER -void TIM7_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device7.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device7.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device7.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM8_HWTIMER -void TIM8_UP_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device8.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device8.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device8.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM9_HWTIMER -void TIM9_UP_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device9.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device9.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device9.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#ifdef BSP_USING_TIM10_HWTIMER -void TIM10_UP_IRQHandler(void) -{ - /* enter interrupt */ - rt_interrupt_enter(); - - if (TIM_GetITStatus(hwtimer_device10.periph, TIM_IT_Update) == SET) - { - TIM_ClearITPendingBit(hwtimer_device10.periph, TIM_IT_Update); - rt_device_hwtimer_isr(&hwtimer_device10.parent); - } - /* leave interrupt */ - rt_interrupt_leave(); -} -#endif - -#endif /* BSP_USING_HWTIMER */ diff --git a/bsp/wch/arm/Libraries/ch32_drivers/drv_timer_ch32f10x.c b/bsp/wch/arm/Libraries/ch32_drivers/drv_timer_ch32f10x.c new file mode 100644 index 00000000000..8e88b60fd16 --- /dev/null +++ b/bsp/wch/arm/Libraries/ch32_drivers/drv_timer_ch32f10x.c @@ -0,0 +1,368 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2021-08-10 charlown first version + */ + +#include +#include +#include + +#ifdef BSP_USING_CLOCK_TIMER + +#define LOG_TAG "drv.clock_timer" +#include + +struct clock_timer_device +{ + struct rt_clock_timer_device parent; + TIM_TypeDef *periph; + IRQn_Type irqn; + char *name; +}; + +#ifdef BSP_USING_TIM1_CLOCK_TIMER +struct clock_timer_device clock_timer_device1 = + { + .periph = TIM1, + .irqn = TIM1_UP_IRQn, + .name = "timer1"}; +#endif + +#ifdef BSP_USING_TIM2_CLOCK_TIMER +struct clock_timer_device clock_timer_device2 = + { + .periph = TIM2, + .irqn = TIM2_IRQn, + .name = "timer2"}; +#endif + +#ifdef BSP_USING_TIM3_CLOCK_TIMER +struct clock_timer_device clock_timer_device3 = + { + .periph = TIM3, + .irqn = TIM3_IRQn, + .name = "timer3"}; +#endif + +#ifdef BSP_USING_TIM4_CLOCK_TIMER +struct clock_timer_device clock_timer_device4 = + { + .periph = TIM4, + .irqn = TIM4_IRQn, + .name = "timer4"}; +#endif + +static void ch32f1_clock_timer_init(struct rt_clock_timer_device *device, rt_uint32_t state) +{ + struct clock_timer_device *clock_timer_dev; + struct rt_clock_timer_info *clock_timer_info; + rt_uint32_t clk = 0; + rt_uint16_t prescaler_value = 0; + + TIM_TimeBaseInitTypeDef TIM_TimeBaseInitType; + NVIC_InitTypeDef NVIC_InitStructure; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + if (state) + { + ch32f1_tim_clock_init(clock_timer_dev->periph); + + clock_timer_info = ch32f1_clock_timer_info_config_get(clock_timer_dev->periph); + + clk = ch32f1_tim_clock_get(clock_timer_dev->periph); + + prescaler_value = (rt_uint16_t)(clk / clock_timer_info->minfreq) - 1; + + /* + * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) + */ + + TIM_TimeBaseInitType.TIM_Period = clock_timer_info->maxcnt - 1; + TIM_TimeBaseInitType.TIM_Prescaler = prescaler_value; + TIM_TimeBaseInitType.TIM_ClockDivision = TIM_CKD_DIV1; + TIM_TimeBaseInitType.TIM_RepetitionCounter = 0; + + if (clock_timer_info == RT_NULL) + { + TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; + } + else + { + if (clock_timer_info->cntmode == CLOCK_TIMER_CNTMODE_UP) + { + TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; + } + else + { + TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Down; + } + } + + TIM_TimeBaseInit(clock_timer_dev->periph, &TIM_TimeBaseInitType); + + NVIC_InitStructure.NVIC_IRQChannel = clock_timer_dev->irqn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + TIM_ITConfig(clock_timer_dev->periph, TIM_IT_Update, ENABLE); + TIM_ClearITPendingBit(clock_timer_dev->periph, TIM_IT_Update); + + LOG_D("%s init success", clock_timer_dev->name); + } +} + +static rt_err_t ch32f1_clock_timer_start(struct rt_clock_timer_device *device, rt_uint32_t cnt, rt_clock_timer_mode_t mode) +{ + + struct clock_timer_device *clock_timer_dev; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + /* + * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) + */ + + TIM_SetCounter(clock_timer_dev->periph, 0); + TIM_SetAutoreload(clock_timer_dev->periph, cnt - 1); + + if (mode == CLOCK_TIMER_MODE_ONESHOT) + { + TIM_SelectOnePulseMode(clock_timer_dev->periph, TIM_OPMode_Single); + } + else + { + TIM_SelectOnePulseMode(clock_timer_dev->periph, TIM_OPMode_Repetitive); + } + + TIM_Cmd(clock_timer_dev->periph, ENABLE); + + LOG_D("%s start, cnt = %d", clock_timer_dev->name, cnt); + + return RT_EOK; +} + +static void ch32f1_clock_timer_stop(struct rt_clock_timer_device *device) +{ + struct clock_timer_device *clock_timer_dev; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + TIM_Cmd(clock_timer_dev->periph, DISABLE); + + TIM_SetCounter(clock_timer_dev->periph, 0); +} + +static rt_uint32_t ch32f1_clock_timer_counter_get(struct rt_clock_timer_device *device) +{ + struct clock_timer_device *clock_timer_dev; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + return clock_timer_dev->periph->CNT; +} + +static rt_err_t ch32f1_clock_timer_control(struct rt_clock_timer_device *device, rt_uint32_t cmd, void *arg) +{ + struct clock_timer_device *clock_timer_dev; + rt_err_t result = RT_EOK; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + switch (cmd) + { + case CLOCK_TIMER_CTRL_FREQ_SET: + { + rt_uint32_t freq = 0; + rt_uint32_t clk = 0; + rt_uint16_t prescaler_value = 0; + + /* + * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) + */ + if (arg != RT_NULL) + { + + freq = *((rt_uint32_t *)arg); + + clk = ch32f1_tim_clock_get(clock_timer_dev->periph); + + prescaler_value = (rt_uint16_t)(clk / freq) - 1; + + TIM_PrescalerConfig(clock_timer_dev->periph, prescaler_value, TIM_PSCReloadMode_Immediate); + } + else + { + result = -RT_EINVAL; + } + } + break; + + default: + result = -RT_ENOSYS; + break; + } + + return result; +} + +static const struct rt_clock_timer_ops clock_timer_ops = + { + .init = ch32f1_clock_timer_init, + .start = ch32f1_clock_timer_start, + .stop = ch32f1_clock_timer_stop, + .count_get = ch32f1_clock_timer_counter_get, + .control = ch32f1_clock_timer_control, +}; + +static int rt_hw_clock_timer_init(void) +{ + rt_err_t ret; + struct rt_clock_timer_info *clock_timer_info; + +#ifdef BSP_USING_TIM1_CLOCK_TIMER + clock_timer_info = ch32f1_clock_timer_info_config_get(clock_timer_device1.periph); + clock_timer_device1.parent.info = clock_timer_info; + clock_timer_device1.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device1.parent, clock_timer_device1.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device1.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device1.name); + } +#endif + +#ifdef BSP_USING_TIM2_CLOCK_TIMER + clock_timer_info = ch32f1_clock_timer_info_config_get(clock_timer_device2.periph); + clock_timer_device2.parent.info = clock_timer_info; + clock_timer_device2.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device2.parent, clock_timer_device2.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device2.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device2.name); + } +#endif + +#ifdef BSP_USING_TIM3_CLOCK_TIMER + clock_timer_info = ch32f1_clock_timer_info_config_get(clock_timer_device3.periph); + clock_timer_device3.parent.info = clock_timer_info; + clock_timer_device3.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device3.parent, clock_timer_device3.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device3.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device3.name); + } +#endif + +#ifdef BSP_USING_TIM4_CLOCK_TIMER + clock_timer_info = ch32f1_clock_timer_info_config_get(clock_timer_device4.periph); + clock_timer_device4.parent.info = clock_timer_info; + clock_timer_device4.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device4.parent, clock_timer_device4.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device4.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device4.name); + } +#endif + + return RT_EOK; +} +INIT_DEVICE_EXPORT(rt_hw_clock_timer_init); + +#ifdef BSP_USING_TIM1_CLOCK_TIMER +void TIM1_UP_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device1.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device1.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device1.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM2_CLOCK_TIMER +void TIM2_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device2.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device2.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device2.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM3_CLOCK_TIMER +void TIM3_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device3.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device3.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device3.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM4_CLOCK_TIMER +void TIM4_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device4.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device4.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device4.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/wch/arm/Libraries/ch32_drivers/drv_timer_ch32f20x.c b/bsp/wch/arm/Libraries/ch32_drivers/drv_timer_ch32f20x.c new file mode 100644 index 00000000000..17c92a80e00 --- /dev/null +++ b/bsp/wch/arm/Libraries/ch32_drivers/drv_timer_ch32f20x.c @@ -0,0 +1,602 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2022-01-21 charlown first version + */ + +#include +#include +#include + +#ifdef BSP_USING_CLOCK_TIMER + +#define LOG_TAG "drv.clock_timer" +#include + +struct clock_timer_device +{ + struct rt_clock_timer_device parent; + TIM_TypeDef *periph; + IRQn_Type irqn; + char *name; +}; + +#ifdef BSP_USING_TIM1_CLOCK_TIMER +struct clock_timer_device clock_timer_device1 = + { + .periph = TIM1, + .irqn = TIM1_UP_IRQn, + .name = "timer1"}; +#endif + +#ifdef BSP_USING_TIM2_CLOCK_TIMER +struct clock_timer_device clock_timer_device2 = + { + .periph = TIM2, + .irqn = TIM2_IRQn, + .name = "timer2"}; +#endif + +#ifdef BSP_USING_TIM3_CLOCK_TIMER +struct clock_timer_device clock_timer_device3 = + { + .periph = TIM3, + .irqn = TIM3_IRQn, + .name = "timer3"}; +#endif + +#ifdef BSP_USING_TIM4_CLOCK_TIMER +struct clock_timer_device clock_timer_device4 = + { + .periph = TIM4, + .irqn = TIM4_IRQn, + .name = "timer4"}; +#endif + +#ifdef BSP_USING_TIM5_CLOCK_TIMER +struct clock_timer_device clock_timer_device5 = + { + .periph = TIM5, + .irqn = TIM5_IRQn, + .name = "timer5"}; +#endif + +#ifdef BSP_USING_TIM6_CLOCK_TIMER +struct clock_timer_device clock_timer_device6 = + { + .periph = TIM6, + .irqn = TIM6_IRQn, + .name = "timer6"}; +#endif + +#ifdef BSP_USING_TIM7_CLOCK_TIMER +struct clock_timer_device clock_timer_device7 = + { + .periph = TIM7, + .irqn = TIM7_IRQn, + .name = "timer7"}; +#endif + +#ifdef BSP_USING_TIM8_CLOCK_TIMER +struct clock_timer_device clock_timer_device8 = + { + .periph = TIM8, + .irqn = TIM8_UP_IRQn, + .name = "timer8"}; +#endif + +#ifdef BSP_USING_TIM9_CLOCK_TIMER +struct clock_timer_device clock_timer_device9 = + { + .periph = TIM9, + .irqn = TIM9_UP_IRQn, + .name = "timer9"}; +#endif + +#ifdef BSP_USING_TIM10_CLOCK_TIMER +struct clock_timer_device clock_timer_device10 = + { + .periph = TIM10, + .irqn = TIM10_UP_IRQn, + .name = "timer10"}; +#endif + +static void ch32f2_clock_timer_init(struct rt_clock_timer_device *device, rt_uint32_t state) +{ + struct clock_timer_device *clock_timer_dev; + struct rt_clock_timer_info *clock_timer_info; + rt_uint32_t clk = 0; + rt_uint16_t prescaler_value = 0; + + TIM_TimeBaseInitTypeDef TIM_TimeBaseInitType; + NVIC_InitTypeDef NVIC_InitStructure; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + if (state) + { + ch32f2_tim_clock_init(clock_timer_dev->periph); + + clock_timer_info = ch32f2_clock_timer_info_config_get(clock_timer_dev->periph); + + clk = ch32f2_tim_clock_get(clock_timer_dev->periph); + + prescaler_value = (rt_uint16_t)(clk / clock_timer_info->minfreq) - 1; + + /* + * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) + */ + + TIM_TimeBaseInitType.TIM_Period = clock_timer_info->maxcnt - 1; + TIM_TimeBaseInitType.TIM_Prescaler = prescaler_value; + TIM_TimeBaseInitType.TIM_ClockDivision = TIM_CKD_DIV1; + TIM_TimeBaseInitType.TIM_RepetitionCounter = 0; + + if (clock_timer_info == RT_NULL) + { + TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; + } + else + { + if (clock_timer_info->cntmode == CLOCK_TIMER_CNTMODE_UP) + { + TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Up; + } + else + { + TIM_TimeBaseInitType.TIM_CounterMode = TIM_CounterMode_Down; + } + } + + TIM_TimeBaseInit(clock_timer_dev->periph, &TIM_TimeBaseInitType); + + NVIC_InitStructure.NVIC_IRQChannel = clock_timer_dev->irqn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + TIM_ITConfig(clock_timer_dev->periph, TIM_IT_Update, ENABLE); + TIM_ClearITPendingBit(clock_timer_dev->periph, TIM_IT_Update); + + LOG_D("%s init success", clock_timer_dev->name); + } +} + +static rt_err_t ch32f2_clock_timer_start(struct rt_clock_timer_device *device, rt_uint32_t cnt, rt_clock_timer_mode_t mode) +{ + + struct clock_timer_device *clock_timer_dev; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + /* + * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) + */ + + TIM_SetCounter(clock_timer_dev->periph, 0); + TIM_SetAutoreload(clock_timer_dev->periph, cnt - 1); + + if (mode == CLOCK_TIMER_MODE_ONESHOT) + { + TIM_SelectOnePulseMode(clock_timer_dev->periph, TIM_OPMode_Single); + } + else + { + TIM_SelectOnePulseMode(clock_timer_dev->periph, TIM_OPMode_Repetitive); + } + + TIM_Cmd(clock_timer_dev->periph, ENABLE); + + LOG_D("%s start, cnt = %d", clock_timer_dev->name, cnt); + + return RT_EOK; +} + +static void ch32f2_clock_timer_stop(struct rt_clock_timer_device *device) +{ + struct clock_timer_device *clock_timer_dev; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + TIM_Cmd(clock_timer_dev->periph, DISABLE); + + TIM_SetCounter(clock_timer_dev->periph, 0); +} + +static rt_uint32_t ch32f2_clock_timer_counter_get(struct rt_clock_timer_device *device) +{ + struct clock_timer_device *clock_timer_dev; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + return clock_timer_dev->periph->CNT; +} + +static rt_err_t ch32f2_clock_timer_control(struct rt_clock_timer_device *device, rt_uint32_t cmd, void *arg) +{ + struct clock_timer_device *clock_timer_dev; + rt_err_t result = RT_EOK; + + RT_ASSERT(device != RT_NULL); + + clock_timer_dev = (struct clock_timer_device *)device; + + switch (cmd) + { + case CLOCK_TIMER_CTRL_FREQ_SET: + { + rt_uint32_t freq = 0; + rt_uint32_t clk = 0; + rt_uint16_t prescaler_value = 0; + + /* + * (1 / freq) = (cnt + 1) * (1 / (clk/(prescaler_value + 1) ) ) + */ + if (arg != RT_NULL) + { + + freq = *((rt_uint32_t *)arg); + + clk = ch32f2_tim_clock_get(clock_timer_dev->periph); + + prescaler_value = (rt_uint16_t)(clk / freq) - 1; + + TIM_PrescalerConfig(clock_timer_dev->periph, prescaler_value, TIM_PSCReloadMode_Immediate); + } + else + { + result = -RT_EINVAL; + } + } + break; + + default: + result = -RT_ENOSYS; + break; + } + + return result; +} + +static const struct rt_clock_timer_ops clock_timer_ops = + { + .init = ch32f2_clock_timer_init, + .start = ch32f2_clock_timer_start, + .stop = ch32f2_clock_timer_stop, + .count_get = ch32f2_clock_timer_counter_get, + .control = ch32f2_clock_timer_control, +}; + +static int rt_hw_clock_timer_init(void) +{ + rt_err_t ret; + struct rt_clock_timer_info *clock_timer_info; + +#ifdef BSP_USING_TIM1_CLOCK_TIMER + clock_timer_info = ch32f2_clock_timer_info_config_get(clock_timer_device1.periph); + clock_timer_device1.parent.info = clock_timer_info; + clock_timer_device1.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device1.parent, clock_timer_device1.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device1.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device1.name); + } +#endif + +#ifdef BSP_USING_TIM2_CLOCK_TIMER + clock_timer_info = ch32f2_clock_timer_info_config_get(clock_timer_device2.periph); + clock_timer_device2.parent.info = clock_timer_info; + clock_timer_device2.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device2.parent, clock_timer_device2.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device2.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device2.name); + } +#endif + +#ifdef BSP_USING_TIM3_CLOCK_TIMER + clock_timer_info = ch32f2_clock_timer_info_config_get(clock_timer_device3.periph); + clock_timer_device3.parent.info = clock_timer_info; + clock_timer_device3.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device3.parent, clock_timer_device3.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device3.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device3.name); + } +#endif + +#ifdef BSP_USING_TIM4_CLOCK_TIMER + clock_timer_info = ch32f2_clock_timer_info_config_get(clock_timer_device4.periph); + clock_timer_device4.parent.info = clock_timer_info; + clock_timer_device4.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device4.parent, clock_timer_device4.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device4.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device4.name); + } +#endif + +#ifdef BSP_USING_TIM5_CLOCK_TIMER + clock_timer_info = ch32f2_clock_timer_info_config_get(clock_timer_device5.periph); + clock_timer_device5.parent.info = clock_timer_info; + clock_timer_device5.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device5.parent, clock_timer_device5.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device5.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device5.name); + } +#endif + +#ifdef BSP_USING_TIM6_CLOCK_TIMER + clock_timer_info = ch32f2_clock_timer_info_config_get(clock_timer_device6.periph); + clock_timer_device6.parent.info = clock_timer_info; + clock_timer_device6.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device6.parent, clock_timer_device6.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device6.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device6.name); + } +#endif + +#ifdef BSP_USING_TIM7_CLOCK_TIMER + clock_timer_info = ch32f2_clock_timer_info_config_get(clock_timer_device7.periph); + clock_timer_device7.parent.info = clock_timer_info; + clock_timer_device7.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device7.parent, clock_timer_device7.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device7.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device7.name); + } +#endif + +#ifdef BSP_USING_TIM8_CLOCK_TIMER + clock_timer_info = ch32f2_clock_timer_info_config_get(clock_timer_device8.periph); + clock_timer_device8.parent.info = clock_timer_info; + clock_timer_device8.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device8.parent, clock_timer_device8.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device8.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device8.name); + } +#endif + +#ifdef BSP_USING_TIM9_CLOCK_TIMER + clock_timer_info = ch32f2_clock_timer_info_config_get(clock_timer_device9.periph); + clock_timer_device9.parent.info = clock_timer_info; + clock_timer_device9.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device9.parent, clock_timer_device9.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device9.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device9.name); + } +#endif + +#ifdef BSP_USING_TIM10_CLOCK_TIMER + clock_timer_info = ch32f2_clock_timer_info_config_get(clock_timer_device10.periph); + clock_timer_device10.parent.info = clock_timer_info; + clock_timer_device10.parent.ops = &clock_timer_ops; + ret = rt_clock_timer_register(&clock_timer_device10.parent, clock_timer_device10.name, RT_NULL); + if (ret == RT_EOK) + { + LOG_D("clock_timer: %s register success.", clock_timer_device10.name); + } + else + { + LOG_D("clock_timer: %s register failed.", clock_timer_device10.name); + } +#endif + + return RT_EOK; +} +INIT_DEVICE_EXPORT(rt_hw_clock_timer_init); + +#ifdef BSP_USING_TIM1_CLOCK_TIMER +void TIM1_UP_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device1.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device1.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device1.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM2_CLOCK_TIMER +void TIM2_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device2.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device2.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device2.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM3_CLOCK_TIMER +void TIM3_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device3.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device3.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device3.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM4_CLOCK_TIMER +void TIM4_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device4.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device4.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device4.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM5_CLOCK_TIMER +void TIM5_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device5.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device5.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device5.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM6_CLOCK_TIMER +void TIM6_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device6.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device6.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device6.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM7_CLOCK_TIMER +void TIM7_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device7.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device7.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device7.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM8_CLOCK_TIMER +void TIM8_UP_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device8.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device8.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device8.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM9_CLOCK_TIMER +void TIM9_UP_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device9.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device9.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device9.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#ifdef BSP_USING_TIM10_CLOCK_TIMER +void TIM10_UP_IRQHandler(void) +{ + /* enter interrupt */ + rt_interrupt_enter(); + + if (TIM_GetITStatus(clock_timer_device10.periph, TIM_IT_Update) == SET) + { + TIM_ClearITPendingBit(clock_timer_device10.periph, TIM_IT_Update); + rt_clock_timer_isr(&clock_timer_device10.parent); + } + /* leave interrupt */ + rt_interrupt_leave(); +} +#endif + +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/wch/arm/ch32f103c8-core/board/Kconfig b/bsp/wch/arm/ch32f103c8-core/board/Kconfig index beac3e79724..1f2345562fa 100644 --- a/bsp/wch/arm/ch32f103c8-core/board/Kconfig +++ b/bsp/wch/arm/ch32f103c8-core/board/Kconfig @@ -85,9 +85,9 @@ config BSP_USING_TIM default n if BSP_USING_TIM - config BSP_USING_HWTIMER + config BSP_USING_CLOCK_TIMER bool - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n config BSP_USING_PWM @@ -101,12 +101,12 @@ config BSP_USING_TIM if BSP_USING_TIM1 choice - prompt "using TIM1 as hwtimer or PWM mode" - default BSP_USING_TIM1_HWTIMER + prompt "using TIM1 as clock_timer or PWM mode" + default BSP_USING_TIM1_CLOCK_TIMER - config BSP_USING_TIM1_HWTIMER - bool "using TIM1 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM1_CLOCK_TIMER + bool "using TIM1 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM1_PWM bool "using TIM1 as PWM mode" @@ -139,12 +139,12 @@ config BSP_USING_TIM if BSP_USING_TIM2 choice - prompt "using TIM2 as hwtimer or PWM mode" - default BSP_USING_TIM2_HWTIMER + prompt "using TIM2 as clock_timer or PWM mode" + default BSP_USING_TIM2_CLOCK_TIMER - config BSP_USING_TIM2_HWTIMER - bool "using TIM2 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM2_CLOCK_TIMER + bool "using TIM2 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM2_PWM bool "using TIM2 as PWM mode" @@ -177,12 +177,12 @@ config BSP_USING_TIM if BSP_USING_TIM3 choice - prompt "using TIM3 as hwtimer or PWM mode" - default BSP_USING_TIM3_HWTIMER + prompt "using TIM3 as clock_timer or PWM mode" + default BSP_USING_TIM3_CLOCK_TIMER - config BSP_USING_TIM3_HWTIMER - bool "using TIM3 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM3_CLOCK_TIMER + bool "using TIM3 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM3_PWM bool "using TIM3 as PWM mode" @@ -215,12 +215,12 @@ config BSP_USING_TIM if BSP_USING_TIM4 choice - prompt "using TIM4 as hwtimer or PWM mode" - default BSP_USING_TIM4_HWTIMER + prompt "using TIM4 as clock_timer or PWM mode" + default BSP_USING_TIM4_CLOCK_TIMER - config BSP_USING_TIM4_HWTIMER - bool "using TIM4 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM4_CLOCK_TIMER + bool "using TIM4 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM4_PWM bool "using TIM4 as PWM mode" diff --git a/bsp/wch/arm/ch32f103c8-core/board/board.c b/bsp/wch/arm/ch32f103c8-core/board/board.c index f1d3773fa6d..e2a06a3a376 100644 --- a/bsp/wch/arm/ch32f103c8-core/board/board.c +++ b/bsp/wch/arm/ch32f103c8-core/board/board.c @@ -234,61 +234,61 @@ rt_uint32_t ch32f1_tim_clock_get(TIM_TypeDef *timx) return RCC_Clocks.HCLK_Frequency; } -struct rt_hwtimer_info hwtimer_info1 = +struct rt_clock_timer_info clock_timer_info1 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info2 = +struct rt_clock_timer_info clock_timer_info2 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info3 = +struct rt_clock_timer_info clock_timer_info3 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info4 = +struct rt_clock_timer_info clock_timer_info4 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info *ch32f1_hwtimer_info_config_get(TIM_TypeDef *timx) +struct rt_clock_timer_info *ch32f1_clock_timer_info_config_get(TIM_TypeDef *timx) { - struct rt_hwtimer_info *info = RT_NULL; + struct rt_clock_timer_info *info = RT_NULL; if (timx == TIM1) { - info = &hwtimer_info1; + info = &clock_timer_info1; } else if (timx == TIM2) { - info = &hwtimer_info2; + info = &clock_timer_info2; } else if (timx == TIM3) { - info = &hwtimer_info3; + info = &clock_timer_info3; } else if (timx == TIM4) { - info = &hwtimer_info4; + info = &clock_timer_info4; } return info; diff --git a/bsp/wch/arm/ch32f103c8-core/board/board.h b/bsp/wch/arm/ch32f103c8-core/board/board.h index f4073203a76..433895224a3 100644 --- a/bsp/wch/arm/ch32f103c8-core/board/board.h +++ b/bsp/wch/arm/ch32f103c8-core/board/board.h @@ -64,8 +64,8 @@ void ch32f1_i2c_config(I2C_TypeDef* i2cx); void ch32f1_tim_clock_init(TIM_TypeDef *timx); rt_uint32_t ch32f1_tim_clock_get(TIM_TypeDef *timx); -#ifdef BSP_USING_HWTIMER -struct rt_hwtimer_info* ch32f1_hwtimer_info_config_get(TIM_TypeDef *timx); +#ifdef BSP_USING_CLOCK_TIMER +struct rt_clock_timer_info* ch32f1_clock_timer_info_config_get(TIM_TypeDef *timx); #endif #ifdef BSP_USING_PWM diff --git a/bsp/wch/arm/ch32f10x_port_cn.md b/bsp/wch/arm/ch32f10x_port_cn.md index ff0f3d93131..577d59d10e3 100644 --- a/bsp/wch/arm/ch32f10x_port_cn.md +++ b/bsp/wch/arm/ch32f10x_port_cn.md @@ -49,19 +49,19 @@ void ch32f1_i2c_config(I2C_TypeDef* i2cx); + BSP_USING_RTC + BSP_USING_RTC_LSI + LSI_VALUE -+ HWTIMER 1/2/3/4 - + RT_USING_HWTIMER - + BSP_USING_HWTIMER - + BSP_USING_TIM1_HWTIMER - + BSP_USING_TIM2_HWTIMER - + BSP_USING_TIM3_HWTIMER - + BSP_USING_TIM4_HWTIMER ++ CLOCK_TIMER 1/2/3/4 + + RT_USING_CLOCK_TIME + + BSP_USING_CLOCK_TIMER + + BSP_USING_TIM1_CLOCK_TIMER + + BSP_USING_TIM2_CLOCK_TIMER + + BSP_USING_TIM3_CLOCK_TIMER + + BSP_USING_TIM4_CLOCK_TIMER ~~~c void ch32f1_tim_clock_init(TIM_TypeDef *timx); rt_uint32_t ch32f1_tim_clock_get(TIM_TypeDef *timx); ~~~ ~~~c -struct rt_hwtimer_info* ch32f1_hwtimer_info_config_get(TIM_TypeDef *timx); +struct rt_clock_timer_info* ch32f1_clock_timer_info_config_get(TIM_TypeDef *timx); ~~~ + PWM 4(timer) x 4 (channel) + RT_USING_PWM @@ -189,8 +189,8 @@ void ch32f1_usart_clock_and_io_init(USART_TypeDef* usartx); void ch32f1_tim_clock_init(TIM_TypeDef *timx); rt_uint32_t ch32f1_tim_clock_get(TIM_TypeDef *timx); -#ifdef BSP_USING_HWTIMER -struct rt_hwtimer_info* ch32f1_hwtimer_info_config_get(TIM_TypeDef *timx); +#ifdef BSP_USING_CLOCK_TIMER +struct rt_clock_timer_info* ch32f1_clock_timer_info_config_get(TIM_TypeDef *timx); #endif #ifdef BSP_USING_PWM diff --git a/bsp/wch/arm/ch32f203r-evt/README.md b/bsp/wch/arm/ch32f203r-evt/README.md index 7e2cd047163..af53579eb67 100644 --- a/bsp/wch/arm/ch32f203r-evt/README.md +++ b/bsp/wch/arm/ch32f203r-evt/README.md @@ -31,7 +31,7 @@ | SPI | 支持 | SPI 1~3 | | WDT | 支持 | IWDG | | RTC | 支持 | 外部或内部低速晶振 | -| HWTIMER | 支持 |定时器 1~10 | +| CLOCK_TIMER | 支持 |定时器 1~10 | | PWM | 支持 |定时器 1~5, 8~10(每个定时器包括4个通道) | diff --git a/bsp/wch/arm/ch32f203r-evt/board/Kconfig b/bsp/wch/arm/ch32f203r-evt/board/Kconfig index 74ef7c3dcf4..d83f9257b86 100644 --- a/bsp/wch/arm/ch32f203r-evt/board/Kconfig +++ b/bsp/wch/arm/ch32f203r-evt/board/Kconfig @@ -109,9 +109,9 @@ config BSP_USING_TIM default n if BSP_USING_TIM - config BSP_USING_HWTIMER + config BSP_USING_CLOCK_TIMER bool - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n config BSP_USING_PWM @@ -125,12 +125,12 @@ config BSP_USING_TIM if BSP_USING_TIM1 choice - prompt "using TIM1 as hwtimer or PWM mode" - default BSP_USING_TIM1_HWTIMER + prompt "using TIM1 as clock_timer or PWM mode" + default BSP_USING_TIM1_CLOCK_TIMER - config BSP_USING_TIM1_HWTIMER - bool "using TIM1 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM1_CLOCK_TIMER + bool "using TIM1 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM1_PWM bool "using TIM1 as PWM mode" @@ -163,12 +163,12 @@ config BSP_USING_TIM if BSP_USING_TIM2 choice - prompt "using TIM2 as hwtimer or PWM mode" - default BSP_USING_TIM2_HWTIMER + prompt "using TIM2 as clock_timer or PWM mode" + default BSP_USING_TIM2_CLOCK_TIMER - config BSP_USING_TIM2_HWTIMER - bool "using TIM2 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM2_CLOCK_TIMER + bool "using TIM2 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM2_PWM bool "using TIM2 as PWM mode" @@ -201,12 +201,12 @@ config BSP_USING_TIM if BSP_USING_TIM3 choice - prompt "using TIM3 as hwtimer or PWM mode" - default BSP_USING_TIM3_HWTIMER + prompt "using TIM3 as clock_timer or PWM mode" + default BSP_USING_TIM3_CLOCK_TIMER - config BSP_USING_TIM3_HWTIMER - bool "using TIM3 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM3_CLOCK_TIMER + bool "using TIM3 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM3_PWM bool "using TIM3 as PWM mode" @@ -239,12 +239,12 @@ config BSP_USING_TIM if BSP_USING_TIM4 choice - prompt "using TIM4 as hwtimer or PWM mode" - default BSP_USING_TIM4_HWTIMER + prompt "using TIM4 as clock_timer or PWM mode" + default BSP_USING_TIM4_CLOCK_TIMER - config BSP_USING_TIM4_HWTIMER - bool "using TIM4 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM4_CLOCK_TIMER + bool "using TIM4 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM4_PWM bool "using TIM4 as PWM mode" @@ -277,12 +277,12 @@ config BSP_USING_TIM if BSP_USING_TIM4 choice - prompt "using TIM5 as hwtimer or PWM mode" - default BSP_USING_TIM5_HWTIMER + prompt "using TIM5 as clock_timer or PWM mode" + default BSP_USING_TIM5_CLOCK_TIMER - config BSP_USING_TIM5_HWTIMER - bool "using TIM5 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM5_CLOCK_TIMER + bool "using TIM5 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM5_PWM bool "using TIM5 as PWM mode" @@ -315,9 +315,9 @@ config BSP_USING_TIM if BSP_USING_TIM6 - config BSP_USING_TIM6_HWTIMER - bool "using TIM6 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM6_CLOCK_TIMER + bool "using TIM6 as clock_timer mode" + select BSP_USING_CLOCK_TIMER endif @@ -327,9 +327,9 @@ config BSP_USING_TIM if BSP_USING_TIM7 - config BSP_USING_TIM7_HWTIMER - bool "using TIM7 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM7_CLOCK_TIMER + bool "using TIM7 as clock_timer mode" + select BSP_USING_CLOCK_TIMER endif @@ -339,12 +339,12 @@ config BSP_USING_TIM if BSP_USING_TIM8 choice - prompt "using TIM8 as hwtimer or PWM mode" - default BSP_USING_TIM8_HWTIMER + prompt "using TIM8 as clock_timer or PWM mode" + default BSP_USING_TIM8_CLOCK_TIMER - config BSP_USING_TIM8_HWTIMER - bool "using TIM8 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM8_CLOCK_TIMER + bool "using TIM8 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM8_PWM bool "using TIM8 as PWM mode" @@ -377,12 +377,12 @@ config BSP_USING_TIM if BSP_USING_TIM9 choice - prompt "using TIM9 as hwtimer or PWM mode" - default BSP_USING_TIM9_HWTIMER + prompt "using TIM9 as clock_timer or PWM mode" + default BSP_USING_TIM9_CLOCK_TIMER - config BSP_USING_TIM9_HWTIMER - bool "using TIM9 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM9_CLOCK_TIMER + bool "using TIM9 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM9_PWM bool "using TIM9 as PWM mode" @@ -415,12 +415,12 @@ config BSP_USING_TIM if BSP_USING_TIM10 choice - prompt "using TIM10 as hwtimer or PWM mode" - default BSP_USING_TIM10_HWTIMER + prompt "using TIM10 as clock_timer or PWM mode" + default BSP_USING_TIM10_CLOCK_TIMER - config BSP_USING_TIM10_HWTIMER - bool "using TIM10 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM10_CLOCK_TIMER + bool "using TIM10 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM10_PWM bool "using TIM10 as PWM mode" diff --git a/bsp/wch/arm/ch32f203r-evt/board/board.c b/bsp/wch/arm/ch32f203r-evt/board/board.c index 50593beaeb8..f9bb1ba2493 100644 --- a/bsp/wch/arm/ch32f203r-evt/board/board.c +++ b/bsp/wch/arm/ch32f203r-evt/board/board.c @@ -303,7 +303,7 @@ void ch32f2_i2c_config(I2C_TypeDef *i2cx) } } -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER void ch32f2_tim_clock_init(TIM_TypeDef *timx) { if (timx == TIM1) @@ -379,143 +379,143 @@ rt_uint32_t ch32f2_tim_clock_get(TIM_TypeDef *timx) return ppre1 >= 4 ? RCC_Clocks.PCLK1_Frequency * 2 : RCC_Clocks.PCLK1_Frequency; } -struct rt_hwtimer_info hwtimer_info1 = +struct rt_clock_timer_info clock_timer_info1 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info2 = +struct rt_clock_timer_info clock_timer_info2 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info3 = +struct rt_clock_timer_info clock_timer_info3 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info4 = +struct rt_clock_timer_info clock_timer_info4 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info5 = +struct rt_clock_timer_info clock_timer_info5 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info6 = +struct rt_clock_timer_info clock_timer_info6 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info7 = +struct rt_clock_timer_info clock_timer_info7 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info8 = +struct rt_clock_timer_info clock_timer_info8 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info9 = +struct rt_clock_timer_info clock_timer_info9 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info hwtimer_info10 = +struct rt_clock_timer_info clock_timer_info10 = { .maxfreq = 1000000, .minfreq = 2000, .maxcnt = 0xFFFF, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }; -struct rt_hwtimer_info *ch32f2_hwtimer_info_config_get(TIM_TypeDef *timx) +struct rt_clock_timer_info *ch32f2_clock_timer_info_config_get(TIM_TypeDef *timx) { - struct rt_hwtimer_info *info = RT_NULL; + struct rt_clock_timer_info *info = RT_NULL; if (timx == TIM1) { - info = &hwtimer_info1; + info = &clock_timer_info1; } else if (timx == TIM2) { - info = &hwtimer_info2; + info = &clock_timer_info2; } else if (timx == TIM3) { - info = &hwtimer_info3; + info = &clock_timer_info3; } else if (timx == TIM4) { - info = &hwtimer_info4; + info = &clock_timer_info4; } else if (timx == TIM4) { - info = &hwtimer_info4; + info = &clock_timer_info4; } else if (timx == TIM5) { - info = &hwtimer_info5; + info = &clock_timer_info5; } else if (timx == TIM6) { - info = &hwtimer_info6; + info = &clock_timer_info6; } else if (timx == TIM7) { - info = &hwtimer_info7; + info = &clock_timer_info7; } else if (timx == TIM8) { - info = &hwtimer_info8; + info = &clock_timer_info8; } else if (timx == TIM9) { - info = &hwtimer_info9; + info = &clock_timer_info9; } else if (timx == TIM10) { - info = &hwtimer_info10; + info = &clock_timer_info10; } return info; diff --git a/bsp/wch/arm/ch32f203r-evt/board/board.h b/bsp/wch/arm/ch32f203r-evt/board/board.h index 6a3b8eedfbc..c4ae16e4b2c 100644 --- a/bsp/wch/arm/ch32f203r-evt/board/board.h +++ b/bsp/wch/arm/ch32f203r-evt/board/board.h @@ -64,8 +64,8 @@ void ch32f2_i2c_config(I2C_TypeDef* i2cx); void ch32f2_tim_clock_init(TIM_TypeDef *timx); rt_uint32_t ch32f2_tim_clock_get(TIM_TypeDef *timx); -#ifdef BSP_USING_HWTIMER -struct rt_hwtimer_info* ch32f2_hwtimer_info_config_get(TIM_TypeDef *timx); +#ifdef BSP_USING_CLOCK_TIMER +struct rt_clock_timer_info* ch32f2_clock_timer_info_config_get(TIM_TypeDef *timx); #endif #ifdef BSP_USING_PWM diff --git a/bsp/wch/arm/ch32f203r-evt/project.uvprojx b/bsp/wch/arm/ch32f203r-evt/project.uvprojx index 3c8b1d23a49..52e072f039b 100644 --- a/bsp/wch/arm/ch32f203r-evt/project.uvprojx +++ b/bsp/wch/arm/ch32f203r-evt/project.uvprojx @@ -618,9 +618,9 @@ - hwtimer.c + clock_timer.c 1 - ..\..\..\..\components\drivers\hwtimer\hwtimer.c + ..\..\..\..\components\drivers\clock_time\clock_timer.c @@ -1036,9 +1036,9 @@ - drv_hwtimer_ch32f20x.c + drv_timer_ch32f20x.c 1 - ..\Libraries\ch32_drivers\drv_hwtimer_ch32f20x.c + ..\Libraries\ch32_drivers\drv_timer_ch32f20x.c diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript b/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript index f87d0b1ea16..537dd03f728 100644 --- a/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript +++ b/bsp/wch/risc-v/Libraries/ch32_drivers/SConscript @@ -51,8 +51,8 @@ if GetDepend('SOC_RISCV_FAMILY_CH32'): if GetDepend('BSP_USING_PWM'): src += ['drv_pwm.c'] - if GetDepend('BSP_USING_HWTIMER'): - src += ['drv_hwtimer.c'] + if GetDepend('BSP_USING_CLOCK_TIMER'): + src += ['drv_timer.c'] if GetDepend(['BSP_USING_ON_CHIP_FLASH']): src += ['drv_flash.c'] diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_pwm.h b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_pwm.h index ec8db3aec75..9e73e4b8b1f 100644 --- a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_pwm.h +++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_pwm.h @@ -20,7 +20,7 @@ #include "ch32v20x_tim.h" #endif #include -#include +#include #include #define MAX_COUNTER 65535 diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_hwtimer.c b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_timer.c similarity index 76% rename from bsp/wch/risc-v/Libraries/ch32_drivers/drv_hwtimer.c rename to bsp/wch/risc-v/Libraries/ch32_drivers/drv_timer.c index c4f227156bf..f58196620b5 100644 --- a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_hwtimer.c +++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_timer.c @@ -11,15 +11,15 @@ #include #include -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER #define DBG_TAG "TIM" #define DBG_LVL DBG_LOG #include -#include "drv_hwtimer.h" +#include "drv_timer.h" #include "board.h" -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME enum { @@ -55,7 +55,7 @@ enum #endif }; -static struct ch32_hwtimer ch32_hwtimer_obj[] = +static struct ch32_clock_timer ch32_clock_timer_obj[] = { #ifdef BSP_USING_TIM1 TIM1_CONFIG, @@ -126,13 +126,13 @@ void ch32_get_pclk_doubler(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_double } } -static void ch32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t state) +static void ch32_clock_timer_init(struct rt_clock_timer_device *timer, rt_uint32_t state) { RT_ASSERT(timer != RT_NULL); TIM_HandleTypeDef *tim = RT_NULL; RCC_ClocksTypeDef RCC_ClockStruct; NVIC_InitTypeDef NVIC_InitStruct; - struct ch32_hwtimer *tim_device = RT_NULL; + struct ch32_clock_timer *tim_device = RT_NULL; rt_uint32_t prescaler_value = 0; rt_uint32_t pclk1_doubler, pclk2_doubler; @@ -142,7 +142,7 @@ static void ch32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t state if(state) { tim = (TIM_HandleTypeDef *)timer->parent.user_data; - tim_device = (struct ch32_hwtimer *)timer; + tim_device = (struct ch32_clock_timer *)timer; #if defined (SOC_RISCV_SERIES_CH32V2) if(tim->instance == TIM1) @@ -167,7 +167,7 @@ static void ch32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t state tim->init.TIM_Period = 10000 - 1; tim->init.TIM_RepetitionCounter = 0; - if(timer->info->cntmode == HWTIMER_CNTMODE_UP) + if(timer->info->cntmode == CLOCK_TIMER_CNTMODE_UP) { tim->init.TIM_CounterMode = TIM_CounterMode_Up; } @@ -195,7 +195,7 @@ static void ch32_hwtimer_init(struct rt_hwtimer_device *timer, rt_uint32_t state } } -static rt_err_t ch32_hwtimer_start(struct rt_hwtimer_device *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t ch32_clock_timer_start(struct rt_clock_timer_device *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode) { RT_ASSERT(timer != RT_NULL); TIM_HandleTypeDef *tim = RT_NULL; @@ -207,7 +207,7 @@ static rt_err_t ch32_hwtimer_start(struct rt_hwtimer_device *timer, rt_uint32_t tim->instance->ATRLR = cnt - 1; tim->init.TIM_Period = cnt - 1; - if (mode == HWTIMER_MODE_ONESHOT) + if (mode == CLOCK_TIMER_MODE_ONESHOT) { /* set timer to single mode */ tim->instance->CTLR1 &= (rt_uint16_t) ~((rt_uint16_t)TIM_OPM); @@ -225,7 +225,7 @@ static rt_err_t ch32_hwtimer_start(struct rt_hwtimer_device *timer, rt_uint32_t return RT_EOK; } -static void ch32_hwtimer_stop(struct rt_hwtimer_device *timer) +static void ch32_clock_timer_stop(struct rt_clock_timer_device *timer) { RT_ASSERT(timer != RT_NULL); TIM_HandleTypeDef *tim = RT_NULL; @@ -239,7 +239,7 @@ static void ch32_hwtimer_stop(struct rt_hwtimer_device *timer) tim->instance->CNT = 0; } -static rt_uint32_t ch32_hwtimer_count_get(struct rt_hwtimer_device *timer) +static rt_uint32_t ch32_clock_timer_count_get(struct rt_clock_timer_device *timer) { RT_ASSERT(timer != RT_NULL); TIM_HandleTypeDef *tim = RT_NULL; @@ -248,7 +248,7 @@ static rt_uint32_t ch32_hwtimer_count_get(struct rt_hwtimer_device *timer) return tim->instance->CNT; } -static rt_err_t ch32_hwtimer_control(struct rt_hwtimer_device *timer, rt_uint32_t cmd, void *args) +static rt_err_t ch32_clock_timer_control(struct rt_clock_timer_device *timer, rt_uint32_t cmd, void *args) { RT_ASSERT(timer != RT_NULL); RT_ASSERT(args != RT_NULL); @@ -261,7 +261,7 @@ static rt_err_t ch32_hwtimer_control(struct rt_hwtimer_device *timer, rt_uint32_ switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { rt_uint32_t freq; rt_uint16_t val; @@ -297,9 +297,9 @@ static rt_err_t ch32_hwtimer_control(struct rt_hwtimer_device *timer, rt_uint32_ break; } - case HWTIMER_CTRL_MODE_SET: + case CLOCK_TIMER_CTRL_MODE_SET: { - if (*(rt_hwtimer_mode_t *)args == HWTIMER_MODE_ONESHOT) + if (*(rt_clock_timer_mode_t *)args == CLOCK_TIMER_MODE_ONESHOT) { /* set timer to single mode */ tim->instance->CTLR1 &= (rt_uint16_t) ~((rt_uint16_t)TIM_OPM); @@ -313,15 +313,15 @@ static rt_err_t ch32_hwtimer_control(struct rt_hwtimer_device *timer, rt_uint32_ break; } - case HWTIMER_CTRL_INFO_GET: + case CLOCK_TIMER_CTRL_INFO_GET: { - *(rt_hwtimer_mode_t *)args = tim->instance->CNT; + *(rt_clock_timer_mode_t *)args = tim->instance->CNT; break; } - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: { - ch32_hwtimer_stop(timer); + ch32_clock_timer_stop(timer); break; } @@ -335,26 +335,26 @@ static rt_err_t ch32_hwtimer_control(struct rt_hwtimer_device *timer, rt_uint32_ return result; } -static const struct rt_hwtimer_info ch32_hwtimer_info = TIM_DEV_INFO_CONFIG; -static const struct rt_hwtimer_ops ch32_hwtimer_ops = +static const struct rt_clock_timer_info ch32_clock_timer_info = TIM_DEV_INFO_CONFIG; +static const struct rt_clock_timer_ops ch32_clock_timer_ops = { - ch32_hwtimer_init, - ch32_hwtimer_start, - ch32_hwtimer_stop, - ch32_hwtimer_count_get, - ch32_hwtimer_control + ch32_clock_timer_init, + ch32_clock_timer_start, + ch32_clock_timer_stop, + ch32_clock_timer_count_get, + ch32_clock_timer_control }; -static void ch32_hwtimer_isr(struct rt_hwtimer_device *device) +static void ch32_clock_timer_isr(struct rt_clock_timer_device *device) { RT_ASSERT(device != RT_NULL); - struct ch32_hwtimer *hwtimer = RT_NULL; - hwtimer = rt_container_of(device, struct ch32_hwtimer, device); + struct ch32_clock_timer *clock_timer = RT_NULL; + clock_timer = rt_container_of(device, struct ch32_clock_timer, device); - if(TIM_GetITStatus(hwtimer->handle.instance, TIM_IT_Update) != RESET) + if(TIM_GetITStatus(clock_timer->handle.instance, TIM_IT_Update) != RESET) { - rt_device_hwtimer_isr(device); - TIM_ClearITPendingBit(hwtimer->handle.instance, TIM_IT_Update); + rt_clock_timer_isr(device); + TIM_ClearITPendingBit(clock_timer->handle.instance, TIM_IT_Update); } } @@ -364,7 +364,7 @@ void TIM1_UP_IRQHandler(void) { GET_INT_SP(); rt_interrupt_enter(); - ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM1_INDEX].device)); + ch32_clock_timer_isr(&(ch32_clock_timer_obj[TIM1_INDEX].device)); rt_interrupt_leave(); FREE_INT_SP(); } @@ -376,7 +376,7 @@ void TIM2_IRQHandler(void) { GET_INT_SP(); rt_interrupt_enter(); - ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM2_INDEX].device)); + ch32_clock_timer_isr(&(ch32_clock_timer_obj[TIM2_INDEX].device)); rt_interrupt_leave(); FREE_INT_SP(); } @@ -388,7 +388,7 @@ void TIM3_IRQHandler(void) { GET_INT_SP(); rt_interrupt_enter(); - ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM3_INDEX].device)); + ch32_clock_timer_isr(&(ch32_clock_timer_obj[TIM3_INDEX].device)); rt_interrupt_leave(); FREE_INT_SP(); } @@ -400,7 +400,7 @@ void TIM4_IRQHandler(void) { GET_INT_SP(); rt_interrupt_enter(); - ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM4_INDEX].device)); + ch32_clock_timer_isr(&(ch32_clock_timer_obj[TIM4_INDEX].device)); rt_interrupt_leave(); FREE_INT_SP(); } @@ -412,7 +412,7 @@ void TIM5_IRQHandler(void) { GET_INT_SP(); rt_interrupt_enter(); - ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM5_INDEX].device)); + ch32_clock_timer_isr(&(ch32_clock_timer_obj[TIM5_INDEX].device)); rt_interrupt_leave(); FREE_INT_SP(); } @@ -424,7 +424,7 @@ void TIM6_IRQHandler(void) { GET_INT_SP(); rt_interrupt_enter(); - ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM6_INDEX].device)); + ch32_clock_timer_isr(&(ch32_clock_timer_obj[TIM6_INDEX].device)); rt_interrupt_leave(); FREE_INT_SP(); } @@ -436,7 +436,7 @@ void TIM7_IRQHandler(void) { GET_INT_SP(); rt_interrupt_enter(); - ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM7_INDEX].device)); + ch32_clock_timer_isr(&(ch32_clock_timer_obj[TIM7_INDEX].device)); rt_interrupt_leave(); FREE_INT_SP(); } @@ -448,7 +448,7 @@ void TIM8_UP_IRQHandler(void) { GET_INT_SP(); rt_interrupt_enter(); - ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM8_INDEX].device)); + ch32_clock_timer_isr(&(ch32_clock_timer_obj[TIM8_INDEX].device)); rt_interrupt_leave(); FREE_INT_SP(); } @@ -460,7 +460,7 @@ void TIM9_UP_IRQHandler(void) { GET_INT_SP(); rt_interrupt_enter(); - ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM9_INDEX].device)); + ch32_clock_timer_isr(&(ch32_clock_timer_obj[TIM9_INDEX].device)); rt_interrupt_leave(); FREE_INT_SP(); } @@ -472,7 +472,7 @@ void TIM10_UP_IRQHandler(void) { GET_INT_SP(); rt_interrupt_enter(); - ch32_hwtimer_isr(&(ch32_hwtimer_obj[TIM10_INDEX].device)); + ch32_clock_timer_isr(&(ch32_clock_timer_obj[TIM10_INDEX].device)); rt_interrupt_leave(); FREE_INT_SP(); } @@ -483,12 +483,12 @@ static int rt_hw_timer_init(void) int i = 0; int result = RT_EOK; - for (i = 0; i < sizeof(ch32_hwtimer_obj) / sizeof(ch32_hwtimer_obj[0]); i++) + for (i = 0; i < sizeof(ch32_clock_timer_obj) / sizeof(ch32_clock_timer_obj[0]); i++) { - ch32_hwtimer_obj[i].device.info = &ch32_hwtimer_info; - ch32_hwtimer_obj[i].device.ops = &ch32_hwtimer_ops; - result = rt_device_hwtimer_register(&ch32_hwtimer_obj[i].device, - ch32_hwtimer_obj[i].name, (void *)&ch32_hwtimer_obj[i].handle); + ch32_clock_timer_obj[i].device.info = &ch32_clock_timer_info; + ch32_clock_timer_obj[i].device.ops = &ch32_clock_timer_ops; + result = rt_clock_timer_register(&ch32_clock_timer_obj[i].device, + ch32_clock_timer_obj[i].name, (void *)&ch32_clock_timer_obj[i].handle); RT_ASSERT(result == RT_EOK); } @@ -496,5 +496,5 @@ static int rt_hw_timer_init(void) } INIT_BOARD_EXPORT(rt_hw_timer_init); -#endif /* RT_USING_HWTIMER */ -#endif /* BSP_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME */ +#endif /* BSP_USING_CLOCK_TIMER */ diff --git a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_hwtimer.h b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_timer.h similarity index 94% rename from bsp/wch/risc-v/Libraries/ch32_drivers/drv_hwtimer.h rename to bsp/wch/risc-v/Libraries/ch32_drivers/drv_timer.h index 10ed3837464..685b55a87e7 100644 --- a/bsp/wch/risc-v/Libraries/ch32_drivers/drv_hwtimer.h +++ b/bsp/wch/risc-v/Libraries/ch32_drivers/drv_timer.h @@ -8,8 +8,8 @@ * 2022-09-10 MXH the first version */ -#ifndef __DRV_HWTIMER_H__ -#define __DRV_HWTIMER_H__ +#ifndef __DRV_CLOCK_TIMER_H__ +#define __DRV_CLOCK_TIMER_H__ #include #if defined(SOC_RISCV_SERIES_CH32V3) @@ -19,7 +19,7 @@ #include "ch32v20x_tim.h" #endif -#ifdef BSP_USING_HWTIMER +#ifdef BSP_USING_CLOCK_TIMER typedef struct { @@ -29,9 +29,9 @@ typedef struct }TIM_HandleTypeDef; -struct ch32_hwtimer +struct ch32_clock_timer { - rt_hwtimer_t device; + rt_clock_timer_t device; TIM_HandleTypeDef handle; IRQn_Type irqn; char *name; @@ -44,7 +44,7 @@ struct ch32_hwtimer .maxfreq = 1000000, \ .minfreq = 3000, \ .maxcnt = 0xFFFF, \ - .cntmode = HWTIMER_CNTMODE_UP, \ + .cntmode = CLOCK_TIMER_CNTMODE_UP, \ } #endif /* TIM_DEV_INFO_CONFIG */ @@ -148,5 +148,5 @@ struct ch32_hwtimer } #endif /* BSP_USING_TIM10 */ -#endif /* BSP_USING_HWTIMER */ -#endif /* __DRV_HWTIMER_H__ */ +#endif /* BSP_USING_CLOCK_TIMER */ +#endif /* __DRV_CLOCK_TIMER_H__ */ diff --git a/bsp/wch/risc-v/Libraries/ch56x_drivers/SConscript b/bsp/wch/risc-v/Libraries/ch56x_drivers/SConscript index b92cfcb3db2..8c6988aa60a 100644 --- a/bsp/wch/risc-v/Libraries/ch56x_drivers/SConscript +++ b/bsp/wch/risc-v/Libraries/ch56x_drivers/SConscript @@ -18,7 +18,7 @@ if GetDepend('RT_USING_USB_DEVICE'): if GetDepend('RT_USING_PWM'): src += ['ch56x_pwm.c'] -if GetDepend('RT_USING_HWTIMER'): +if GetDepend('RT_USING_CLOCK_TIME'): src += ['ch56x_timer.c'] if GetDepend('RT_USING_SPI'): diff --git a/bsp/wch/risc-v/Libraries/ch56x_drivers/ch56x_timer.c b/bsp/wch/risc-v/Libraries/ch56x_drivers/ch56x_timer.c index 2c8411d6fd1..e59cd04f6f6 100644 --- a/bsp/wch/risc-v/Libraries/ch56x_drivers/ch56x_timer.c +++ b/bsp/wch/risc-v/Libraries/ch56x_drivers/ch56x_timer.c @@ -8,7 +8,7 @@ * 2022-07-15 Emuzit first version */ #include -#include +#include #include "ch56x_sys.h" #include "ch56x_timer.h" #include "isr_sp.h" @@ -17,142 +17,142 @@ #error "Please define at least one TMRx" #endif -struct hwtimer_device +struct clock_timer_device { - struct rt_hwtimer_device parent; - struct rt_hwtimer_info hwtimer_info; + struct rt_clock_timer_device parent; + struct rt_clock_timer_info clock_timer_info; volatile struct timer_registers *reg_base; - rt_hwtimer_mode_t tmode; + rt_clock_timer_mode_t tmode; irq_number_t irqn; char *name; }; #ifdef BSP_USING_TMR0 -static struct hwtimer_device hwtimer_device_0 = +static struct clock_timer_device clock_timer_device_0 = { - .hwtimer_info = + .clock_timer_info = { .maxfreq = 80000000, .minfreq = 80000000, .maxcnt = 0x3ffffff, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }, .reg_base = (struct timer_registers *)TMR0_REG_BASE, - .tmode = HWTIMER_MODE_PERIOD, + .tmode = CLOCK_TIMER_MODE_PERIOD, .irqn = TMR0_IRQn, .name = "timer0", }; #endif #ifdef BSP_USING_TMR1 -static struct hwtimer_device hwtimer_device_1 = +static struct clock_timer_device clock_timer_device_1 = { - .hwtimer_info = + .clock_timer_info = { .maxfreq = 80000000, .minfreq = 80000000, .maxcnt = 0x3ffffff, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }, .reg_base = (struct timer_registers *)TMR1_REG_BASE, - .tmode = HWTIMER_MODE_PERIOD, + .tmode = CLOCK_TIMER_MODE_PERIOD, .irqn = TMR1_IRQn, .name = "timer1", }; #endif #ifdef BSP_USING_TMR2 -static struct hwtimer_device hwtimer_device_2 = +static struct clock_timer_device clock_timer_device_2 = { - .hwtimer_info = + .clock_timer_info = { .maxfreq = 80000000, .minfreq = 80000000, .maxcnt = 0x3ffffff, - .cntmode = HWTIMER_CNTMODE_UP, + .cntmode = CLOCK_TIMER_CNTMODE_UP, }, .reg_base = (struct timer_registers *)TMR2_REG_BASE, - .tmode = HWTIMER_MODE_PERIOD, + .tmode = CLOCK_TIMER_MODE_PERIOD, .irqn = TMR2_IRQn, .name = "timer2", }; #endif -static void hwtimer_stop(struct rt_hwtimer_device *timer); +static void clock_timer_stop(struct rt_clock_timer_device *timer); -static void hwtimer_init(struct rt_hwtimer_device *timer, uint32_t state) +static void clock_timer_init(struct rt_clock_timer_device *timer, uint32_t state) { - struct hwtimer_device *hwtimer_device = (void *)timer; + struct clock_timer_device *clock_timer_device = (void *)timer; - RT_ASSERT(hwtimer_device != RT_NULL); + RT_ASSERT(clock_timer_device != RT_NULL); /* no resource processing, `state` ignored */ - hwtimer_stop(timer); + clock_timer_stop(timer); - if (hwtimer_device->irqn != TMR0_IRQn) + if (clock_timer_device->irqn != TMR0_IRQn) { - hwtimer_device->reg_base->CTRL_DMA.reg = 0; + clock_timer_device->reg_base->CTRL_DMA.reg = 0; } } -static rt_err_t hwtimer_start(struct rt_hwtimer_device *timer, uint32_t cnt, rt_hwtimer_mode_t mode) +static rt_err_t clock_timer_start(struct rt_clock_timer_device *timer, uint32_t cnt, rt_clock_timer_mode_t mode) { - struct hwtimer_device *hwtimer_device = (void *)timer; + struct clock_timer_device *clock_timer_device = (void *)timer; volatile struct timer_registers *txreg; - RT_ASSERT(hwtimer_device != RT_NULL); + RT_ASSERT(clock_timer_device != RT_NULL); - /* hwtimer_device->tmode may be different from timer->mode. - * For multi-cycle ONESHOT, tmode is set to PERIOD at hwtimer_start. + /* clock_timer_device->tmode may be different from timer->mode. + * For multi-cycle ONESHOT, tmode is set to PERIOD at clock_timer_start. */ - hwtimer_device->tmode = mode; + clock_timer_device->tmode = mode; - sys_clk_off_by_irqn(hwtimer_device->irqn, SYS_SLP_CLK_ON); - txreg = hwtimer_device->reg_base; + sys_clk_off_by_irqn(clock_timer_device->irqn, SYS_SLP_CLK_ON); + txreg = clock_timer_device->reg_base; txreg->CNT_END = cnt; txreg->CTRL_MOD.reg = RB_TMR_ALL_CLEAR; txreg->CTRL_MOD.reg = RB_TMR_COUNT_EN; txreg->INTER_EN.cyc_end = 1; - rt_hw_interrupt_umask(hwtimer_device->irqn); + rt_hw_interrupt_umask(clock_timer_device->irqn); return RT_EOK; } -static void hwtimer_stop(struct rt_hwtimer_device *timer) +static void clock_timer_stop(struct rt_clock_timer_device *timer) { - struct hwtimer_device *hwtimer_device = (void *)timer; + struct clock_timer_device *clock_timer_device = (void *)timer; volatile struct timer_registers *txreg; - RT_ASSERT(hwtimer_device != RT_NULL); + RT_ASSERT(clock_timer_device != RT_NULL); - rt_hw_interrupt_mask(hwtimer_device->irqn); + rt_hw_interrupt_mask(clock_timer_device->irqn); /* note: RB_TMR_COUNT_EN cleared */ - txreg = hwtimer_device->reg_base; + txreg = clock_timer_device->reg_base; txreg->CTRL_MOD.reg = RB_TMR_ALL_CLEAR; txreg->INTER_EN.reg = 0; - sys_clk_off_by_irqn(hwtimer_device->irqn, SYS_SLP_CLK_OFF); + sys_clk_off_by_irqn(clock_timer_device->irqn, SYS_SLP_CLK_OFF); } -static uint32_t hwtimer_count_get(struct rt_hwtimer_device *timer) +static uint32_t clock_timer_count_get(struct rt_clock_timer_device *timer) { - struct hwtimer_device *hwtimer_device = (void *)timer; + struct clock_timer_device *clock_timer_device = (void *)timer; - RT_ASSERT(hwtimer_device != RT_NULL); + RT_ASSERT(clock_timer_device != RT_NULL); - return hwtimer_device->reg_base->COUNT; + return clock_timer_device->reg_base->COUNT; } -static rt_err_t hwtimer_control( - struct rt_hwtimer_device *timer, uint32_t cmd, void *args) +static rt_err_t clock_timer_control( + struct rt_clock_timer_device *timer, uint32_t cmd, void *args) { - struct hwtimer_device *hwtimer_device = (void *)timer; + struct clock_timer_device *clock_timer_device = (void *)timer; rt_err_t result = RT_EOK; - RT_ASSERT(hwtimer_device != RT_NULL); + RT_ASSERT(clock_timer_device != RT_NULL); switch (cmd) { - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: /* clocking for ch56x timers are fixed to Fsys */ if (args == RT_NULL || *(uint32_t *)args != timer->info->minfreq) { @@ -160,9 +160,9 @@ static rt_err_t hwtimer_control( } break; - case HWTIMER_CTRL_STOP: - case HWTIMER_CTRL_INFO_GET: - case HWTIMER_CTRL_MODE_SET: + case CLOCK_TIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_INFO_GET: + case CLOCK_TIMER_CTRL_MODE_SET: default: result = -RT_ENOSYS; } @@ -170,60 +170,60 @@ static rt_err_t hwtimer_control( return result; } -static const struct rt_hwtimer_ops hwtimer_ops = +static const struct rt_clock_timer_ops clock_timer_ops = { - .init = hwtimer_init, - .start = hwtimer_start, - .stop = hwtimer_stop, - .count_get = hwtimer_count_get, - .control = hwtimer_control, + .init = clock_timer_init, + .start = clock_timer_start, + .stop = clock_timer_stop, + .count_get = clock_timer_count_get, + .control = clock_timer_control, }; -static int rt_hw_hwtimer_init(void) +static int rt_hw_clock_timer_init(void) { - struct hwtimer_device *devices[3]; + struct clock_timer_device *devices[3]; uint32_t Fsys = sys_hclk_get(); int n = 0; #ifdef BSP_USING_TMR2 - devices[n++] = &hwtimer_device_2; + devices[n++] = &clock_timer_device_2; #endif #ifdef BSP_USING_TMR1 - devices[n++] = &hwtimer_device_1; + devices[n++] = &clock_timer_device_1; #endif #ifdef BSP_USING_TMR0 - devices[n++] = &hwtimer_device_0; + devices[n++] = &clock_timer_device_0; #endif while (--n >= 0) { - struct hwtimer_device *hwtimer_device = devices[n]; + struct clock_timer_device *clock_timer_device = devices[n]; /* counting frequency is fixed to Fsys */ - hwtimer_device->hwtimer_info.maxfreq = Fsys; - hwtimer_device->hwtimer_info.minfreq = Fsys; - hwtimer_device->parent.info = &hwtimer_device->hwtimer_info; - hwtimer_device->parent.ops = &hwtimer_ops; - rt_device_hwtimer_register( - &hwtimer_device->parent, hwtimer_device->name, RT_NULL); + clock_timer_device->clock_timer_info.maxfreq = Fsys; + clock_timer_device->clock_timer_info.minfreq = Fsys; + clock_timer_device->parent.info = &clock_timer_device->clock_timer_info; + clock_timer_device->parent.ops = &clock_timer_ops; + rt_clock_timer_register( + &clock_timer_device->parent, clock_timer_device->name, RT_NULL); } return RT_EOK; } -INIT_DEVICE_EXPORT(rt_hw_hwtimer_init); +INIT_DEVICE_EXPORT(rt_hw_clock_timer_init); -static void _hwtimer_isr_common(struct hwtimer_device *hwtimer_device) +static void _clock_timer_isr_common(struct clock_timer_device *clock_timer_device) { - volatile struct timer_registers *txreg = hwtimer_device->reg_base; + volatile struct timer_registers *txreg = clock_timer_device->reg_base; if (txreg->INT_FLAG.cyc_end) { - if (hwtimer_device->tmode == HWTIMER_MODE_ONESHOT) + if (clock_timer_device->tmode == CLOCK_TIMER_MODE_ONESHOT) { /* disable timer to emulate oneshot */ txreg->CTRL_MOD.reg = 0; } - rt_device_hwtimer_isr(&hwtimer_device->parent); + rt_clock_timer_isr(&clock_timer_device->parent); txreg->INT_FLAG.cyc_end = 1; } } @@ -234,7 +234,7 @@ void tmr0_irq_handler(void) { isr_sp_enter(); rt_interrupt_enter(); - _hwtimer_isr_common(&hwtimer_device_0); + _clock_timer_isr_common(&clock_timer_device_0); rt_interrupt_leave(); isr_sp_leave(); } @@ -246,7 +246,7 @@ void tmr1_irq_handler(void) { isr_sp_enter(); rt_interrupt_enter(); - _hwtimer_isr_common(&hwtimer_device_1); + _clock_timer_isr_common(&clock_timer_device_1); rt_interrupt_leave(); isr_sp_leave(); } @@ -258,7 +258,7 @@ void tmr2_irq_handler(void) { isr_sp_enter(); rt_interrupt_enter(); - _hwtimer_isr_common(&hwtimer_device_2); + _clock_timer_isr_common(&clock_timer_device_2); rt_interrupt_leave(); isr_sp_leave(); } diff --git a/bsp/wch/risc-v/ch32v208w-r0/board/Kconfig b/bsp/wch/risc-v/ch32v208w-r0/board/Kconfig index 5134fbd334e..1ef09bd521c 100644 --- a/bsp/wch/risc-v/ch32v208w-r0/board/Kconfig +++ b/bsp/wch/risc-v/ch32v208w-r0/board/Kconfig @@ -266,9 +266,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM - config BSP_USING_HWTIMER + config BSP_USING_CLOCK_TIMER bool - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n config BSP_USING_PWM @@ -282,12 +282,12 @@ menu "On-chip Peripheral Drivers" if BSP_USING_TIM1 choice - prompt "Using TIM1 as hwtimer or PWM mode" - default BSP_USING_TIM1_HWTIMER + prompt "Using TIM1 as clock_timer or PWM mode" + default BSP_USING_TIM1_CLOCK_TIMER - config BSP_USING_TIM1_HWTIMER - bool "Using TIM1 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM1_CLOCK_TIMER + bool "Using TIM1 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM1_PWM bool "Using TIM1 as PWM mode" @@ -318,12 +318,12 @@ menu "On-chip Peripheral Drivers" if BSP_USING_TIM2 choice - prompt "Using TIM2 as hwtimer or PWM mode" - default BSP_USING_TIM2_HWTIMER + prompt "Using TIM2 as clock_timer or PWM mode" + default BSP_USING_TIM2_CLOCK_TIMER - config BSP_USING_TIM2_HWTIMER - bool "Using TIM2 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM2_CLOCK_TIMER + bool "Using TIM2 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM2_PWM bool "Using TIM2 as PWM mode" @@ -354,12 +354,12 @@ menu "On-chip Peripheral Drivers" if BSP_USING_TIM3 choice - prompt "Using TIM3 as hwtimer or PWM mode" - default BSP_USING_TIM3_HWTIMER + prompt "Using TIM3 as clock_timer or PWM mode" + default BSP_USING_TIM3_CLOCK_TIMER - config BSP_USING_TIM3_HWTIMER - bool "Using TIM3 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM3_CLOCK_TIMER + bool "Using TIM3 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM3_PWM bool "Using TIM3 as PWM mode" @@ -390,12 +390,12 @@ menu "On-chip Peripheral Drivers" if BSP_USING_TIM4 choice - prompt "Using TIM4 as hwtimer or PWM mode" - default BSP_USING_TIM4_HWTIMER + prompt "Using TIM4 as clock_timer or PWM mode" + default BSP_USING_TIM4_CLOCK_TIMER - config BSP_USING_TIM4_HWTIMER - bool "Using TIM4 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM4_CLOCK_TIMER + bool "Using TIM4 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM4_PWM bool "Using TIM4 as PWM mode" @@ -426,12 +426,12 @@ menu "On-chip Peripheral Drivers" if BSP_USING_TIM5 choice - prompt "Using TIM5 as hwtimer or PWM mode" - default BSP_USING_TIM5_HWTIMER + prompt "Using TIM5 as clock_timer or PWM mode" + default BSP_USING_TIM5_CLOCK_TIMER - config BSP_USING_TIM5_HWTIMER - bool "Using TIM5 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM5_CLOCK_TIMER + bool "Using TIM5 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM5_PWM bool "Using TIM5 as PWM mode" @@ -462,12 +462,12 @@ menu "On-chip Peripheral Drivers" if BSP_USING_TIM6 choice - prompt "Using TIM5 as hwtimer (PWM mode not supported)" - default BSP_USING_TIM6_HWTIMER + prompt "Using TIM5 as clock_timer (PWM mode not supported)" + default BSP_USING_TIM6_CLOCK_TIMER - config BSP_USING_TIM6_HWTIMER - bool "Using TIM6 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM6_CLOCK_TIMER + bool "Using TIM6 as clock_timer mode" + select BSP_USING_CLOCK_TIMER endchoice endif @@ -478,12 +478,12 @@ menu "On-chip Peripheral Drivers" if BSP_USING_TIM7 choice - prompt "Using TIM7 as hwtimer (PWM mode not supported)" - default BSP_USING_TIM7_HWTIMER + prompt "Using TIM7 as clock_timer (PWM mode not supported)" + default BSP_USING_TIM7_CLOCK_TIMER - config BSP_USING_TIM7_HWTIMER - bool "Using TIM7 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM7_CLOCK_TIMER + bool "Using TIM7 as clock_timer mode" + select BSP_USING_CLOCK_TIMER endchoice endif @@ -494,12 +494,12 @@ menu "On-chip Peripheral Drivers" if BSP_USING_TIM8 choice - prompt "Using TIM8 as hwtimer or PWM mode" - default BSP_USING_TIM8_HWTIMER + prompt "Using TIM8 as clock_timer or PWM mode" + default BSP_USING_TIM8_CLOCK_TIMER - config BSP_USING_TIM8_HWTIMER - bool "Using TIM8 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM8_CLOCK_TIMER + bool "Using TIM8 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM8_PWM bool "Using TIM8 as PWM mode" @@ -530,12 +530,12 @@ menu "On-chip Peripheral Drivers" if BSP_USING_TIM9 choice - prompt "Using TIM9 as hwtimer or PWM mode" - default BSP_USING_TIM9_HWTIMER + prompt "Using TIM9 as clock_timer or PWM mode" + default BSP_USING_TIM9_CLOCK_TIMER - config BSP_USING_TIM9_HWTIMER - bool "Using TIM9 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM9_CLOCK_TIMER + bool "Using TIM9 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM9_PWM bool "Using TIM9 as PWM mode" @@ -566,12 +566,12 @@ menu "On-chip Peripheral Drivers" if BSP_USING_TIM10 choice - prompt "Using TIM10 as hwtimer or PWM mode" - default BSP_USING_TIM10_HWTIMER + prompt "Using TIM10 as clock_timer or PWM mode" + default BSP_USING_TIM10_CLOCK_TIMER - config BSP_USING_TIM10_HWTIMER - bool "Using TIM10 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM10_CLOCK_TIMER + bool "Using TIM10 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM10_PWM bool "Using TIM10 as PWM mode" diff --git a/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig b/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig index e0af96f5390..ececb91344d 100644 --- a/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig +++ b/bsp/wch/risc-v/ch32v307v-r1/board/Kconfig @@ -30,7 +30,7 @@ menu "Onboard Peripheral Drivers" select BSP_USING_TIM4_PWM_CH3 select BSP_USING_TIM4_PWM_CH4 select BSP_USING_TIM6 - select BSP_USING_TIM6_HWTIMER + select BSP_USING_TIM6_CLOCK_TIMER select BSP_USING_SOFT_I2C select BSP_USING_I2C1 select RTDUINO_USING_WIRE @@ -538,9 +538,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM - config BSP_USING_HWTIMER + config BSP_USING_CLOCK_TIMER bool - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n config BSP_USING_PWM @@ -553,9 +553,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM1 - config BSP_USING_TIM1_HWTIMER - bool "Using TIM1 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM1_CLOCK_TIMER + bool "Using TIM1 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM1_PWM bool "Using TIM1 as PWM mode" @@ -577,8 +577,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM1 channel 4" endif - if BSP_USING_TIM1_HWTIMER && BSP_USING_TIM1_PWM - comment "BSP_USING_TIM1_HWTIMER and BSP_USING_TIM1_PWM can only be chosen for one!" + if BSP_USING_TIM1_CLOCK_TIMER && BSP_USING_TIM1_PWM + comment "BSP_USING_TIM1_CLOCK_TIMER and BSP_USING_TIM1_PWM can only be chosen for one!" endif endif @@ -588,9 +588,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM2 - config BSP_USING_TIM2_HWTIMER - bool "Using TIM2 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM2_CLOCK_TIMER + bool "Using TIM2 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM2_PWM bool "Using TIM2 as PWM mode" @@ -612,8 +612,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM2 channel 4" endif - if BSP_USING_TIM2_HWTIMER && BSP_USING_TIM2_PWM - comment "BSP_USING_TIM2_HWTIMER and BSP_USING_TIM2_PWM can only be chosen for one!" + if BSP_USING_TIM2_CLOCK_TIMER && BSP_USING_TIM2_PWM + comment "BSP_USING_TIM2_CLOCK_TIMER and BSP_USING_TIM2_PWM can only be chosen for one!" endif endif @@ -623,9 +623,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM3 - config BSP_USING_TIM3_HWTIMER - bool "Using TIM3 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM3_CLOCK_TIMER + bool "Using TIM3 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM3_PWM bool "Using TIM3 as PWM mode" @@ -647,8 +647,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM3 channel 4" endif - if BSP_USING_TIM3_HWTIMER && BSP_USING_TIM3_PWM - comment "BSP_USING_TIM3_HWTIMER and BSP_USING_TIM3_PWM can only be chosen for one!" + if BSP_USING_TIM3_CLOCK_TIMER && BSP_USING_TIM3_PWM + comment "BSP_USING_TIM3_CLOCK_TIMER and BSP_USING_TIM3_PWM can only be chosen for one!" endif endif @@ -658,9 +658,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM4 - config BSP_USING_TIM4_HWTIMER - bool "Using TIM4 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM4_CLOCK_TIMER + bool "Using TIM4 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM4_PWM bool "Using TIM4 as PWM mode" @@ -682,8 +682,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM4 channel 4" endif - if BSP_USING_TIM4_HWTIMER && BSP_USING_TIM4_PWM - comment "BSP_USING_TIM4_HWTIMER and BSP_USING_TIM4_PWM can only be chosen for one!" + if BSP_USING_TIM4_CLOCK_TIMER && BSP_USING_TIM4_PWM + comment "BSP_USING_TIM4_CLOCK_TIMER and BSP_USING_TIM4_PWM can only be chosen for one!" endif endif @@ -693,9 +693,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM5 - config BSP_USING_TIM5_HWTIMER - bool "Using TIM5 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM5_CLOCK_TIMER + bool "Using TIM5 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM5_PWM bool "Using TIM5 as PWM mode" @@ -717,8 +717,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM5 channel 4" endif - if BSP_USING_TIM5_HWTIMER && BSP_USING_TIM5_PWM - comment "BSP_USING_TIM5_HWTIMER and BSP_USING_TIM5_PWM can only be chosen for one!" + if BSP_USING_TIM5_CLOCK_TIMER && BSP_USING_TIM5_PWM + comment "BSP_USING_TIM5_CLOCK_TIMER and BSP_USING_TIM5_PWM can only be chosen for one!" endif endif @@ -728,9 +728,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM6 - config BSP_USING_TIM6_HWTIMER - bool "Using TIM6 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM6_CLOCK_TIMER + bool "Using TIM6 as clock_timer mode" + select BSP_USING_CLOCK_TIMER endif config BSP_USING_TIM7 @@ -738,9 +738,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM7 - config BSP_USING_TIM7_HWTIMER - bool "Using TIM7 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM7_CLOCK_TIMER + bool "Using TIM7 as clock_timer mode" + select BSP_USING_CLOCK_TIMER endif config BSP_USING_TIM8 @@ -748,9 +748,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM8 - config BSP_USING_TIM8_HWTIMER - bool "Using TIM8 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM8_CLOCK_TIMER + bool "Using TIM8 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM8_PWM bool "Using TIM8 as PWM mode" @@ -772,8 +772,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM8 channel 4" endif - if BSP_USING_TIM8_HWTIMER && BSP_USING_TIM8_PWM - comment "BSP_USING_TIM8_HWTIMER and BSP_USING_TIM8_PWM can only be chosen for one!" + if BSP_USING_TIM8_CLOCK_TIMER && BSP_USING_TIM8_PWM + comment "BSP_USING_TIM8_CLOCK_TIMER and BSP_USING_TIM8_PWM can only be chosen for one!" endif endif @@ -783,9 +783,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM9 - config BSP_USING_TIM9_HWTIMER - bool "Using TIM9 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM9_CLOCK_TIMER + bool "Using TIM9 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM9_PWM bool "Using TIM9 as PWM mode" @@ -807,8 +807,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM9 channel 4" endif - if BSP_USING_TIM9_HWTIMER && BSP_USING_TIM9_PWM - comment "BSP_USING_TIM9_HWTIMER and BSP_USING_TIM9_PWM can only be chosen for one!" + if BSP_USING_TIM9_CLOCK_TIMER && BSP_USING_TIM9_PWM + comment "BSP_USING_TIM9_CLOCK_TIMER and BSP_USING_TIM9_PWM can only be chosen for one!" endif endif @@ -818,9 +818,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM10 - config BSP_USING_TIM10_HWTIMER - bool "Using TIM10 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM10_CLOCK_TIMER + bool "Using TIM10 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM10_PWM bool "Using TIM10 as PWM mode" @@ -842,8 +842,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM10 channel 4" endif - if BSP_USING_TIM10_HWTIMER && BSP_USING_TIM10_PWM - comment "BSP_USING_TIM10_HWTIMER and BSP_USING_TIM10_PWM can only be chosen for one!" + if BSP_USING_TIM10_CLOCK_TIMER && BSP_USING_TIM10_PWM + comment "BSP_USING_TIM10_CLOCK_TIMER and BSP_USING_TIM10_PWM can only be chosen for one!" endif endif diff --git a/bsp/wch/risc-v/ch569w-evt/applications/test.c b/bsp/wch/risc-v/ch569w-evt/applications/test.c index f29811f8cac..848189f301f 100644 --- a/bsp/wch/risc-v/ch569w-evt/applications/test.c +++ b/bsp/wch/risc-v/ch569w-evt/applications/test.c @@ -7,14 +7,14 @@ * Date Author Notes * 2022-07-15 Emuzit first version * 2022-07-20 Emuzit add watchdog test - * 2022-07-26 Emuzit add hwtimer test + * 2022-07-26 Emuzit add clock_timer test * 2022-07-30 Emuzit add spi master test * 2022-08-04 Emuzit add pwm test */ #include #include #include "drivers/dev_watchdog.h" -#include +#include #include "drivers/dev_spi.h" #include #include "board.h" @@ -154,7 +154,7 @@ static void test_watchdog(uint32_t seconds) #define test_watchdog(tov) do {} while(0) #endif -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME static struct rt_device *tmr_dev_0; static struct rt_device *tmr_dev_1; @@ -164,15 +164,15 @@ static rt_err_t tmr_timeout_cb(rt_device_t dev, rt_size_t size) int tmr = (dev == tmr_dev_1) ? 1 : 0; - rt_kprintf("hwtimer %d timeout callback fucntion @tick %d\n", tmr, tick); + rt_kprintf("clock_timer %d timeout callback fucntion @tick %d\n", tmr, tick); return RT_EOK; } -static void test_hwtimer(void) +static void test_clock_timer(void) { - rt_hwtimerval_t timerval; - rt_hwtimer_mode_t mode; + rt_clock_timerval_t timerval; + rt_clock_timer_mode_t mode; rt_size_t tsize; /* setup two timers, ONESHOT & PERIOD each @@ -181,12 +181,12 @@ static void test_hwtimer(void) tmr_dev_1 = rt_device_find("timer1"); if (tmr_dev_0 == RT_NULL || tmr_dev_1 == RT_NULL) { - rt_kprintf("hwtimer device(s) not found !\n"); + rt_kprintf("clock_timer device(s) not found !\n"); } else if (rt_device_open(tmr_dev_0, RT_DEVICE_OFLAG_RDWR) != RT_EOK || rt_device_open(tmr_dev_1, RT_DEVICE_OFLAG_RDWR) != RT_EOK) { - rt_kprintf("hwtimer device(s) open failed !\n"); + rt_kprintf("clock_timer device(s) open failed !\n"); } else { @@ -196,8 +196,8 @@ static void test_hwtimer(void) timerval.sec = 3; timerval.usec = 500000; tsize = sizeof(timerval); - mode = HWTIMER_MODE_ONESHOT; - if (rt_device_control(tmr_dev_0, HWTIMER_CTRL_MODE_SET, &mode) != RT_EOK) + mode = CLOCK_TIMER_MODE_ONESHOT; + if (rt_device_control(tmr_dev_0, CLOCK_TIMER_CTRL_MODE_SET, &mode) != RT_EOK) { rt_kprintf("timer0 set mode failed !\n"); } @@ -213,8 +213,8 @@ static void test_hwtimer(void) timerval.sec = 5; timerval.usec = 0; tsize = sizeof(timerval); - mode = HWTIMER_MODE_PERIOD; - if (rt_device_control(tmr_dev_1, HWTIMER_CTRL_MODE_SET, &mode) != RT_EOK) + mode = CLOCK_TIMER_MODE_PERIOD; + if (rt_device_control(tmr_dev_1, CLOCK_TIMER_CTRL_MODE_SET, &mode) != RT_EOK) { rt_kprintf("timer1 set mode failed !\n"); } @@ -229,7 +229,7 @@ static void test_hwtimer(void) } } #else - #define test_hwtimer() do {} while(0) + #define test_clock_timer() do {} while(0) #endif #ifdef RT_USING_SPI @@ -414,7 +414,7 @@ void main(void) test_gpio_int(); test_watchdog(wdog_timeout); - test_hwtimer(); + test_clock_timer(); test_spi_master(); test_pwm(); test_usbd(); diff --git a/bsp/wch/risc-v/ch569w-evt/board/Kconfig b/bsp/wch/risc-v/ch569w-evt/board/Kconfig index 2f23098a3c6..4cbfc329811 100644 --- a/bsp/wch/risc-v/ch569w-evt/board/Kconfig +++ b/bsp/wch/risc-v/ch569w-evt/board/Kconfig @@ -40,7 +40,7 @@ config BSP_USING_UART config BSP_USING_TIMER bool "using on-chip timer" - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n if BSP_USING_TIMER diff --git a/bsp/wch/risc-v/yd-ch32v307vct6/board/Kconfig b/bsp/wch/risc-v/yd-ch32v307vct6/board/Kconfig index 2ad8cc13364..dccae0c2bb4 100644 --- a/bsp/wch/risc-v/yd-ch32v307vct6/board/Kconfig +++ b/bsp/wch/risc-v/yd-ch32v307vct6/board/Kconfig @@ -256,9 +256,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM - config BSP_USING_HWTIMER + config BSP_USING_CLOCK_TIMER bool - select RT_USING_HWTIMER + select RT_USING_CLOCK_TIME default n config BSP_USING_PWM @@ -271,9 +271,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM1 - config BSP_USING_TIM1_HWTIMER - bool "Using TIM1 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM1_CLOCK_TIMER + bool "Using TIM1 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM1_PWM bool "Using TIM1 as PWM mode" @@ -295,8 +295,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM1 channel 4" endif - if BSP_USING_TIM1_HWTIMER && BSP_USING_TIM1_PWM - comment "BSP_USING_TIM1_HWTIMER and BSP_USING_TIM1_PWM can only be chosen for one!" + if BSP_USING_TIM1_CLOCK_TIMER && BSP_USING_TIM1_PWM + comment "BSP_USING_TIM1_CLOCK_TIMER and BSP_USING_TIM1_PWM can only be chosen for one!" endif endif @@ -306,9 +306,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM2 - config BSP_USING_TIM2_HWTIMER - bool "Using TIM2 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM2_CLOCK_TIMER + bool "Using TIM2 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM2_PWM bool "Using TIM2 as PWM mode" @@ -330,8 +330,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM2 channel 4" endif - if BSP_USING_TIM2_HWTIMER && BSP_USING_TIM2_PWM - comment "BSP_USING_TIM2_HWTIMER and BSP_USING_TIM2_PWM can only be chosen for one!" + if BSP_USING_TIM2_CLOCK_TIMER && BSP_USING_TIM2_PWM + comment "BSP_USING_TIM2_CLOCK_TIMER and BSP_USING_TIM2_PWM can only be chosen for one!" endif endif @@ -341,9 +341,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM3 - config BSP_USING_TIM3_HWTIMER - bool "Using TIM3 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM3_CLOCK_TIMER + bool "Using TIM3 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM3_PWM bool "Using TIM3 as PWM mode" @@ -365,8 +365,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM3 channel 4" endif - if BSP_USING_TIM3_HWTIMER && BSP_USING_TIM3_PWM - comment "BSP_USING_TIM3_HWTIMER and BSP_USING_TIM3_PWM can only be chosen for one!" + if BSP_USING_TIM3_CLOCK_TIMER && BSP_USING_TIM3_PWM + comment "BSP_USING_TIM3_CLOCK_TIMER and BSP_USING_TIM3_PWM can only be chosen for one!" endif endif @@ -376,9 +376,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM4 - config BSP_USING_TIM4_HWTIMER - bool "Using TIM4 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM4_CLOCK_TIMER + bool "Using TIM4 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM4_PWM bool "Using TIM4 as PWM mode" @@ -400,8 +400,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM4 channel 4" endif - if BSP_USING_TIM4_HWTIMER && BSP_USING_TIM4_PWM - comment "BSP_USING_TIM4_HWTIMER and BSP_USING_TIM4_PWM can only be chosen for one!" + if BSP_USING_TIM4_CLOCK_TIMER && BSP_USING_TIM4_PWM + comment "BSP_USING_TIM4_CLOCK_TIMER and BSP_USING_TIM4_PWM can only be chosen for one!" endif endif @@ -411,9 +411,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM5 - config BSP_USING_TIM5_HWTIMER - bool "Using TIM5 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM5_CLOCK_TIMER + bool "Using TIM5 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM5_PWM bool "Using TIM5 as PWM mode" @@ -435,8 +435,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM5 channel 4" endif - if BSP_USING_TIM5_HWTIMER && BSP_USING_TIM5_PWM - comment "BSP_USING_TIM5_HWTIMER and BSP_USING_TIM5_PWM can only be chosen for one!" + if BSP_USING_TIM5_CLOCK_TIMER && BSP_USING_TIM5_PWM + comment "BSP_USING_TIM5_CLOCK_TIMER and BSP_USING_TIM5_PWM can only be chosen for one!" endif endif @@ -446,9 +446,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM6 - config BSP_USING_TIM6_HWTIMER - bool "Using TIM6 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM6_CLOCK_TIMER + bool "Using TIM6 as clock_timer mode" + select BSP_USING_CLOCK_TIMER endif config BSP_USING_TIM7 @@ -456,9 +456,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM7 - config BSP_USING_TIM7_HWTIMER - bool "Using TIM7 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM7_CLOCK_TIMER + bool "Using TIM7 as clock_timer mode" + select BSP_USING_CLOCK_TIMER endif config BSP_USING_TIM8 @@ -466,9 +466,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM8 - config BSP_USING_TIM8_HWTIMER - bool "Using TIM8 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM8_CLOCK_TIMER + bool "Using TIM8 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM8_PWM bool "Using TIM8 as PWM mode" @@ -490,8 +490,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM8 channel 4" endif - if BSP_USING_TIM8_HWTIMER && BSP_USING_TIM8_PWM - comment "BSP_USING_TIM8_HWTIMER and BSP_USING_TIM8_PWM can only be chosen for one!" + if BSP_USING_TIM8_CLOCK_TIMER && BSP_USING_TIM8_PWM + comment "BSP_USING_TIM8_CLOCK_TIMER and BSP_USING_TIM8_PWM can only be chosen for one!" endif endif @@ -501,9 +501,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM9 - config BSP_USING_TIM9_HWTIMER - bool "Using TIM9 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM9_CLOCK_TIMER + bool "Using TIM9 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM9_PWM bool "Using TIM9 as PWM mode" @@ -525,8 +525,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM9 channel 4" endif - if BSP_USING_TIM9_HWTIMER && BSP_USING_TIM9_PWM - comment "BSP_USING_TIM9_HWTIMER and BSP_USING_TIM9_PWM can only be chosen for one!" + if BSP_USING_TIM9_CLOCK_TIMER && BSP_USING_TIM9_PWM + comment "BSP_USING_TIM9_CLOCK_TIMER and BSP_USING_TIM9_PWM can only be chosen for one!" endif endif @@ -536,9 +536,9 @@ menu "On-chip Peripheral Drivers" default n if BSP_USING_TIM10 - config BSP_USING_TIM10_HWTIMER - bool "Using TIM10 as hwtimer mode" - select BSP_USING_HWTIMER + config BSP_USING_TIM10_CLOCK_TIMER + bool "Using TIM10 as clock_timer mode" + select BSP_USING_CLOCK_TIMER config BSP_USING_TIM10_PWM bool "Using TIM10 as PWM mode" @@ -560,8 +560,8 @@ menu "On-chip Peripheral Drivers" bool "Using TIM10 channel 4" endif - if BSP_USING_TIM10_HWTIMER && BSP_USING_TIM10_PWM - comment "BSP_USING_TIM10_HWTIMER and BSP_USING_TIM10_PWM can only be chosen for one!" + if BSP_USING_TIM10_CLOCK_TIMER && BSP_USING_TIM10_PWM + comment "BSP_USING_TIM10_CLOCK_TIMER and BSP_USING_TIM10_PWM can only be chosen for one!" endif endif diff --git a/components/drivers/Kconfig b/components/drivers/Kconfig index f803469d649..01539009a22 100755 --- a/components/drivers/Kconfig +++ b/components/drivers/Kconfig @@ -5,7 +5,7 @@ rsource "ipc/Kconfig" rsource "serial/Kconfig" rsource "can/Kconfig" -rsource "cputime/Kconfig" +rsource "clock_time/Kconfig" rsource "i2c/Kconfig" rsource "phy/Kconfig" rsource "misc/Kconfig" @@ -46,9 +46,7 @@ rsource "pci/Kconfig" rsource "pic/Kconfig" rsource "pin/Kconfig" rsource "pinctrl/Kconfig" -rsource "ktime/Kconfig" rsource "clk/Kconfig" -rsource "hwtimer/Kconfig" rsource "usb/Kconfig" endmenu diff --git a/components/drivers/clock_time/Kconfig b/components/drivers/clock_time/Kconfig new file mode 100644 index 00000000000..7da12ac8490 --- /dev/null +++ b/components/drivers/clock_time/Kconfig @@ -0,0 +1,18 @@ +menuconfig RT_USING_CLOCK_TIME + bool "Clock time subsystem" + default n + +if RT_USING_CLOCK_TIME + config CLOCK_TIMER_FREQ + int "Clock time timer freq" + default 0 + depends on ARCH_RISCV64 + help + Base frequency (Hz) for clock time counter on RISC-V. + + config RT_CLOCK_TIME_ARM_ARCH + bool "ARM ARCH Timer" + depends on RT_USING_DM + depends on ARCH_ARM_CORTEX_A || ARCH_ARMV8 + default n +endif diff --git a/components/drivers/clock_time/README.md b/components/drivers/clock_time/README.md new file mode 100644 index 00000000000..45de9f9f4da --- /dev/null +++ b/components/drivers/clock_time/README.md @@ -0,0 +1,39 @@ +# Clock Time Subsystem + +The clock_time subsystem provides a unified time base and event scheduling for +RT-Thread. It separates timekeeping (a monotonic counter) from event delivery +(a programmable timer interrupt) so platforms can combine different hardware +sources while the kernel sees consistent behavior. + +## Design Principles +- Monotonic time: time readings never go backward. +- Separation of roles: a clock source provides a counter, a clock event triggers + deadlines. +- Scaled integer conversion: counters are converted to nanoseconds with a + resolution scale factor, avoiding floating point. +- Graceful fallback: if a hardware event is unavailable, software timers keep + the system functional. + +## Building Blocks +- Clock source: provides a stable counter and its frequency. +- Clock event: can be programmed to fire at the next deadline. +- Clock timer adapter: exposes a general timer peripheral as a clock source or + event device. +- Clock hrtimer: software scheduler that orders high-resolution timeouts and + programs the next event. +- Clock boottime helpers: translate the monotonic counter into common time + formats for use by higher layers. + +## Time Flow +- Read path: counter -> scaled resolution -> nanoseconds. +- Timeout path: hrtimer queue -> next expiry -> program event -> interrupt -> + dispatch callbacks. + +## BSP Integration Guidance +- Provide a stable counter or a programmable timer. One device can serve both + roles. +- Select a default source and event device to enable accurate timekeeping and + efficient scheduling. +- Keep ISRs minimal; the core handles conversion and scheduling. +- POSIX time APIs are layered on top of this subsystem and reuse its monotonic + base. diff --git a/components/drivers/clock_time/README_zh.md b/components/drivers/clock_time/README_zh.md new file mode 100644 index 00000000000..aed720b8dda --- /dev/null +++ b/components/drivers/clock_time/README_zh.md @@ -0,0 +1,28 @@ +# Clock Time 子系统 + +clock_time 子系统为 RT-Thread 提供统一的时间基准与事件调度能力。它将 +“计时”(单调计数器)与“定时事件”(可编程定时器中断)解耦，允许不同硬件 +组合，同时保证内核行为一致。 + +## 设计原则 +- 单调时间: 时间读数不回退。 +- 角色分离: 时钟源负责计数，时钟事件负责触发超时。 +- 缩放整数换算: 通过分辨率缩放因子把计数转换为纳秒，避免浮点计算。 +- 可降级运行: 缺少硬件事件时由软件定时器维持基本功能。 + +## 组成部分 +- 时钟源: 提供稳定计数器与频率信息。 +- 时钟事件: 可编程下一次超时。 +- 时钟定时器适配层: 将通用定时器外设包装为时钟源或事件设备。 +- 高精度定时器: 软件调度层，排序超时并驱动下一次事件。 +- 启动时间辅助: 将单调计数转换为常见时间格式，供上层使用。 + +## 时间流转 +- 读取路径: 计数 -> 缩放分辨率 -> 纳秒。 +- 超时路径: hrtimer 队列 -> 下一到期 -> 设置事件 -> 中断 -> 回调分发。 + +## BSP 集成要点 +- 提供稳定计数器或可编程定时器，一个设备可兼任两种角色。 +- 选择默认的时钟源与事件设备，以获得准确计时与高效调度。 +- 中断服务保持简短，换算与调度交由核心完成。 +- POSIX 时间接口建立在该子系统之上，复用其单调时间基准。 diff --git a/components/drivers/clock_time/SConscript b/components/drivers/clock_time/SConscript new file mode 100644 index 00000000000..111449276a0 --- /dev/null +++ b/components/drivers/clock_time/SConscript @@ -0,0 +1,42 @@ +import os +from building import * + +Import('rtconfig') + +cwd = GetCurrentDir() + +group = [] +build_clock_time = GetDepend('RT_USING_CLOCK_TIME') + +if not build_clock_time: + Return('group') + +src = [ + 'clock_time_core.c', + 'clock_hrtimer.c', + 'clock_boottime.c', + 'clock_timer.c', +] +if GetDepend('RT_CLOCK_TIME_ARM_ARCH'): + src += ['clock_time_arm_arch.c'] + +arch_dir = os.path.join(cwd, 'arch') +if os.path.isdir(arch_dir): + arch_list = os.listdir(arch_dir) + if rtconfig.ARCH in arch_list: + cpu_dir = os.path.join(arch_dir, rtconfig.ARCH, rtconfig.CPU) + if os.path.exists(cpu_dir): + src += Glob("arch/%s/%s/*.c" % (rtconfig.ARCH, rtconfig.CPU)) + else: + src += Glob("arch/%s/*.c" % rtconfig.ARCH) + +CPPPATH = [cwd, os.path.join(cwd, '..', 'include')] +LOCAL_CCFLAGS = '' +if rtconfig.PLATFORM in ['gcc', 'armclang']: + LOCAL_CCFLAGS += ' -std=gnu99' +elif rtconfig.PLATFORM in ['armcc']: + LOCAL_CCFLAGS += ' --c99 --gnu' + +group = DefineGroup('DeviceDrivers', src, depend=[''], CPPPATH=CPPPATH, LOCAL_CCFLAGS=LOCAL_CCFLAGS) + +Return('group') diff --git a/components/drivers/clock_time/arch/aarch64/cputimer.c b/components/drivers/clock_time/arch/aarch64/cputimer.c new file mode 100644 index 00000000000..58102d226f4 --- /dev/null +++ b/components/drivers/clock_time/arch/aarch64/cputimer.c @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2023-07-10 xqyjlj The first version. + */ + +#include "gtimer.h" +#include + +static volatile unsigned long _init_cnt = 0; +static rt_bool_t _aarch64_clock_registered = RT_FALSE; +static struct rt_clock_time_device _aarch64_clock_dev; + +static rt_uint64_t _aarch64_clock_get_freq(struct rt_clock_time_device *dev) +{ + RT_UNUSED(dev); + return rt_hw_get_gtimer_frq(); +} + +static rt_uint64_t _aarch64_clock_get_counter(struct rt_clock_time_device *dev) +{ + RT_UNUSED(dev); + return (rt_uint64_t)(rt_hw_get_cntpct_val() - _init_cnt); +} + +static rt_err_t _aarch64_clock_set_timeout(struct rt_clock_time_device *dev, rt_uint64_t delta) +{ + RT_UNUSED(dev); + RT_UNUSED(delta); + return -RT_ENOSYS; +} + +static const struct rt_clock_time_ops _aarch64_clock_ops = +{ + _aarch64_clock_get_freq, + _aarch64_clock_get_counter, + _aarch64_clock_set_timeout, +}; + +void rt_clock_time_source_init(void) +{ + _init_cnt = rt_hw_get_cntpct_val(); + + if (!_aarch64_clock_registered) + { + rt_uint8_t caps = RT_CLOCK_TIME_CAP_SOURCE; + + _aarch64_clock_dev.ops = &_aarch64_clock_ops; + _aarch64_clock_dev.res_scale = RT_CLOCK_TIME_RESMUL; + _aarch64_clock_dev.caps = caps; + rt_clock_time_device_register(&_aarch64_clock_dev, "clock_time_gtimer", caps); + rt_clock_time_set_default_source(&_aarch64_clock_dev); + _aarch64_clock_registered = RT_TRUE; + } +} diff --git a/components/drivers/clock_time/arch/risc-v/virt64/cputimer.c b/components/drivers/clock_time/arch/risc-v/virt64/cputimer.c new file mode 100644 index 00000000000..113432d3182 --- /dev/null +++ b/components/drivers/clock_time/arch/risc-v/virt64/cputimer.c @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2006-2023, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2023-07-10 xqyjlj The first version. + */ + +#include + +static volatile unsigned long _init_cnt = 0; +static rt_bool_t _riscv_clock_registered = RT_FALSE; +static struct rt_clock_time_device _riscv_clock_dev; + +static rt_uint64_t _riscv_clock_get_freq(struct rt_clock_time_device *dev) +{ + RT_UNUSED(dev); + return CLOCK_TIMER_FREQ; +} + +static rt_uint64_t _riscv_clock_get_counter(struct rt_clock_time_device *dev) +{ + unsigned long time_elapsed; + + RT_UNUSED(dev); + __asm__ __volatile__("rdtime %0" : "=r"(time_elapsed)); + return (rt_uint64_t)(time_elapsed - _init_cnt); +} + +static rt_err_t _riscv_clock_set_timeout(struct rt_clock_time_device *dev, rt_uint64_t delta) +{ + RT_UNUSED(dev); + RT_UNUSED(delta); + return -RT_ENOSYS; +} + +static const struct rt_clock_time_ops _riscv_clock_ops = +{ + _riscv_clock_get_freq, + _riscv_clock_get_counter, + _riscv_clock_set_timeout, +}; + +void rt_clock_time_source_init(void) +{ + __asm__ __volatile__("rdtime %0" : "=r"(_init_cnt)); + + if (!_riscv_clock_registered) + { + rt_uint8_t caps = RT_CLOCK_TIME_CAP_SOURCE; + + _riscv_clock_dev.ops = &_riscv_clock_ops; + _riscv_clock_dev.res_scale = RT_CLOCK_TIME_RESMUL; + _riscv_clock_dev.caps = caps; + rt_clock_time_device_register(&_riscv_clock_dev, "clock_time_rdtime", caps); + rt_clock_time_set_default_source(&_riscv_clock_dev); + _riscv_clock_registered = RT_TRUE; + } +} diff --git a/components/drivers/clock_time/clock_boottime.c b/components/drivers/clock_time/clock_boottime.c new file mode 100644 index 00000000000..3185a049680 --- /dev/null +++ b/components/drivers/clock_time/clock_boottime.c @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2006-2024, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-01-01 RT-Thread Clock time boottime helpers + */ + +#include + +rt_err_t rt_clock_boottime_get_us(struct timeval *tv) +{ + rt_uint64_t cnt; + rt_uint64_t res; + rt_uint64_t ns; + + RT_ASSERT(tv != RT_NULL); + + cnt = rt_clock_time_get_counter(); + res = rt_clock_time_get_res_scaled(); + if (res == 0) + { + return -RT_ERROR; + } + + ns = (cnt * res) / RT_CLOCK_TIME_RESMUL; + + tv->tv_sec = ns / (1000ULL * 1000 * 1000); + tv->tv_usec = (ns % (1000ULL * 1000 * 1000)) / 1000; + + return RT_EOK; +} + +rt_err_t rt_clock_boottime_get_s(time_t *t) +{ + rt_uint64_t cnt; + rt_uint64_t res; + rt_uint64_t ns; + + RT_ASSERT(t != RT_NULL); + + cnt = rt_clock_time_get_counter(); + res = rt_clock_time_get_res_scaled(); + if (res == 0) + { + return -RT_ERROR; + } + + ns = (cnt * res) / RT_CLOCK_TIME_RESMUL; + *t = ns / (1000ULL * 1000 * 1000); + + return RT_EOK; +} + +rt_err_t rt_clock_boottime_get_ns(struct timespec *ts) +{ + rt_uint64_t cnt; + rt_uint64_t res; + rt_uint64_t ns; + + RT_ASSERT(ts != RT_NULL); + + cnt = rt_clock_time_get_counter(); + res = rt_clock_time_get_res_scaled(); + if (res == 0) + { + return -RT_ERROR; + } + + ns = (cnt * res) / RT_CLOCK_TIME_RESMUL; + + ts->tv_sec = ns / (1000ULL * 1000 * 1000); + ts->tv_nsec = ns % (1000ULL * 1000 * 1000); + + return RT_EOK; +} diff --git a/components/drivers/ktime/src/hrtimer.c b/components/drivers/clock_time/clock_hrtimer.c similarity index 64% rename from components/drivers/ktime/src/hrtimer.c rename to components/drivers/clock_time/clock_hrtimer.c index ca579a5e988..d075ec0c28a 100644 --- a/components/drivers/ktime/src/hrtimer.c +++ b/components/drivers/clock_time/clock_hrtimer.c @@ -1,24 +1,23 @@ /* - * Copyright (c) 2006-2023, RT-Thread Development Team + * Copyright (c) 2006-2024, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * * Change Logs: * Date Author Notes - * 2023-07-10 xqyjlj The first version. - * 2023-09-15 xqyjlj perf rt_hw_interrupt_disable/enable + * 2025-01-01 RT-Thread Clock time hrtimer */ #include #include #include -#define DBG_SECTION_NAME "drv.ktime" +#include + +#define DBG_SECTION_NAME "drv.clock_time" #define DBG_LEVEL DBG_INFO #include -#include "ktime.h" - #ifdef ARCH_CPU_64BIT #define _HRTIMER_MAX_CNT UINT64_MAX #else @@ -28,32 +27,43 @@ static rt_list_t _timer_list = RT_LIST_OBJECT_INIT(_timer_list); static RT_DEFINE_SPINLOCK(_spinlock); -rt_inline rt_ktime_hrtimer_t _first_hrtimer(void) +rt_inline rt_clock_hrtimer_t _first_hrtimer(void) +{ + return rt_list_isempty(&_timer_list) ? RT_NULL : rt_list_first_entry(&_timer_list, struct rt_clock_hrtimer, node); +} + +static unsigned long _clock_time_get_cnt(void) { - return rt_list_isempty(&_timer_list) ? RT_NULL : rt_list_first_entry(&_timer_list, struct rt_ktime_hrtimer, node); + return rt_clock_time_get_counter(); } -rt_weak rt_uint64_t rt_ktime_hrtimer_getres(void) +rt_weak rt_uint64_t rt_clock_hrtimer_getres(void) { - return ((1000ULL * 1000 * 1000) * RT_KTIME_RESMUL) / RT_TICK_PER_SECOND; + return rt_clock_time_get_event_res_scaled(); } -rt_weak unsigned long rt_ktime_hrtimer_getfrq(void) +rt_weak unsigned long rt_clock_hrtimer_getfrq(void) { - return RT_TICK_PER_SECOND; + return (unsigned long)rt_clock_time_get_event_freq(); } -rt_weak rt_err_t rt_ktime_hrtimer_settimeout(unsigned long cnt) +rt_weak rt_err_t rt_clock_hrtimer_settimeout(unsigned long cnt) { static rt_timer_t timer = RT_NULL; static struct rt_timer _sh_rtimer; RT_ASSERT(cnt > 0); + if (rt_clock_time_set_timeout(cnt) == RT_EOK) + { + return RT_EOK; + } + if (timer == RT_NULL) { timer = &_sh_rtimer; - rt_timer_init(timer, "shrtimer", (void (*)(void *))rt_ktime_hrtimer_process, RT_NULL, cnt, RT_TIMER_FLAG_ONE_SHOT); + rt_timer_init(timer, "shrtimer", (void (*)(void *))rt_clock_hrtimer_process, RT_NULL, + cnt, RT_TIMER_FLAG_ONE_SHOT); } else { @@ -71,32 +81,40 @@ rt_weak rt_err_t rt_ktime_hrtimer_settimeout(unsigned long cnt) return RT_EOK; } -/** - * @brief convert cnt from cputimer cnt to hrtimer cnt - * - * @param cnt - * @return unsigned long - */ static unsigned long _cnt_convert(unsigned long cnt) { - unsigned long rtn = 0; - unsigned long count = cnt - rt_ktime_cputimer_getcnt(); + unsigned long count; + rt_uint64_t src_res; + rt_uint64_t event_res; + rt_uint64_t result; + + count = cnt - _clock_time_get_cnt(); if (count > (_HRTIMER_MAX_CNT / 2)) + { + return 0; + } + + src_res = rt_clock_time_get_res_scaled(); + event_res = rt_clock_hrtimer_getres(); + if (src_res == 0 || event_res == 0) + { return 0; + } - rtn = (count * rt_ktime_cputimer_getres()) / rt_ktime_hrtimer_getres(); - return rtn == 0 ? 1 : rtn; /* at least 1 */ + result = ((rt_uint64_t)count * src_res) / event_res; + + return result == 0 ? 1 : (unsigned long)result; } static void _sleep_timeout(void *parameter) { - struct rt_ktime_hrtimer *timer = parameter; + struct rt_clock_hrtimer *timer = parameter; rt_completion_done(&timer->completion); } -static void _insert_timer_to_list_locked(rt_ktime_hrtimer_t timer) +static void _insert_timer_to_list_locked(rt_clock_hrtimer_t timer) { - rt_ktime_hrtimer_t iter; + rt_clock_hrtimer_t iter; rt_list_for_each_entry(iter, &_timer_list, node) { @@ -112,17 +130,19 @@ static void _insert_timer_to_list_locked(rt_ktime_hrtimer_t timer) static void _hrtimer_process_locked(void) { - rt_ktime_hrtimer_t timer; + rt_clock_hrtimer_t timer; for (timer = _first_hrtimer(); - (timer != RT_NULL) && (timer->timeout_cnt <= rt_ktime_cputimer_getcnt()); - timer = _first_hrtimer()) + (timer != RT_NULL) && (timer->timeout_cnt <= _clock_time_get_cnt()); + timer = _first_hrtimer()) { + unsigned long now = _clock_time_get_cnt(); + rt_list_remove(&(timer->node)); if (timer->flag & RT_TIMER_FLAG_PERIODIC) { - timer->timeout_cnt = timer->delay_cnt + rt_ktime_cputimer_getcnt(); + timer->timeout_cnt = timer->delay_cnt + now; _insert_timer_to_list_locked(timer); } else @@ -139,8 +159,8 @@ static void _hrtimer_process_locked(void) static void _set_next_timeout_locked(void) { - rt_ktime_hrtimer_t timer; - rt_ubase_t next_timeout_hrtimer_cnt; + rt_clock_hrtimer_t timer; + rt_ubase_t next_timeout_cnt; rt_bool_t find_next; do @@ -148,10 +168,10 @@ static void _set_next_timeout_locked(void) find_next = RT_FALSE; if ((timer = _first_hrtimer()) != RT_NULL) { - next_timeout_hrtimer_cnt = _cnt_convert(timer->timeout_cnt); - if (next_timeout_hrtimer_cnt > 0) + next_timeout_cnt = _cnt_convert(timer->timeout_cnt); + if (next_timeout_cnt > 0) { - rt_ktime_hrtimer_settimeout(next_timeout_hrtimer_cnt); + rt_clock_hrtimer_settimeout(next_timeout_cnt); } else { @@ -163,7 +183,7 @@ static void _set_next_timeout_locked(void) while (find_next); } -void rt_ktime_hrtimer_process(void) +void rt_clock_hrtimer_process(void) { rt_base_t level = rt_spin_lock_irqsave(&_spinlock); @@ -173,17 +193,16 @@ void rt_ktime_hrtimer_process(void) rt_spin_unlock_irqrestore(&_spinlock, level); } -void rt_ktime_hrtimer_init(rt_ktime_hrtimer_t timer, +void rt_clock_hrtimer_init(rt_clock_hrtimer_t timer, const char *name, rt_uint8_t flag, void (*timeout)(void *parameter), void *parameter) { - /* parameter check */ RT_ASSERT(timer != RT_NULL); RT_ASSERT(timeout != RT_NULL); - rt_memset(timer, 0, sizeof(struct rt_ktime_hrtimer)); + rt_memset(timer, 0, sizeof(struct rt_clock_hrtimer)); timer->flag = flag & ~RT_TIMER_FLAG_ACTIVATED; timer->timeout_func = timeout; @@ -193,16 +212,15 @@ void rt_ktime_hrtimer_init(rt_ktime_hrtimer_t timer, rt_completion_init(&timer->completion); } -rt_err_t rt_ktime_hrtimer_start(rt_ktime_hrtimer_t timer, unsigned long delay_cnt) +rt_err_t rt_clock_hrtimer_start(rt_clock_hrtimer_t timer, unsigned long delay_cnt) { rt_base_t level; - /* parameter check */ RT_ASSERT(timer != RT_NULL); RT_ASSERT(delay_cnt < (_HRTIMER_MAX_CNT / 2)); timer->delay_cnt = delay_cnt; - timer->timeout_cnt = timer->delay_cnt + rt_ktime_cputimer_getcnt(); + timer->timeout_cnt = timer->delay_cnt + _clock_time_get_cnt(); level = rt_spin_lock_irqsave(&_spinlock); @@ -220,11 +238,11 @@ rt_err_t rt_ktime_hrtimer_start(rt_ktime_hrtimer_t timer, unsigned long delay_cn return RT_EOK; } -rt_err_t rt_ktime_hrtimer_stop(rt_ktime_hrtimer_t timer) +rt_err_t rt_clock_hrtimer_stop(rt_clock_hrtimer_t timer) { rt_base_t level; - RT_ASSERT(timer != RT_NULL); /* timer check */ + RT_ASSERT(timer != RT_NULL); level = rt_spin_lock_irqsave(&_spinlock); @@ -243,17 +261,15 @@ rt_err_t rt_ktime_hrtimer_stop(rt_ktime_hrtimer_t timer) return RT_EOK; } -rt_err_t rt_ktime_hrtimer_control(rt_ktime_hrtimer_t timer, int cmd, void *arg) +rt_err_t rt_clock_hrtimer_control(rt_clock_hrtimer_t timer, int cmd, void *arg) { rt_base_t level; - /* parameter check */ RT_ASSERT(timer != RT_NULL); level = rt_spin_lock_irqsave(&_spinlock); switch (cmd) { - case RT_TIMER_CTRL_GET_TIME: *(unsigned long *)arg = timer->delay_cnt; break; @@ -261,7 +277,7 @@ rt_err_t rt_ktime_hrtimer_control(rt_ktime_hrtimer_t timer, int cmd, void *arg) case RT_TIMER_CTRL_SET_TIME: RT_ASSERT((*(unsigned long *)arg) < (_HRTIMER_MAX_CNT / 2)); timer->delay_cnt = *(unsigned long *)arg; - timer->timeout_cnt = *(unsigned long *)arg + rt_ktime_cputimer_getcnt(); + timer->timeout_cnt = *(unsigned long *)arg + _clock_time_get_cnt(); break; case RT_TIMER_CTRL_SET_ONESHOT: @@ -275,12 +291,10 @@ rt_err_t rt_ktime_hrtimer_control(rt_ktime_hrtimer_t timer, int cmd, void *arg) case RT_TIMER_CTRL_GET_STATE: if (timer->flag & RT_TIMER_FLAG_ACTIVATED) { - /*timer is start and run*/ *(rt_uint32_t *)arg = RT_TIMER_FLAG_ACTIVATED; } else { - /*timer is stop*/ *(rt_uint32_t *)arg = RT_TIMER_FLAG_DEACTIVATED; } break; @@ -312,21 +326,17 @@ rt_err_t rt_ktime_hrtimer_control(rt_ktime_hrtimer_t timer, int cmd, void *arg) return RT_EOK; } -rt_err_t rt_ktime_hrtimer_detach(rt_ktime_hrtimer_t timer) +rt_err_t rt_clock_hrtimer_detach(rt_clock_hrtimer_t timer) { rt_base_t level; - /* parameter check */ RT_ASSERT(timer != RT_NULL); - /* notify the timer stop event */ rt_completion_wakeup_by_errno(&timer->completion, RT_ERROR); level = rt_spin_lock_irqsave(&_spinlock); - /* stop timer */ timer->flag &= ~RT_TIMER_FLAG_ACTIVATED; - /* when interrupted */ if (timer->error == -RT_EINTR || timer->error == RT_EINTR) { rt_list_remove(&timer->node); @@ -338,49 +348,61 @@ rt_err_t rt_ktime_hrtimer_detach(rt_ktime_hrtimer_t timer) return RT_EOK; } -/************************** delay ***************************/ - -void rt_ktime_hrtimer_delay_init(struct rt_ktime_hrtimer *timer) +void rt_clock_hrtimer_delay_init(struct rt_clock_hrtimer *timer) { - rt_ktime_hrtimer_init(timer, "hrtimer_sleep", RT_TIMER_FLAG_ONE_SHOT | RT_TIMER_FLAG_HARD_TIMER, + rt_clock_hrtimer_init(timer, "hrtimer_sleep", RT_TIMER_FLAG_ONE_SHOT | RT_TIMER_FLAG_HARD_TIMER, _sleep_timeout, timer); } -void rt_ktime_hrtimer_delay_detach(struct rt_ktime_hrtimer *timer) +void rt_clock_hrtimer_delay_detach(struct rt_clock_hrtimer *timer) { - rt_ktime_hrtimer_detach(timer); + rt_clock_hrtimer_detach(timer); } -rt_err_t rt_ktime_hrtimer_sleep(struct rt_ktime_hrtimer *timer, unsigned long cnt) +rt_err_t rt_clock_hrtimer_sleep(struct rt_clock_hrtimer *timer, unsigned long cnt) { rt_err_t err; if (cnt == 0) + { return -RT_EINVAL; + } - err = rt_ktime_hrtimer_start(timer, cnt); + err = rt_clock_hrtimer_start(timer, cnt); if (err) + { return err; + } err = rt_completion_wait_flags(&(timer->completion), RT_WAITING_FOREVER, RT_INTERRUPTIBLE); - rt_ktime_hrtimer_keep_errno(timer, err); + rt_clock_hrtimer_keep_errno(timer, err); return err; } -rt_err_t rt_ktime_hrtimer_ndelay(struct rt_ktime_hrtimer *timer, unsigned long ns) +rt_err_t rt_clock_hrtimer_ndelay(struct rt_clock_hrtimer *timer, unsigned long ns) +{ + rt_uint64_t res = rt_clock_time_get_res_scaled(); + if (res == 0) + { + return -RT_ERROR; + } + + return rt_clock_hrtimer_sleep(timer, (ns * RT_CLOCK_TIME_RESMUL) / res); +} + +rt_err_t rt_clock_hrtimer_udelay(struct rt_clock_hrtimer *timer, unsigned long us) { - rt_uint64_t res = rt_ktime_cputimer_getres(); - return rt_ktime_hrtimer_sleep(timer, (ns * RT_KTIME_RESMUL) / res); + return rt_clock_hrtimer_ndelay(timer, us * 1000); } -rt_err_t rt_ktime_hrtimer_udelay(struct rt_ktime_hrtimer *timer, unsigned long us) +rt_err_t rt_clock_hrtimer_mdelay(struct rt_clock_hrtimer *timer, unsigned long ms) { - return rt_ktime_hrtimer_ndelay(timer, us * 1000); + return rt_clock_hrtimer_ndelay(timer, ms * 1000000); } -rt_err_t rt_ktime_hrtimer_mdelay(struct rt_ktime_hrtimer *timer, unsigned long ms) +void rt_clock_time_event_isr(void) { - return rt_ktime_hrtimer_ndelay(timer, ms * 1000000); + rt_clock_hrtimer_process(); } diff --git a/components/drivers/hwtimer/hwtimer-arm_arch.c b/components/drivers/clock_time/clock_time_arm_arch.c similarity index 100% rename from components/drivers/hwtimer/hwtimer-arm_arch.c rename to components/drivers/clock_time/clock_time_arm_arch.c diff --git a/components/drivers/clock_time/clock_time_core.c b/components/drivers/clock_time/clock_time_core.c new file mode 100644 index 00000000000..2682270ba3d --- /dev/null +++ b/components/drivers/clock_time/clock_time_core.c @@ -0,0 +1,232 @@ +/* + * Copyright (c) 2006-2024, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-01-01 RT-Thread Clock time core + */ + +#include +#include +#include + +#include + +#define CLOCK_TIME_NSEC_PER_SEC (1000000000ULL) + +static rt_uint64_t _clock_time_tick_get_freq(struct rt_clock_time_device *dev) +{ + RT_UNUSED(dev); + return RT_TICK_PER_SECOND; +} + +static rt_uint64_t _clock_time_tick_get_counter(struct rt_clock_time_device *dev) +{ + RT_UNUSED(dev); + return (rt_uint64_t)rt_tick_get(); +} + +static rt_err_t _clock_time_tick_set_timeout(struct rt_clock_time_device *dev, rt_uint64_t delta) +{ + RT_UNUSED(dev); + RT_UNUSED(delta); + return -RT_ENOSYS; +} + +static const struct rt_clock_time_ops _clock_time_tick_ops = +{ + _clock_time_tick_get_freq, + _clock_time_tick_get_counter, + _clock_time_tick_set_timeout, +}; + +static struct rt_clock_time_device _clock_time_tick_dev = +{ + .ops = &_clock_time_tick_ops, + .res_scale = RT_CLOCK_TIME_RESMUL, + .caps = RT_CLOCK_TIME_CAP_SOURCE, +}; + +static struct rt_clock_time_device * _clock_time_default_source = &_clock_time_tick_dev; +static struct rt_clock_time_device * _clock_time_default_event = RT_NULL; + +rt_weak void rt_clock_time_source_init(void) +{ + return; +} + +static rt_uint64_t _clock_time_get_res_scaled(struct rt_clock_time_device *dev) +{ + rt_uint64_t freq; + rt_uint64_t scale; + + if (dev == RT_NULL || dev->ops == RT_NULL || dev->ops->get_freq == RT_NULL) + { + return 0; + } + + freq = dev->ops->get_freq(dev); + if (freq == 0) + { + return 0; + } + + scale = dev->res_scale ? dev->res_scale : RT_CLOCK_TIME_RESMUL; + + return (CLOCK_TIME_NSEC_PER_SEC * scale) / freq; +} + +rt_err_t rt_clock_time_device_register(struct rt_clock_time_device *dev, const char *name, rt_uint8_t caps) +{ + rt_err_t result = RT_EOK; + + RT_ASSERT(dev != RT_NULL); + RT_ASSERT(dev->ops != RT_NULL); + + dev->caps = caps; + if (dev->res_scale == 0) + { + dev->res_scale = RT_CLOCK_TIME_RESMUL; + } + + if (name != RT_NULL) + { + dev->parent.type = RT_Device_Class_Timer; + result = rt_device_register(&dev->parent, name, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE); + } + + if ((caps & RT_CLOCK_TIME_CAP_SOURCE) && _clock_time_default_source == &_clock_time_tick_dev) + { + _clock_time_default_source = dev; + } + + if ((caps & RT_CLOCK_TIME_CAP_EVENT) && _clock_time_default_event == RT_NULL) + { + _clock_time_default_event = dev; + } + + return result; +} + +void rt_clock_time_set_default_source(struct rt_clock_time_device *dev) +{ + if (dev != RT_NULL) + { + _clock_time_default_source = dev; + } +} + +void rt_clock_time_set_default_event(struct rt_clock_time_device *dev) +{ + if (dev != RT_NULL) + { + _clock_time_default_event = dev; + } +} + +struct rt_clock_time_device *rt_clock_time_get_default_source(void) +{ + return _clock_time_default_source ? _clock_time_default_source : &_clock_time_tick_dev; +} + +struct rt_clock_time_device *rt_clock_time_get_default_event(void) +{ + return _clock_time_default_event; +} + +rt_uint64_t rt_clock_time_get_freq(void) +{ + struct rt_clock_time_device *src = rt_clock_time_get_default_source(); + + if (src == RT_NULL || src->ops == RT_NULL || src->ops->get_freq == RT_NULL) + { + return 0; + } + + return src->ops->get_freq(src); +} + +rt_uint64_t rt_clock_time_get_counter(void) +{ + struct rt_clock_time_device *src = rt_clock_time_get_default_source(); + + if (src == RT_NULL || src->ops == RT_NULL || src->ops->get_counter == RT_NULL) + { + return 0; + } + + return src->ops->get_counter(src); +} + +rt_uint64_t rt_clock_time_get_res_scaled(void) +{ + return _clock_time_get_res_scaled(rt_clock_time_get_default_source()); +} + +rt_uint64_t rt_clock_time_get_event_freq(void) +{ + struct rt_clock_time_device *event = rt_clock_time_get_default_event(); + + if (event == RT_NULL) + { + return rt_clock_time_get_freq(); + } + + if (event->ops == RT_NULL || event->ops->get_freq == RT_NULL) + { + return 0; + } + + return event->ops->get_freq(event); +} + +rt_uint64_t rt_clock_time_get_event_res_scaled(void) +{ + struct rt_clock_time_device *event = rt_clock_time_get_default_event(); + + if (event == RT_NULL) + { + return rt_clock_time_get_res_scaled(); + } + + return _clock_time_get_res_scaled(event); +} + +rt_uint64_t rt_clock_time_counter_to_ns(rt_uint64_t cnt) +{ + rt_uint64_t res = rt_clock_time_get_res_scaled(); + + if (res == 0) + { + return 0; + } + + return (cnt * res) / RT_CLOCK_TIME_RESMUL; +} + +rt_uint64_t rt_clock_time_ns_to_counter(rt_uint64_t ns) +{ + rt_uint64_t res = rt_clock_time_get_res_scaled(); + + if (res == 0) + { + return 0; + } + + return (ns * RT_CLOCK_TIME_RESMUL) / res; +} + +rt_err_t rt_clock_time_set_timeout(rt_uint64_t delta) +{ + struct rt_clock_time_device *event = rt_clock_time_get_default_event(); + + if (event == RT_NULL || event->ops == RT_NULL || event->ops->set_timeout == RT_NULL) + { + return -RT_ENOSYS; + } + + return event->ops->set_timeout(event, delta); +} diff --git a/components/drivers/hwtimer/hwtimer.c b/components/drivers/clock_time/clock_timer.c similarity index 52% rename from components/drivers/hwtimer/hwtimer.c rename to components/drivers/clock_time/clock_timer.c index 1b2792558d1..94e06ccb116 100644 --- a/components/drivers/hwtimer/hwtimer.c +++ b/components/drivers/clock_time/clock_timer.c @@ -10,19 +10,20 @@ #include #include +#include -#define DBG_TAG "hwtimer" +#define DBG_TAG "clock_timer" #define DBG_LVL DBG_INFO #include #ifdef RT_USING_DM -void (*rt_device_hwtimer_us_delay)(rt_uint32_t us) = RT_NULL; +void (*rt_clock_timer_us_delay)(rt_uint32_t us) = RT_NULL; -void rt_hw_us_delay(rt_uint32_t us) +rt_weak void rt_hw_us_delay(rt_uint32_t us) { - if (rt_device_hwtimer_us_delay) + if (rt_clock_timer_us_delay) { - rt_device_hwtimer_us_delay(us); + rt_clock_timer_us_delay(us); } else { @@ -33,7 +34,75 @@ void rt_hw_us_delay(rt_uint32_t us) } #endif /* RT_USING_DM */ -rt_inline rt_uint32_t timeout_calc(rt_hwtimer_t *timer, rt_hwtimerval_t *tv) +static struct rt_clock_time_device _clock_timer_clock_dev; +static rt_clock_timer_t *_clock_timer_owner = RT_NULL; + +static rt_uint64_t _clock_timer_clock_get_freq(struct rt_clock_time_device *dev) +{ + RT_UNUSED(dev); + if (_clock_timer_owner == RT_NULL) + { + return 0; + } + + return (rt_uint64_t)_clock_timer_owner->freq; +} + +static rt_uint64_t _clock_timer_clock_get_counter(struct rt_clock_time_device *dev) +{ + RT_UNUSED(dev); + if (_clock_timer_owner == RT_NULL || + _clock_timer_owner->ops == RT_NULL || + _clock_timer_owner->ops->count_get == RT_NULL) + { + return 0; + } + + return (rt_uint64_t)_clock_timer_owner->ops->count_get(_clock_timer_owner); +} + +static rt_err_t _clock_timer_clock_set_timeout(struct rt_clock_time_device *dev, rt_uint64_t delta) +{ + RT_UNUSED(dev); + if (_clock_timer_owner == RT_NULL || + _clock_timer_owner->ops == RT_NULL || + _clock_timer_owner->ops->start == RT_NULL) + { + return -RT_ENOSYS; + } + + if (delta == 0) + { + if (_clock_timer_owner->ops->stop) + { + _clock_timer_owner->ops->stop(_clock_timer_owner); + } + return RT_EOK; + } + + if (_clock_timer_owner->ops->stop) + { + _clock_timer_owner->ops->stop(_clock_timer_owner); + } + + _clock_timer_owner->mode = CLOCK_TIMER_MODE_ONESHOT; + + if (delta > (rt_uint64_t)RT_UINT32_MAX) + { + delta = RT_UINT32_MAX; + } + + return _clock_timer_owner->ops->start(_clock_timer_owner, (rt_uint32_t)delta, CLOCK_TIMER_MODE_ONESHOT); +} + +static const struct rt_clock_time_ops _clock_timer_clock_ops = +{ + _clock_timer_clock_get_freq, + _clock_timer_clock_get_counter, + _clock_timer_clock_set_timeout, +}; + +rt_inline rt_uint32_t timeout_calc(rt_clock_timer_t *timer, rt_clock_timerval_t *tv) { float overflow; float timeout; @@ -91,12 +160,12 @@ rt_inline rt_uint32_t timeout_calc(rt_hwtimer_t *timer, rt_hwtimerval_t *tv) return counter; } -static rt_err_t rt_hwtimer_init(struct rt_device *dev) +static rt_err_t rt_clock_timer_init(struct rt_device *dev) { rt_err_t result = RT_EOK; - rt_hwtimer_t *timer; + rt_clock_timer_t *timer; - timer = (rt_hwtimer_t *)dev; + timer = (rt_clock_timer_t *)dev; /* try to change to 1MHz */ if ((1000000 <= timer->info->maxfreq) && (1000000 >= timer->info->minfreq)) { @@ -106,7 +175,7 @@ static rt_err_t rt_hwtimer_init(struct rt_device *dev) { timer->freq = timer->info->minfreq; } - timer->mode = HWTIMER_MODE_ONESHOT; + timer->mode = CLOCK_TIMER_MODE_ONESHOT; timer->cycles = 0; timer->overflow = 0; @@ -122,15 +191,15 @@ static rt_err_t rt_hwtimer_init(struct rt_device *dev) return result; } -static rt_err_t rt_hwtimer_open(struct rt_device *dev, rt_uint16_t oflag) +static rt_err_t rt_clock_timer_open(struct rt_device *dev, rt_uint16_t oflag) { rt_err_t result = RT_EOK; - rt_hwtimer_t *timer; + rt_clock_timer_t *timer; - timer = (rt_hwtimer_t *)dev; + timer = (rt_clock_timer_t *)dev; if (timer->ops->control != RT_NULL) { - timer->ops->control(timer, HWTIMER_CTRL_FREQ_SET, &timer->freq); + timer->ops->control(timer, CLOCK_TIMER_CTRL_FREQ_SET, &timer->freq); } else { @@ -140,12 +209,12 @@ static rt_err_t rt_hwtimer_open(struct rt_device *dev, rt_uint16_t oflag) return result; } -static rt_err_t rt_hwtimer_close(struct rt_device *dev) +static rt_err_t rt_clock_timer_close(struct rt_device *dev) { rt_err_t result = RT_EOK; - rt_hwtimer_t *timer; + rt_clock_timer_t *timer; - timer = (rt_hwtimer_t*)dev; + timer = (rt_clock_timer_t*)dev; if (timer->ops->init != RT_NULL) { timer->ops->init(timer, 0); @@ -161,16 +230,16 @@ static rt_err_t rt_hwtimer_close(struct rt_device *dev) return result; } -static rt_ssize_t rt_hwtimer_read(struct rt_device *dev, rt_off_t pos, void *buffer, rt_size_t size) +static rt_ssize_t rt_clock_timer_read(struct rt_device *dev, rt_off_t pos, void *buffer, rt_size_t size) { - rt_hwtimer_t *timer; - rt_hwtimerval_t tv; + rt_clock_timer_t *timer; + rt_clock_timerval_t tv; rt_uint32_t cnt; rt_base_t level; rt_int32_t overflow; float t; - timer = (rt_hwtimer_t *)dev; + timer = (rt_clock_timer_t *)dev; if (timer->ops->count_get == RT_NULL) return 0; @@ -179,11 +248,11 @@ static rt_ssize_t rt_hwtimer_read(struct rt_device *dev, rt_off_t pos, void *buf overflow = timer->overflow; rt_hw_interrupt_enable(level); - if (timer->info->cntmode == HWTIMER_CNTMODE_DW) + if (timer->info->cntmode == CLOCK_TIMER_CNTMODE_DW) { cnt = (rt_uint32_t)(timer->freq * timer->period_sec) - cnt; } - if (timer->mode == HWTIMER_MODE_ONESHOT) + if (timer->mode == CLOCK_TIMER_MODE_ONESHOT) { overflow = 0; } @@ -197,18 +266,18 @@ static rt_ssize_t rt_hwtimer_read(struct rt_device *dev, rt_off_t pos, void *buf return size; } -static rt_ssize_t rt_hwtimer_write(struct rt_device *dev, rt_off_t pos, const void *buffer, rt_size_t size) +static rt_ssize_t rt_clock_timer_write(struct rt_device *dev, rt_off_t pos, const void *buffer, rt_size_t size) { rt_base_t level; rt_uint32_t t; - rt_hwtimer_mode_t opm = HWTIMER_MODE_PERIOD; - rt_hwtimer_t *timer; + rt_clock_timer_mode_t opm = CLOCK_TIMER_MODE_PERIOD; + rt_clock_timer_t *timer; - timer = (rt_hwtimer_t *)dev; + timer = (rt_clock_timer_t *)dev; if ((timer->ops->start == RT_NULL) || (timer->ops->stop == RT_NULL)) return 0; - if (size != sizeof(rt_hwtimerval_t)) + if (size != sizeof(rt_clock_timerval_t)) return 0; timer->ops->stop(timer); @@ -217,10 +286,10 @@ static rt_ssize_t rt_hwtimer_write(struct rt_device *dev, rt_off_t pos, const vo timer->overflow = 0; rt_hw_interrupt_enable(level); - t = timeout_calc(timer, (rt_hwtimerval_t*)buffer); - if ((timer->cycles <= 1) && (timer->mode == HWTIMER_MODE_ONESHOT)) + t = timeout_calc(timer, (rt_clock_timerval_t*)buffer); + if ((timer->cycles <= 1) && (timer->mode == CLOCK_TIMER_MODE_ONESHOT)) { - opm = HWTIMER_MODE_ONESHOT; + opm = CLOCK_TIMER_MODE_ONESHOT; } if (timer->ops->start(timer, t, opm) != RT_EOK) @@ -229,17 +298,17 @@ static rt_ssize_t rt_hwtimer_write(struct rt_device *dev, rt_off_t pos, const vo return size; } -static rt_err_t rt_hwtimer_control(struct rt_device *dev, int cmd, void *args) +static rt_err_t rt_clock_timer_control(struct rt_device *dev, int cmd, void *args) { rt_base_t level; rt_err_t result = RT_EOK; - rt_hwtimer_t *timer; + rt_clock_timer_t *timer; - timer = (rt_hwtimer_t *)dev; + timer = (rt_clock_timer_t *)dev; switch (cmd) { - case HWTIMER_CTRL_STOP: + case CLOCK_TIMER_CTRL_STOP: { if (timer->ops->stop != RT_NULL) { @@ -251,7 +320,7 @@ static rt_err_t rt_hwtimer_control(struct rt_device *dev, int cmd, void *args) } } break; - case HWTIMER_CTRL_FREQ_SET: + case CLOCK_TIMER_CTRL_FREQ_SET: { rt_int32_t *f; @@ -285,7 +354,7 @@ static rt_err_t rt_hwtimer_control(struct rt_device *dev, int cmd, void *args) } } break; - case HWTIMER_CTRL_INFO_GET: + case CLOCK_TIMER_CTRL_INFO_GET: { if (args == RT_NULL) { @@ -293,12 +362,12 @@ static rt_err_t rt_hwtimer_control(struct rt_device *dev, int cmd, void *args) break; } - *((struct rt_hwtimer_info*)args) = *timer->info; + *((struct rt_clock_timer_info*)args) = *timer->info; } break; - case HWTIMER_CTRL_MODE_SET: + case CLOCK_TIMER_CTRL_MODE_SET: { - rt_hwtimer_mode_t *m; + rt_clock_timer_mode_t *m; if (args == RT_NULL) { @@ -306,9 +375,9 @@ static rt_err_t rt_hwtimer_control(struct rt_device *dev, int cmd, void *args) break; } - m = (rt_hwtimer_mode_t*)args; + m = (rt_clock_timer_mode_t*)args; - if ((*m != HWTIMER_MODE_ONESHOT) && (*m != HWTIMER_MODE_PERIOD)) + if ((*m != CLOCK_TIMER_MODE_ONESHOT) && (*m != CLOCK_TIMER_MODE_PERIOD)) { result = -RT_ERROR; break; @@ -335,7 +404,7 @@ static rt_err_t rt_hwtimer_control(struct rt_device *dev, int cmd, void *args) return result; } -void rt_device_hwtimer_isr(rt_hwtimer_t *timer) +void rt_clock_timer_isr(rt_clock_timer_t *timer) { rt_base_t level; @@ -356,7 +425,7 @@ void rt_device_hwtimer_isr(rt_hwtimer_t *timer) rt_hw_interrupt_enable(level); - if (timer->mode == HWTIMER_MODE_ONESHOT) + if (timer->mode == CLOCK_TIMER_MODE_ONESHOT) { if (timer->ops->stop != RT_NULL) { @@ -364,9 +433,14 @@ void rt_device_hwtimer_isr(rt_hwtimer_t *timer) } } + if (timer == _clock_timer_owner) + { + rt_clock_time_event_isr(); + } + if (timer->parent.rx_indicate != RT_NULL) { - timer->parent.rx_indicate(&timer->parent, sizeof(struct rt_hwtimerval)); + timer->parent.rx_indicate(&timer->parent, sizeof(struct rt_clock_timerval)); } } else @@ -376,20 +450,22 @@ void rt_device_hwtimer_isr(rt_hwtimer_t *timer) } #ifdef RT_USING_DEVICE_OPS -const static struct rt_device_ops hwtimer_ops = +const static struct rt_device_ops clock_timer_ops = { - rt_hwtimer_init, - rt_hwtimer_open, - rt_hwtimer_close, - rt_hwtimer_read, - rt_hwtimer_write, - rt_hwtimer_control + rt_clock_timer_init, + rt_clock_timer_open, + rt_clock_timer_close, + rt_clock_timer_read, + rt_clock_timer_write, + rt_clock_timer_control }; #endif -rt_err_t rt_device_hwtimer_register(rt_hwtimer_t *timer, const char *name, void *user_data) +rt_err_t rt_clock_timer_register(rt_clock_timer_t *timer, const char *name, void *user_data) { struct rt_device *device; + rt_err_t result; + rt_uint8_t caps = 0; RT_ASSERT(timer != RT_NULL); RT_ASSERT(timer->ops != RT_NULL); @@ -402,16 +478,50 @@ rt_err_t rt_device_hwtimer_register(rt_hwtimer_t *timer, const char *name, void device->tx_complete = RT_NULL; #ifdef RT_USING_DEVICE_OPS - device->ops = &hwtimer_ops; + device->ops = &clock_timer_ops; #else - device->init = rt_hwtimer_init; - device->open = rt_hwtimer_open; - device->close = rt_hwtimer_close; - device->read = rt_hwtimer_read; - device->write = rt_hwtimer_write; - device->control = rt_hwtimer_control; + device->init = rt_clock_timer_init; + device->open = rt_clock_timer_open; + device->close = rt_clock_timer_close; + device->read = rt_clock_timer_read; + device->write = rt_clock_timer_write; + device->control = rt_clock_timer_control; #endif device->user_data = user_data; - return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE); + result = rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE); + if (result != RT_EOK) + { + return result; + } + + if (timer->ops->start) + { + caps |= RT_CLOCK_TIME_CAP_EVENT; + } + + if (caps && _clock_timer_owner == RT_NULL) + { + char ct_name[RT_NAME_MAX]; + + _clock_timer_owner = timer; + _clock_timer_clock_dev.ops = &_clock_timer_clock_ops; + _clock_timer_clock_dev.res_scale = RT_CLOCK_TIME_RESMUL; + _clock_timer_clock_dev.caps = caps; + + rt_snprintf(ct_name, sizeof(ct_name), "clock_time_%s", name); + rt_clock_time_device_register(&_clock_timer_clock_dev, ct_name, caps); + + if ((caps & RT_CLOCK_TIME_CAP_EVENT) && rt_clock_time_get_default_event() == RT_NULL) + { + rt_clock_time_set_default_event(&_clock_timer_clock_dev); + if (!(device->flag & RT_DEVICE_FLAG_ACTIVATED)) + { + rt_device_init(device); + rt_device_open(device, RT_DEVICE_OFLAG_RDWR); + } + } + } + + return RT_EOK; } diff --git a/components/drivers/cputime/Kconfig b/components/drivers/cputime/Kconfig deleted file mode 100644 index 97c2c462593..00000000000 --- a/components/drivers/cputime/Kconfig +++ /dev/null @@ -1,34 +0,0 @@ -config RT_USING_CPUTIME - bool "Enable CPU time for high resolution clock counter" - default n - help - When enable this option, the BSP should provide a rt_clock_cputime_ops - for CPU time by: - const static struct rt_clock_cputime_ops _ops = {...}; - clock_cpu_setops(&_ops); - - Then user can use high resolution clock counter with: - - ts1 = clock_cpu_gettime(); - ts2 = clock_cpu_gettime(); - - /* and get the ms of delta tick with API: */ - ms_tick = clock_cpu_millisecond(t2 - t1); - us_tick = clock_cpu_microsecond(t2 - t1); - -if RT_USING_CPUTIME - config RT_USING_CPUTIME_CORTEXM - bool "Support Cortex-M CPU" - default y - depends on ARCH_ARM_CORTEX_M0 || ARCH_ARM_CORTEX_M3 || ARCH_ARM_CORTEX_M4 || ARCH_ARM_CORTEX_M7 - select PKG_USING_PERF_COUNTER - config RT_USING_CPUTIME_RISCV - bool "Use rdtime instructions for CPU time" - default y - depends on ARCH_RISCV64 - help - Some RISCV64 MCU Use rdtime instructions read CPU time. - config CPUTIME_TIMER_FREQ - int "CPUTIME timer freq" - default 0 -endif diff --git a/components/drivers/cputime/SConscript b/components/drivers/cputime/SConscript deleted file mode 100644 index 9fec4641e54..00000000000 --- a/components/drivers/cputime/SConscript +++ /dev/null @@ -1,18 +0,0 @@ -from building import * - -cwd = GetCurrentDir() -CPPPATH = [cwd + '/../include'] -src = Split(''' -cputime.c -cputimer.c -''') - -if GetDepend('RT_USING_CPUTIME_CORTEXM'): - src += ['cputime_cortexm.c'] - -if GetDepend('RT_USING_CPUTIME_RISCV'): - src += ['cputime_riscv.c'] - -group = DefineGroup('DeviceDrivers', src, depend = ['RT_USING_CPUTIME'], CPPPATH = CPPPATH) - -Return('group') diff --git a/components/drivers/cputime/cputime.c b/components/drivers/cputime/cputime.c deleted file mode 100644 index 42298ea98c1..00000000000 --- a/components/drivers/cputime/cputime.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2017-12-23 Bernard first version - */ - -#include -#include -#include - -static const struct rt_clock_cputime_ops *_cputime_ops = RT_NULL; - -/** - * The clock_cpu_getres() function shall return the resolution of CPU time, the - * number of nanosecond per tick. - * - * @return the number of nanosecond per tick(x (1000UL * 1000)) - */ -uint64_t clock_cpu_getres(void) -{ - if (_cputime_ops) - return _cputime_ops->cputime_getres(); - - rt_set_errno(ENOSYS); - return 0; -} - -/** - * The clock_cpu_gettime() function shall return the current value of cpu time tick. - * - * @return the cpu tick - */ -uint64_t clock_cpu_gettime(void) -{ - if (_cputime_ops) - return _cputime_ops->cputime_gettime(); - - rt_set_errno(ENOSYS); - return 0; -} - -/** - * The clock_cpu_settimeout() fucntion set timeout time and timeout callback function - * The timeout callback function will be called when the timeout time is reached - * - * @param tick the Timeout tick - * @param timeout the Timeout function - * @param parameter the Parameters of timeout function - * - */ -int clock_cpu_settimeout(uint64_t tick, void (*timeout)(void *param), void *param) -{ - if (_cputime_ops) - return _cputime_ops->cputime_settimeout(tick, timeout, param); - - rt_set_errno(ENOSYS); - return 0; -} - -int clock_cpu_issettimeout(void) -{ - if (_cputime_ops) - return _cputime_ops->cputime_settimeout != RT_NULL; - return RT_FALSE; -} - -/** - * The clock_cpu_microsecond() fucntion shall return the microsecond according to - * cpu_tick parameter. - * - * @param cpu_tick the cpu tick - * - * @return the microsecond - */ -uint64_t clock_cpu_microsecond(uint64_t cpu_tick) -{ - uint64_t unit = clock_cpu_getres(); - - return (uint64_t)(((cpu_tick * unit) / (1000UL * 1000)) / 1000); -} - -/** - * The clock_cpu_microsecond() fucntion shall return the millisecond according to - * cpu_tick parameter. - * - * @param cpu_tick the cpu tick - * - * @return the millisecond - */ -uint64_t clock_cpu_millisecond(uint64_t cpu_tick) -{ - uint64_t unit = clock_cpu_getres(); - - return (uint64_t)(((cpu_tick * unit) / (1000UL * 1000)) / (1000UL * 1000)); -} - -/** - * The clock_cpu_seops() function shall set the ops of cpu time. - * - * @return always return 0. - */ -int clock_cpu_setops(const struct rt_clock_cputime_ops *ops) -{ - _cputime_ops = ops; - if (ops) - { - RT_ASSERT(ops->cputime_getres != RT_NULL); - RT_ASSERT(ops->cputime_gettime != RT_NULL); - } - - return 0; -} diff --git a/components/drivers/cputime/cputime_cortexm.c b/components/drivers/cputime/cputime_cortexm.c deleted file mode 100644 index 100910a9f9f..00000000000 --- a/components/drivers/cputime/cputime_cortexm.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2017-12-23 Bernard first version - * 2022-06-14 Meco Man suuport pref_counter - */ - -#include -#include -#include - -#include -#ifdef PKG_USING_PERF_COUNTER -#include -#endif - -/* Use Cycle counter of Data Watchpoint and Trace Register for CPU time */ -static uint64_t cortexm_cputime_getres(void) -{ - uint64_t ret = 1000UL * 1000 * 1000; - - ret = (ret * (1000UL * 1000)) / SystemCoreClock; - return ret; -} - -static uint64_t cortexm_cputime_gettime(void) -{ -#ifdef PKG_USING_PERF_COUNTER - return get_system_ticks(); -#else - return DWT->CYCCNT; -#endif -} - -const static struct rt_clock_cputime_ops _cortexm_ops = -{ - cortexm_cputime_getres, - cortexm_cputime_gettime -}; - - -int cortexm_cputime_init(void) -{ -#ifdef PKG_USING_PERF_COUNTER - clock_cpu_setops(&_cortexm_ops); -#else - /* check support bit */ - if ((DWT->CTRL & (1UL << DWT_CTRL_NOCYCCNT_Pos)) == 0) - { - /* enable trace*/ - CoreDebug->DEMCR |= (1UL << CoreDebug_DEMCR_TRCENA_Pos); - - /* whether cycle counter not enabled */ - if ((DWT->CTRL & (1UL << DWT_CTRL_CYCCNTENA_Pos)) == 0) - { - /* enable cycle counter */ - DWT->CTRL |= (1UL << DWT_CTRL_CYCCNTENA_Pos); - } - - clock_cpu_setops(&_cortexm_ops); - } -#endif /* PKG_USING_PERF_COUNTER */ - return 0; -} -INIT_BOARD_EXPORT(cortexm_cputime_init); diff --git a/components/drivers/cputime/cputime_riscv.c b/components/drivers/cputime/cputime_riscv.c deleted file mode 100644 index 597157c226e..00000000000 --- a/components/drivers/cputime/cputime_riscv.c +++ /dev/null @@ -1,37 +0,0 @@ -#include -#include -#include - -#include - -/* Use Cycle counter of Data Watchpoint and Trace Register for CPU time */ - -static uint64_t riscv_cputime_getres(void) -{ - uint64_t ret = 1000UL * 1000 * 1000; - - ret = (ret * (1000UL * 1000)) / CPUTIME_TIMER_FREQ; - return ret; -} - -static uint64_t riscv_cputime_gettime(void) -{ - uint64_t time_elapsed; - __asm__ __volatile__( - "rdtime %0" - : "=r"(time_elapsed)); - return time_elapsed; -} - -const static struct rt_clock_cputime_ops _riscv_ops = -{ - riscv_cputime_getres, - riscv_cputime_gettime -}; - -int riscv_cputime_init(void) -{ - clock_cpu_setops(&_riscv_ops); - return 0; -} -INIT_BOARD_EXPORT(riscv_cputime_init); diff --git a/components/drivers/cputime/cputimer.c b/components/drivers/cputime/cputimer.c deleted file mode 100644 index 04318336407..00000000000 --- a/components/drivers/cputime/cputimer.c +++ /dev/null @@ -1,339 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2023-02-13 zhkag first version - * 2023-04-03 xqyjlj fix cputimer in multithreading - */ - -#include -#include -#include - -static rt_list_t _cputimer_list = RT_LIST_OBJECT_INIT(_cputimer_list); -static struct rt_cputimer *_cputimer_nowtimer = RT_NULL; - -static void _cputime_sleep_timeout(void *parameter) -{ - struct rt_semaphore *sem; - sem = (struct rt_semaphore *)parameter; - rt_sem_release(sem); -} - -static void _cputime_timeout_callback(void *parameter) -{ - struct rt_cputimer *timer; - timer = (struct rt_cputimer *)parameter; - rt_base_t level; - level = rt_hw_interrupt_disable(); - _cputimer_nowtimer = RT_NULL; - rt_list_remove(&(timer->row)); - rt_hw_interrupt_enable(level); - timer->timeout_func(timer->parameter); - - if (&_cputimer_list != _cputimer_list.prev) - { - struct rt_cputimer *t; - t = rt_list_entry(_cputimer_list.next, struct rt_cputimer, row); - clock_cpu_settimeout(t->timeout_tick, _cputime_timeout_callback, t); - } - else - { - clock_cpu_settimeout(RT_NULL, RT_NULL, RT_NULL); - } -} - -static void _set_next_timeout() -{ - struct rt_cputimer *t; - - if (&_cputimer_list != _cputimer_list.prev) - { - t = rt_list_entry((&_cputimer_list)->next, struct rt_cputimer, row); - if (_cputimer_nowtimer != RT_NULL) - { - if (t != _cputimer_nowtimer && t->timeout_tick < _cputimer_nowtimer->timeout_tick) - { - _cputimer_nowtimer = t; - clock_cpu_settimeout(t->timeout_tick, _cputime_timeout_callback, t); - } - } - else - { - _cputimer_nowtimer = t; - clock_cpu_settimeout(t->timeout_tick, _cputime_timeout_callback, t); - } - } - else - { - _cputimer_nowtimer = RT_NULL; - clock_cpu_settimeout(RT_NULL, RT_NULL, RT_NULL); - } -} - -void rt_cputimer_init(rt_cputimer_t timer, - const char *name, - void (*timeout)(void *parameter), - void *parameter, - rt_uint64_t tick, - rt_uint8_t flag) -{ - /* parameter check */ - RT_ASSERT(timer != RT_NULL); - RT_ASSERT(timeout != RT_NULL); - RT_ASSERT(clock_cpu_issettimeout() != RT_FALSE); - - /* set flag */ - timer->parent.flag = flag; - - /* set deactivated */ - timer->parent.flag &= ~RT_TIMER_FLAG_ACTIVATED; - timer->timeout_func = timeout; - timer->parameter = parameter; - timer->timeout_tick = tick + clock_cpu_gettime(); - timer->init_tick = tick; - - rt_list_init(&(timer->row)); - rt_sem_init(&(timer->sem), "cputime", 0, RT_IPC_FLAG_PRIO); -} - -rt_err_t rt_cputimer_delete(rt_cputimer_t timer) -{ - rt_base_t level; - - /* parameter check */ - RT_ASSERT(timer != RT_NULL); - RT_ASSERT(clock_cpu_issettimeout() != RT_FALSE); - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - rt_list_remove(&timer->row); - /* stop timer */ - timer->parent.flag &= ~RT_TIMER_FLAG_ACTIVATED; - - /* enable interrupt */ - rt_hw_interrupt_enable(level); - - _set_next_timeout(); - - return RT_EOK; -} - -rt_err_t rt_cputimer_start(rt_cputimer_t timer) -{ - rt_list_t *timer_list; - rt_base_t level; - - /* parameter check */ - RT_ASSERT(timer != RT_NULL); - RT_ASSERT(clock_cpu_issettimeout() != RT_FALSE); - - /* stop timer firstly */ - level = rt_hw_interrupt_disable(); - /* remove timer from list */ - - rt_list_remove(&timer->row); - /* change status of timer */ - timer->parent.flag &= ~RT_TIMER_FLAG_ACTIVATED; - - timer_list = &_cputimer_list; - - for (; timer_list != _cputimer_list.prev; - timer_list = timer_list->next) - { - struct rt_cputimer *t; - rt_list_t *p = timer_list->next; - - t = rt_list_entry(p, struct rt_cputimer, row); - - if ((t->timeout_tick - timer->timeout_tick) == 0) - { - continue; - } - else if ((t->timeout_tick - timer->timeout_tick) < 0x7fffffffffffffff) - { - break; - } - } - - rt_list_insert_after(timer_list, &(timer->row)); - - timer->parent.flag |= RT_TIMER_FLAG_ACTIVATED; - - _set_next_timeout(); - /* enable interrupt */ - rt_hw_interrupt_enable(level); - - return RT_EOK; -} - -rt_err_t rt_cputimer_stop(rt_cputimer_t timer) -{ - rt_base_t level; - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - /* timer check */ - RT_ASSERT(timer != RT_NULL); - RT_ASSERT(clock_cpu_issettimeout() != RT_FALSE); - - if (!(timer->parent.flag & RT_TIMER_FLAG_ACTIVATED)) - { - rt_hw_interrupt_enable(level); - return -RT_ERROR; - } - - rt_list_remove(&timer->row); - /* change status */ - timer->parent.flag &= ~RT_TIMER_FLAG_ACTIVATED; - - _set_next_timeout(); - /* enable interrupt */ - rt_hw_interrupt_enable(level); - - return RT_EOK; -} - -rt_err_t rt_cputimer_control(rt_cputimer_t timer, int cmd, void *arg) -{ - rt_base_t level; - - /* parameter check */ - RT_ASSERT(timer != RT_NULL); - RT_ASSERT(clock_cpu_issettimeout() != RT_FALSE); - - level = rt_hw_interrupt_disable(); - switch (cmd) - { - case RT_TIMER_CTRL_GET_TIME: - *(rt_uint64_t *)arg = timer->init_tick; - break; - - case RT_TIMER_CTRL_SET_TIME: - RT_ASSERT((*(rt_uint64_t *)arg) < 0x7fffffffffffffff); - timer->init_tick = *(rt_uint64_t *)arg; - timer->timeout_tick = *(rt_uint64_t *)arg + clock_cpu_gettime(); - break; - - case RT_TIMER_CTRL_SET_ONESHOT: - timer->parent.flag &= ~RT_TIMER_FLAG_PERIODIC; - break; - - case RT_TIMER_CTRL_SET_PERIODIC: - timer->parent.flag |= RT_TIMER_FLAG_PERIODIC; - break; - - case RT_TIMER_CTRL_GET_STATE: - if (timer->parent.flag & RT_TIMER_FLAG_ACTIVATED) - { - /*timer is start and run*/ - *(rt_uint32_t *)arg = RT_TIMER_FLAG_ACTIVATED; - } - else - { - /*timer is stop*/ - *(rt_uint32_t *)arg = RT_TIMER_FLAG_DEACTIVATED; - } - break; - - case RT_TIMER_CTRL_GET_REMAIN_TIME: - *(rt_uint64_t *)arg = timer->timeout_tick; - break; - case RT_TIMER_CTRL_GET_FUNC: - arg = (void *)timer->timeout_func; - break; - - case RT_TIMER_CTRL_SET_FUNC: - timer->timeout_func = (void (*)(void *))arg; - break; - - case RT_TIMER_CTRL_GET_PARM: - *(void **)arg = timer->parameter; - break; - - case RT_TIMER_CTRL_SET_PARM: - timer->parameter = arg; - break; - - default: - break; - } - rt_hw_interrupt_enable(level); - - return RT_EOK; -} - -rt_err_t rt_cputimer_detach(rt_cputimer_t timer) -{ - rt_base_t level; - - /* parameter check */ - RT_ASSERT(timer != RT_NULL); - RT_ASSERT(clock_cpu_issettimeout() != RT_FALSE); - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - rt_list_remove(&timer->row); - /* stop timer */ - timer->parent.flag &= ~RT_TIMER_FLAG_ACTIVATED; - - _set_next_timeout(); - /* enable interrupt */ - rt_hw_interrupt_enable(level); - - rt_sem_detach(&(timer->sem)); - - return RT_EOK; -} - -rt_err_t rt_cputime_sleep(rt_uint64_t tick) -{ - rt_base_t level; - struct rt_cputimer cputimer; - - if (!clock_cpu_issettimeout()) - { - rt_int32_t ms = clock_cpu_millisecond(tick); - return rt_thread_delay(rt_tick_from_millisecond(ms)); - } - - if (tick == 0) - { - return -RT_EINVAL; - } - - rt_cputimer_init(&cputimer, "cputime_sleep", _cputime_sleep_timeout, &(cputimer.sem), tick, - RT_TIMER_FLAG_ONE_SHOT | RT_TIMER_FLAG_SOFT_TIMER); - - /* disable interrupt */ - level = rt_hw_interrupt_disable(); - - rt_cputimer_start(&cputimer); /* reset the timeout of thread timer and start it */ - rt_hw_interrupt_enable(level); - rt_sem_take_interruptible(&(cputimer.sem), RT_WAITING_FOREVER); - - rt_cputimer_detach(&cputimer); - return RT_EOK; -} - -rt_err_t rt_cputime_ndelay(rt_uint64_t ns) -{ - uint64_t unit = clock_cpu_getres(); - return rt_cputime_sleep(ns * (1000UL * 1000) / unit); -} - -rt_err_t rt_cputime_udelay(rt_uint64_t us) -{ - return rt_cputime_ndelay(us * 1000); -} - -rt_err_t rt_cputime_mdelay(rt_uint64_t ms) -{ - return rt_cputime_ndelay(ms * 1000000); -} diff --git a/components/drivers/hwtimer/Kconfig b/components/drivers/hwtimer/Kconfig deleted file mode 100644 index 0fd1974b899..00000000000 --- a/components/drivers/hwtimer/Kconfig +++ /dev/null @@ -1,14 +0,0 @@ -menuconfig RT_USING_HWTIMER - bool "Using Hardware Timer device drivers" - default n - -config RT_HWTIMER_ARM_ARCH - bool "ARM ARCH Timer" - depends on RT_USING_DM - depends on RT_USING_HWTIMER - depends on ARCH_ARM_CORTEX_A || ARCH_ARMV8 - default n - -if RT_USING_DM && RT_USING_HWTIMER - osource "$(SOC_DM_HWTIMER_DIR)/Kconfig" -endif diff --git a/components/drivers/hwtimer/SConscript b/components/drivers/hwtimer/SConscript deleted file mode 100644 index b6ffc580ed2..00000000000 --- a/components/drivers/hwtimer/SConscript +++ /dev/null @@ -1,18 +0,0 @@ -from building import * - -group = [] - -if not GetDepend(['RT_USING_HWTIMER']): - Return('group') - -cwd = GetCurrentDir() -CPPPATH = [cwd + '/../include'] - -src = ['hwtimer.c'] - -if GetDepend(['RT_HWTIMER_ARM_ARCH']): - src += ['hwtimer-arm_arch.c'] - -group = DefineGroup('DeviceDrivers', src, depend = [''], CPPPATH = CPPPATH) - -Return('group') diff --git a/components/drivers/include/drivers/clock_time.h b/components/drivers/include/drivers/clock_time.h new file mode 100644 index 00000000000..7374b97d005 --- /dev/null +++ b/components/drivers/include/drivers/clock_time.h @@ -0,0 +1,184 @@ +/* + * Copyright (c) 2006-2024, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2025-01-01 RT-Thread Clock time subsystem + */ +#ifndef __CLOCK_TIME_H__ +#define __CLOCK_TIME_H__ + +#include +#include +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +#define RT_CLOCK_TIME_RESMUL (1000000ULL) + +#define RT_CLOCK_TIME_CAP_SOURCE (1U << 0) +#define RT_CLOCK_TIME_CAP_EVENT (1U << 1) + +struct rt_clock_time_device; + +struct rt_clock_time_ops +{ + rt_uint64_t (*get_freq)(struct rt_clock_time_device *dev); + rt_uint64_t (*get_counter)(struct rt_clock_time_device *dev); + rt_err_t (*set_timeout)(struct rt_clock_time_device *dev, rt_uint64_t delta); +}; + +struct rt_clock_time_device +{ + struct rt_device parent; + const struct rt_clock_time_ops *ops; + rt_uint64_t res_scale; + rt_uint8_t caps; +}; + +/* Clock time timer device (replacement for legacy hardware timer device) */ +typedef enum +{ + CLOCK_TIMER_CTRL_FREQ_SET = RT_DEVICE_CTRL_BASE(Timer) + 0x01, + CLOCK_TIMER_CTRL_STOP = RT_DEVICE_CTRL_BASE(Timer) + 0x02, + CLOCK_TIMER_CTRL_INFO_GET = RT_DEVICE_CTRL_BASE(Timer) + 0x03, + CLOCK_TIMER_CTRL_MODE_SET = RT_DEVICE_CTRL_BASE(Timer) + 0x04 +} rt_clock_timer_ctrl_t; + +typedef enum +{ + CLOCK_TIMER_MODE_ONESHOT = 0x01, + CLOCK_TIMER_MODE_PERIOD +} rt_clock_timer_mode_t; + +typedef struct rt_clock_timerval +{ + rt_int32_t sec; + rt_int32_t usec; +} rt_clock_timerval_t; + +#define CLOCK_TIMER_CNTMODE_UP 0x01 +#define CLOCK_TIMER_CNTMODE_DW 0x02 + +struct rt_clock_timer_device; + +struct rt_clock_timer_ops +{ + void (*init)(struct rt_clock_timer_device *timer, rt_uint32_t state); + rt_err_t (*start)(struct rt_clock_timer_device *timer, rt_uint32_t cnt, rt_clock_timer_mode_t mode); + void (*stop)(struct rt_clock_timer_device *timer); + rt_uint32_t (*count_get)(struct rt_clock_timer_device *timer); + rt_err_t (*control)(struct rt_clock_timer_device *timer, rt_uint32_t cmd, void *args); +}; + +struct rt_clock_timer_info +{ + rt_int32_t maxfreq; + rt_int32_t minfreq; + rt_uint32_t maxcnt; + rt_uint8_t cntmode; +}; + +typedef struct rt_clock_timer_device +{ + struct rt_device parent; + const struct rt_clock_timer_ops *ops; + const struct rt_clock_timer_info *info; + + rt_int32_t freq; + rt_int32_t overflow; + float period_sec; + rt_int32_t cycles; + rt_int32_t reload; + rt_clock_timer_mode_t mode; + +} rt_clock_timer_t; + +rt_err_t rt_clock_timer_register(rt_clock_timer_t *timer, const char *name, void *user_data); +void rt_clock_timer_isr(rt_clock_timer_t *timer); + +#ifdef RT_USING_DM +extern void (*rt_clock_timer_us_delay)(rt_uint32_t us); +#endif + +struct rt_clock_hrtimer +{ + rt_uint8_t flag; /**< compatible to tick timer's flag */ + char name[RT_NAME_MAX]; + rt_list_t node; + void *parameter; + unsigned long delay_cnt; + unsigned long timeout_cnt; + rt_err_t error; + struct rt_completion completion; + void (*timeout_func)(void *parameter); +}; +typedef struct rt_clock_hrtimer *rt_clock_hrtimer_t; + +rt_err_t rt_clock_time_device_register(struct rt_clock_time_device *dev, const char *name, rt_uint8_t caps); + +void rt_clock_time_set_default_source(struct rt_clock_time_device *dev); +void rt_clock_time_set_default_event(struct rt_clock_time_device *dev); +struct rt_clock_time_device *rt_clock_time_get_default_source(void); +struct rt_clock_time_device *rt_clock_time_get_default_event(void); + +void rt_clock_time_source_init(void); + +rt_uint64_t rt_clock_time_get_freq(void); +rt_uint64_t rt_clock_time_get_counter(void); +rt_uint64_t rt_clock_time_get_res_scaled(void); +rt_uint64_t rt_clock_time_get_event_freq(void); +rt_uint64_t rt_clock_time_get_event_res_scaled(void); + +rt_uint64_t rt_clock_time_counter_to_ns(rt_uint64_t cnt); +rt_uint64_t rt_clock_time_ns_to_counter(rt_uint64_t ns); + +rt_err_t rt_clock_time_set_timeout(rt_uint64_t delta); +void rt_clock_time_event_isr(void); + +rt_err_t rt_clock_boottime_get_us(struct timeval *tv); +rt_err_t rt_clock_boottime_get_s(time_t *t); +rt_err_t rt_clock_boottime_get_ns(struct timespec *ts); + +rt_uint64_t rt_clock_hrtimer_getres(void); +unsigned long rt_clock_hrtimer_getfrq(void); +rt_err_t rt_clock_hrtimer_settimeout(unsigned long cnt); +void rt_clock_hrtimer_process(void); + +void rt_clock_hrtimer_init(rt_clock_hrtimer_t timer, + const char *name, + rt_uint8_t flag, + void (*timeout)(void *parameter), + void *parameter); +rt_err_t rt_clock_hrtimer_start(rt_clock_hrtimer_t timer, unsigned long cnt); +rt_err_t rt_clock_hrtimer_stop(rt_clock_hrtimer_t timer); +rt_err_t rt_clock_hrtimer_control(rt_clock_hrtimer_t timer, int cmd, void *arg); +rt_err_t rt_clock_hrtimer_detach(rt_clock_hrtimer_t timer); + +rt_inline void rt_clock_hrtimer_keep_errno(rt_clock_hrtimer_t timer, rt_err_t err) +{ + RT_ASSERT(timer != RT_NULL); + + timer->error = err; + rt_set_errno(-err); +} + +void rt_clock_hrtimer_delay_init(struct rt_clock_hrtimer *timer); +void rt_clock_hrtimer_delay_detach(struct rt_clock_hrtimer *timer); +void rt_clock_hrtimer_process(void); + +rt_err_t rt_clock_hrtimer_sleep(struct rt_clock_hrtimer *timer, unsigned long cnt); +rt_err_t rt_clock_hrtimer_ndelay(struct rt_clock_hrtimer *timer, unsigned long ns); +rt_err_t rt_clock_hrtimer_udelay(struct rt_clock_hrtimer *timer, unsigned long us); +rt_err_t rt_clock_hrtimer_mdelay(struct rt_clock_hrtimer *timer, unsigned long ms); + +#ifdef __cplusplus +} +#endif + +#endif /* __CLOCK_TIME_H__ */ diff --git a/components/drivers/include/drivers/core/master_id.h b/components/drivers/include/drivers/core/master_id.h index 5bf9e611cb9..99b1b098565 100644 --- a/components/drivers/include/drivers/core/master_id.h +++ b/components/drivers/include/drivers/core/master_id.h @@ -26,7 +26,7 @@ #define MASTER_ID_SERIAL 13 /* Clock Timer */ -#define MASTER_ID_HWTIMER 21 +#define MASTER_ID_CLOCK_TIMER 21 #define MASTER_ID_PTP 22 #define MASTER_ID_RTC 23 diff --git a/components/drivers/include/drivers/cputime.h b/components/drivers/include/drivers/cputime.h deleted file mode 100644 index 478ccfd0199..00000000000 --- a/components/drivers/include/drivers/cputime.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2017-12-23 Bernard first version - */ - -#ifndef CPUTIME_H__ -#define CPUTIME_H__ - -#include -#include "cputimer.h" - -struct rt_clock_cputime_ops -{ - uint64_t (*cputime_getres)(void); - uint64_t (*cputime_gettime)(void); - int (*cputime_settimeout)(uint64_t tick, void (*timeout)(void *param), void *param); -}; - -uint64_t clock_cpu_getres(void); -uint64_t clock_cpu_gettime(void); -int clock_cpu_settimeout(uint64_t tick, void (*timeout)(void *param), void *param); -int clock_cpu_issettimeout(void); - -uint64_t clock_cpu_microsecond(uint64_t cpu_tick); -uint64_t clock_cpu_millisecond(uint64_t cpu_tick); - -int clock_cpu_setops(const struct rt_clock_cputime_ops *ops); - -#ifdef RT_USING_CPUTIME_RISCV -int riscv_cputime_init(void); -#endif /* RT_USING_CPUTIME_RISCV */ - -#endif diff --git a/components/drivers/include/drivers/cputimer.h b/components/drivers/include/drivers/cputimer.h deleted file mode 100644 index 371992a41e1..00000000000 --- a/components/drivers/include/drivers/cputimer.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2023-02-13 zhkag first version - */ - -#ifndef CPUTIMER_H__ -#define CPUTIMER_H__ - -#include - -struct rt_cputimer -{ - struct rt_object parent; /**< inherit from rt_object */ - rt_list_t row; - void (*timeout_func)(void *parameter); - void *parameter; - rt_uint64_t init_tick; - rt_uint64_t timeout_tick; - struct rt_semaphore sem; -}; -typedef struct rt_cputimer *rt_cputimer_t; - -rt_err_t rt_cputimer_detach(rt_cputimer_t timer); - -#ifdef RT_USING_HEAP -void rt_cputimer_init(rt_cputimer_t timer, - const char *name, - void (*timeout)(void *parameter), - void *parameter, - rt_uint64_t tick, - rt_uint8_t flag); -rt_err_t rt_cputimer_delete(rt_cputimer_t timer); -#endif - -rt_err_t rt_cputimer_start(rt_cputimer_t timer); -rt_err_t rt_cputimer_stop(rt_cputimer_t timer); -rt_err_t rt_cputimer_control(rt_cputimer_t timer, int cmd, void *arg); -rt_err_t rt_cputime_sleep(rt_uint64_t tick); -rt_err_t rt_cputime_ndelay(rt_uint64_t ns); -rt_err_t rt_cputime_udelay(rt_uint64_t us); -rt_err_t rt_cputime_mdelay(rt_uint64_t ms); - -#endif diff --git a/components/drivers/include/drivers/hwtimer.h b/components/drivers/include/drivers/hwtimer.h deleted file mode 100644 index 6f11ff2c545..00000000000 --- a/components/drivers/include/drivers/hwtimer.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - */ -#ifndef __HWTIMER_H__ -#define __HWTIMER_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* Timer Control Command */ -typedef enum -{ - HWTIMER_CTRL_FREQ_SET = RT_DEVICE_CTRL_BASE(Timer) + 0x01, /* set the count frequency */ - HWTIMER_CTRL_STOP = RT_DEVICE_CTRL_BASE(Timer) + 0x02, /* stop timer */ - HWTIMER_CTRL_INFO_GET = RT_DEVICE_CTRL_BASE(Timer) + 0x03, /* get a timer feature information */ - HWTIMER_CTRL_MODE_SET = RT_DEVICE_CTRL_BASE(Timer) + 0x04 /* Setting the timing mode(oneshot/period) */ -} rt_hwtimer_ctrl_t; - -/* Timing Mode */ -typedef enum -{ - HWTIMER_MODE_ONESHOT = 0x01, - HWTIMER_MODE_PERIOD -} rt_hwtimer_mode_t; - -/* Time Value */ -typedef struct rt_hwtimerval -{ - rt_int32_t sec; /* second */ - rt_int32_t usec; /* microsecond */ -} rt_hwtimerval_t; - -#define HWTIMER_CNTMODE_UP 0x01 /* increment count mode */ -#define HWTIMER_CNTMODE_DW 0x02 /* decreasing count mode */ - -struct rt_hwtimer_device; - -struct rt_hwtimer_ops -{ - void (*init)(struct rt_hwtimer_device *timer, rt_uint32_t state); - rt_err_t (*start)(struct rt_hwtimer_device *timer, rt_uint32_t cnt, rt_hwtimer_mode_t mode); - void (*stop)(struct rt_hwtimer_device *timer); - rt_uint32_t (*count_get)(struct rt_hwtimer_device *timer); - rt_err_t (*control)(struct rt_hwtimer_device *timer, rt_uint32_t cmd, void *args); -}; - -/* Timer Feature Information */ -struct rt_hwtimer_info -{ - rt_int32_t maxfreq; /* the maximum count frequency timer support */ - rt_int32_t minfreq; /* the minimum count frequency timer support */ - rt_uint32_t maxcnt; /* counter maximum value */ - rt_uint8_t cntmode; /* count mode (inc/dec) */ -}; - -typedef struct rt_hwtimer_device -{ - struct rt_device parent; - const struct rt_hwtimer_ops *ops; - const struct rt_hwtimer_info *info; - - rt_int32_t freq; /* counting frequency set by the user */ - rt_int32_t overflow; /* timer overflows */ - float period_sec; - rt_int32_t cycles; /* how many times will generate a timeout event after overflow */ - rt_int32_t reload; /* reload cycles(using in period mode) */ - rt_hwtimer_mode_t mode; /* timing mode(oneshot/period) */ -} rt_hwtimer_t; - -rt_err_t rt_device_hwtimer_register(rt_hwtimer_t *timer, const char *name, void *user_data); -void rt_device_hwtimer_isr(rt_hwtimer_t *timer); - -#ifdef RT_USING_DM -extern void (*rt_device_hwtimer_us_delay)(rt_uint32_t us); -#endif - -#ifdef __cplusplus -} -#endif - -#endif diff --git a/components/drivers/include/rtdevice.h b/components/drivers/include/rtdevice.h index 50a97beee54..c3a1277449c 100644 --- a/components/drivers/include/rtdevice.h +++ b/components/drivers/include/rtdevice.h @@ -242,18 +242,14 @@ extern "C" { #include "drivers/dev_can.h" #endif /* RT_USING_CAN */ -#ifdef RT_USING_HWTIMER -#include "drivers/hwtimer.h" -#endif /* RT_USING_HWTIMER */ +#ifdef RT_USING_CLOCK_TIME +#include "drivers/clock_time.h" +#endif /* RT_USING_CLOCK_TIME */ #ifdef RT_USING_AUDIO #include "drivers/dev_audio.h" #endif /* RT_USING_AUDIO */ -#ifdef RT_USING_CPUTIME -#include "drivers/cputime.h" -#endif /* RT_USING_CPUTIME */ - #ifdef RT_USING_ADC #include "drivers/adc.h" #endif /* RT_USING_ADC */ diff --git a/components/drivers/input/Kconfig b/components/drivers/input/Kconfig index 707a7500d9c..fc70a67790f 100644 --- a/components/drivers/input/Kconfig +++ b/components/drivers/input/Kconfig @@ -13,7 +13,7 @@ config RT_INPUT_POWER config RT_INPUT_UAPI bool "Input event Unix API" depends on RT_USING_INPUT - depends on RT_USING_KTIME + depends on RT_USING_CLOCK_TIME depends on RT_USING_POSIX_DEVIO default n default y if RT_USING_SMART diff --git a/components/drivers/input/input_uapi.c b/components/drivers/input/input_uapi.c index c1ce87efb57..21dca947c7e 100644 --- a/components/drivers/input/input_uapi.c +++ b/components/drivers/input/input_uapi.c @@ -14,7 +14,7 @@ #include #include -#include +#include #include #define DBG_TAG "input.uapi" @@ -384,7 +384,7 @@ void input_uapi_event(struct rt_input_device *idev, struct rt_input_event *event uapi_event = &uapi->events[w_idx]; - rt_ktime_boottime_get_us(&uapi_event->time); + rt_clock_boottime_get_us(&uapi_event->time); uapi_event->type = event->type; uapi_event->code = event->code; uapi_event->value = event->value; diff --git a/components/drivers/ktime/Kconfig b/components/drivers/ktime/Kconfig deleted file mode 100644 index 170271c222c..00000000000 --- a/components/drivers/ktime/Kconfig +++ /dev/null @@ -1,3 +0,0 @@ -menuconfig RT_USING_KTIME - bool "Ktime: kernel time" - default n diff --git a/components/drivers/ktime/README.md b/components/drivers/ktime/README.md deleted file mode 100644 index b878f93d4c9..00000000000 --- a/components/drivers/ktime/README.md +++ /dev/null @@ -1,63 +0,0 @@ -# ktime - -## 1、介绍 - -ktime 为 kernel time，为内核时间子系统，实现了内核启动时间以及芯片内核 cputimer 时间管理以及一个 ns 精度的高精度定时器， - -## 2、如何打开 ktime - -使用 ktime 需要在 RT-Thread 的 menuconfig 中选择它，具体路径如下： - -``` -RT-Thread Components - [*] Ktime: kernel time -``` - -## 3、使用 ktime - -> 函数的功能以及参数类型已经写在头文件的注释之中，本文不再赘述 - -### 3.1、boottime - -boottime 为系统启动时间，即为系统从上电开始到现在运行的时间，默认的时间基准为芯片内核的 cputimer 的 cnt 值，已经适配了 aarch64 与 riscv64 平台，例如 stm32 等平台需要在自己的 bsp 里面进行适配（boottime 里面函数都为 weak function），需要注意 tick 从中断到设置中间的时延 - -**此值应当为 Readonly** - -### 3.2、cputimer - -cputimer 为芯片内核的 cputimer，也可以认为是 os tick 来源的那个定时器，cputimer 主要是提供了一个统一的接口去获得其分辨率，频率，cnt 值 - -**此值应当为 Readonly** - -### 3.3、hrtimer - -> TODO: hrtimer 目前还是使用优先级链表的方式进行管理，在遇到任务的大规模并发时还是存在部分性能问题，待内核有一个统一的红黑树组件后，再进行优化 - -hrtimer 为高精度定时器，需要重写其 weak 函数（需要对接到硬件定时器，否则默认走的是软件定时器，分辨率只有 os tick 的值）才能正常使用，其主要使用方法： - -#### 3.3.1、延时 - -hrtimer 的延时并不是 while(1)式死等，它会将一个线程挂起，睡眠多少时间后通过硬件定时器将其唤醒（注：延时 ns 并不是真的能准确的延时这么多，而是在保证性能的情况下尽可能的延时） - -- rt_ktime_hrtimer_sleep：单位为 cputimer 的 tick 值 -- rt_ktime_hrtimer_ndelay：单位为 ns -- rt_ktime_hrtimer_udelay：单位为 us -- rt_ktime_hrtimer_mdelay：单位为 ms - -#### 3.3.1、定时器 - -hrtimer 还提供了一套 rt_timer 风格的 api - -- rt_ktime_hrtimer_init -- rt_ktime_hrtimer_delete -- rt_ktime_hrtimer_start -- rt_ktime_hrtimer_stop -- rt_ktime_hrtimer_control -- rt_ktime_hrtimer_detach - -需要注意，此定时器回调函数依旧处于中断之中，不能做一些耗时的任务 - -## 5、联系方式 - -- 维护：xqyjlj -- 主页：https://github.com/xqyjlj diff --git a/components/drivers/ktime/SConscript b/components/drivers/ktime/SConscript deleted file mode 100644 index 20a02957191..00000000000 --- a/components/drivers/ktime/SConscript +++ /dev/null @@ -1,24 +0,0 @@ -import os -from building import * - -Import('rtconfig') - -cwd = GetCurrentDir() - -src = Glob('src/*.c') -list = os.listdir(cwd + "/src") -if rtconfig.ARCH in list: - if os.path.exists(cwd + "/src/" + rtconfig.ARCH + "/" + rtconfig.CPU): - src += Glob("src/" + rtconfig.ARCH + "/" + rtconfig.CPU + "/*.c") - else: - src += Glob("src/" + rtconfig.ARCH + "/*.c") -CPPPATH = [cwd, cwd + "/inc"] -LOCAL_CCFLAGS = '' -if rtconfig.PLATFORM in ['gcc', 'armclang']: - LOCAL_CCFLAGS += ' -std=gnu99' -elif rtconfig.PLATFORM in ['armcc']: - LOCAL_CCFLAGS += ' --c99 --gnu' - -group = DefineGroup('DeviceDrivers', src, depend=['RT_USING_KTIME'], CPPPATH=CPPPATH, LOCAL_CCFLAGS = LOCAL_CCFLAGS) - -Return('group') diff --git a/components/drivers/ktime/inc/ktime.h b/components/drivers/ktime/inc/ktime.h deleted file mode 100644 index a430f85a175..00000000000 --- a/components/drivers/ktime/inc/ktime.h +++ /dev/null @@ -1,169 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2023-07-10 xqyjlj The first version. - * 2024-04-26 Shell Improve ipc performance - */ - -#ifndef __KTIME_H__ -#define __KTIME_H__ - -#include -#include -#include - -#include "rtthread.h" - -#define RT_KTIME_RESMUL (1000000ULL) - -struct rt_ktime_hrtimer -{ - rt_uint8_t flag; /**< compatible to tick timer's flag */ - char name[RT_NAME_MAX]; - rt_list_t node; - void *parameter; - unsigned long delay_cnt; - unsigned long timeout_cnt; - rt_err_t error; - struct rt_completion completion; - void (*timeout_func)(void *parameter); -}; -typedef struct rt_ktime_hrtimer *rt_ktime_hrtimer_t; - -/** - * @brief Get boottime with us precision - * - * @param tv: timeval - * @return rt_err_t - */ -rt_err_t rt_ktime_boottime_get_us(struct timeval *tv); - -/** - * @brief Get boottime with s precision - * - * @param t: time_t - * @return rt_err_t - */ -rt_err_t rt_ktime_boottime_get_s(time_t *t); - -/** - * @brief Get boottime with ns precision - * - * @param ts: timespec - * @return rt_err_t - */ -rt_err_t rt_ktime_boottime_get_ns(struct timespec *ts); - -/** - * @brief Get cputimer resolution - * - * @return (resolution * RT_KTIME_RESMUL) - */ -rt_uint64_t rt_ktime_cputimer_getres(void); - -/** - * @brief Get cputimer frequency - * - * @return frequency - */ -unsigned long rt_ktime_cputimer_getfrq(void); - -/** - * @brief Get cputimer the value of the cnt counter - * - * @return cnt - */ -unsigned long rt_ktime_cputimer_getcnt(void); - -/** - * @brief Init cputimer - * - */ -void rt_ktime_cputimer_init(void); - -/** - * @brief Get hrtimer resolution - * - * @return (resolution * RT_KTIME_RESMUL) - */ -rt_uint64_t rt_ktime_hrtimer_getres(void); - -/** - * @brief Get hrtimer frequency - * - * @return frequency - */ -unsigned long rt_ktime_hrtimer_getfrq(void); - -/** - * @brief set hrtimer interrupt timeout count (cnt), you should re-implemented it in hrtimer device driver - * - * @param cnt: hrtimer requires a timing cnt value - * @return rt_err_t - */ -rt_err_t rt_ktime_hrtimer_settimeout(unsigned long cnt); - -/** - * @brief called in hrtimer device driver isr routinue, it will process the timeouts - */ -void rt_ktime_hrtimer_process(void); - -void rt_ktime_hrtimer_init(rt_ktime_hrtimer_t timer, - const char *name, - rt_uint8_t flag, - void (*timeout)(void *parameter), - void *parameter); -rt_err_t rt_ktime_hrtimer_start(rt_ktime_hrtimer_t timer, unsigned long cnt); -rt_err_t rt_ktime_hrtimer_stop(rt_ktime_hrtimer_t timer); -rt_err_t rt_ktime_hrtimer_control(rt_ktime_hrtimer_t timer, int cmd, void *arg); -rt_err_t rt_ktime_hrtimer_detach(rt_ktime_hrtimer_t timer); - -rt_inline void rt_ktime_hrtimer_keep_errno(rt_ktime_hrtimer_t timer, rt_err_t err) -{ - RT_ASSERT(timer != RT_NULL); - - timer->error = err; - rt_set_errno(-err); -} - -void rt_ktime_hrtimer_delay_init(struct rt_ktime_hrtimer *timer); -void rt_ktime_hrtimer_delay_detach(struct rt_ktime_hrtimer *timer); -void rt_ktime_hrtimer_process(void); - -/** - * @brief sleep by the cputimer cnt value - * - * @param cnt: the cputimer cnt value - * @return rt_err_t - */ -rt_err_t rt_ktime_hrtimer_sleep(struct rt_ktime_hrtimer *timer, unsigned long cnt); - -/** - * @brief sleep by ns - * - * @param ns: ns - * @return rt_err_t - */ -rt_err_t rt_ktime_hrtimer_ndelay(struct rt_ktime_hrtimer *timer, unsigned long ns); - -/** - * @brief sleep by us - * - * @param us: us - * @return rt_err_t - */ -rt_err_t rt_ktime_hrtimer_udelay(struct rt_ktime_hrtimer *timer, unsigned long us); - -/** - * @brief sleep by ms - * - * @param ms: ms - * @return rt_err_t - */ -rt_err_t rt_ktime_hrtimer_mdelay(struct rt_ktime_hrtimer *timer, unsigned long ms); - -#endif diff --git a/components/drivers/ktime/src/aarch64/cputimer.c b/components/drivers/ktime/src/aarch64/cputimer.c deleted file mode 100644 index 005848eccdc..00000000000 --- a/components/drivers/ktime/src/aarch64/cputimer.c +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2023-07-10 xqyjlj The first version. - */ - -#include "gtimer.h" -#include "ktime.h" - -static volatile unsigned long _init_cnt = 0; - -rt_uint64_t rt_ktime_cputimer_getres(void) -{ - return ((1000ULL * 1000 * 1000) * RT_KTIME_RESMUL) / rt_hw_get_gtimer_frq(); -} - -unsigned long rt_ktime_cputimer_getfrq(void) -{ - return rt_hw_get_gtimer_frq(); -} - -unsigned long rt_ktime_cputimer_getcnt(void) -{ - return rt_hw_get_cntpct_val() - _init_cnt; -} - -void rt_ktime_cputimer_init(void) -{ - _init_cnt = rt_hw_get_cntpct_val(); -} diff --git a/components/drivers/ktime/src/boottime.c b/components/drivers/ktime/src/boottime.c deleted file mode 100644 index 8e69141b68d..00000000000 --- a/components/drivers/ktime/src/boottime.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2023-07-10 xqyjlj The first version. - */ - -#include "ktime.h" - -#define __KTIME_MUL ((1000ULL * 1000 * 1000) / RT_TICK_PER_SECOND) - -rt_weak rt_err_t rt_ktime_boottime_get_us(struct timeval *tv) -{ - RT_ASSERT(tv != RT_NULL); - - rt_uint64_t ns = (rt_ktime_cputimer_getcnt() * rt_ktime_cputimer_getres()) / RT_KTIME_RESMUL; - - tv->tv_sec = ns / (1000ULL * 1000 * 1000); - tv->tv_usec = (ns % (1000ULL * 1000 * 1000)) / 1000; - - return RT_EOK; -} - -rt_weak rt_err_t rt_ktime_boottime_get_s(time_t *t) -{ - RT_ASSERT(t != RT_NULL); - - rt_uint64_t ns = (rt_ktime_cputimer_getcnt() * rt_ktime_cputimer_getres()) / RT_KTIME_RESMUL; - - *t = ns / (1000ULL * 1000 * 1000); - - return RT_EOK; -} - -rt_weak rt_err_t rt_ktime_boottime_get_ns(struct timespec *ts) -{ - RT_ASSERT(ts != RT_NULL); - - rt_uint64_t ns = (rt_ktime_cputimer_getcnt() * rt_ktime_cputimer_getres()) / RT_KTIME_RESMUL; - - ts->tv_sec = ns / (1000ULL * 1000 * 1000); - ts->tv_nsec = ns % (1000ULL * 1000 * 1000); - - return RT_EOK; -} diff --git a/components/drivers/ktime/src/cputimer.c b/components/drivers/ktime/src/cputimer.c deleted file mode 100644 index ee19b236dc6..00000000000 --- a/components/drivers/ktime/src/cputimer.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2023-07-10 xqyjlj The first version. - */ - -#include "ktime.h" - -rt_weak rt_uint64_t rt_ktime_cputimer_getres(void) -{ - return ((1000ULL * 1000 * 1000) * RT_KTIME_RESMUL) / RT_TICK_PER_SECOND; -} - -rt_weak unsigned long rt_ktime_cputimer_getfrq(void) -{ - return RT_TICK_PER_SECOND; -} - -rt_weak unsigned long rt_ktime_cputimer_getcnt(void) -{ - return rt_tick_get(); -} - -rt_weak void rt_ktime_cputimer_init(void) -{ - return; -} diff --git a/components/drivers/ktime/src/risc-v/virt64/cputimer.c b/components/drivers/ktime/src/risc-v/virt64/cputimer.c deleted file mode 100644 index 70c133aa2e7..00000000000 --- a/components/drivers/ktime/src/risc-v/virt64/cputimer.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * Copyright (c) 2006-2023, RT-Thread Development Team - * - * SPDX-License-Identifier: Apache-2.0 - * - * Change Logs: - * Date Author Notes - * 2023-07-10 xqyjlj The first version. - */ - -#include "ktime.h" - -static volatile unsigned long _init_cnt = 0; - -rt_uint64_t rt_ktime_cputimer_getres(void) -{ - return ((1000ULL * 1000 * 1000) * RT_KTIME_RESMUL) / CPUTIME_TIMER_FREQ; -} - -unsigned long rt_ktime_cputimer_getfrq(void) -{ - return CPUTIME_TIMER_FREQ; -} - -unsigned long rt_ktime_cputimer_getcnt(void) -{ - unsigned long time_elapsed; - __asm__ __volatile__("rdtime %0" : "=r"(time_elapsed)); - return time_elapsed - _init_cnt; -} - -void rt_ktime_cputimer_init(void) -{ - __asm__ __volatile__("rdtime %0" : "=r"(_init_cnt)); -} diff --git a/components/drivers/pic/Kconfig b/components/drivers/pic/Kconfig index 448818fab7c..e2c05685a6f 100755 --- a/components/drivers/pic/Kconfig +++ b/components/drivers/pic/Kconfig @@ -8,7 +8,7 @@ menuconfig RT_USING_PIC config RT_USING_PIC_STATISTICS bool "Enable ISR execution time statistics" depends on RT_USING_PIC - depends on RT_USING_KTIME + depends on RT_USING_CLOCK_TIME depends on RT_USING_INTERRUPT_INFO default n diff --git a/components/drivers/pic/pic.c b/components/drivers/pic/pic.c index 423846c6e77..f3850ebd484 100644 --- a/components/drivers/pic/pic.c +++ b/components/drivers/pic/pic.c @@ -17,7 +17,7 @@ #include #ifdef RT_USING_PIC_STATISTICS -#include +#include #endif struct irq_traps @@ -553,7 +553,7 @@ rt_err_t rt_pic_handle_isr(struct rt_pic_irq *pirq) RT_ASSERT(pirq->pic != RT_NULL); #ifdef RT_USING_PIC_STATISTICS - rt_ktime_boottime_get_ns(&ts); + rt_clock_boottime_get_ns(&ts); current_irq_begin = ts.tv_sec * (1000UL * 1000 * 1000) + ts.tv_nsec; #endif @@ -614,7 +614,7 @@ rt_err_t rt_pic_handle_isr(struct rt_pic_irq *pirq) } #ifdef RT_USING_PIC_STATISTICS - rt_ktime_boottime_get_ns(&ts); + rt_clock_boottime_get_ns(&ts); irq_time_ns = ts.tv_sec * (1000UL * 1000 * 1000) + ts.tv_nsec - current_irq_begin; pirq->stat.sum_irq_time_ns += irq_time_ns; if (irq_time_ns < pirq->stat.min_irq_time_ns || pirq->stat.min_irq_time_ns == 0) diff --git a/components/drivers/rtc/dev_soft_rtc.c b/components/drivers/rtc/dev_soft_rtc.c index 3f85709e56d..5f8489158f1 100644 --- a/components/drivers/rtc/dev_soft_rtc.c +++ b/components/drivers/rtc/dev_soft_rtc.c @@ -13,8 +13,8 @@ #include #include -#ifdef RT_USING_KTIME -#include +#ifdef RT_USING_CLOCK_TIME +#include #endif #ifdef RT_USING_SOFT_RTC @@ -46,7 +46,7 @@ static struct rt_device soft_rtc_dev; static RT_DEFINE_SPINLOCK(_spinlock); /* RTC time baseline for calculation */ static struct timespec base_ts = { 0 }; -#ifdef RT_USING_KTIME +#ifdef RT_USING_CLOCK_TIME static struct timespec base_ktime_ts = { 0 }; #else static rt_tick_t base_tick; @@ -111,8 +111,8 @@ static void set_rtc_time(struct timespec *ts) rt_base_t level = rt_spin_lock_irqsave(&_spinlock); base_ts.tv_sec = ts->tv_sec; base_ts.tv_nsec = ts->tv_nsec; -#ifdef RT_USING_KTIME - rt_ktime_boottime_get_ns(&base_ktime_ts); +#ifdef RT_USING_CLOCK_TIME + rt_clock_boottime_get_ns(&base_ktime_ts); #else base_tick = rt_tick_get(); #endif @@ -140,9 +140,9 @@ static void get_rtc_time(struct timespec *ts) return; level = rt_spin_lock_irqsave(&_spinlock); -#ifdef RT_USING_KTIME +#ifdef RT_USING_CLOCK_TIME struct timespec current_ts; - rt_ktime_boottime_get_ns(¤t_ts); + rt_clock_boottime_get_ns(¤t_ts); ts->tv_sec = base_ts.tv_sec + (current_ts.tv_sec - base_ktime_ts.tv_sec); ts->tv_nsec = base_ts.tv_nsec + (current_ts.tv_nsec - base_ktime_ts.tv_nsec); @@ -256,8 +256,8 @@ static rt_err_t soft_rtc_control(rt_device_t dev, int cmd, void *args) ts = (struct timespec *)args; level = rt_spin_lock_irqsave(&_spinlock); ts->tv_sec = 0; -#ifdef RT_USING_KTIME - ts->tv_nsec = (rt_ktime_cputimer_getres() / RT_KTIME_RESMUL); +#ifdef RT_USING_CLOCK_TIME + ts->tv_nsec = (rt_clock_time_get_res_scaled() / RT_CLOCK_TIME_RESMUL); #else ts->tv_nsec = (1000UL * 1000 * 1000) / RT_TICK_PER_SECOND; #endif @@ -314,8 +314,8 @@ static int rt_soft_rtc_init(void) RT_TIMER_FLAG_SOFT_TIMER | RT_TIMER_FLAG_ONE_SHOT); #endif -#ifdef RT_USING_KTIME - rt_ktime_boottime_get_ns(&base_ktime_ts); +#ifdef RT_USING_CLOCK_TIME + rt_clock_boottime_get_ns(&base_ktime_ts); #else base_tick = rt_tick_get(); #endif diff --git a/components/libc/compilers/common/ctime.c b/components/libc/compilers/common/ctime.c index 159667bbcfa..a855707b85d 100644 --- a/components/libc/compilers/common/ctime.c +++ b/components/libc/compilers/common/ctime.c @@ -42,8 +42,8 @@ #ifdef RT_USING_POSIX_DELAY #include #endif -#ifdef RT_USING_KTIME -#include +#ifdef RT_USING_CLOCK_TIME +#include #endif #define DBG_TAG "time" @@ -535,14 +535,14 @@ int settimeofday(const struct timeval *tv, const struct timezone *tz) } RTM_EXPORT(settimeofday); -#if defined(RT_USING_POSIX_DELAY) && defined(RT_USING_KTIME) +#if defined(RT_USING_POSIX_DELAY) && defined(RT_USING_CLOCK_TIME) int nanosleep(const struct timespec *rqtp, struct timespec *rmtp) { struct timespec old_ts = {0}; struct timespec new_ts = {0}; - struct rt_ktime_hrtimer timer; + struct rt_clock_hrtimer timer; - rt_ktime_hrtimer_delay_init(&timer); + rt_clock_hrtimer_delay_init(&timer); if (rqtp == RT_NULL) { @@ -556,14 +556,14 @@ int nanosleep(const struct timespec *rqtp, struct timespec *rmtp) return -1; } unsigned long ns = rqtp->tv_sec * NANOSECOND_PER_SECOND + rqtp->tv_nsec; - rt_ktime_boottime_get_ns(&old_ts); - rt_ktime_hrtimer_ndelay(&timer, ns); + rt_clock_boottime_get_ns(&old_ts); + rt_clock_hrtimer_ndelay(&timer, ns); if (rt_get_errno() == RT_EINTR) { if (rmtp) { rt_base_t rsec, rnsec; - rt_ktime_boottime_get_ns(&new_ts); + rt_clock_boottime_get_ns(&new_ts); rsec = old_ts.tv_sec + rqtp->tv_sec - new_ts.tv_sec; rnsec = old_ts.tv_nsec + rqtp->tv_nsec - new_ts.tv_nsec; @@ -579,18 +579,18 @@ int nanosleep(const struct timespec *rqtp, struct timespec *rmtp) } } - rt_ktime_hrtimer_delay_detach(&timer); + rt_clock_hrtimer_delay_detach(&timer); rt_set_errno(EINTR); return -1; } - rt_ktime_hrtimer_delay_detach(&timer); + rt_clock_hrtimer_delay_detach(&timer); return 0; } RTM_EXPORT(nanosleep); -#endif /* RT_USING_POSIX_DELAY && RT_USING_KTIME */ +#endif /* RT_USING_POSIX_DELAY && RT_USING_CLOCK_TIME */ -#if defined(RT_USING_POSIX_CLOCK) && defined(RT_USING_KTIME) +#if defined(RT_USING_POSIX_CLOCK) && defined(RT_USING_CLOCK_TIME) int clock_getres(clockid_t clockid, struct timespec *res) { @@ -608,14 +608,14 @@ int clock_getres(clockid_t clockid, struct timespec *res) return _control_rtc(RT_DEVICE_CTRL_RTC_GET_TIMERES, res); #endif /* RT_USING_RTC */ - case CLOCK_MONOTONIC: // use cputimer + case CLOCK_MONOTONIC: // use clock_time counter case CLOCK_MONOTONIC_COARSE: case CLOCK_MONOTONIC_RAW: case CLOCK_BOOTTIME: case CLOCK_PROCESS_CPUTIME_ID: case CLOCK_THREAD_CPUTIME_ID: res->tv_sec = 0; - res->tv_nsec = (rt_ktime_cputimer_getres() / RT_KTIME_RESMUL); + res->tv_nsec = (rt_clock_time_get_res_scaled() / RT_CLOCK_TIME_RESMUL); return 0; default: @@ -645,11 +645,11 @@ int clock_gettime(clockid_t clockid, struct timespec *tp) case CLOCK_MONOTONIC_COARSE: case CLOCK_MONOTONIC_RAW: case CLOCK_BOOTTIME: - return rt_ktime_boottime_get_ns(tp); + return rt_clock_boottime_get_ns(tp); case CLOCK_PROCESS_CPUTIME_ID: case CLOCK_THREAD_CPUTIME_ID: - return rt_ktime_boottime_get_ns(tp); // TODO not yet implemented + return rt_clock_boottime_get_ns(tp); // TODO not yet implemented default: tp->tv_sec = 0; @@ -689,7 +689,7 @@ int clock_nanosleep(clockid_t clockid, int flags, const struct timespec *rqtp, s case CLOCK_MONOTONIC: // use boottime case CLOCK_PROCESS_CPUTIME_ID: if (flags & TIMER_ABSTIME) - err = rt_ktime_boottime_get_ns(&ts); + err = rt_clock_boottime_get_ns(&ts); break; default: @@ -789,9 +789,9 @@ int rt_timespec_to_tick(const struct timespec *time) } RTM_EXPORT(rt_timespec_to_tick); -#endif /* RT_USING_POSIX_CLOCK && RT_USING_KTIME */ +#endif /* RT_USING_POSIX_CLOCK && RT_USING_CLOCK_TIME */ -#if defined(RT_USING_POSIX_TIMER) && defined(RT_USING_KTIME) +#if defined(RT_USING_POSIX_TIMER) && defined(RT_USING_CLOCK_TIME) #include @@ -800,7 +800,7 @@ RTM_EXPORT(rt_timespec_to_tick); struct timer_obj { - struct rt_ktime_hrtimer hrtimer; + struct rt_clock_hrtimer hrtimer; void (*sigev_notify_func)(union sigval val); union sigval val; struct timespec interval; /* Reload value */ @@ -895,11 +895,11 @@ static void rtthread_timer_wrapper(void *timerobj) timer->status = NOT_ACTIVE; } - timer->reload = ((timer->interval.tv_sec * NANOSECOND_PER_SECOND + timer->interval.tv_nsec) * RT_KTIME_RESMUL) / - rt_ktime_cputimer_getres(); + timer->reload = ((timer->interval.tv_sec * NANOSECOND_PER_SECOND + timer->interval.tv_nsec) * RT_CLOCK_TIME_RESMUL) / + rt_clock_time_get_res_scaled(); if (timer->reload) { - rt_ktime_hrtimer_start(&timer->hrtimer, timer->reload); + rt_clock_hrtimer_start(&timer->hrtimer, timer->reload); } #ifdef RT_USING_SMART /* this field is named as tid in musl */ @@ -1020,7 +1020,7 @@ int timer_create(clockid_t clockid, struct sigevent *evp, timer_t *timerid) timer->status = NOT_ACTIVE; timer->clockid = clockid; - rt_ktime_hrtimer_init(&timer->hrtimer, timername, RT_TIMER_FLAG_ONE_SHOT | RT_TIMER_FLAG_HARD_TIMER, + rt_clock_hrtimer_init(&timer->hrtimer, timername, RT_TIMER_FLAG_ONE_SHOT | RT_TIMER_FLAG_HARD_TIMER, rtthread_timer_wrapper, timer); _timerid = resource_id_get(&id_timer); @@ -1030,7 +1030,7 @@ int timer_create(clockid_t clockid, struct sigevent *evp, timer_t *timerid) rt_free(param); #endif /* RT_USING_SMART */ - rt_ktime_hrtimer_detach(&timer->hrtimer); + rt_clock_hrtimer_detach(&timer->hrtimer); rt_free(timer); rt_set_errno(ENOMEM); return -1; @@ -1082,9 +1082,9 @@ int timer_delete(timer_t timerid) if (timer->status == ACTIVE) { timer->status = NOT_ACTIVE; - rt_ktime_hrtimer_stop(&timer->hrtimer); + rt_clock_hrtimer_stop(&timer->hrtimer); } - rt_ktime_hrtimer_detach(&timer->hrtimer); + rt_clock_hrtimer_detach(&timer->hrtimer); #ifdef RT_USING_SMART if (timer->pid) @@ -1134,8 +1134,8 @@ int timer_gettime(timer_t timerid, struct itimerspec *its) if (timer->status == ACTIVE) { unsigned long remain_cnt; - rt_ktime_hrtimer_control(&timer->hrtimer, RT_TIMER_CTRL_GET_REMAIN_TIME, &remain_cnt); - nanoseconds = ((remain_cnt - rt_ktime_cputimer_getcnt()) * rt_ktime_cputimer_getres()) / RT_KTIME_RESMUL; + rt_clock_hrtimer_control(&timer->hrtimer, RT_TIMER_CTRL_GET_REMAIN_TIME, &remain_cnt); + nanoseconds = ((remain_cnt - rt_clock_time_get_counter()) * rt_clock_time_get_res_scaled()) / RT_CLOCK_TIME_RESMUL; seconds = nanoseconds / NANOSECOND_PER_SECOND; nanoseconds = nanoseconds % NANOSECOND_PER_SECOND; its->it_value.tv_sec = (rt_int32_t)seconds; @@ -1190,7 +1190,7 @@ int timer_settime(timer_t timerid, int flags, const struct itimerspec *value, { if (timer->status == ACTIVE) { - rt_ktime_hrtimer_stop(&timer->hrtimer); + rt_clock_hrtimer_stop(&timer->hrtimer); } timer->status = NOT_ACTIVE; @@ -1212,7 +1212,7 @@ int timer_settime(timer_t timerid, int flags, const struct itimerspec *value, case CLOCK_PROCESS_CPUTIME_ID: case CLOCK_THREAD_CPUTIME_ID: if (flags & TIMER_ABSTIME) - err = rt_ktime_boottime_get_ns(&ts); + err = rt_clock_boottime_get_ns(&ts); break; default: rt_set_errno(EINVAL); @@ -1227,8 +1227,8 @@ int timer_settime(timer_t timerid, int flags, const struct itimerspec *value, if (ns <= 0) return 0; - unsigned long res = rt_ktime_cputimer_getres(); - timer->reload = (ns * RT_KTIME_RESMUL) / res; + unsigned long res = rt_clock_time_get_res_scaled(); + timer->reload = (ns * RT_CLOCK_TIME_RESMUL) / res; timer->interval.tv_sec = value->it_interval.tv_sec; timer->interval.tv_nsec = value->it_interval.tv_nsec; timer->value.tv_sec = value->it_value.tv_sec; @@ -1236,18 +1236,18 @@ int timer_settime(timer_t timerid, int flags, const struct itimerspec *value, if (timer->status == ACTIVE) { - rt_ktime_hrtimer_stop(&timer->hrtimer); + rt_clock_hrtimer_stop(&timer->hrtimer); } timer->status = ACTIVE; if ((value->it_interval.tv_sec == 0) && (value->it_interval.tv_nsec == 0)) - rt_ktime_hrtimer_control(&timer->hrtimer, RT_TIMER_CTRL_SET_ONESHOT, RT_NULL); + rt_clock_hrtimer_control(&timer->hrtimer, RT_TIMER_CTRL_SET_ONESHOT, RT_NULL); else - rt_ktime_hrtimer_control(&timer->hrtimer, RT_TIMER_CTRL_SET_PERIODIC, RT_NULL); + rt_clock_hrtimer_control(&timer->hrtimer, RT_TIMER_CTRL_SET_PERIODIC, RT_NULL); - rt_ktime_hrtimer_start(&timer->hrtimer, timer->reload); + rt_clock_hrtimer_start(&timer->hrtimer, timer->reload); return 0; } RTM_EXPORT(timer_settime); -#endif /* RT_USING_POSIX_TIMER && RT_USING_KTIME */ +#endif /* RT_USING_POSIX_TIMER && RT_USING_CLOCK_TIME */ diff --git a/components/libc/posix/Kconfig b/components/libc/posix/Kconfig index 8a4a3843cbd..16f2eee8404 100644 --- a/components/libc/posix/Kconfig +++ b/components/libc/posix/Kconfig @@ -79,7 +79,7 @@ if RT_USING_POSIX_FS endif config RT_USING_POSIX_DELAY - select RT_USING_KTIME + select RT_USING_CLOCK_TIME bool "Enable delay APIs, sleep()/usleep()/msleep() etc" default n @@ -89,7 +89,7 @@ config RT_USING_POSIX_CLOCK default n config RT_USING_POSIX_TIMER - select RT_USING_KTIME + select RT_USING_CLOCK_TIME select RT_USING_RESOURCE_ID bool "Enable timer APIs, timer_create()/timer_gettime() etc" default n diff --git a/components/lwp/arch/aarch64/common/vdso_data.c b/components/lwp/arch/aarch64/common/vdso_data.c index 13c055ec56d..b33094db9db 100644 --- a/components/lwp/arch/aarch64/common/vdso_data.c +++ b/components/lwp/arch/aarch64/common/vdso_data.c @@ -10,7 +10,7 @@ #include #include -#include +#include #include #include #include @@ -23,11 +23,11 @@ void rt_vdso_update_glob_time(void) rt_vdso_write_begin(vdata); vdso_ts = &vdata[CS_HRES_COARSE].basetime[CLOCK_REALTIME]; - rt_ktime_boottime_get_ns(vdso_ts); + rt_clock_boottime_get_ns(vdso_ts); vdso_ts->tv_sec = initdata + vdso_ts->tv_sec; vdso_ts = &vdata[CS_HRES_COARSE].basetime[CLOCK_MONOTONIC]; - rt_ktime_boottime_get_ns(vdso_ts); + rt_clock_boottime_get_ns(vdso_ts); vdata->cycle_last = rt_hw_get_cntpct_val(); rt_vdso_write_end(vdata); diff --git a/components/lwp/arch/risc-v/common/vdso_data.c b/components/lwp/arch/risc-v/common/vdso_data.c index e31305af8f1..b457c1f7eec 100644 --- a/components/lwp/arch/risc-v/common/vdso_data.c +++ b/components/lwp/arch/risc-v/common/vdso_data.c @@ -9,7 +9,7 @@ */ #include -#include +#include #include #include #include @@ -23,11 +23,11 @@ void rt_vdso_update_glob_time(void) rt_vdso_write_begin(vdata); vdso_ts = &vdata[CS_HRES_COARSE].basetime[CLOCK_REALTIME]; - rt_ktime_boottime_get_ns(vdso_ts); + rt_clock_boottime_get_ns(vdso_ts); vdso_ts->tv_sec = initdata + vdso_ts->tv_sec; vdso_ts = &vdata[CS_HRES_COARSE].basetime[CLOCK_MONOTONIC]; - rt_ktime_boottime_get_ns(vdso_ts); + rt_clock_boottime_get_ns(vdso_ts); vdata->cycle_last = rdtime(); rt_vdso_write_end(vdata); diff --git a/documentation/6.components/device-driver/INDEX.md b/documentation/6.components/device-driver/INDEX.md index b8600c9e79a..f29dc0c9d77 100644 --- a/documentation/6.components/device-driver/INDEX.md +++ b/documentation/6.components/device-driver/INDEX.md @@ -8,7 +8,7 @@ - @subpage page_device_spi - @subpage page_device_pwm - @subpage page_device_rtc -- @subpage page_device_hwtimer +- @subpage page_device_clock_timer - @subpage page_device_watchdog - @subpage page_device_wlan - @subpage page_device_sensor diff --git a/documentation/6.components/device-driver/hwtimer/hwtimer.md b/documentation/6.components/device-driver/clock_timer/clock_timer.md similarity index 80% rename from documentation/6.components/device-driver/hwtimer/hwtimer.md rename to documentation/6.components/device-driver/clock_timer/clock_timer.md index 0e2e9767f73..4ed15d42628 100644 --- a/documentation/6.components/device-driver/hwtimer/hwtimer.md +++ b/documentation/6.components/device-driver/clock_timer/clock_timer.md @@ -1,4 +1,6 @@ -@page page_device_hwtimer HWTIMER Device +@page page_device_clock_timer CLOCK_TIMER Device + +> Note: CLOCK_TIMER is the unified hardware timer device under `clock_time`. # Introduction to the Timer @@ -42,10 +44,10 @@ rt_device_t rt_device_find(const char* name); In general, the hardware timer device name registered to the system is timer0, timer1, etc. The usage examples are as follows: ```c -#define HWTIMER_DEV_NAME "timer0" /* timer name */ +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ rt_device_t hw_dev; /* timer device handle */ /* find timer device */ -hw_dev = rt_device_find(HWTIMER_DEV_NAME); +hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); ``` ## Open Timer Device @@ -67,10 +69,10 @@ rt_err_t rt_device_open(rt_device_t dev, rt_uint16_t oflags); An example of use is as follows: ```c -#define HWTIMER_DEV_NAME "timer0" /* timer name */ +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ rt_device_t hw_dev; /* timer device handle */ /* find timer device */ -hw_dev = rt_device_find(HWTIMER_DEV_NAME); +hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); /* to open the timer device in read-write mode */ rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); ``` @@ -93,22 +95,22 @@ rt_err_t rt_device_set_rx_indicate(rt_device_t dev, rt_err_t (*rx_ind)(rt_device An example of use is as follows： ```c -#define HWTIMER_DEV_NAME "timer0" /* timer name */ +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ rt_device_t hw_dev; /* timer device handle */ /* timer timeout callback function */ static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) { - rt_kprintf("this is hwtimer timeout callback fucntion!\n"); + rt_kprintf("this is clock_timer timeout callback fucntion!\n"); rt_kprintf("tick is :%d !\n", rt_tick_get()); return 0; } -static int hwtimer_sample(int argc, char *argv[]) +static int clock_timer_sample(int argc, char *argv[]) { /* find timer device */ - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); /* open the device in read and write mode */ rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); /* set the timeout callback function */ @@ -138,53 +140,53 @@ The command control words available for the hardware timer device are as follows | **Control word** | Description | | ---------------------- | ------------------------ | -| HWTIMER_CTRL_FREQ_SET | set the counting frequency | -| HWTIMER_CTRL_STOP | stop the timer | -| HWTIMER_CTRL_INFO_GET | get timer feature information | -| HWTIMER_CTRL_MODE_SET | set timer mode | +| CLOCK_TIMER_CTRL_FREQ_SET | set the counting frequency | +| CLOCK_TIMER_CTRL_STOP | stop the timer | +| CLOCK_TIMER_CTRL_INFO_GET | get timer feature information | +| CLOCK_TIMER_CTRL_MODE_SET | set timer mode | -Get the timer parameter argument, which is a pointer to the structure struct rt_hwtimer_info, to save the obtained information. +Get the timer parameter argument, which is a pointer to the structure struct rt_clock_timer_info, to save the obtained information. >Setting frequency is valid only when the timer hardware and included driver set the counting frequency. Generally, the default frequency of the driving setting can be used. When setting the timer mode, the parameter argument can take the following values： ```c -HWTIMER_MODE_ONESHOT /* Single timing */ -HWTIMER_MODE_PERIOD /* Periodic timing */ +CLOCK_TIMER_MODE_ONESHOT /* Single timing */ +CLOCK_TIMER_MODE_PERIOD /* Periodic timing */ ``` An example of using the timer count frequency and timing mode is as follows: ```c -#define HWTIMER_DEV_NAME "timer0" /* timer name */ +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ rt_device_t hw_dev; /* timer device handle */ -rt_hwtimer_mode_t mode; /* timer mode */ +rt_clock_timer_mode_t mode; /* timer mode */ rt_uint32_t freq = 10000; /* couting frequency */ /* Timer timeout callback function */ static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) { - rt_kprintf("this is hwtimer timeout callback fucntion!\n"); + rt_kprintf("this is clock_timer timeout callback fucntion!\n"); rt_kprintf("tick is :%d !\n", rt_tick_get()); return 0; } -static int hwtimer_sample(int argc, char *argv[]) +static int clock_timer_sample(int argc, char *argv[]) { /* find timer device */ - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); /* open the device in read and write mode */ rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); /* Set the timeout callback function */ rt_device_set_rx_indicate(hw_dev, timeout_cb); /* Set the counting frequency (1Mhz or the supported minimum counting frequency by default) */ - rt_device_control(hw_dev, HWTIMER_CTRL_FREQ_SET, &freq); + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_FREQ_SET, &freq); /* Set the mode to periodic timer */ - mode = HWTIMER_MODE_PERIOD; - rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); } ``` @@ -209,41 +211,41 @@ rt_size_t rt_device_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_ The prototype of the timeout structure is shown below : ```c -typedef struct rt_hwtimerval +typedef struct rt_clock_timerval { rt_int32_t sec; /* second */ rt_int32_t usec; /* microsecond */ -} rt_hwtimerval_t; +} rt_clock_timerval_t; ``` An example of using the timer timeout value is as follows: ```c -#define HWTIMER_DEV_NAME "timer0" /* timer name */ +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ rt_device_t hw_dev; /* timer device handle */ -rt_hwtimer_mode_t mode; /* timer mode */ -rt_hwtimerval_t timeout_s; /* Timer timeout value */ +rt_clock_timer_mode_t mode; /* timer mode */ +rt_clock_timerval_t timeout_s; /* Timer timeout value */ /* Timer timeout callback function */ static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) { - rt_kprintf("this is hwtimer timeout callback fucntion!\n"); + rt_kprintf("this is clock_timer timeout callback fucntion!\n"); rt_kprintf("tick is :%d !\n", rt_tick_get()); return 0; } -static int hwtimer_sample(int argc, char *argv[]) +static int clock_timer_sample(int argc, char *argv[]) { /* find timer device */ - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); /* open the device in read-write mode */ rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); /* set the timeout callback function */ rt_device_set_rx_indicate(hw_dev, timeout_cb); /* set the mode as periodic timer */ - mode = HWTIMER_MODE_PERIOD; - rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); /* Set the timer timeout value to 5s and start the timer */ timeout_s.sec = 5; /* second */ @@ -273,7 +275,7 @@ rt_size_t rt_device_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t An example of use is shown below： ```c -rt_hwtimerval_t timeout_s; /* Used to save the time the timer has elapsed */ +rt_clock_timerval_t timeout_s; /* Used to save the time the timer has elapsed */ /* Read the elapsed time of the timer */ rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s)); ``` @@ -299,10 +301,10 @@ When a timer device has been used and is not necessary anymore, it should be clo An example of use is shown below： ```c -#define HWTIMER_DEV_NAME "timer0" /* timer name */ +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ rt_device_t hw_dev; /* timer device handle */ /* find timer device */ -hw_dev = rt_device_find(HWTIMER_DEV_NAME); +hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); ... ... rt_device_close(hw_dev); ``` @@ -321,38 +323,38 @@ The specific use of the hardware timer device can refer to the following sample ```c /* - * Program listing: This is an hwtimer device usage routine -  * The routine exports the hwtimer_sample command to the control terminal -  * Command call format: hwtimer_sample + * Program listing: This is an clock_timer device usage routine +  * The routine exports the clock_timer_sample command to the control terminal +  * Command call format: clock_timer_sample   * Program function: The hardware timer timeout callback function periodically prints the current tick value, and the difference between the two tick values is converted to the time equivalent to the timing time value. */ #include #include -#define HWTIMER_DEV_NAME "timer0" /* timer name */ +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ /* Timer timeout callback function */ static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) { - rt_kprintf("this is hwtimer timeout callback fucntion!\n"); + rt_kprintf("this is clock_timer timeout callback fucntion!\n"); rt_kprintf("tick is :%d !\n", rt_tick_get()); return 0; } -static int hwtimer_sample(int argc, char *argv[]) +static int clock_timer_sample(int argc, char *argv[]) { rt_err_t ret = RT_EOK; - rt_hwtimerval_t timeout_s; /* timer timeout value */ + rt_clock_timerval_t timeout_s; /* timer timeout value */ rt_device_t hw_dev = RT_NULL; /* timer device value */ - rt_hwtimer_mode_t mode; /* timer mode */ + rt_clock_timer_mode_t mode; /* timer mode */ /* find timer device */ - hw_dev = rt_device_find(HWTIMER_DEV_NAME); + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { - rt_kprintf("hwtimer sample run failed! can't find %s device!\n", HWTIMER_DEV_NAME); + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); return -RT_ERROR; } @@ -360,7 +362,7 @@ static int hwtimer_sample(int argc, char *argv[]) ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); if (ret != RT_EOK) { - rt_kprintf("open %s device failed!\n", HWTIMER_DEV_NAME); + rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME); return ret; } @@ -368,8 +370,8 @@ static int hwtimer_sample(int argc, char *argv[]) rt_device_set_rx_indicate(hw_dev, timeout_cb); /* Setting mode is periodic timer */ - mode = HWTIMER_MODE_PERIOD; - ret = rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); if (ret != RT_EOK) { rt_kprintf("set mode failed! ret is :%d\n", ret); @@ -396,5 +398,5 @@ static int hwtimer_sample(int argc, char *argv[]) return ret; } /* Export to the msh command list */ -MSH_CMD_EXPORT(hwtimer_sample, hwtimer sample); +MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample); ``` diff --git a/examples/test/hwtimer_test.c b/examples/test/clock_timer_test.c similarity index 80% rename from examples/test/hwtimer_test.c rename to examples/test/clock_timer_test.c index 08b0c5acaf4..f231682ffbd 100644 --- a/examples/test/hwtimer_test.c +++ b/examples/test/clock_timer_test.c @@ -11,7 +11,7 @@ #include #include -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME #define TIMER "timer0" @@ -22,13 +22,13 @@ static rt_err_t timer_timeout_cb(rt_device_t dev, rt_size_t size) return 0; } -int hwtimer(void) +int clock_timer(void) { rt_err_t err; - rt_hwtimerval_t val; + rt_clock_timerval_t val; rt_device_t dev = RT_NULL; rt_tick_t tick; - rt_hwtimer_mode_t mode; + rt_clock_timer_mode_t mode; int freq = 10000; int t = 5; @@ -46,7 +46,7 @@ int hwtimer(void) /* 时间测量 */ /* 计数时钟设置(默认1Mhz或支持的最小计数频率) */ - err = rt_device_control(dev, HWTIMER_CTRL_FREQ_SET, &freq); + err = rt_device_control(dev, CLOCK_TIMER_CTRL_FREQ_SET, &freq); if (err != RT_EOK) { rt_kprintf("Set Freq=%dhz Fail\n", freq); @@ -54,8 +54,8 @@ int hwtimer(void) } /* 周期模式 */ - mode = HWTIMER_MODE_PERIOD; - err = rt_device_control(dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + err = rt_device_control(dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); tick = rt_tick_get(); rt_kprintf("Start Timer> Tick: %d\n", tick); @@ -72,7 +72,7 @@ int hwtimer(void) rt_thread_delay(t*RT_TICK_PER_SECOND); /* 停止定时器 */ - err = rt_device_control(dev, HWTIMER_CTRL_STOP, RT_NULL); + err = rt_device_control(dev, CLOCK_TIMER_CTRL_STOP, RT_NULL); rt_kprintf("Timer Stoped\n"); /* 读取计数 */ rt_device_read(dev, 0, &val, sizeof(val)); @@ -83,8 +83,8 @@ int hwtimer(void) rt_device_set_rx_indicate(dev, timer_timeout_cb); /* 单次模式 */ - mode = HWTIMER_MODE_PERIOD; - err = rt_device_control(dev, HWTIMER_CTRL_MODE_SET, &mode); + mode = CLOCK_TIMER_MODE_PERIOD; + err = rt_device_control(dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); /* 设置定时器超时值并启动定时器 */ val.sec = t; @@ -106,6 +106,6 @@ int hwtimer(void) return err; } #ifdef RT_USING_FINSH -MSH_CMD_EXPORT(hwtimer, "Test hardware timer"); +MSH_CMD_EXPORT(clock_timer, "Test clock time timer"); #endif -#endif /* RT_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME */ diff --git a/libcpu/Kconfig b/libcpu/Kconfig index b089b61725c..22381a42fe7 100644 --- a/libcpu/Kconfig +++ b/libcpu/Kconfig @@ -264,7 +264,7 @@ if ARCH_RISCV64 config ARCH_USING_RISCV_COMMON64 bool depends on ARCH_RISCV64 - select RT_USING_CPUTIME + select RT_USING_CLOCK_TIME select ARCH_USING_NEW_CTX_SWITCH help Using the common64 implementation under ./libcpu/risc-v diff --git a/libcpu/aarch64/common/SConscript b/libcpu/aarch64/common/SConscript index 13e5f2fdb02..99645683b87 100644 --- a/libcpu/aarch64/common/SConscript +++ b/libcpu/aarch64/common/SConscript @@ -21,7 +21,7 @@ if GetDepend('RT_USING_OFW') == False: if GetDepend('RT_USING_PIC') == True: SrcRemove(src, ['gicv3.c', 'gic.c', 'gtimer.c', 'interrupt.c']) -if GetDepend('RT_HWTIMER_ARM_ARCH') == True: +if GetDepend('RT_CLOCK_TIME_ARM_ARCH') == True: SrcRemove(src, ['gtimer.c']) group = DefineGroup('CPU', src, depend = [''], CPPPATH = CPPPATH) diff --git a/libcpu/aarch64/common/gtimer.c b/libcpu/aarch64/common/gtimer.c index 514ec4e0436..46ce287aebb 100644 --- a/libcpu/aarch64/common/gtimer.c +++ b/libcpu/aarch64/common/gtimer.c @@ -13,8 +13,8 @@ #include #include -#ifdef RT_USING_KTIME -#include +#ifdef RT_USING_CLOCK_TIME +#include #endif #define EL1_PHY_TIMER_IRQ_NUM 30 @@ -42,8 +42,8 @@ void rt_hw_gtimer_local_enable(void) rt_hw_gtimer_disable(); rt_hw_set_gtimer_val(timer_step); rt_hw_interrupt_umask(EL1_PHY_TIMER_IRQ_NUM); -#ifdef RT_USING_KTIME - rt_ktime_cputimer_init(); +#ifdef RT_USING_CLOCK_TIME + rt_clock_time_source_init(); #endif rt_hw_gtimer_enable(); } diff --git a/libcpu/aarch64/common/setup.c b/libcpu/aarch64/common/setup.c index 21091791342..79df36ec5be 100644 --- a/libcpu/aarch64/common/setup.c +++ b/libcpu/aarch64/common/setup.c @@ -72,7 +72,7 @@ void rt_hw_fdt_install_early(void *fdt) #endif } -#ifdef RT_USING_HWTIMER +#ifdef RT_USING_CLOCK_TIME static rt_ubase_t loops_per_tick[RT_CPUS_NR]; static rt_ubase_t cpu_get_cycles(void) @@ -132,7 +132,7 @@ static void cpu_us_delay(rt_uint32_t us) rt_hw_cpu_relax(); } } -#endif /* RT_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME */ rt_weak void rt_hw_idle_wfi(void) { @@ -188,14 +188,14 @@ rt_inline void cpu_info_init(void) rt_hw_cpu_dcache_ops(RT_HW_CACHE_FLUSH, rt_cpu_mpidr_table, sizeof(rt_cpu_mpidr_table)); -#ifdef RT_USING_HWTIMER +#if defined(RT_USING_CLOCK_TIME) && defined(RT_USING_DM) cpu_loops_per_tick_init(); - if (!rt_device_hwtimer_us_delay) + if (!rt_clock_timer_us_delay) { - rt_device_hwtimer_us_delay = &cpu_us_delay; + rt_clock_timer_us_delay = &cpu_us_delay; } -#endif /* RT_USING_HWTIMER */ +#endif /* RT_USING_CLOCK_TIME && RT_USING_DM */ } rt_inline rt_size_t string_to_size(const char *string, const char *who) @@ -382,10 +382,10 @@ void rt_hw_common_setup(void) rt_hw_uart_init(); #endif -#ifndef RT_HWTIMER_ARM_ARCH +#ifndef RT_CLOCK_TIME_ARM_ARCH /* initialize timer for os tick */ rt_hw_gtimer_init(); -#endif /* !RT_HWTIMER_ARM_ARCH */ +#endif /* !RT_CLOCK_TIME_ARM_ARCH */ #ifdef RT_USING_COMPONENTS_INIT rt_components_board_init(); @@ -478,10 +478,10 @@ rt_weak void rt_hw_secondary_cpu_bsp_start(void) #endif /* BSP_USING_GICV3 */ #endif -#ifndef RT_HWTIMER_ARM_ARCH +#ifndef RT_CLOCK_TIME_ARM_ARCH /* initialize timer for os tick */ rt_hw_gtimer_local_enable(); -#endif /* !RT_HWTIMER_ARM_ARCH */ +#endif /* !RT_CLOCK_TIME_ARM_ARCH */ rt_dm_secondary_cpu_init(); @@ -491,8 +491,8 @@ rt_weak void rt_hw_secondary_cpu_bsp_start(void) LOG_I("Call cpu %d on %s", cpu_id, "success"); -#ifdef RT_USING_HWTIMER - if (rt_device_hwtimer_us_delay == &cpu_us_delay) +#if defined(RT_USING_CLOCK_TIME) && defined(RT_USING_DM) + if (rt_clock_timer_us_delay == &cpu_us_delay) { cpu_loops_per_tick_init(); } diff --git a/libcpu/risc-v/common64/tick.c b/libcpu/risc-v/common64/tick.c index 8e8ff86a748..758f0a7759a 100644 --- a/libcpu/risc-v/common64/tick.c +++ b/libcpu/risc-v/common64/tick.c @@ -6,49 +6,53 @@ * Change Logs: * Date Author Notes * 2018/10/28 Bernard The unify RISC-V porting code. - * 2024/07/08 Shell Using CPUTIME as tick + * 2024/07/08 Shell Using clock_time as tick */ #include #include -#include #include #include "sbi.h" -#ifdef RT_USING_KTIME -#include +#ifdef RT_USING_CLOCK_TIME +#include #endif static volatile unsigned long tick_cycles = 0; +static rt_uint64_t _riscv_read_time(void) +{ + unsigned long time_elapsed; + + __asm__ __volatile__("rdtime %0" : "=r"(time_elapsed)); + return (rt_uint64_t)time_elapsed; +} + int tick_isr(void) { rt_tick_increase(); - sbi_set_timer(clock_cpu_gettime() + tick_cycles); + sbi_set_timer(_riscv_read_time() + tick_cycles); return 0; } /* BSP should config clockbase frequency */ -RT_STATIC_ASSERT(defined_clockbase_freq, CPUTIME_TIMER_FREQ != 0); +RT_STATIC_ASSERT(defined_clockbase_freq, CLOCK_TIMER_FREQ != 0); /* Sets and enable the timer interrupt */ int rt_hw_tick_init(void) { /* calculate the tick cycles */ - tick_cycles = CPUTIME_TIMER_FREQ / RT_TICK_PER_SECOND; + tick_cycles = CLOCK_TIMER_FREQ / RT_TICK_PER_SECOND; /* Clear the Supervisor-Timer bit in SIE */ clear_csr(sie, SIP_STIP); - /* Init riscv timer */ - riscv_cputime_init(); - /* Set timer */ - sbi_set_timer(clock_cpu_gettime() + tick_cycles); + sbi_set_timer(_riscv_read_time() + tick_cycles); -#ifdef RT_USING_KTIME - rt_ktime_cputimer_init(); +#ifdef RT_USING_CLOCK_TIME + rt_clock_time_source_init(); #endif /* Enable the Supervisor-Timer bit in SIE */ set_csr(sie, SIP_STIP); @@ -67,10 +71,10 @@ void rt_hw_us_delay(rt_uint32_t us) unsigned long end_time; unsigned long run_time; - start_time = clock_cpu_gettime(); - end_time = start_time + us * (CPUTIME_TIMER_FREQ / 1000000); + start_time = _riscv_read_time(); + end_time = start_time + us * (CLOCK_TIMER_FREQ / 1000000); do { - run_time = clock_cpu_gettime(); + run_time = _riscv_read_time(); } while(run_time < end_time); } diff --git a/src/Kconfig b/src/Kconfig index efb21f27528..f57b305ca23 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -41,7 +41,7 @@ config RT_USING_SMART select RT_USING_POSIX_CLOCK select RT_USING_POSIX_FS select RT_USING_POSIX_TERMIOS - select RT_USING_KTIME + select RT_USING_CLOCK_TIME select RT_USING_STDC_ATOMIC select RT_USING_SYSTEM_WORKQUEUE select RT_USING_CPU_USAGE_TRACER diff --git a/src/utest/perf/Kconfig b/src/utest/perf/Kconfig index fe6ee640ce0..9425c7b4563 100644 --- a/src/utest/perf/Kconfig +++ b/src/utest/perf/Kconfig @@ -7,9 +7,9 @@ config RT_UTEST_SYS_PERF_TC_COUNT default 1000 depends on RT_UTEST_SYS_PERF -config RT_UTEST_HWTIMER_DEV_NAME - string "PerfTest: Hardware timer device name" +config RT_UTEST_CLOCK_TIMER_DEV_NAME + string "PerfTest: Clock time timer device name" default "timer0" - depends on RT_USING_HWTIMER && RT_UTEST_SYS_PERF + depends on RT_USING_CLOCK_TIME && RT_UTEST_SYS_PERF help Specify the hardware timer device name used for context switch testing (e.g., timer0). diff --git a/src/utest/perf/irq_latency_tc.c b/src/utest/perf/irq_latency_tc.c index 785151fc66b..0c40f98eda9 100644 --- a/src/utest/perf/irq_latency_tc.c +++ b/src/utest/perf/irq_latency_tc.c @@ -16,7 +16,7 @@ static rt_device_t hw_dev = RT_NULL; static rt_sem_t complete_sem = RT_NULL; -static rt_hwtimerval_t timeout = {0}; +static rt_clock_timerval_t timeout = {0}; static rt_perf_t *perf_local = RT_NULL; static void modify_time(rt_perf_t *perf) @@ -45,14 +45,14 @@ rt_err_t rt_perf_irq_latency(rt_perf_t *perf) rt_strcpy(perf->name,"rt_perf_irq_latency"); #endif int ret = RT_EOK; - rt_hwtimer_mode_t mode = HWTIMER_MODE_PERIOD; + rt_clock_timer_mode_t mode = CLOCK_TIMER_MODE_PERIOD; perf_local = perf; - hw_dev = rt_device_find(RT_UTEST_HWTIMER_DEV_NAME); + hw_dev = rt_device_find(RT_UTEST_CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { ret = RT_ERROR; - LOG_E("hwtimer sample run failed! can't find %s device!", RT_UTEST_HWTIMER_DEV_NAME); + LOG_E("clock_timer sample run failed! can't find %s device!", RT_UTEST_CLOCK_TIMER_DEV_NAME); return ret; } @@ -66,7 +66,7 @@ rt_err_t rt_perf_irq_latency(rt_perf_t *perf) rt_mutex_release(perf->lock); rt_device_set_rx_indicate(hw_dev, timer_callback); - rt_device_control(hw_dev, HWTIMER_CTRL_MODE_SET, (void *)&mode); + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, (void *)&mode); rt_perf_start_impl(perf_local, &timeout); @@ -77,4 +77,3 @@ rt_err_t rt_perf_irq_latency(rt_perf_t *perf) return RT_EOK; } - diff --git a/src/utest/perf/perf_tc.c b/src/utest/perf/perf_tc.c index e8ddb13735e..ec2a7270ee4 100644 --- a/src/utest/perf/perf_tc.c +++ b/src/utest/perf/perf_tc.c @@ -22,7 +22,7 @@ #define GET_DECIMALS(num) split_double(num, RET_DECIMALS) static rt_device_t hw_dev = RT_NULL; -static rt_hwtimerval_t timeout_s = { 0 }; +static rt_clock_timerval_t timeout_s = { 0 }; typedef rt_err_t (*testcase_function)(rt_perf_t *perf); testcase_function test_func_ptrs[] = { @@ -37,21 +37,21 @@ testcase_function test_func_ptrs[] = { static rt_uint32_t rt_perf_get_timer_us(void) { - rt_hwtimerval_t timer_val = { 0 }; - if (hw_dev && rt_device_read(hw_dev, 0, &timer_val, sizeof(rt_hwtimerval_t))) + rt_clock_timerval_t timer_val = { 0 }; + if (hw_dev && rt_device_read(hw_dev, 0, &timer_val, sizeof(rt_clock_timerval_t))) { return (rt_uint32_t)(timer_val.sec * 1000000u + timer_val.usec); /* return us */ } return 0; } -void rt_perf_start_impl(rt_perf_t *perf, rt_hwtimerval_t *timeout) +void rt_perf_start_impl(rt_perf_t *perf, rt_clock_timerval_t *timeout) { if (hw_dev) { if (timeout == RT_NULL) timeout = &timeout_s; - rt_device_write(hw_dev, 0, timeout, sizeof(rt_hwtimerval_t)); + rt_device_write(hw_dev, 0, timeout, sizeof(rt_clock_timerval_t)); } perf->begin_time = rt_perf_get_timer_us(); } @@ -76,7 +76,7 @@ void rt_perf_stop(rt_perf_t *perf) perf->tot_time += perf->real_time; if (hw_dev) - rt_device_control(hw_dev, HWTIMER_CTRL_STOP, NULL); + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_STOP, NULL); } static rt_int32_t split_double(double num, rt_uint32_t type) @@ -166,17 +166,17 @@ static rt_err_t utest_tc_init(void) { int ret = RT_EOK; - hw_dev = rt_device_find(RT_UTEST_HWTIMER_DEV_NAME); + hw_dev = rt_device_find(RT_UTEST_CLOCK_TIMER_DEV_NAME); if (hw_dev == RT_NULL) { ret = RT_ERROR; - LOG_E("hwtimer sample run failed! can't find %s device!", RT_UTEST_HWTIMER_DEV_NAME); + LOG_E("clock_timer sample run failed! can't find %s device!", RT_UTEST_CLOCK_TIMER_DEV_NAME); return ret; } ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); if (ret != RT_EOK) { - LOG_E("open %s device failed!", RT_UTEST_HWTIMER_DEV_NAME); + LOG_E("open %s device failed!", RT_UTEST_CLOCK_TIMER_DEV_NAME); return ret; } @@ -199,4 +199,3 @@ static void testcase(void) } UTEST_TC_EXPORT(testcase, "core.perf_test", utest_tc_init, utest_tc_cleanup, 10); - diff --git a/src/utest/perf/perf_tc.h b/src/utest/perf/perf_tc.h index 06aeb5214e3..0dc20e0d30d 100644 --- a/src/utest/perf/perf_tc.h +++ b/src/utest/perf/perf_tc.h @@ -35,7 +35,7 @@ typedef struct rt_perf rt_bool_t dump_head; } rt_perf_t; -void rt_perf_start_impl(rt_perf_t *perf, rt_hwtimerval_t *timeout); +void rt_perf_start_impl(rt_perf_t *perf, rt_clock_timerval_t *timeout); void rt_perf_stop(rt_perf_t *perf); void rt_perf_dump( rt_perf_t *perf); From a793b2588489c2a5ff46488c784538ae99f99b12 Mon Sep 17 00:00:00 2001 From: bernard Date: Wed, 31 Dec 2025 17:39:15 +0800 Subject: [PATCH 02/25] [components][clock_time] Use BSP-provided clock timer frequency on riscv64 --- components/drivers/clock_time/arch/risc-v/virt64/cputimer.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/components/drivers/clock_time/arch/risc-v/virt64/cputimer.c b/components/drivers/clock_time/arch/risc-v/virt64/cputimer.c index 113432d3182..7921716b7fa 100644 --- a/components/drivers/clock_time/arch/risc-v/virt64/cputimer.c +++ b/components/drivers/clock_time/arch/risc-v/virt64/cputimer.c @@ -14,10 +14,12 @@ static volatile unsigned long _init_cnt = 0; static rt_bool_t _riscv_clock_registered = RT_FALSE; static struct rt_clock_time_device _riscv_clock_dev; +extern rt_uint64_t rt_hw_get_clock_timer_freq(void); + static rt_uint64_t _riscv_clock_get_freq(struct rt_clock_time_device *dev) { RT_UNUSED(dev); - return CLOCK_TIMER_FREQ; + return rt_hw_get_clock_timer_freq(); } static rt_uint64_t _riscv_clock_get_counter(struct rt_clock_time_device *dev) From a9b3c98b612f8cdf2bdfd1110283934ee647348b Mon Sep 17 00:00:00 2001 From: bernard Date: Wed, 31 Dec 2025 17:39:23 +0800 Subject: [PATCH 03/25] [risc-v] Use runtime clock timer frequency for tick and delays --- libcpu/risc-v/common64/tick.c | 21 ++++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/libcpu/risc-v/common64/tick.c b/libcpu/risc-v/common64/tick.c index 758f0a7759a..06ede73a54e 100644 --- a/libcpu/risc-v/common64/tick.c +++ b/libcpu/risc-v/common64/tick.c @@ -20,6 +20,12 @@ #endif static volatile unsigned long tick_cycles = 0; +static rt_uint64_t _clock_timer_freq = 0; + +rt_weak rt_uint64_t rt_hw_get_clock_timer_freq(void) +{ + return CLOCK_TIMER_FREQ; +} static rt_uint64_t _riscv_read_time(void) { @@ -36,14 +42,16 @@ int tick_isr(void) return 0; } -/* BSP should config clockbase frequency */ -RT_STATIC_ASSERT(defined_clockbase_freq, CLOCK_TIMER_FREQ != 0); - /* Sets and enable the timer interrupt */ int rt_hw_tick_init(void) { + rt_uint64_t freq = rt_hw_get_clock_timer_freq(); + RT_ASSERT(freq != 0); + + _clock_timer_freq = freq; + /* calculate the tick cycles */ - tick_cycles = CLOCK_TIMER_FREQ / RT_TICK_PER_SECOND; + tick_cycles = freq / RT_TICK_PER_SECOND; /* Clear the Supervisor-Timer bit in SIE */ clear_csr(sie, SIP_STIP); @@ -70,9 +78,12 @@ void rt_hw_us_delay(rt_uint32_t us) unsigned long start_time; unsigned long end_time; unsigned long run_time; + rt_uint64_t freq; start_time = _riscv_read_time(); - end_time = start_time + us * (CLOCK_TIMER_FREQ / 1000000); + freq = _clock_timer_freq ? _clock_timer_freq : rt_hw_get_clock_timer_freq(); + RT_ASSERT(freq != 0); + end_time = start_time + (rt_uint64_t)us * freq / 1000000ULL; do { run_time = _riscv_read_time(); From fa72f365f5e4bc2b1dcf92c9a6ea90adbda16b7f Mon Sep 17 00:00:00 2001 From: bernard Date: Wed, 31 Dec 2025 17:39:33 +0800 Subject: [PATCH 04/25] [bsp] Add clock timer frequency hooks for riscv64 boards --- bsp/allwinner/d1s/board/board.c | 5 +++++ bsp/qemu-virt64-riscv/driver/board.c | 6 +++++- bsp/ultrarisc/ur_dp1000_evb/board/board.c | 7 ++++++- bsp/xuantie/virt64/c906/board/board.c | 6 +++++- 4 files changed, 21 insertions(+), 3 deletions(-) diff --git a/bsp/allwinner/d1s/board/board.c b/bsp/allwinner/d1s/board/board.c index 33470e5cb73..6063739db3c 100644 --- a/bsp/allwinner/d1s/board/board.c +++ b/bsp/allwinner/d1s/board/board.c @@ -52,6 +52,11 @@ struct mem_desc platform_mem_desc[] = { #endif /* RT_USING_SMART */ +rt_uint64_t rt_hw_get_clock_timer_freq(void) +{ + return 24000000ULL; +} + // 初始化BSS节区 void init_bss(void) { diff --git a/bsp/qemu-virt64-riscv/driver/board.c b/bsp/qemu-virt64-riscv/driver/board.c index 092244278ed..7250159e300 100644 --- a/bsp/qemu-virt64-riscv/driver/board.c +++ b/bsp/qemu-virt64-riscv/driver/board.c @@ -46,6 +46,11 @@ struct mem_desc platform_mem_desc[] = { #endif +rt_uint64_t rt_hw_get_clock_timer_freq(void) +{ + return 10000000ULL; +} + void primary_cpu_entry(void) { /* disable global interrupt */ @@ -115,4 +120,3 @@ void rt_hw_cpu_reset(void) ; } MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine); - diff --git a/bsp/ultrarisc/ur_dp1000_evb/board/board.c b/bsp/ultrarisc/ur_dp1000_evb/board/board.c index 0a672df343a..5f338c4689a 100644 --- a/bsp/ultrarisc/ur_dp1000_evb/board/board.c +++ b/bsp/ultrarisc/ur_dp1000_evb/board/board.c @@ -35,6 +35,11 @@ struct mem_desc platform_mem_desc[] = #endif +rt_uint64_t rt_hw_get_clock_timer_freq(void) +{ + return 10000000ULL; +} + void primary_cpu_entry(void) { /* disable global interrupt */ @@ -123,4 +128,4 @@ void rt_hw_cpu_reset(void) while (1) ; } -MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine); \ No newline at end of file +MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine); diff --git a/bsp/xuantie/virt64/c906/board/board.c b/bsp/xuantie/virt64/c906/board/board.c index 3a38dab7165..7e30de7a57e 100644 --- a/bsp/xuantie/virt64/c906/board/board.c +++ b/bsp/xuantie/virt64/c906/board/board.c @@ -42,6 +42,11 @@ struct mem_desc platform_mem_desc[] = { #endif +rt_uint64_t rt_hw_get_clock_timer_freq(void) +{ + return 10000000ULL; +} + void primary_cpu_entry(void) { /* disable global interrupt */ @@ -106,4 +111,3 @@ void rt_hw_cpu_reset(void) ; } MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine); - From ae7a98c64dc80905c855cadfa671b5325dd8b948 Mon Sep 17 00:00:00 2001 From: bernard Date: Wed, 31 Dec 2025 17:39:43 +0800 Subject: [PATCH 05/25] [bsp] Update Renesas RA driver doc clock_timer link --- bsp/renesas/docs/Introduction_to_RA_Series_Drives.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsp/renesas/docs/Introduction_to_RA_Series_Drives.md b/bsp/renesas/docs/Introduction_to_RA_Series_Drives.md index c35946ddd9c..b058af1f086 100644 --- a/bsp/renesas/docs/Introduction_to_RA_Series_Drives.md +++ b/bsp/renesas/docs/Introduction_to_RA_Series_Drives.md @@ -36,7 +36,7 @@ The driver libraries currently provided by RT-Thread already support multiple se | [SPI](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/spi/spi) | Send and receive data over SPI | | [ADC](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/adc/adc) | Measure the analog data on the pin | | SDIO | Read and write data through SDIO | -| [TIMER](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/hwtimer/hwtimer) | Use hardware timers to implement the function of measuring time and timing execution callback functions | +| [TIMER](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/clock_timer/clock_timer) | Use hardware timers to implement the function of measuring time and timing execution callback functions | | [PWM](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/pwm/pwm) | Outputs a PWM waveform at a specific pin | | [RTC](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/rtc/rtc) | Set and read times | | [WDT](https://www.rt-thread.org/document/site/#/rt-thread-version/rt-thread-standard/programming-manual/device/watchdog/watchdog) | Watchdog driver | From b8d202a9ab137e932f810bb1c4b7fa23d3cfc198 Mon Sep 17 00:00:00 2001 From: bernard Date: Wed, 31 Dec 2025 17:39:50 +0800 Subject: [PATCH 06/25] [bsp] Sync zynqmp-r5-axu4ev rtconfig after config refresh --- bsp/zynqmp-r5-axu4ev/rtconfig.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/bsp/zynqmp-r5-axu4ev/rtconfig.h b/bsp/zynqmp-r5-axu4ev/rtconfig.h index 7cb23b1b7c9..9b296b2f0d2 100644 --- a/bsp/zynqmp-r5-axu4ev/rtconfig.h +++ b/bsp/zynqmp-r5-axu4ev/rtconfig.h @@ -105,7 +105,7 @@ #define RT_USING_CONSOLE #define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLE_DEVICE_NAME "uart0" -#define RT_VER_NUM 0x50201 +#define RT_VER_NUM 0x50300 #define RT_BACKTRACE_LEVEL_MAX_NR 32 /* end of RT-Thread Kernel */ #define RT_USING_CACHE @@ -404,6 +404,10 @@ /* GD32 Drivers */ /* end of GD32 Drivers */ + +/* HPMicro SDK */ + +/* end of HPMicro SDK */ /* end of HAL & SDK Drivers */ /* sensors drivers */ From e908b9ba53bf7cbef2267a5f1a8bf6d1e15a51b6 Mon Sep 17 00:00:00 2001 From: bernard Date: Wed, 31 Dec 2025 17:52:08 +0800 Subject: [PATCH 07/25] [bsp][rk3500] Update rk3500 clock configuration --- bsp/rockchip/rk3500/.config | 23 +- bsp/rockchip/rk3500/driver/board.c | 14 +- .../rk3500/driver/clk/clk-pll-rk3568.c | 36 --- .../rk3500/driver/clk/clk-pll-rk3588.c | 36 --- bsp/rockchip/rk3500/driver/clk/clk-rk3568.c | 263 +++++++++++------- bsp/rockchip/rk3500/driver/clk/clk-rk3588.c | 244 +++++++++------- .../rk3500/driver/uart8250/SConscript | 6 +- bsp/rockchip/rk3500/rtconfig.h | 21 +- 8 files changed, 331 insertions(+), 312 deletions(-) diff --git a/bsp/rockchip/rk3500/.config b/bsp/rockchip/rk3500/.config index 5b5ad0170e8..ce24fa41bc6 100644 --- a/bsp/rockchip/rk3500/.config +++ b/bsp/rockchip/rk3500/.config @@ -676,16 +676,12 @@ CONFIG_RT_UTEST_SMP_CALL_FUNC=y # end of CPP11 # -# LwIP -# -# CONFIG_RT_UTEST_TC_USING_LWIP is not set -# end of LwIP - -# -# Netdev +# Network # +# CONFIG_RT_UTEST_TC_USING_SAL is not set # CONFIG_RT_UTEST_TC_USING_NETDEV is not set -# end of Netdev +# CONFIG_RT_UTEST_TC_USING_LWIP is not set +# end of Network # # Utest Framework @@ -973,6 +969,7 @@ CONFIG_RT_UTEST_SMP_CALL_FUNC=y # CONFIG_PKG_USING_RVBACKTRACE is not set # CONFIG_PKG_USING_HPATCHLITE is not set # CONFIG_PKG_USING_THREAD_METRIC is not set +# CONFIG_PKG_USING_UORB is not set # end of tools packages # @@ -1067,6 +1064,7 @@ CONFIG_RT_UTEST_SMP_CALL_FUNC=y # CONFIG_PKG_USING_R_RHEALSTONE is not set # CONFIG_PKG_USING_HEARTBEAT is not set # CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set +# CONFIG_PKG_USING_CHERRYECAT is not set # end of system packages # @@ -1223,6 +1221,12 @@ CONFIG_RT_UTEST_SMP_CALL_FUNC=y # CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER is not set # CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER is not set # end of GD32 Drivers + +# +# HPMicro SDK +# +# CONFIG_PKG_USING_HPM_SDK is not set +# end of HPMicro SDK # end of HAL & SDK Drivers # @@ -1271,6 +1275,7 @@ CONFIG_RT_UTEST_SMP_CALL_FUNC=y # CONFIG_PKG_USING_MLX90393 is not set # CONFIG_PKG_USING_MLX90392 is not set # CONFIG_PKG_USING_MLX90394 is not set +# CONFIG_PKG_USING_MLX90396 is not set # CONFIG_PKG_USING_MLX90397 is not set # CONFIG_PKG_USING_MS5611 is not set # CONFIG_PKG_USING_MAX31865 is not set @@ -1746,7 +1751,7 @@ CONFIG_PKG_ZLIB_VER="latest" CONFIG_RT_CLK_ROCKCHIP=y CONFIG_RT_CLK_ROCKCHIP_RK3568=y CONFIG_RT_CLK_ROCKCHIP_RK3588=y -CONFIG_RT_SERIAL_8250=y +# CONFIG_RT_SERIAL_8250 is not set CONFIG_RT_HWTIMER_ROCKCHIP=y # end of RT-Thread rockchip RK3500 drivers diff --git a/bsp/rockchip/rk3500/driver/board.c b/bsp/rockchip/rk3500/driver/board.c index 9d19b8b3961..f7158de386e 100644 --- a/bsp/rockchip/rk3500/driver/board.c +++ b/bsp/rockchip/rk3500/driver/board.c @@ -10,6 +10,12 @@ #include #include #include +#include + +static void rk3568_machine_shutdown(void) +{ + psci_system_off(); +} void rt_hw_board_init(void) { @@ -22,6 +28,8 @@ void rt_hw_board_init(void) }, RT_TRUE); #endif rt_hw_common_setup(); + rt_dm_machine_shutdown = rk3568_machine_shutdown; + rt_dm_machine_reset = psci_system_reboot; } void reboot(void) @@ -29,9 +37,3 @@ void reboot(void) psci_system_reboot(); } MSH_CMD_EXPORT(reboot, reboot...); - -void rt_hw_cpu_shutdown(void) -{ - psci_system_off(); -} -MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_shutdown, shutdown, shutdown...); diff --git a/bsp/rockchip/rk3500/driver/clk/clk-pll-rk3568.c b/bsp/rockchip/rk3500/driver/clk/clk-pll-rk3568.c index 385f54853b7..be93025b8c9 100644 --- a/bsp/rockchip/rk3500/driver/clk/clk-pll-rk3568.c +++ b/bsp/rockchip/rk3500/driver/clk/clk-pll-rk3568.c @@ -365,39 +365,3 @@ static rt_base_t rk_clk_pll_round_rate(const struct rk_pll_rate_table *pll_rates /* return minimum supported value */ return pll_rates[i - 1].rate; } - -static void rk_clk_set_default_rates(struct rt_clk *clk, - rt_err_t (*clk_set_rate)(struct rt_clk *, rt_ubase_t, rt_ubase_t), int id) -{ - rt_uint32_t rate; - struct rt_ofw_cell_args clk_args; - struct rt_ofw_node *np = clk->fw_node; - const char *rate_propname = "assigned-clock-rates"; - - if (!rt_ofw_prop_read_bool(np, rate_propname)) - { - return; - } - - for (int i = 0; ; ++i) - { - if (rt_ofw_parse_phandle_cells(np, "assigned-clocks", "#clock-cells", i, &clk_args)) - { - break; - } - - rt_ofw_node_put(clk_args.data); - - if (clk_args.args[0] != id) - { - continue; - } - - if (!rt_ofw_prop_read_u32_index(np, rate_propname, i, &rate)) - { - clk_set_rate(clk, rate, 0); - } - - break; - } -} diff --git a/bsp/rockchip/rk3500/driver/clk/clk-pll-rk3588.c b/bsp/rockchip/rk3500/driver/clk/clk-pll-rk3588.c index 1b8ad79370f..7e5dfa9c579 100644 --- a/bsp/rockchip/rk3500/driver/clk/clk-pll-rk3588.c +++ b/bsp/rockchip/rk3500/driver/clk/clk-pll-rk3588.c @@ -689,39 +689,3 @@ rt_base_t rk_clk_pll_round_rate(const struct rk_pll_rate_table *pll_rates, /* return minimum supported value */ return pll_rates[i - 1].rate; } - -void rk_clk_set_default_rates(struct rt_clk *clk, - rt_err_t (*clk_set_rate)(struct rt_clk *, rt_ubase_t, rt_ubase_t), int id) -{ - rt_uint32_t rate; - struct rt_ofw_cell_args clk_args; - struct rt_ofw_node *np = clk->fw_node; - const char *rate_propname = "assigned-clock-rates"; - - if (!rt_ofw_prop_read_bool(np, rate_propname)) - { - return; - } - - for (int i = 0; ; ++i) - { - if (rt_ofw_parse_phandle_cells(np, "assigned-clocks", "#clock-cells", i, &clk_args)) - { - break; - } - - rt_ofw_node_put(clk_args.data); - - if (clk_args.args[0] != id) - { - continue; - } - - if (!rt_ofw_prop_read_u32_index(np, rate_propname, i, &rate)) - { - clk_set_rate(clk, rate, 0); - } - - break; - } -} diff --git a/bsp/rockchip/rk3500/driver/clk/clk-rk3568.c b/bsp/rockchip/rk3500/driver/clk/clk-rk3568.c index 4672e897609..5347906de50 100644 --- a/bsp/rockchip/rk3500/driver/clk/clk-rk3568.c +++ b/bsp/rockchip/rk3500/driver/clk/clk-rk3568.c @@ -124,6 +124,10 @@ struct rk_clk struct rk_pmuclk_priv pmuclk_info; }; + struct rt_clk_cell *cells; + struct rt_clk_cell **cells_list; + rt_size_t cells_nr; + struct rk_clk_platform_data pdata[]; }; @@ -4328,84 +4332,115 @@ static rt_base_t mmc_get_phase(struct rk_clk_platform_data *pdata, return rk_clk_mmc_get_phase(rate, reg, 1); } -static rt_err_t rk3568_clk_init(struct rt_clk *clk, void *fw_data) +static const struct rt_clk_ops rk3568_clk_ops; + +static void rk3568_clk_init_cells(struct rk_clk *rk_clk, struct rt_ofw_node *np) { - struct rk_clk *rk_clk = raw_to_rk_clk(clk->clk_np); - struct rt_ofw_cell_args *args = fw_data; - struct rk_clk_platform_data *pdata; - rt_uint32_t clk_id = args->args[0]; - rt_ubase_t reg_base; - - pdata = &rk_clk->pdata[clk_id]; - - if (rk_clk->type == rk_clk_type_pmuclk) - { - reg_base = (rt_ubase_t)rk_clk->pmuclk_info.pmucru; - - switch (clk_id) - { - case PLL_PPLL: - reg_base += pmu_pll_clks[ppll].con_offset; - break; - case PLL_HPLL: - reg_base += pmu_pll_clks[hpll].con_offset; - break; - default: - reg_base = RT_NULL; - break; - } - } - else if (rk_clk->type == rk_clk_type_clk) - { - reg_base = (rt_ubase_t)rk_clk->clk_info.cru; - - switch (clk_id) - { - case PLL_APLL: - case ARMCLK: - reg_base += pll_clks[apll].con_offset; - break; - case PLL_CPLL: - reg_base += pll_clks[cpll].con_offset; - break; - case PLL_GPLL: - reg_base += pll_clks[gpll].con_offset; - break; - case PLL_NPLL: - reg_base += pll_clks[npll].con_offset; - break; - case PLL_VPLL: - reg_base += pll_clks[vpll].con_offset; - break; - case PLL_DPLL: - reg_base += pll_clks[dpll].con_offset; - break; - default: - reg_base = RT_NULL; - break; - } - } - else + rt_size_t clk_nr = rk_clk->cells_nr; + + for (rt_uint32_t clk_id = 0; clk_id < clk_nr; ++clk_id) { - LOG_E("Unknow type of rk clk = %d", rk_clk->type); - RT_ASSERT(0); + rt_ubase_t reg_base = RT_NULL; + struct rk_clk_platform_data *pdata = &rk_clk->pdata[clk_id]; + struct rt_clk_cell *cell = &rk_clk->cells[clk_id]; + const char *name = RT_NULL; + + if (rk_clk->type == rk_clk_type_pmuclk) + { + reg_base = (rt_ubase_t)rk_clk->pmuclk_info.pmucru; + + switch (clk_id) + { + case PLL_PPLL: + reg_base += pmu_pll_clks[ppll].con_offset; + break; + case PLL_HPLL: + reg_base += pmu_pll_clks[hpll].con_offset; + break; + default: + reg_base = RT_NULL; + break; + } + } + else if (rk_clk->type == rk_clk_type_clk) + { + reg_base = (rt_ubase_t)rk_clk->clk_info.cru; + + switch (clk_id) + { + case PLL_APLL: + case ARMCLK: + reg_base += pll_clks[apll].con_offset; + break; + case PLL_CPLL: + reg_base += pll_clks[cpll].con_offset; + break; + case PLL_GPLL: + reg_base += pll_clks[gpll].con_offset; + break; + case PLL_NPLL: + reg_base += pll_clks[npll].con_offset; + break; + case PLL_VPLL: + reg_base += pll_clks[vpll].con_offset; + break; + case PLL_DPLL: + reg_base += pll_clks[dpll].con_offset; + break; + default: + reg_base = RT_NULL; + break; + } + } + else + { + LOG_E("Unknow type of rk clk = %d", rk_clk->type); + RT_ASSERT(0); + } + + pdata->id = clk_id; + pdata->base = (void *)reg_base; + + if (np && !rt_ofw_prop_read_string_index(np, "clock-output-names", clk_id, &name)) + { + cell->name = name; + } + else if (rk_clk->type == rk_clk_type_clk && + clk_id < RT_ARRAY_SIZE(clk_gates) && clk_gates[clk_id].name) + { + cell->name = clk_gates[clk_id].name; + } + else if (rk_clk->type == rk_clk_type_pmuclk && + clk_id < RT_ARRAY_SIZE(pmu_clk_gates) && pmu_clk_gates[clk_id].name) + { + cell->name = pmu_clk_gates[clk_id].name; + } + + cell->ops = &rk3568_clk_ops; + cell->priv = pdata; + rk_clk->cells_list[clk_id] = cell; } +} - pdata->id = clk_id; - pdata->base = (void *)reg_base; +static rt_ubase_t rk3568_clk_recalc_rate(struct rt_clk_cell *cell, rt_ubase_t parent_rate) +{ + struct rk_clk_platform_data *pdata = cell->priv; + struct rk_clk *rk_clk = raw_to_rk_clk(cell->clk_np); - clk->rate = rk_clk_get_rate(pdata, rk_clk); - clk->priv = pdata; + RT_UNUSED(parent_rate); - rk_clk_set_default_rates(clk, clk->clk_np->ops->set_rate, clk_id); + if (!pdata || !rk_clk) + { + return 0; + } - return RT_EOK; + return rk_clk_get_rate(pdata, rk_clk); } -static rt_err_t rk3568_clk_enable(struct rt_clk *clk) +static rt_err_t rk3568_clk_enable(struct rt_clk_cell *cell) { - struct rk_clk_platform_data *pdata = clk->priv; - struct rk_clk *rk_clk = raw_to_rk_clk(clk->clk_np); + struct rk_clk_platform_data *pdata = cell->priv; + struct rk_clk *rk_clk = raw_to_rk_clk(cell->clk_np); struct rk_cru *cru = rk_clk->clk_info.cru; struct rk_pmucru *pmucru = rk_clk->pmuclk_info.pmucru; @@ -4441,10 +4476,10 @@ static rt_err_t rk3568_clk_enable(struct rt_clk *clk) return RT_EOK; } -static void rk3568_clk_disable(struct rt_clk *clk) +static void rk3568_clk_disable(struct rt_clk_cell *cell) { - struct rk_clk_platform_data *pdata = clk->priv; - struct rk_clk *rk_clk = raw_to_rk_clk(clk->clk_np); + struct rk_clk_platform_data *pdata = cell->priv; + struct rk_clk *rk_clk = raw_to_rk_clk(cell->clk_np); struct rk_cru *cru = rk_clk->clk_info.cru; struct rk_pmucru *pmucru = rk_clk->pmuclk_info.pmucru; @@ -4476,9 +4511,9 @@ static void rk3568_clk_disable(struct rt_clk *clk) } } -static rt_bool_t rk3568_clk_is_enabled(struct rt_clk *clk) +static rt_bool_t rk3568_clk_is_enabled(struct rt_clk_cell *cell) { - struct rk_clk_platform_data *pdata = clk->priv; + struct rk_clk_platform_data *pdata = cell->priv; if (pdata->base) { @@ -4490,29 +4525,21 @@ static rt_bool_t rk3568_clk_is_enabled(struct rt_clk *clk) return RT_TRUE; } -static rt_err_t rk3568_clk_set_rate(struct rt_clk *clk, rt_ubase_t rate, rt_ubase_t parent_rate) +static rt_err_t rk3568_clk_set_rate(struct rt_clk_cell *cell, rt_ubase_t rate, rt_ubase_t parent_rate) { rt_ubase_t res_rate; - struct rk_clk_platform_data *pdata = clk->priv; - struct rk_clk *rk_clk = raw_to_rk_clk(clk->clk_np); + struct rk_clk_platform_data *pdata = cell->priv; + struct rk_clk *rk_clk = raw_to_rk_clk(cell->clk_np); + + RT_UNUSED(parent_rate); if (rk_clk->type == rk_clk_type_clk) { res_rate = rk_clk_set_rate(pdata, rk_clk, rate); - - if ((rt_base_t)res_rate > 0) - { - clk->rate = res_rate; - } } else if (rk_clk->type == rk_clk_type_pmuclk) { res_rate = rk_pmuclk_set_rate(pdata, rk_clk, rate); - - if ((rt_base_t)res_rate > 0) - { - clk->rate = res_rate; - } } else { @@ -4522,18 +4549,20 @@ static rt_err_t rk3568_clk_set_rate(struct rt_clk *clk, rt_ubase_t rate, rt_ubas return (rt_ubase_t)res_rate > 0 ? RT_EOK : (rt_err_t)res_rate; } -static rt_err_t rk3568_clk_set_parent(struct rt_clk *clk, struct rt_clk *parent) +static rt_err_t rk3568_clk_set_parent(struct rt_clk_cell *cell, rt_uint8_t idx) { rt_err_t err; - struct rk_clk_platform_data *pdata = clk->priv, *ppdata = parent->priv; - struct rk_clk *rk_clk = raw_to_rk_clk(clk->clk_np); - struct rk_clk *rk_clk_parent = raw_to_rk_clk(clk->clk_np); + struct rt_clk_cell *parent_cell = rt_clk_cell_get_parent_by_index(cell, idx); + struct rk_clk_platform_data *pdata = cell->priv; + struct rk_clk *rk_clk = raw_to_rk_clk(cell->clk_np); - if (rk_clk->type != rk_clk_parent->type) + if (!parent_cell || parent_cell->clk_np != cell->clk_np || !parent_cell->priv) { return -RT_EINVAL; } + struct rk_clk_platform_data *ppdata = parent_cell->priv; + if (rk_clk->type == rk_clk_type_clk) { err = rk_clk_set_parent(pdata, ppdata, rk_clk); @@ -4550,11 +4579,11 @@ static rt_err_t rk3568_clk_set_parent(struct rt_clk *clk, struct rt_clk *parent) return err; } -static rt_err_t rk3568_clk_set_phase(struct rt_clk *clk, int degrees) +static rt_err_t rk3568_clk_set_phase(struct rt_clk_cell *cell, int degrees) { rt_err_t res; - struct rk_clk_platform_data *pdata = clk->priv; - struct rk_clk *rk_clk = raw_to_rk_clk(clk->clk_np); + struct rk_clk_platform_data *pdata = cell->priv; + struct rk_clk *rk_clk = raw_to_rk_clk(cell->clk_np); switch (pdata->id) { @@ -4576,11 +4605,11 @@ static rt_err_t rk3568_clk_set_phase(struct rt_clk *clk, int degrees) return res; } -static rt_base_t rk3568_clk_get_phase(struct rt_clk *clk) +static rt_base_t rk3568_clk_get_phase(struct rt_clk_cell *cell) { rt_base_t res; - struct rk_clk_platform_data *pdata = clk->priv; - struct rk_clk *rk_clk = raw_to_rk_clk(clk->clk_np); + struct rk_clk_platform_data *pdata = cell->priv; + struct rk_clk *rk_clk = raw_to_rk_clk(cell->clk_np); switch (pdata->id) { @@ -4602,18 +4631,20 @@ static rt_base_t rk3568_clk_get_phase(struct rt_clk *clk) return res; } -static rt_base_t rk3568_clk_round_rate(struct rt_clk *clk, rt_ubase_t drate, +static rt_base_t rk3568_clk_round_rate(struct rt_clk_cell *cell, rt_ubase_t drate, rt_ubase_t *prate) { + RT_UNUSED(cell); + return rk_clk_pll_round_rate(pll_rates, RT_ARRAY_SIZE(pll_rates), drate, prate); } static const struct rt_clk_ops rk3568_clk_ops = { - .init = rk3568_clk_init, .enable = rk3568_clk_enable, .disable = rk3568_clk_disable, .is_enabled = rk3568_clk_is_enabled, + .recalc_rate = rk3568_clk_recalc_rate, .set_rate = rk3568_clk_set_rate, .set_parent = rk3568_clk_set_parent, .set_phase = rk3568_clk_set_phase, @@ -4689,27 +4720,40 @@ static void rk3568_pmu_clk_type_init(struct rk_clk *rk_clk, struct rt_ofw_node * static rt_err_t clk_rk3568_probe(struct rt_platform_device *pdev) { rt_err_t err; - rt_size_t data_size = 0; + rt_size_t clk_nr = 0; + rt_size_t pdata_size = 0; + rt_size_t cells_size = 0; + rt_size_t cells_list_size = 0; struct rk_clk *rk_clk; struct rt_ofw_node *np = pdev->parent.ofw_node; enum rk_clk_type type = (rt_ubase_t)pdev->id->data; if (type == rk_clk_type_clk) { - data_size = CLK_NR_CLKS; + clk_nr = CLK_NR_CLKS; } else if (type == rk_clk_type_pmuclk) { - data_size = CLKPMU_NR_CLKS; + clk_nr = CLKPMU_NR_CLKS; } - data_size *= sizeof(struct rk_clk_platform_data); - rk_clk = rt_malloc(sizeof(*rk_clk) + data_size); + pdata_size = RT_ALIGN(clk_nr * sizeof(struct rk_clk_platform_data), RT_ALIGN_SIZE); + cells_size = RT_ALIGN(clk_nr * sizeof(struct rt_clk_cell), RT_ALIGN_SIZE); + cells_list_size = clk_nr * sizeof(struct rt_clk_cell *); + rk_clk = rt_malloc(sizeof(*rk_clk) + pdata_size + cells_size + cells_list_size); if (rk_clk) { + rt_size_t total_size = sizeof(*rk_clk) + pdata_size + cells_size + cells_list_size; + rt_uint8_t *mem; void *softrst_regs = RT_NULL; - rt_memset(&rk_clk->parent, 0, sizeof(rk_clk->parent)); + + rt_memset(rk_clk, 0, total_size); + + mem = (rt_uint8_t *)rk_clk->pdata; + rk_clk->cells = (struct rt_clk_cell *)(mem + pdata_size); + rk_clk->cells_list = (struct rt_clk_cell **)((rt_uint8_t *)rk_clk->cells + cells_size); + rk_clk->cells_nr = clk_nr; rk_clk->base = rt_ofw_iomap(np, 0); @@ -4734,9 +4778,14 @@ static rt_err_t clk_rk3568_probe(struct rt_platform_device *pdev) softrst_regs = &rk_clk->pmuclk_info.pmucru->pmu_softrst_con; } - rk_clk->parent.parent.ops = &rk3568_clk_ops; + rk_clk->parent.parent.dev = &pdev->parent; + rk_clk->parent.parent.cells_nr = rk_clk->cells_nr; + rk_clk->parent.parent.cells = rk_clk->cells_list; + rk_clk->parent.parent.multi_clk = rk_clk->cells_nr; + + rk3568_clk_init_cells(rk_clk, np); - if ((err = rt_clk_register(&rk_clk->parent.parent, RT_NULL))) + if ((err = rt_clk_register(&rk_clk->parent.parent))) { goto _fail; } diff --git a/bsp/rockchip/rk3500/driver/clk/clk-rk3588.c b/bsp/rockchip/rk3500/driver/clk/clk-rk3588.c index a25e2e8d4f2..e3388901f10 100644 --- a/bsp/rockchip/rk3500/driver/clk/clk-rk3588.c +++ b/bsp/rockchip/rk3500/driver/clk/clk-rk3588.c @@ -103,6 +103,10 @@ struct rk3588_clk struct rk3588_clk_priv clk_info; + struct rt_clk_cell *cells; + struct rt_clk_cell **cells_list; + rt_size_t cells_nr; + struct rk3588_clk_platform_data pdata[]; }; struct pll_rate_table { @@ -2655,61 +2659,86 @@ static rt_base_t mmc_get_phase(struct rk3588_clk_platform_data *pdata, return rk_clk_mmc_get_phase(rate, reg, 1); } -static rt_err_t rk3588_clk_init(struct rt_clk *clk, void *fw_data) +static const struct rt_clk_ops rk3588_clk_ops; + +static void rk3588_clk_init_cells(struct rk3588_clk *rk_clk, struct rt_ofw_node *np) { - struct rk3588_clk *rk_clk = raw_to_rk_clk(clk->clk_np); - struct rt_ofw_cell_args *args = fw_data; - struct rk3588_clk_platform_data *pdata; - rt_uint32_t clk_id = args->args[0]; - rt_ubase_t reg_base; + rt_size_t clk_nr = rk_clk->cells_nr; - pdata = &rk_clk->pdata[clk_id]; + for (rt_uint32_t clk_id = 0; clk_id < clk_nr; ++clk_id) + { + rt_ubase_t reg_base = RT_NULL; + struct rk3588_clk_platform_data *pdata = &rk_clk->pdata[clk_id]; + struct rt_clk_cell *cell = &rk_clk->cells[clk_id]; + const char *name = RT_NULL; - reg_base = (rt_ubase_t)rk_clk->clk_info.cru; + reg_base = (rt_ubase_t)rk_clk->clk_info.cru; - switch (clk_id) - { - case PLL_B0PLL: - reg_base += rk3588_pll_clks[B0PLL].con_offset; - break; - case PLL_B1PLL: - reg_base += rk3588_pll_clks[B1PLL].con_offset; - break; - case PLL_LPLL: - reg_base += rk3588_pll_clks[LPLL].con_offset; - break; - case PLL_V0PLL: - reg_base += rk3588_pll_clks[V0PLL].con_offset; - break; - case PLL_AUPLL: - reg_base += rk3588_pll_clks[AUPLL].con_offset; - break; - case PLL_CPLL: - reg_base += rk3588_pll_clks[CPLL].con_offset; - break; - case PLL_GPLL: - reg_base += rk3588_pll_clks[GPLL].con_offset; - break; - case PLL_NPLL: - reg_base += rk3588_pll_clks[NPLL].con_offset; - break; - case PLL_PPLL: - reg_base += rk3588_pll_clks[PPLL].con_offset; - break; - default: - reg_base = RT_NULL; - break; + switch (clk_id) + { + case PLL_B0PLL: + reg_base += rk3588_pll_clks[B0PLL].con_offset; + break; + case PLL_B1PLL: + reg_base += rk3588_pll_clks[B1PLL].con_offset; + break; + case PLL_LPLL: + reg_base += rk3588_pll_clks[LPLL].con_offset; + break; + case PLL_V0PLL: + reg_base += rk3588_pll_clks[V0PLL].con_offset; + break; + case PLL_AUPLL: + reg_base += rk3588_pll_clks[AUPLL].con_offset; + break; + case PLL_CPLL: + reg_base += rk3588_pll_clks[CPLL].con_offset; + break; + case PLL_GPLL: + reg_base += rk3588_pll_clks[GPLL].con_offset; + break; + case PLL_NPLL: + reg_base += rk3588_pll_clks[NPLL].con_offset; + break; + case PLL_PPLL: + reg_base += rk3588_pll_clks[PPLL].con_offset; + break; + default: + reg_base = RT_NULL; + break; + } + + pdata->id = clk_id; + pdata->base = (void *)reg_base; + + if (np && !rt_ofw_prop_read_string_index(np, "clock-output-names", clk_id, &name)) + { + cell->name = name; + } + else if (clk_id < RT_ARRAY_SIZE(clk_gates) && clk_gates[clk_id].name) + { + cell->name = clk_gates[clk_id].name; + } + + cell->ops = &rk3588_clk_ops; + cell->priv = pdata; + rk_clk->cells_list[clk_id] = cell; } +} - pdata->id = clk_id; - pdata->base = (void *)reg_base; +static rt_ubase_t rk3588_clk_recalc_rate(struct rt_clk_cell *cell, rt_ubase_t parent_rate) +{ + struct rk3588_clk_platform_data *pdata = cell->priv; + struct rk3588_clk *rk_clk = raw_to_rk_clk(cell->clk_np); - clk->rate = rk_clk_get_rate(pdata, rk_clk); - clk->priv = pdata; + RT_UNUSED(parent_rate); - rk_clk_set_default_rates(clk, clk->clk_np->ops->set_rate, clk_id); + if (!pdata || !rk_clk) + { + return 0; + } - return RT_EOK; + return rk_clk_get_rate(pdata, rk_clk); } static rt_err_t rk_clk_wait_lock(struct rk3588_clk_platform_data *pdata) @@ -2734,10 +2763,10 @@ static rt_err_t rk_clk_wait_lock(struct rk3588_clk_platform_data *pdata) return err; } -static rt_err_t rk3588_clk_enable(struct rt_clk *clk) +static rt_err_t rk3588_clk_enable(struct rt_clk_cell *cell) { - struct rk3588_clk_platform_data *pdata = clk->priv; - struct rk3588_clk *rk_clk = raw_to_rk_clk(clk->clk_np); + struct rk3588_clk_platform_data *pdata = cell->priv; + struct rk3588_clk *rk_clk = raw_to_rk_clk(cell->clk_np); struct rk3588_cru *cru = rk_clk->clk_info.cru; if (pdata->base) @@ -2762,10 +2791,10 @@ static rt_err_t rk3588_clk_enable(struct rt_clk *clk) } -static void rk3588_clk_disable(struct rt_clk *clk) +static void rk3588_clk_disable(struct rt_clk_cell *cell) { - struct rk3588_clk_platform_data *pdata = clk->priv; - struct rk3588_clk *rk_clk = raw_to_rk_clk(clk->clk_np); + struct rk3588_clk_platform_data *pdata = cell->priv; + struct rk3588_clk *rk_clk = raw_to_rk_clk(cell->clk_np); struct rk3588_cru *cru = rk_clk->clk_info.cru; if (pdata->base) @@ -2785,9 +2814,9 @@ static void rk3588_clk_disable(struct rt_clk *clk) } -static rt_bool_t rk3588_clk_is_enabled(struct rt_clk *clk) +static rt_bool_t rk3588_clk_is_enabled(struct rt_clk_cell *cell) { - struct rk3588_clk_platform_data *pdata = clk->priv; + struct rk3588_clk_platform_data *pdata = cell->priv; if (pdata->base) { @@ -2799,14 +2828,16 @@ static rt_bool_t rk3588_clk_is_enabled(struct rt_clk *clk) return RT_TRUE; } -static rt_err_t rk3588_clk_set_rate(struct rt_clk *clk, rt_ubase_t rate, rt_ubase_t prate) +static rt_err_t rk3588_clk_set_rate(struct rt_clk_cell *cell, rt_ubase_t rate, rt_ubase_t prate) { rt_ubase_t ret = 0; rt_ubase_t res_rate; - struct rk3588_clk_platform_data *pdata = clk->priv; - struct rk3588_clk *rk_clk = raw_to_rk_clk(clk->clk_np); + struct rk3588_clk_platform_data *pdata = cell->priv; + struct rk3588_clk *rk_clk = raw_to_rk_clk(cell->clk_np); struct rk3588_clk_priv *priv = &rk_clk->clk_info; + RT_UNUSED(prate); + if (!priv->gpll_hz) { LOG_D("%s gpll=%lu\n", __func__, priv->gpll_hz); @@ -2951,11 +2982,7 @@ static rt_err_t rk3588_clk_set_rate(struct rt_clk *clk, rt_ubase_t rate, rt_ubas return -RT_ENOENT; } - if ((rt_base_t)res_rate > 0) - { - clk->rate = res_rate; - } - else + if ((rt_base_t)res_rate <= 0) { ret = (rt_ubase_t)res_rate > 0 ? RT_EOK : (rt_err_t)res_rate; } @@ -2963,17 +2990,20 @@ static rt_err_t rk3588_clk_set_rate(struct rt_clk *clk, rt_ubase_t rate, rt_ubas return ret; }; -static int rk3588_dclk_vop_set_parent(struct rt_clk *clk, - struct rt_clk *parent) +static int rk3588_dclk_vop_set_parent(struct rt_clk_cell *cell, struct rt_clk_cell *parent_cell) { - struct rk3588_clk_platform_data *pdata = clk->priv; - struct rk3588_clk_platform_data *ppdata = parent->priv; - struct rk3588_clk *rk_clk = raw_to_rk_clk(clk->clk_np); + struct rk3588_clk_platform_data *pdata = cell->priv; + struct rk3588_clk_platform_data *ppdata = parent_cell ? parent_cell->priv : RT_NULL; + struct rk3588_clk *rk_clk = raw_to_rk_clk(cell->clk_np); /*struct rk3588_clk_priv *priv = &rk_clk->clk_info;*/ struct rk3588_cru *cru = rk_clk->clk_info.cru; rt_uint32_t sel; - const char *clock_dev_name = parent->dev_id; + + if (!ppdata) + { + return -RT_EINVAL; + } if (ppdata->id == PLL_V0PLL) sel = 2; @@ -3003,32 +3033,17 @@ static int rk3588_dclk_vop_set_parent(struct rt_clk *clk, sel << DCLK3_VOP_SRC_SEL_SHIFT); break; case DCLK_VOP0: - if (!rt_strcmp(clock_dev_name, "hdmiphypll_clk0")) - sel = 1; - else if (!rt_strcmp(clock_dev_name, "hdmiphypll_clk1")) - sel = 2; - else - sel = 0; + sel = 0; rk_clrsetreg(&cru->clksel_con[112], DCLK0_VOP_SEL_MASK, sel << DCLK0_VOP_SEL_SHIFT); break; case DCLK_VOP1: - if (!rt_strcmp(clock_dev_name, "hdmiphypll_clk0")) - sel = 1; - else if (!rt_strcmp(clock_dev_name, "hdmiphypll_clk1")) - sel = 2; - else - sel = 0; + sel = 0; rk_clrsetreg(&cru->clksel_con[112], DCLK1_VOP_SEL_MASK, sel << DCLK1_VOP_SEL_SHIFT); break; case DCLK_VOP2: - if (!rt_strcmp(clock_dev_name, "hdmiphypll_clk0")) - sel = 1; - else if (!rt_strcmp(clock_dev_name, "hdmiphypll_clk1")) - sel = 2; - else - sel = 0; + sel = 0; rk_clrsetreg(&cru->clksel_con[112], DCLK2_VOP_SEL_MASK, sel << DCLK2_VOP_SEL_SHIFT); break; @@ -3038,9 +3053,16 @@ static int rk3588_dclk_vop_set_parent(struct rt_clk *clk, return 0; } -static rt_err_t rk3588_clk_set_parent(struct rt_clk *clk, struct rt_clk *parent) +static rt_err_t rk3588_clk_set_parent(struct rt_clk_cell *cell, rt_uint8_t idx) { - struct rk3588_clk_platform_data *pdata = clk->priv; + struct rk3588_clk_platform_data *pdata = cell->priv; + struct rt_clk_cell *parent_cell = rt_clk_cell_get_parent_by_index(cell, idx); + + if (!parent_cell || parent_cell->clk_np != cell->clk_np) + { + return -RT_EINVAL; + } + switch (pdata->id) { case DCLK_VOP0_SRC: @@ -3050,7 +3072,7 @@ static rt_err_t rk3588_clk_set_parent(struct rt_clk *clk, struct rt_clk *parent) case DCLK_VOP1: case DCLK_VOP2: case DCLK_VOP3: - return rk3588_dclk_vop_set_parent(clk, parent); + return rk3588_dclk_vop_set_parent(cell, parent_cell); default: return -RT_ENOENT; } @@ -3058,11 +3080,11 @@ static rt_err_t rk3588_clk_set_parent(struct rt_clk *clk, struct rt_clk *parent) return 0; } -static rt_err_t rk3588_clk_set_phase(struct rt_clk *clk, int degrees) +static rt_err_t rk3588_clk_set_phase(struct rt_clk_cell *cell, int degrees) { rt_err_t res; - struct rk3588_clk_platform_data *pdata = clk->priv; - struct rk3588_clk *rk_clk = raw_to_rk_clk(clk->clk_np); + struct rk3588_clk_platform_data *pdata = cell->priv; + struct rk3588_clk *rk_clk = raw_to_rk_clk(cell->clk_np); switch (pdata->id) { @@ -3080,11 +3102,11 @@ static rt_err_t rk3588_clk_set_phase(struct rt_clk *clk, int degrees) return res; } -static rt_base_t rk3588_clk_get_phase(struct rt_clk *clk) +static rt_base_t rk3588_clk_get_phase(struct rt_clk_cell *cell) { rt_base_t res; - struct rk3588_clk_platform_data *pdata = clk->priv; - struct rk3588_clk *rk_clk = raw_to_rk_clk(clk->clk_np); + struct rk3588_clk_platform_data *pdata = cell->priv; + struct rk3588_clk *rk_clk = raw_to_rk_clk(cell->clk_np); switch (pdata->id) { @@ -3102,18 +3124,20 @@ static rt_base_t rk3588_clk_get_phase(struct rt_clk *clk) return res; } -static rt_base_t rk3588_clk_round_rate(struct rt_clk *clk, rt_ubase_t drate, +static rt_base_t rk3588_clk_round_rate(struct rt_clk_cell *cell, rt_ubase_t drate, rt_ubase_t *prate) { + RT_UNUSED(cell); + return rk_clk_pll_round_rate(rk3588_pll_rates, RT_ARRAY_SIZE(rk3588_pll_rates), drate, prate); } static const struct rt_clk_ops rk3588_clk_ops = { - .init = rk3588_clk_init, .enable = rk3588_clk_enable, .disable = rk3588_clk_disable, .is_enabled = rk3588_clk_is_enabled, + .recalc_rate = rk3588_clk_recalc_rate, .set_rate = rk3588_clk_set_rate, .set_parent = rk3588_clk_set_parent, .set_phase = rk3588_clk_set_phase, @@ -3212,16 +3236,27 @@ priv->cru = (struct rk3588_cru *)rk_clk->base; static rt_err_t clk_rk3588_probe(struct rt_platform_device *pdev) { rt_err_t err; - rt_size_t data_size = CLK_NR_CLKS * sizeof(struct rk3588_clk_platform_data); + rt_size_t clk_nr = CLK_NR_CLKS; + rt_size_t pdata_size = RT_ALIGN(clk_nr * sizeof(struct rk3588_clk_platform_data), RT_ALIGN_SIZE); + rt_size_t cells_size = RT_ALIGN(clk_nr * sizeof(struct rt_clk_cell), RT_ALIGN_SIZE); + rt_size_t cells_list_size = clk_nr * sizeof(struct rt_clk_cell *); struct rk3588_clk *rk_clk; struct rt_ofw_node *np = pdev->parent.ofw_node; - rk_clk = rt_malloc(sizeof(*rk_clk) + data_size); + rk_clk = rt_malloc(sizeof(*rk_clk) + pdata_size + cells_size + cells_list_size); if (rk_clk) { + rt_size_t total_size = sizeof(*rk_clk) + pdata_size + cells_size + cells_list_size; + rt_uint8_t *mem; void *softrst_regs = RT_NULL; - rt_memset(&rk_clk->parent, 0, sizeof(rk_clk->parent)); + + rt_memset(rk_clk, 0, total_size); + + mem = (rt_uint8_t *)rk_clk->pdata; + rk_clk->cells = (struct rt_clk_cell *)(mem + pdata_size); + rk_clk->cells_list = (struct rt_clk_cell **)((rt_uint8_t *)rk_clk->cells + cells_size); + rk_clk->cells_nr = clk_nr; rk_clk->base = rt_ofw_iomap(np, 0); /*rt_kprintf("base %p\n", rk_clk->base);*/ @@ -3236,9 +3271,14 @@ static rt_err_t clk_rk3588_probe(struct rt_platform_device *pdev) softrst_regs = &rk_clk->clk_info.cru->softrst_con; - rk_clk->parent.parent.ops = &rk3588_clk_ops; + rk_clk->parent.parent.dev = &pdev->parent; + rk_clk->parent.parent.cells_nr = rk_clk->cells_nr; + rk_clk->parent.parent.cells = rk_clk->cells_list; + rk_clk->parent.parent.multi_clk = rk_clk->cells_nr; + + rk3588_clk_init_cells(rk_clk, np); - if ((err = rt_clk_register(&rk_clk->parent.parent, RT_NULL))) + if ((err = rt_clk_register(&rk_clk->parent.parent))) { goto _fail; } diff --git a/bsp/rockchip/rk3500/driver/uart8250/SConscript b/bsp/rockchip/rk3500/driver/uart8250/SConscript index 7f7b94a1474..7a286077658 100755 --- a/bsp/rockchip/rk3500/driver/uart8250/SConscript +++ b/bsp/rockchip/rk3500/driver/uart8250/SConscript @@ -3,11 +3,7 @@ from building import * cwd = GetCurrentDir() CPPPATH = [cwd] -src = ['core.c', 'early.c'] - -if GetDepend(['RT_SERIAL_8250']): - src += ['8250-dw.c'] - src += ['fiq-debugger.c'] +src = ['core.c', 'early.c', '8250-dw.c', 'fiq-debugger.c'] group = DefineGroup('DeviceDrivers', src, depend = [''], CPPPATH = CPPPATH) Return('group') diff --git a/bsp/rockchip/rk3500/rtconfig.h b/bsp/rockchip/rk3500/rtconfig.h index 3eaab8291ef..4868732619e 100644 --- a/bsp/rockchip/rk3500/rtconfig.h +++ b/bsp/rockchip/rk3500/rtconfig.h @@ -239,10 +239,10 @@ #define RT_PIC_ARM_GIC_V3 #define RT_USING_PIN #define RT_USING_PINCTRL -#define RT_USING_KTIME +#define RT_USING_CLOCK_TIME #define RT_USING_CLK -#define RT_USING_HWTIMER -#define RT_HWTIMER_ARM_ARCH +#define RT_USING_CLOCK_TIME +#define RT_CLOCK_TIME_ARM_ARCH /* end of Device Drivers */ /* C/C++ and POSIX layer */ @@ -443,13 +443,9 @@ /* end of CPP11 */ -/* LwIP */ - -/* end of LwIP */ - -/* Netdev */ +/* Network */ -/* end of Netdev */ +/* end of Network */ /* Utest Framework */ @@ -586,6 +582,10 @@ /* GD32 Drivers */ /* end of GD32 Drivers */ + +/* HPMicro SDK */ + +/* end of HPMicro SDK */ /* end of HAL & SDK Drivers */ /* sensors drivers */ @@ -673,8 +673,7 @@ #define RT_CLK_ROCKCHIP #define RT_CLK_ROCKCHIP_RK3568 #define RT_CLK_ROCKCHIP_RK3588 -#define RT_SERIAL_8250 -#define RT_HWTIMER_ROCKCHIP +#define RT_CLOCK_TIMER_ROCKCHIP /* end of RT-Thread rockchip RK3500 drivers */ #define SOC_RK3568 From 933044cfe0dfe0f0d87b5fe775d9ae16804722a0 Mon Sep 17 00:00:00 2001 From: bernard Date: Wed, 31 Dec 2025 18:08:58 +0800 Subject: [PATCH 08/25] [bsp][hpmicro] Add rt_hw_us_delay hook and update board delays --- bsp/hpmicro/hpm5300evk/board/board.c | 10 ++++++---- bsp/hpmicro/hpm5301evklite/board/board.c | 9 ++++++--- bsp/hpmicro/hpm5e00evk/board/board.c | 9 +++++++-- bsp/hpmicro/hpm6200evk/board/board.c | 8 ++++++-- bsp/hpmicro/hpm6300evk/board/board.c | 9 ++++++--- bsp/hpmicro/hpm6750evk/board/board.c | 10 +++++++--- bsp/hpmicro/hpm6750evk2/board/board.c | 10 +++++++--- bsp/hpmicro/hpm6750evkmini/board/board.c | 9 ++++++--- bsp/hpmicro/hpm6800evk/board/board.c | 9 ++++++--- bsp/hpmicro/hpm6e00evk/board/board.c | 9 ++++++--- bsp/hpmicro/hpm6p00evk/board/board.c | 9 ++++++--- bsp/hpmicro/libraries/drivers/drv_delay.c | 14 ++++++++++++++ 12 files changed, 83 insertions(+), 32 deletions(-) create mode 100644 bsp/hpmicro/libraries/drivers/drv_delay.c diff --git a/bsp/hpmicro/hpm5300evk/board/board.c b/bsp/hpmicro/hpm5300evk/board/board.c index f967e2deb70..bf8e23c63d0 100644 --- a/bsp/hpmicro/hpm5300evk/board/board.c +++ b/bsp/hpmicro/hpm5300evk/board/board.c @@ -14,8 +14,7 @@ #include "hpm_i2c_drv.h" #include "hpm_pcfg_drv.h" #include - - +#include /** * @brief FLASH configuration option definitions: * option[0]: @@ -231,12 +230,15 @@ void board_init_clock(void) void board_delay_us(uint32_t us) { - clock_cpu_delay_us(us); + rt_hw_us_delay(us); } void board_delay_ms(uint32_t ms) { - clock_cpu_delay_ms(ms); + while (ms--) + { + rt_hw_us_delay(1000); + } } #if !defined(NO_BOARD_TIMER_SUPPORT) || !NO_BOARD_TIMER_SUPPORT diff --git a/bsp/hpmicro/hpm5301evklite/board/board.c b/bsp/hpmicro/hpm5301evklite/board/board.c index 6d2339c1d41..17de776ec59 100644 --- a/bsp/hpmicro/hpm5301evklite/board/board.c +++ b/bsp/hpmicro/hpm5301evklite/board/board.c @@ -14,7 +14,7 @@ #include "hpm_i2c_drv.h" #include "hpm_pcfg_drv.h" #include - +#include /** * @brief FLASH configuration option definitions: * option[0]: @@ -233,12 +233,15 @@ void board_init_clock(void) void board_delay_us(uint32_t us) { - clock_cpu_delay_us(us); + rt_hw_us_delay(us); } void board_delay_ms(uint32_t ms) { - clock_cpu_delay_ms(ms); + while (ms--) + { + rt_hw_us_delay(1000); + } } #if !defined(NO_BOARD_TIMER_SUPPORT) || !NO_BOARD_TIMER_SUPPORT diff --git a/bsp/hpmicro/hpm5e00evk/board/board.c b/bsp/hpmicro/hpm5e00evk/board/board.c index 14b9f61a8c8..8273e5ed9c1 100644 --- a/bsp/hpmicro/hpm5e00evk/board/board.c +++ b/bsp/hpmicro/hpm5e00evk/board/board.c @@ -18,6 +18,8 @@ #include "hpm_enet_drv.h" #include "hpm_usb_drv.h" #include "hpm_pcfg_drv.h" +#include +#include /** * @brief FLASH configuration option definitions: @@ -178,12 +180,15 @@ void board_init(void) void board_delay_us(uint32_t us) { - clock_cpu_delay_us(us); + rt_hw_us_delay(us); } void board_delay_ms(uint32_t ms) { - clock_cpu_delay_ms(ms); + while (ms--) + { + rt_hw_us_delay(1000); + } } #if !defined(NO_BOARD_TIMER_SUPPORT) || !NO_BOARD_TIMER_SUPPORT diff --git a/bsp/hpmicro/hpm6200evk/board/board.c b/bsp/hpmicro/hpm6200evk/board/board.c index 5025badde52..ac3aad4f5ae 100644 --- a/bsp/hpmicro/hpm6200evk/board/board.c +++ b/bsp/hpmicro/hpm6200evk/board/board.c @@ -20,6 +20,7 @@ #include "hpm_pllctlv2_drv.h" #include "hpm_pcfg_drv.h" #include +#include /** * @brief FLASH configuration option definitions: * option[0]: @@ -190,12 +191,15 @@ void board_init_core1(void) void board_delay_us(uint32_t us) { - clock_cpu_delay_us(us); + rt_hw_us_delay(us); } void board_delay_ms(uint32_t ms) { - clock_cpu_delay_ms(ms); + while (ms--) + { + rt_hw_us_delay(1000); + } } #if !defined(NO_BOARD_TIMER_SUPPORT) || !NO_BOARD_TIMER_SUPPORT diff --git a/bsp/hpmicro/hpm6300evk/board/board.c b/bsp/hpmicro/hpm6300evk/board/board.c index 8e9a744078b..5ee4337ea34 100644 --- a/bsp/hpmicro/hpm6300evk/board/board.c +++ b/bsp/hpmicro/hpm6300evk/board/board.c @@ -24,7 +24,7 @@ #include "hpm_debug_console.h" #include - +#include /** * @brief FLASH configuration option definitions: * option[0]: @@ -193,12 +193,15 @@ uint32_t board_init_femc_clock(void) void board_delay_us(uint32_t us) { - clock_cpu_delay_us(us); + rt_hw_us_delay(us); } void board_delay_ms(uint32_t ms) { - clock_cpu_delay_ms(ms); + while (ms--) + { + rt_hw_us_delay(1000); + } } #if !defined(NO_BOARD_TIMER_SUPPORT) || !NO_BOARD_TIMER_SUPPORT diff --git a/bsp/hpmicro/hpm6750evk/board/board.c b/bsp/hpmicro/hpm6750evk/board/board.c index daa8d8b45f7..7abf51e3b6b 100644 --- a/bsp/hpmicro/hpm6750evk/board/board.c +++ b/bsp/hpmicro/hpm6750evk/board/board.c @@ -23,9 +23,10 @@ #include "hpm_pllctl_drv.h" #include "hpm_enet_drv.h" #include "hpm_pcfg_drv.h" -#include #if defined(ENET_MULTIPLE_PORT) && ENET_MULTIPLE_PORT #include "hpm_enet_phy_common.h" +#include +#include #endif /** @@ -311,12 +312,15 @@ void board_panel_para_to_lcdc(lcdc_config_t *config) void board_delay_ms(uint32_t ms) { - clock_cpu_delay_ms(ms); + while (ms--) + { + rt_hw_us_delay(1000); + } } void board_delay_us(uint32_t us) { - clock_cpu_delay_us(us); + rt_hw_us_delay(us); } #if !defined(NO_BOARD_TIMER_SUPPORT) || !NO_BOARD_TIMER_SUPPORT diff --git a/bsp/hpmicro/hpm6750evk2/board/board.c b/bsp/hpmicro/hpm6750evk2/board/board.c index 73fdf9f8666..798abc05cdc 100644 --- a/bsp/hpmicro/hpm6750evk2/board/board.c +++ b/bsp/hpmicro/hpm6750evk2/board/board.c @@ -23,9 +23,10 @@ #include "hpm_pllctl_drv.h" #include "hpm_enet_drv.h" #include "hpm_pcfg_drv.h" -#include #if defined(ENET_MULTIPLE_PORT) && ENET_MULTIPLE_PORT #include "hpm_enet_phy_common.h" +#include +#include #endif /** @@ -311,12 +312,15 @@ void board_panel_para_to_lcdc(lcdc_config_t *config) void board_delay_ms(uint32_t ms) { - clock_cpu_delay_ms(ms); + while (ms--) + { + rt_hw_us_delay(1000); + } } void board_delay_us(uint32_t us) { - clock_cpu_delay_us(us); + rt_hw_us_delay(us); } #if !defined(NO_BOARD_TIMER_SUPPORT) || !NO_BOARD_TIMER_SUPPORT diff --git a/bsp/hpmicro/hpm6750evkmini/board/board.c b/bsp/hpmicro/hpm6750evkmini/board/board.c index 17a6df6a568..1ba6a934fdb 100644 --- a/bsp/hpmicro/hpm6750evkmini/board/board.c +++ b/bsp/hpmicro/hpm6750evkmini/board/board.c @@ -24,7 +24,7 @@ #include "hpm_pcfg_drv.h" #include "hpm_enet_drv.h" #include - +#include static bool invert_led_level; /** @@ -369,12 +369,15 @@ void board_panel_para_to_lcdc(lcdc_config_t *config) void board_delay_ms(uint32_t ms) { - clock_cpu_delay_ms(ms); + while (ms--) + { + rt_hw_us_delay(1000); + } } void board_delay_us(uint32_t us) { - clock_cpu_delay_us(us); + rt_hw_us_delay(us); } #if !defined(NO_BOARD_TIMER_SUPPORT) || !NO_BOARD_TIMER_SUPPORT diff --git a/bsp/hpmicro/hpm6800evk/board/board.c b/bsp/hpmicro/hpm6800evk/board/board.c index 52da53c800d..8976f711daf 100644 --- a/bsp/hpmicro/hpm6800evk/board/board.c +++ b/bsp/hpmicro/hpm6800evk/board/board.c @@ -27,7 +27,7 @@ #include "hpm_mipi_dsi_drv.h" #include "hpm_mipi_dsi_phy_drv.h" #include - +#include /** * @brief FLASH configuration option definitions: * option[0]: @@ -191,12 +191,15 @@ void board_init(void) void board_delay_us(uint32_t us) { - clock_cpu_delay_us(us); + rt_hw_us_delay(us); } void board_delay_ms(uint32_t ms) { - clock_cpu_delay_ms(ms); + while (ms--) + { + rt_hw_us_delay(1000); + } } #if !defined(NO_BOARD_TIMER_SUPPORT) || !NO_BOARD_TIMER_SUPPORT diff --git a/bsp/hpmicro/hpm6e00evk/board/board.c b/bsp/hpmicro/hpm6e00evk/board/board.c index e786fe8e757..7710f4ce0c2 100644 --- a/bsp/hpmicro/hpm6e00evk/board/board.c +++ b/bsp/hpmicro/hpm6e00evk/board/board.c @@ -23,7 +23,7 @@ #include "hpm_esc_drv.h" #include "hpm_tsw_drv.h" #include - +#include /** * @brief FLASH configuration option definitions: * option[0]: @@ -219,12 +219,15 @@ uint32_t board_init_femc_clock(void) void board_delay_us(uint32_t us) { - clock_cpu_delay_us(us); + rt_hw_us_delay(us); } void board_delay_ms(uint32_t ms) { - clock_cpu_delay_ms(ms); + while (ms--) + { + rt_hw_us_delay(1000); + } } #if !defined(NO_BOARD_TIMER_SUPPORT) || !NO_BOARD_TIMER_SUPPORT diff --git a/bsp/hpmicro/hpm6p00evk/board/board.c b/bsp/hpmicro/hpm6p00evk/board/board.c index 1c2f11ea064..eaef898dbf9 100644 --- a/bsp/hpmicro/hpm6p00evk/board/board.c +++ b/bsp/hpmicro/hpm6p00evk/board/board.c @@ -20,7 +20,7 @@ #include "hpm_usb_drv.h" #include "hpm_femc_drv.h" #include - +#include /** * @brief FLASH configuration option definitions: * option[0]: @@ -202,12 +202,15 @@ uint32_t board_init_femc_clock(void) void board_delay_us(uint32_t us) { - clock_cpu_delay_us(us); + rt_hw_us_delay(us); } void board_delay_ms(uint32_t ms) { - clock_cpu_delay_ms(ms); + while (ms--) + { + rt_hw_us_delay(1000); + } } #if !defined(NO_BOARD_TIMER_SUPPORT) || !NO_BOARD_TIMER_SUPPORT diff --git a/bsp/hpmicro/libraries/drivers/drv_delay.c b/bsp/hpmicro/libraries/drivers/drv_delay.c new file mode 100644 index 00000000000..f14b45a29e7 --- /dev/null +++ b/bsp/hpmicro/libraries/drivers/drv_delay.c @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2025 HPMicro + * + * SPDX-License-Identifier: BSD-3-Clause + * + */ + +#include +#include "hpm_clock_drv.h" + +void rt_hw_us_delay(rt_uint32_t us) +{ + clock_cpu_delay_us(us); +} From 74b4f88718c032ed7420c1cc961b298b05c5728b Mon Sep 17 00:00:00 2001 From: bernard Date: Thu, 1 Jan 2026 08:50:00 +0800 Subject: [PATCH 09/25] [bsp][stm32l496-st-nucleo] enable clock_time for hwtimer sample in ci --- .../stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml b/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml index 98c22f549db..75334fb481d 100644 --- a/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml +++ b/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml @@ -64,6 +64,7 @@ pkg.kernel_en_sample: - CONFIG_KERNEL_SAMPLES_USING_PRODUCER_CONSUMER=y pkg.peripheral.sample: kconfig: + - CONFIG_RT_USING_CLOCK_TIME - CONFIG_PKG_USING_PERIPHERAL_SAMPLES=y - CONFIG_PERIPHERAL_SAMPLES_USING_ADC=y - CONFIG_PERIPHERAL_SAMPLES_USING_HWTIMER=y From c2a396f9834d7b975ed55cfe846307f37e251871 Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 15:47:53 +0800 Subject: [PATCH 10/25] [bsp][hpmicro] Fix rtconfig include scope for hpm6750evk Move rtconfig.h include outside the ENET_MULTIPLE_PORT guard for hpm6750evk and hpm6750evk2 so configuration macros are available regardless of ENET settings. --- bsp/hpmicro/hpm6750evk/board/board.c | 3 ++- bsp/hpmicro/hpm6750evk2/board/board.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/bsp/hpmicro/hpm6750evk/board/board.c b/bsp/hpmicro/hpm6750evk/board/board.c index 7abf51e3b6b..a945c65f4bf 100644 --- a/bsp/hpmicro/hpm6750evk/board/board.c +++ b/bsp/hpmicro/hpm6750evk/board/board.c @@ -23,9 +23,10 @@ #include "hpm_pllctl_drv.h" #include "hpm_enet_drv.h" #include "hpm_pcfg_drv.h" +#include + #if defined(ENET_MULTIPLE_PORT) && ENET_MULTIPLE_PORT #include "hpm_enet_phy_common.h" -#include #include #endif diff --git a/bsp/hpmicro/hpm6750evk2/board/board.c b/bsp/hpmicro/hpm6750evk2/board/board.c index 798abc05cdc..c62b9334162 100644 --- a/bsp/hpmicro/hpm6750evk2/board/board.c +++ b/bsp/hpmicro/hpm6750evk2/board/board.c @@ -23,9 +23,10 @@ #include "hpm_pllctl_drv.h" #include "hpm_enet_drv.h" #include "hpm_pcfg_drv.h" +#include + #if defined(ENET_MULTIPLE_PORT) && ENET_MULTIPLE_PORT #include "hpm_enet_phy_common.h" -#include #include #endif From 887ab31842c5c105b3fde0754dac6879d2fc2a2a Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 15:52:29 +0800 Subject: [PATCH 11/25] [bsp][raspi3] select clock time for systimer --- bsp/raspberry-pi/raspi3-64/driver/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/bsp/raspberry-pi/raspi3-64/driver/Kconfig b/bsp/raspberry-pi/raspi3-64/driver/Kconfig index 6ebead47a25..5632f724627 100644 --- a/bsp/raspberry-pi/raspi3-64/driver/Kconfig +++ b/bsp/raspberry-pi/raspi3-64/driver/Kconfig @@ -27,6 +27,7 @@ menu "Hardware Drivers Config" menuconfig BSP_USING_SYSTIMER bool "Enable SYSTIMER" + select RT_USING_CLOCK_TIME default n if BSP_USING_SYSTIMER From 90f96de37b570a176d99c10b16c5fa72a6a0b801 Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:12:17 +0800 Subject: [PATCH 12/25] [bsp][hpm5300evk] Trim trailing blank line --- bsp/hpmicro/hpm5300evk/board/board.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bsp/hpmicro/hpm5300evk/board/board.c b/bsp/hpmicro/hpm5300evk/board/board.c index bf8e23c63d0..323a3974baf 100644 --- a/bsp/hpmicro/hpm5300evk/board/board.c +++ b/bsp/hpmicro/hpm5300evk/board/board.c @@ -626,4 +626,3 @@ uint32_t board_init_gptmr_clock(GPTMR_Type *ptr) } return freq; } - From 73f0c4f58e90a801986a77389d420ec96f091a84 Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:12:23 +0800 Subject: [PATCH 13/25] [bsp][hpm5301evklite] Trim trailing blank line --- bsp/hpmicro/hpm5301evklite/board/board.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bsp/hpmicro/hpm5301evklite/board/board.c b/bsp/hpmicro/hpm5301evklite/board/board.c index 17de776ec59..961b7d9fcb4 100644 --- a/bsp/hpmicro/hpm5301evklite/board/board.c +++ b/bsp/hpmicro/hpm5301evklite/board/board.c @@ -507,4 +507,3 @@ uint32_t board_init_gptmr_clock(GPTMR_Type *ptr) } return freq; } - From ab3557e49465a75a0847969cd4116ace38538ffd Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:12:30 +0800 Subject: [PATCH 14/25] [bsp][hpm5e00evk] Trim trailing blank line --- bsp/hpmicro/hpm5e00evk/board/board.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bsp/hpmicro/hpm5e00evk/board/board.c b/bsp/hpmicro/hpm5e00evk/board/board.c index 8273e5ed9c1..41137ba6f00 100644 --- a/bsp/hpmicro/hpm5e00evk/board/board.c +++ b/bsp/hpmicro/hpm5e00evk/board/board.c @@ -718,4 +718,3 @@ uint32_t board_init_gptmr_clock(GPTMR_Type *ptr) } return freq; } - From 16fbd4a828f3e8e9adc8f84ff20761b053f62798 Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:12:37 +0800 Subject: [PATCH 15/25] [bsp][hpm6200evk] Trim trailing blank line --- bsp/hpmicro/hpm6200evk/board/board.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bsp/hpmicro/hpm6200evk/board/board.c b/bsp/hpmicro/hpm6200evk/board/board.c index ac3aad4f5ae..87b28b838be 100644 --- a/bsp/hpmicro/hpm6200evk/board/board.c +++ b/bsp/hpmicro/hpm6200evk/board/board.c @@ -733,4 +733,3 @@ uint32_t board_init_gptmr_clock(GPTMR_Type *ptr) } return freq; } - From 62440faf665264052dfbd26d96c441dab8e35dfc Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:12:44 +0800 Subject: [PATCH 16/25] [bsp][hpm6300evk] Trim trailing blank line --- bsp/hpmicro/hpm6300evk/board/board.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bsp/hpmicro/hpm6300evk/board/board.c b/bsp/hpmicro/hpm6300evk/board/board.c index 5ee4337ea34..8aef75b62e4 100644 --- a/bsp/hpmicro/hpm6300evk/board/board.c +++ b/bsp/hpmicro/hpm6300evk/board/board.c @@ -823,4 +823,3 @@ uint32_t board_init_gptmr_clock(GPTMR_Type *ptr) } return freq; } - From e0c17e5d3e99a15c98e60f69709289f171ae36cd Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:12:52 +0800 Subject: [PATCH 17/25] [bsp][hpm6750evk] Trim trailing blank line --- bsp/hpmicro/hpm6750evk/board/board.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bsp/hpmicro/hpm6750evk/board/board.c b/bsp/hpmicro/hpm6750evk/board/board.c index a945c65f4bf..f9bbc614c23 100644 --- a/bsp/hpmicro/hpm6750evk/board/board.c +++ b/bsp/hpmicro/hpm6750evk/board/board.c @@ -1275,4 +1275,3 @@ uint32_t board_init_gptmr_clock(GPTMR_Type *ptr) } return freq; } - From 7a0274364e50d74376ed08b74d45666176c2f84e Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:12:59 +0800 Subject: [PATCH 18/25] [bsp][hpm6750evk2] Trim trailing blank line --- bsp/hpmicro/hpm6750evk2/board/board.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bsp/hpmicro/hpm6750evk2/board/board.c b/bsp/hpmicro/hpm6750evk2/board/board.c index c62b9334162..fc162f6475d 100644 --- a/bsp/hpmicro/hpm6750evk2/board/board.c +++ b/bsp/hpmicro/hpm6750evk2/board/board.c @@ -1272,4 +1272,3 @@ uint32_t board_init_gptmr_clock(GPTMR_Type *ptr) } return freq; } - From 53558e0f99bfe8da14b74d34a92b715502f85042 Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:13:06 +0800 Subject: [PATCH 19/25] [bsp][hpm6750evkmini] Trim trailing blank line --- bsp/hpmicro/hpm6750evkmini/board/board.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bsp/hpmicro/hpm6750evkmini/board/board.c b/bsp/hpmicro/hpm6750evkmini/board/board.c index 1ba6a934fdb..be841cd44fb 100644 --- a/bsp/hpmicro/hpm6750evkmini/board/board.c +++ b/bsp/hpmicro/hpm6750evkmini/board/board.c @@ -1213,4 +1213,3 @@ uint32_t board_init_gptmr_clock(GPTMR_Type *ptr) } return freq; } - From 89103402b59137117245ab2783b5b995e4e0ed86 Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:13:14 +0800 Subject: [PATCH 20/25] [bsp][hpm6800evk] Trim trailing blank line --- bsp/hpmicro/hpm6800evk/board/board.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bsp/hpmicro/hpm6800evk/board/board.c b/bsp/hpmicro/hpm6800evk/board/board.c index 8976f711daf..8200bb9c8e6 100644 --- a/bsp/hpmicro/hpm6800evk/board/board.c +++ b/bsp/hpmicro/hpm6800evk/board/board.c @@ -1472,4 +1472,3 @@ uint32_t board_init_gptmr_clock(GPTMR_Type *ptr) } return freq; } - From 886ec9a9f375bba207e97087c6c99fa509c79bf6 Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:13:20 +0800 Subject: [PATCH 21/25] [bsp][hpm6e00evk] Trim trailing blank line --- bsp/hpmicro/hpm6e00evk/board/board.c | 1 - 1 file changed, 1 deletion(-) diff --git a/bsp/hpmicro/hpm6e00evk/board/board.c b/bsp/hpmicro/hpm6e00evk/board/board.c index 7710f4ce0c2..0cbf04d1345 100644 --- a/bsp/hpmicro/hpm6e00evk/board/board.c +++ b/bsp/hpmicro/hpm6e00evk/board/board.c @@ -1078,4 +1078,3 @@ uint32_t board_init_gptmr_clock(GPTMR_Type *ptr) } return freq; } - From b3281abdebe37d5b716851498b4e142e01800853 Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:47:30 +0800 Subject: [PATCH 22/25] [bsp][nxp] switch lpc178x to gcc and remove mcx timer source --- bsp/nxp/lpc/lpc178x/rtconfig.py | 2 +- bsp/nxp/mcx/mcxc/Libraries/drivers/SConscript | 3 --- bsp/nxp/mcx/mcxe/Libraries/drivers/SConscript | 3 --- 3 files changed, 1 insertion(+), 7 deletions(-) diff --git a/bsp/nxp/lpc/lpc178x/rtconfig.py b/bsp/nxp/lpc/lpc178x/rtconfig.py index 3f2d8049039..4794f9a35ba 100644 --- a/bsp/nxp/lpc/lpc178x/rtconfig.py +++ b/bsp/nxp/lpc/lpc178x/rtconfig.py @@ -3,7 +3,7 @@ # toolchains options ARCH='arm' CPU='cortex-m3' -CROSS_TOOL='keil' +CROSS_TOOL='gcc' BOARD_NAME = 'lpc178x' if os.getenv('RTT_CC'): diff --git a/bsp/nxp/mcx/mcxc/Libraries/drivers/SConscript b/bsp/nxp/mcx/mcxc/Libraries/drivers/SConscript index fc9fc7c0d50..56456e2fec7 100644 --- a/bsp/nxp/mcx/mcxc/Libraries/drivers/SConscript +++ b/bsp/nxp/mcx/mcxc/Libraries/drivers/SConscript @@ -28,9 +28,6 @@ if GetDepend('BSP_USING_ADC'): if GetDepend('BSP_USING_DAC'): src += ['drv_dac.c'] -if GetDepend('BSP_USING_CLOCK_TIMER'): - src += ['drv_timer.c'] - if GetDepend('BSP_USING_WDT'): src += ['drv_wdt.c'] diff --git a/bsp/nxp/mcx/mcxe/Libraries/drivers/SConscript b/bsp/nxp/mcx/mcxe/Libraries/drivers/SConscript index 3f71a3e0bbb..a902674e857 100644 --- a/bsp/nxp/mcx/mcxe/Libraries/drivers/SConscript +++ b/bsp/nxp/mcx/mcxe/Libraries/drivers/SConscript @@ -22,9 +22,6 @@ if GetDepend('BSP_USING_I2C'): if GetDepend('BSP_USING_ADC'): src += ['drv_adc.c'] -if GetDepend('BSP_USING_CLOCK_TIMER'): - src += ['drv_timer.c'] - if GetDepend('BSP_USING_WDT'): src += ['drv_wdt.c'] From 52da82741f566031984accc1a6dc40e2ed8617ed Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 16:54:51 +0800 Subject: [PATCH 23/25] [bsp][stm32] fix the CONFIG_RT_USING_CLOCK_TIME issue. --- .../stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml b/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml index 75334fb481d..21dbe5769b5 100644 --- a/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml +++ b/bsp/stm32/stm32l496-st-nucleo/.ci/attachconfig/ci.attachconfig.yml @@ -64,7 +64,7 @@ pkg.kernel_en_sample: - CONFIG_KERNEL_SAMPLES_USING_PRODUCER_CONSUMER=y pkg.peripheral.sample: kconfig: - - CONFIG_RT_USING_CLOCK_TIME + - CONFIG_RT_USING_CLOCK_TIME=y - CONFIG_PKG_USING_PERIPHERAL_SAMPLES=y - CONFIG_PERIPHERAL_SAMPLES_USING_ADC=y - CONFIG_PERIPHERAL_SAMPLES_USING_HWTIMER=y From 783f31b9bebad715bc5da1ae4f4c00f202aa7439 Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 21:08:08 +0800 Subject: [PATCH 24/25] [docs][clock_time] add clock time documentation --- .../device-driver/clock_time/README.md | 87 +++ .../device-driver/clock_time/README_zh.md | 76 +++ .../clock_time/clock_boottime.md | 87 +++ .../clock_time/clock_boottime_zh.md | 78 +++ .../device-driver/clock_time/clock_hrtimer.md | 223 ++++++++ .../clock_time/clock_hrtimer_zh.md | 208 +++++++ .../clock_time/clock_time_core.md | 274 ++++++++++ .../clock_time/clock_time_core_zh.md | 256 +++++++++ .../device-driver/clock_time/clock_timer.md | 515 ++++++++++++++++++ .../clock_time/clock_timer_zh.md | 370 +++++++++++++ .../clock_time/figures/clock_time_arch.svg | 78 +++ 11 files changed, 2252 insertions(+) create mode 100644 documentation/6.components/device-driver/clock_time/README.md create mode 100644 documentation/6.components/device-driver/clock_time/README_zh.md create mode 100644 documentation/6.components/device-driver/clock_time/clock_boottime.md create mode 100644 documentation/6.components/device-driver/clock_time/clock_boottime_zh.md create mode 100644 documentation/6.components/device-driver/clock_time/clock_hrtimer.md create mode 100644 documentation/6.components/device-driver/clock_time/clock_hrtimer_zh.md create mode 100644 documentation/6.components/device-driver/clock_time/clock_time_core.md create mode 100644 documentation/6.components/device-driver/clock_time/clock_time_core_zh.md create mode 100644 documentation/6.components/device-driver/clock_time/clock_timer.md create mode 100644 documentation/6.components/device-driver/clock_time/clock_timer_zh.md create mode 100644 documentation/6.components/device-driver/clock_time/figures/clock_time_arch.svg diff --git a/documentation/6.components/device-driver/clock_time/README.md b/documentation/6.components/device-driver/clock_time/README.md new file mode 100644 index 00000000000..78efd7ab975 --- /dev/null +++ b/documentation/6.components/device-driver/clock_time/README.md @@ -0,0 +1,87 @@ +@page page_device_clock_time Clock Time Subsystem + +# Overview + +The clock_time subsystem provides a unified, high-resolution time base and +programmable event scheduling for RT-Thread. It decouples a monotonic counter +(clock source) from deadline delivery (clock event), so platforms can mix +hardware counters and timers while the kernel and libc see consistent behavior. + +# Architecture + +![Clock time architecture](figures/clock_time_arch.svg) + +## Layering and Responsibilities + +- Upper layers: kernel services (timeouts, delays), POSIX/libc time APIs + (clock_gettime, nanosleep), and RTC/soft-RTC consume the monotonic time base + and timer events exposed by clock_time. +- clock_time subsystem: core APIs, clock source/event devices, the hrtimer + scheduler, boottime helpers, and the clock_timer adapter. +- Lower layers: BSP drivers provide hardware counters and timers, which are + wrapped as clock_time devices or clock_timer devices. + +## Internal Components + +- Core API (clock_time_core.c) + - Registers clock_time devices, manages default source/event selection, and + provides counter <-> nanosecond conversion with fixed-point scaling. +- Clock source device (rt_clock_time_device + RT_CLOCK_TIME_CAP_SOURCE) + - Supplies a free-running counter and frequency for monotonic time reads. +- Clock event device (rt_clock_time_device + RT_CLOCK_TIME_CAP_EVENT) + - Programs the next deadline and calls rt_clock_time_event_isr() on expiry. +- Clock hrtimer (clock_hrtimer.c) + - Schedules high-resolution timeouts, programs the next event, and dispatches + callbacks. Falls back to software timer when no hardware event is available. +- Boottime helpers (clock_boottime.c) + - Converts the monotonic counter into timeval/timespec/seconds for upper + layers. +- Clock timer adapter (clock_timer.c) + - Exposes a unified hardware timer device (rt_clock_timer) and can register + itself as a clock_time event device. +- Architecture sources (arch/* and clock_time_arm_arch.c) + - Provide fast CPU counters or architectural timers and register them as the + default clock source when available. + +## Data Flow + +- Read path + - Clock source counter -> scaled resolution -> nanoseconds -> boottime or + clock_gettime. +- Timeout path + - HRTimer queue -> next expiry -> set_timeout on event device -> event ISR -> + hrtimer processing -> callbacks. + +# Configuration + +Enable the subsystem in menuconfig: + +``` +RT-Thread Components -> + Device Drivers -> + [*] Clock time subsystem (RT_USING_CLOCK_TIME) +``` + +Optional settings: + +- CLOCK_TIMER_FREQ (RISC-V): base counter frequency used by the clock source. +- RT_CLOCK_TIME_ARM_ARCH: enable ARM architected timer integration (DM/OFW). + +# BSP Integration Checklist + +- Provide a clock source: + - Register a rt_clock_time_device with CAP_SOURCE, or use the provided + architecture source (AArch64/RISC-V) via rt_clock_time_source_init(). +- Provide a clock event: + - Register a rt_clock_time_device with CAP_EVENT and call + rt_clock_time_event_isr() in its interrupt handler. + - Or register a rt_clock_timer device; it can become the default event + device automatically. +- Keep event ISRs short; heavy work should run in thread context if needed. + +# Detailed Documents + +- @subpage page_device_clock_time_core +- @subpage page_device_clock_hrtimer +- @subpage page_device_clock_boottime +- @subpage page_device_clock_timer diff --git a/documentation/6.components/device-driver/clock_time/README_zh.md b/documentation/6.components/device-driver/clock_time/README_zh.md new file mode 100644 index 00000000000..4039cb39baa --- /dev/null +++ b/documentation/6.components/device-driver/clock_time/README_zh.md @@ -0,0 +1,76 @@ +# Clock Time 子系统概述 + +clock_time 子系统为 RT-Thread 提供统一的高精度时间基准与事件调度能力。 +它将单调计数（时钟源）与超时事件（时钟事件）解耦，使平台可以组合不同的 +硬件计数器与定时器，同时为内核与 libc 提供一致的时间行为。 + +# 软件架构 + +![Clock time architecture](figures/clock_time_arch.svg) + +## 分层关系与职责 + +- 上层：内核超时/延时、POSIX/libc 时间接口（clock_gettime、nanosleep）， + 以及 RTC/软 RTC，直接使用 clock_time 提供的时间与事件能力。 +- clock_time 子系统：核心 API、时钟源/事件设备、高精度定时器调度器、 + boottime 辅助函数、clock_timer 适配层。 +- 下层：BSP 驱动提供硬件计数器与定时器，并封装为 clock_time 设备或 + clock_timer 设备。 + +## 内部组成 + +- Core API（clock_time_core.c） + - 负责设备注册、默认源/事件选择，以及计数 <-> 纳秒的缩放换算。 +- 时钟源设备（rt_clock_time_device + RT_CLOCK_TIME_CAP_SOURCE） + - 提供自由运行计数器与频率，作为单调时间基准。 +- 时钟事件设备（rt_clock_time_device + RT_CLOCK_TIME_CAP_EVENT） + - 负责下一次超时编程，并在到期时调用 rt_clock_time_event_isr()。 +- 高精度定时器（clock_hrtimer.c） + - 维护超时队列、设置下一次事件并分发回调。没有硬件事件时退化为软件定时器。 +- Boottime 辅助（clock_boottime.c） + - 将单调计数转换为 timeval/timespec/秒，供上层使用。 +- Clock timer 适配层（clock_timer.c） + - 提供统一的硬件定时器设备（rt_clock_timer），并可注册为事件设备。 +- 架构源（arch/* 与 clock_time_arm_arch.c） + - 提供 CPU 计数器或架构定时器，并在可用时设置为默认时钟源。 + +## 数据流 + +- 读取路径 + - 时钟源计数 -> 缩放分辨率 -> 纳秒 -> boottime 或 clock_gettime。 +- 超时路径 + - hrtimer 队列 -> 下一到期 -> 事件设备 set_timeout -> 事件中断 -> + hrtimer 处理 -> 回调分发。 + +# 配置选项 + +在 menuconfig 中启用： + +``` +RT-Thread Components -> + Device Drivers -> + [*] Clock time subsystem (RT_USING_CLOCK_TIME) +``` + +可选配置： + +- CLOCK_TIMER_FREQ（RISC-V）：时钟源使用的基础计数频率。 +- RT_CLOCK_TIME_ARM_ARCH：启用 ARM 架构定时器集成（DM/OFW）。 + +# BSP 集成要点 + +- 提供时钟源： + - 注册带 CAP_SOURCE 的 rt_clock_time_device，或使用 + rt_clock_time_source_init() 提供的架构源。 +- 提供时钟事件： + - 注册带 CAP_EVENT 的 rt_clock_time_device，并在中断中调用 + rt_clock_time_event_isr()。 + - 或直接注册 rt_clock_timer 设备，自动成为默认事件设备。 +- 事件中断应保持简短，复杂处理建议转到线程上下文。 + +# 详细文档 + +- clock_time_core.md +- clock_hrtimer.md +- clock_boottime.md +- clock_timer.md diff --git a/documentation/6.components/device-driver/clock_time/clock_boottime.md b/documentation/6.components/device-driver/clock_time/clock_boottime.md new file mode 100644 index 00000000000..205c861311e --- /dev/null +++ b/documentation/6.components/device-driver/clock_time/clock_boottime.md @@ -0,0 +1,87 @@ +@page page_device_clock_boottime Clock Boottime Helpers + +# Overview + +Boottime helpers convert the clock_time monotonic counter into standard time +formats. The resulting values represent time since boot and do not depend on +RTC or wall-clock settings. + +# API + +```c +rt_err_t rt_clock_boottime_get_us(struct timeval *tv); +rt_err_t rt_clock_boottime_get_s(time_t *t); +rt_err_t rt_clock_boottime_get_ns(struct timespec *ts); +``` + +All functions return RT_EOK on success or -RT_ERROR if the clock source is +unavailable. The returned values are monotonic and suitable for measuring +elapsed time. + +## rt_clock_boottime_get_us + +```c +rt_err_t rt_clock_boottime_get_us(struct timeval *tv); +``` + +- Purpose: get time since boot as seconds + microseconds. +- Parameters: `tv` must be a valid pointer to `struct timeval`. +- Return values: + - RT_EOK: data written to `tv`. + - -RT_ERROR: no valid clock_time source or conversion failed. +- Notes: + - `tv_usec` is derived from the clock_time resolution and may not be exact + microseconds if the underlying counter does not align to 1 us. + +## rt_clock_boottime_get_s + +```c +rt_err_t rt_clock_boottime_get_s(time_t *t); +``` + +- Purpose: get time since boot in whole seconds. +- Parameters: `t` must be a valid pointer to `time_t`. +- Return values: + - RT_EOK: `*t` updated. + - -RT_ERROR: no valid clock_time source or conversion failed. +- Notes: + - Sub-second precision is discarded; use `rt_clock_boottime_get_us()` or + `rt_clock_boottime_get_ns()` if needed. + +## rt_clock_boottime_get_ns + +```c +rt_err_t rt_clock_boottime_get_ns(struct timespec *ts); +``` + +- Purpose: get time since boot as seconds + nanoseconds. +- Parameters: `ts` must be a valid pointer to `struct timespec`. +- Return values: + - RT_EOK: data written to `ts`. + - -RT_ERROR: no valid clock_time source or conversion failed. +- Notes: + - `tv_nsec` reflects the clock_time resolution; it may not be 1 ns granularity + if the counter frequency is lower. + +# Example + +```c +#include + +static void demo_boottime(void) +{ + struct timespec ts; + + if (rt_clock_boottime_get_ns(&ts) == RT_EOK) + { + rt_kprintf("boottime: %ld.%09ld\n", (long)ts.tv_sec, ts.tv_nsec); + } +} +``` + +# Notes + +- The boottime helpers are used by the soft RTC implementation to build a + stable base time. +- If no clock_time source is registered, the subsystem falls back to the tick + counter and the resolution matches RT_TICK_PER_SECOND. diff --git a/documentation/6.components/device-driver/clock_time/clock_boottime_zh.md b/documentation/6.components/device-driver/clock_time/clock_boottime_zh.md new file mode 100644 index 00000000000..d0a577bf2cb --- /dev/null +++ b/documentation/6.components/device-driver/clock_time/clock_boottime_zh.md @@ -0,0 +1,78 @@ +# Clock Boottime 辅助 + +boottime 辅助函数将 clock_time 的单调计数转换为常见时间格式，返回值表示 +“系统启动以来的时间”，不受 RTC 或墙上时间设置影响。 + +# API + +```c +rt_err_t rt_clock_boottime_get_us(struct timeval *tv); +rt_err_t rt_clock_boottime_get_s(time_t *t); +rt_err_t rt_clock_boottime_get_ns(struct timespec *ts); +``` + +成功返回 RT_EOK；若时钟源不可用则返回 -RT_ERROR。返回值单调递增，适合用于 +测量耗时。 + +## rt_clock_boottime_get_us + +```c +rt_err_t rt_clock_boottime_get_us(struct timeval *tv); +``` + +- 作用：获取启动以来的时间，格式为秒 + 微秒。 +- 参数：`tv` 需为有效的 `struct timeval` 指针。 +- 返回值： + - RT_EOK：成功写入 `tv`。 + - -RT_ERROR：无有效时钟源或换算失败。 +- 说明： + - `tv_usec` 由 clock_time 分辨率换算而来，不一定严格为 1 us 精度。 + +## rt_clock_boottime_get_s + +```c +rt_err_t rt_clock_boottime_get_s(time_t *t); +``` + +- 作用：获取启动以来的整秒数。 +- 参数：`t` 需为有效的 `time_t` 指针。 +- 返回值： + - RT_EOK：成功写入 `*t`。 + - -RT_ERROR：无有效时钟源或换算失败。 +- 说明： + - 该接口仅返回秒，若需亚秒精度请使用其它接口。 + +## rt_clock_boottime_get_ns + +```c +rt_err_t rt_clock_boottime_get_ns(struct timespec *ts); +``` + +- 作用：获取启动以来的时间，格式为秒 + 纳秒。 +- 参数：`ts` 需为有效的 `struct timespec` 指针。 +- 返回值： + - RT_EOK：成功写入 `ts`。 + - -RT_ERROR：无有效时钟源或换算失败。 +- 说明： + - `tv_nsec` 的精度取决于计数频率，不一定达到 1 ns。 + +# 示例 + +```c +#include + +static void demo_boottime(void) +{ + struct timespec ts; + + if (rt_clock_boottime_get_ns(&ts) == RT_EOK) + { + rt_kprintf("boottime: %ld.%09ld\n", (long)ts.tv_sec, ts.tv_nsec); + } +} +``` + +# 注意事项 + +- 软 RTC 会使用 boottime 作为稳定基准。 +- 未注册时钟源时，系统退化为 tick 计数，分辨率由 RT_TICK_PER_SECOND 决定。 diff --git a/documentation/6.components/device-driver/clock_time/clock_hrtimer.md b/documentation/6.components/device-driver/clock_time/clock_hrtimer.md new file mode 100644 index 00000000000..ff64ab56d40 --- /dev/null +++ b/documentation/6.components/device-driver/clock_time/clock_hrtimer.md @@ -0,0 +1,223 @@ +@page page_device_clock_hrtimer Clock HRTimer + +# Overview + +The clock hrtimer layer provides high-resolution timeout scheduling on top of +clock_time. It keeps a sorted timeout list, programs the next deadline, and +runs callbacks when the deadline expires. + +# Key Concepts + +- Time base: delay counts are expressed in the clock source counter units. +- Event programming: the next expiry is converted to event units and sent to + the clock event device. +- Fallback: if no hardware event exists, a software timer triggers processing. + +# API + +```c +void rt_clock_hrtimer_init(rt_clock_hrtimer_t timer, + const char *name, + rt_uint8_t flag, + void (*timeout)(void *parameter), + void *parameter); +rt_err_t rt_clock_hrtimer_start(rt_clock_hrtimer_t timer, unsigned long cnt); +rt_err_t rt_clock_hrtimer_stop(rt_clock_hrtimer_t timer); +rt_err_t rt_clock_hrtimer_control(rt_clock_hrtimer_t timer, int cmd, void *arg); +rt_err_t rt_clock_hrtimer_detach(rt_clock_hrtimer_t timer); + +void rt_clock_hrtimer_delay_init(struct rt_clock_hrtimer *timer); +void rt_clock_hrtimer_delay_detach(struct rt_clock_hrtimer *timer); +rt_err_t rt_clock_hrtimer_sleep(struct rt_clock_hrtimer *timer, unsigned long cnt); +rt_err_t rt_clock_hrtimer_ndelay(struct rt_clock_hrtimer *timer, unsigned long ns); +rt_err_t rt_clock_hrtimer_udelay(struct rt_clock_hrtimer *timer, unsigned long us); +rt_err_t rt_clock_hrtimer_mdelay(struct rt_clock_hrtimer *timer, unsigned long ms); +``` + +Flags reuse RT_TIMER_FLAG_* definitions (one-shot/periodic/hard timer). `cnt` +is a counter delta based on the default clock source. + +## rt_clock_hrtimer_init + +```c +void rt_clock_hrtimer_init(rt_clock_hrtimer_t timer, + const char *name, + rt_uint8_t flag, + void (*timeout)(void *parameter), + void *parameter); +``` + +- Purpose: initialize a high-resolution timer object. +- Parameters: + - `timer`: the hrtimer object to initialize. + - `name`: timer name (truncated to RT_NAME_MAX-1). + - `flag`: RT_TIMER_FLAG_* (one-shot/periodic/hard timer). + - `timeout`: callback function on expiry. + - `parameter`: user parameter passed to the callback. +- Behavior: + - Clears internal state, initializes list node and completion. + - Does not start the timer; call `rt_clock_hrtimer_start()` to arm it. +- Context: thread context. + +## rt_clock_hrtimer_start + +```c +rt_err_t rt_clock_hrtimer_start(rt_clock_hrtimer_t timer, unsigned long cnt); +``` + +- Purpose: arm a timer to expire after `cnt` counter ticks. +- Parameters: + - `cnt`: relative delay in clock source counter units. +- Return values: + - RT_EOK: timer armed. + - -RT_ERROR: timer already active or invalid `cnt`. +- Notes: + - `cnt` must be less than half of the maximum counter range to avoid wrap + ambiguity. + - Starting a timer programs the next clock event if this timer becomes the + earliest deadline. + +## rt_clock_hrtimer_stop + +```c +rt_err_t rt_clock_hrtimer_stop(rt_clock_hrtimer_t timer); +``` + +- Purpose: cancel an active timer. +- Return values: + - RT_EOK: timer stopped. + - -RT_ERROR: timer was not active. +- Notes: stopping a timer may reprogram the next event. + +## rt_clock_hrtimer_control + +```c +rt_err_t rt_clock_hrtimer_control(rt_clock_hrtimer_t timer, int cmd, void *arg); +``` + +- Purpose: query or modify a timer after initialization. +- Common commands (same as RT-Thread timers): + - RT_TIMER_CTRL_GET_TIME: get `delay_cnt` into `*(unsigned long *)arg`. + - RT_TIMER_CTRL_SET_TIME: set `delay_cnt` from `*(unsigned long *)arg`. + - RT_TIMER_CTRL_SET_ONESHOT / RT_TIMER_CTRL_SET_PERIODIC: set mode. + - RT_TIMER_CTRL_GET_STATE: return activated/deactivated state. + - RT_TIMER_CTRL_GET_REMAIN_TIME: get absolute timeout counter. + - RT_TIMER_CTRL_GET_FUNC / RT_TIMER_CTRL_SET_FUNC: get/set callback. + - RT_TIMER_CTRL_GET_PARM / RT_TIMER_CTRL_SET_PARM: get/set parameter. +- Notes: + - Changing time or mode while active updates internal deadline but does not + implicitly restart a stopped timer. + +## rt_clock_hrtimer_detach + +```c +rt_err_t rt_clock_hrtimer_detach(rt_clock_hrtimer_t timer); +``` + +- Purpose: detach a timer and wake any waiters. +- Behavior: + - Marks the timer inactive and wakes `rt_clock_hrtimer_sleep()` waiters with + an error code. + - Removes the timer from the list if needed. +- Use case: cleanup when a timer is no longer valid. + +## rt_clock_hrtimer_delay_init + +```c +void rt_clock_hrtimer_delay_init(struct rt_clock_hrtimer *timer); +``` + +- Purpose: initialize a one-shot hrtimer for blocking delays. +- Behavior: sets a built-in timeout callback that signals a completion. + +## rt_clock_hrtimer_delay_detach + +```c +void rt_clock_hrtimer_delay_detach(struct rt_clock_hrtimer *timer); +``` + +- Purpose: detach a delay timer created by `rt_clock_hrtimer_delay_init()`. +- Notes: safe to call even if the timer has already expired. + +## rt_clock_hrtimer_sleep + +```c +rt_err_t rt_clock_hrtimer_sleep(struct rt_clock_hrtimer *timer, unsigned long cnt); +``` + +- Purpose: block the current thread until the delay expires. +- Parameters: `timer` must be initialized (typically by delay_init). +- Return values: + - RT_EOK: timeout expired normally. + - -RT_EINTR: interrupted by signal or detach. + - -RT_EINVAL: `cnt` is zero. +- Context: thread context only. + +## rt_clock_hrtimer_ndelay / udelay / mdelay + +```c +rt_err_t rt_clock_hrtimer_ndelay(struct rt_clock_hrtimer *timer, unsigned long ns); +rt_err_t rt_clock_hrtimer_udelay(struct rt_clock_hrtimer *timer, unsigned long us); +rt_err_t rt_clock_hrtimer_mdelay(struct rt_clock_hrtimer *timer, unsigned long ms); +``` + +- Purpose: sleep for a duration expressed in nanoseconds, microseconds, or + milliseconds. +- Behavior: + - Converts the time into counter units using the current clock_time + resolution and calls `rt_clock_hrtimer_sleep()`. +- Notes: + - The actual delay is limited by the clock source resolution and event + programming granularity. + +# Typical Flow + +1. Initialize a hrtimer with a callback. +2. Convert a time interval to counter units, or use the ndelay/udelay/mdelay + helpers. +3. Start the timer; the subsystem will program the next event. +4. When the event ISR fires, rt_clock_time_event_isr() runs hrtimer processing + and dispatches callbacks. + +# Example: One-shot Timeout + +```c +#include + +static struct rt_clock_hrtimer demo_timer; + +static void demo_timeout(void *parameter) +{ + RT_UNUSED(parameter); + rt_kprintf("hrtimer timeout\n"); +} + +static void demo_hrtimer_start(void) +{ + rt_uint64_t ns = 5ULL * 1000 * 1000; /* 5 ms */ + unsigned long cnt = (unsigned long)rt_clock_time_ns_to_counter(ns); + + rt_clock_hrtimer_init(&demo_timer, "demo", RT_TIMER_FLAG_ONE_SHOT, + demo_timeout, RT_NULL); + rt_clock_hrtimer_start(&demo_timer, cnt); +} +``` + +# Example: Sleep Helper + +```c +static void demo_hrtimer_sleep(void) +{ + struct rt_clock_hrtimer timer; + + rt_clock_hrtimer_delay_init(&timer); + rt_clock_hrtimer_mdelay(&timer, 10); + rt_clock_hrtimer_delay_detach(&timer); +} +``` + +# Notes + +- Callbacks may run in interrupt context when using a hardware event device. +- rt_clock_hrtimer_sleep() waits on a completion and may return -RT_EINTR if + interrupted. diff --git a/documentation/6.components/device-driver/clock_time/clock_hrtimer_zh.md b/documentation/6.components/device-driver/clock_time/clock_hrtimer_zh.md new file mode 100644 index 00000000000..50462072d11 --- /dev/null +++ b/documentation/6.components/device-driver/clock_time/clock_hrtimer_zh.md @@ -0,0 +1,208 @@ +# Clock HRTimer + +clock hrtimer 在 clock_time 之上提供高精度超时调度。它维护按到期时间排序的 +队列，编程下一次事件，并在到期时执行回调。 + +# 关键点 + +- 时间基准：延时 cnt 基于默认时钟源的计数单位。 +- 事件编程：将下一次到期换算为事件单位后调用事件设备。 +- 退化机制：缺少硬件事件时自动使用软件定时器触发处理。 + +# API + +```c +void rt_clock_hrtimer_init(rt_clock_hrtimer_t timer, + const char *name, + rt_uint8_t flag, + void (*timeout)(void *parameter), + void *parameter); +rt_err_t rt_clock_hrtimer_start(rt_clock_hrtimer_t timer, unsigned long cnt); +rt_err_t rt_clock_hrtimer_stop(rt_clock_hrtimer_t timer); +rt_err_t rt_clock_hrtimer_control(rt_clock_hrtimer_t timer, int cmd, void *arg); +rt_err_t rt_clock_hrtimer_detach(rt_clock_hrtimer_t timer); + +void rt_clock_hrtimer_delay_init(struct rt_clock_hrtimer *timer); +void rt_clock_hrtimer_delay_detach(struct rt_clock_hrtimer *timer); +rt_err_t rt_clock_hrtimer_sleep(struct rt_clock_hrtimer *timer, unsigned long cnt); +rt_err_t rt_clock_hrtimer_ndelay(struct rt_clock_hrtimer *timer, unsigned long ns); +rt_err_t rt_clock_hrtimer_udelay(struct rt_clock_hrtimer *timer, unsigned long us); +rt_err_t rt_clock_hrtimer_mdelay(struct rt_clock_hrtimer *timer, unsigned long ms); +``` + +flag 复用 RT_TIMER_FLAG_* 定义（单次/周期/硬定时器）。cnt 为默认时钟源计数 +单位。 + +## rt_clock_hrtimer_init + +```c +void rt_clock_hrtimer_init(rt_clock_hrtimer_t timer, + const char *name, + rt_uint8_t flag, + void (*timeout)(void *parameter), + void *parameter); +``` + +- 作用：初始化一个高精度定时器对象。 +- 参数： + - `timer`：待初始化的 hrtimer 对象。 + - `name`：定时器名称（超过 RT_NAME_MAX-1 会截断）。 + - `flag`：RT_TIMER_FLAG_* 标志（单次/周期/硬定时器）。 + - `timeout`：超时回调函数。 + - `parameter`：回调参数。 +- 行为： + - 清理内部状态，初始化链表节点与 completion。 + - 仅初始化，不会启动，需要调用 `rt_clock_hrtimer_start()`。 +- 上下文：线程上下文。 + +## rt_clock_hrtimer_start + +```c +rt_err_t rt_clock_hrtimer_start(rt_clock_hrtimer_t timer, unsigned long cnt); +``` + +- 作用：启动定时器，在 `cnt` 个计数后到期。 +- 参数： + - `cnt`：相对延时，单位为默认时钟源计数。 +- 返回值： + - RT_EOK：启动成功。 + - -RT_ERROR：定时器已激活或 `cnt` 非法。 +- 说明： + - `cnt` 需小于计数器最大值的一半，以避免回绕歧义。 + - 启动后可能重新编程下一次事件。 + +## rt_clock_hrtimer_stop + +```c +rt_err_t rt_clock_hrtimer_stop(rt_clock_hrtimer_t timer); +``` + +- 作用：停止一个正在运行的定时器。 +- 返回值： + - RT_EOK：停止成功。 + - -RT_ERROR：定时器未激活。 +- 说明：停止定时器可能触发重新编程下一次事件。 + +## rt_clock_hrtimer_control + +```c +rt_err_t rt_clock_hrtimer_control(rt_clock_hrtimer_t timer, int cmd, void *arg); +``` + +- 作用：查询或修改定时器属性。 +- 常用命令（与 RT-Thread 定时器一致）： + - RT_TIMER_CTRL_GET_TIME：读取 `delay_cnt` 到 `*(unsigned long *)arg`。 + - RT_TIMER_CTRL_SET_TIME：用 `*(unsigned long *)arg` 设置 `delay_cnt`。 + - RT_TIMER_CTRL_SET_ONESHOT / RT_TIMER_CTRL_SET_PERIODIC：设置模式。 + - RT_TIMER_CTRL_GET_STATE：查询激活状态。 + - RT_TIMER_CTRL_GET_REMAIN_TIME：获取绝对到期计数值。 + - RT_TIMER_CTRL_GET_FUNC / RT_TIMER_CTRL_SET_FUNC：获取/设置回调。 + - RT_TIMER_CTRL_GET_PARM / RT_TIMER_CTRL_SET_PARM：获取/设置参数。 +- 说明： + - 修改时间或模式不会自动启动已停止的定时器。 + +## rt_clock_hrtimer_detach + +```c +rt_err_t rt_clock_hrtimer_detach(rt_clock_hrtimer_t timer); +``` + +- 作用：分离定时器，并唤醒等待者。 +- 行为： + - 标记定时器为未激活。 + - 唤醒 `rt_clock_hrtimer_sleep()` 的等待线程并返回错误。 +- 适用场景：定时器资源释放或任务退出。 + +## rt_clock_hrtimer_delay_init + +```c +void rt_clock_hrtimer_delay_init(struct rt_clock_hrtimer *timer); +``` + +- 作用：初始化用于阻塞延时的 one-shot hrtimer。 +- 行为：设置内部回调为 completion 触发函数。 + +## rt_clock_hrtimer_delay_detach + +```c +void rt_clock_hrtimer_delay_detach(struct rt_clock_hrtimer *timer); +``` + +- 作用：释放 delay_init 初始化的定时器。 +- 说明：即使已超时也可安全调用。 + +## rt_clock_hrtimer_sleep + +```c +rt_err_t rt_clock_hrtimer_sleep(struct rt_clock_hrtimer *timer, unsigned long cnt); +``` + +- 作用：阻塞当前线程，直到超时。 +- 参数：`timer` 需已初始化（通常通过 delay_init）。 +- 返回值： + - RT_EOK：正常到期。 + - -RT_EINTR：被信号打断或 detach。 + - -RT_EINVAL：`cnt` 为 0。 +- 上下文：仅线程上下文可用。 + +## rt_clock_hrtimer_ndelay / udelay / mdelay + +```c +rt_err_t rt_clock_hrtimer_ndelay(struct rt_clock_hrtimer *timer, unsigned long ns); +rt_err_t rt_clock_hrtimer_udelay(struct rt_clock_hrtimer *timer, unsigned long us); +rt_err_t rt_clock_hrtimer_mdelay(struct rt_clock_hrtimer *timer, unsigned long ms); +``` + +- 作用：按纳秒/微秒/毫秒为单位进行阻塞延时。 +- 行为：根据 clock_time 分辨率换算为计数后调用 `rt_clock_hrtimer_sleep()`。 +- 说明： + - 实际延时受计数频率与事件编程粒度限制。 + +# 典型流程 + +1. 初始化 hrtimer 并设置回调。 +2. 将时间转换为计数值，或使用 ndelay/udelay/mdelay 辅助函数。 +3. 启动定时器，系统会自动编程下一次事件。 +4. 事件中断调用 rt_clock_time_event_isr()，触发 hrtimer 处理与回调分发。 + +# 示例：单次超时 + +```c +#include + +static struct rt_clock_hrtimer demo_timer; + +static void demo_timeout(void *parameter) +{ + RT_UNUSED(parameter); + rt_kprintf("hrtimer timeout\n"); +} + +static void demo_hrtimer_start(void) +{ + rt_uint64_t ns = 5ULL * 1000 * 1000; /* 5 ms */ + unsigned long cnt = (unsigned long)rt_clock_time_ns_to_counter(ns); + + rt_clock_hrtimer_init(&demo_timer, "demo", RT_TIMER_FLAG_ONE_SHOT, + demo_timeout, RT_NULL); + rt_clock_hrtimer_start(&demo_timer, cnt); +} +``` + +# 示例：延时辅助 + +```c +static void demo_hrtimer_sleep(void) +{ + struct rt_clock_hrtimer timer; + + rt_clock_hrtimer_delay_init(&timer); + rt_clock_hrtimer_mdelay(&timer, 10); + rt_clock_hrtimer_delay_detach(&timer); +} +``` + +# 注意事项 + +- 使用硬件事件时，回调可能在中断上下文执行。 +- rt_clock_hrtimer_sleep() 会等待 completion，可能返回 -RT_EINTR。 diff --git a/documentation/6.components/device-driver/clock_time/clock_time_core.md b/documentation/6.components/device-driver/clock_time/clock_time_core.md new file mode 100644 index 00000000000..e7d099eb9dc --- /dev/null +++ b/documentation/6.components/device-driver/clock_time/clock_time_core.md @@ -0,0 +1,274 @@ +@page page_device_clock_time_core Clock Time Core + +# Overview + +The clock_time core defines the device model and conversion helpers used by the +subsystem. It manages the default clock source and clock event devices and +provides fixed-point conversion between counters and nanoseconds. + +# Device Model + +## Clock Time Operations + +```c +struct rt_clock_time_ops +{ + rt_uint64_t (*get_freq)(struct rt_clock_time_device *dev); + rt_uint64_t (*get_counter)(struct rt_clock_time_device *dev); + rt_err_t (*set_timeout)(struct rt_clock_time_device *dev, rt_uint64_t delta); +}; +``` + +### get_freq + +- Purpose: return the counter frequency in Hz. +- Requirements: + - Must be stable and match the source used by get_counter. + - Should be non-zero; zero indicates the device is not ready. + +### get_counter + +- Purpose: return a monotonically increasing counter value. +- Requirements: + - Must not go backwards. + - Wrap behavior is allowed but should be consistent with the width of the + counter used by the device. + +### set_timeout + +- Purpose: program the next timeout relative to the current counter value. +- Parameters: `delta` is in the same counter units returned by get_counter. +- Behavior: + - If `delta` is 0 and the hardware supports it, the event can be canceled. + - Return -RT_ENOSYS when the device does not support event programming. + +## Clock Time Device + +```c +struct rt_clock_time_device +{ + struct rt_device parent; + const struct rt_clock_time_ops *ops; + rt_uint64_t res_scale; + rt_uint8_t caps; /* RT_CLOCK_TIME_CAP_SOURCE / RT_CLOCK_TIME_CAP_EVENT */ +}; +``` + +- res_scale provides extra precision in the conversion pipeline. If set to 0, + RT_CLOCK_TIME_RESMUL is used by default. +- caps advertises whether the device can be used as a clock source, a clock + event, or both. + +## Register and Select Devices + +```c +rt_err_t rt_clock_time_device_register(struct rt_clock_time_device *dev, + const char *name, + rt_uint8_t caps); +void rt_clock_time_set_default_source(struct rt_clock_time_device *dev); +void rt_clock_time_set_default_event(struct rt_clock_time_device *dev); +struct rt_clock_time_device *rt_clock_time_get_default_source(void); +struct rt_clock_time_device *rt_clock_time_get_default_event(void); +``` + +### rt_clock_time_device_register + +- Purpose: register a clock_time device and its capabilities. +- Parameters: + - `dev`: device object with ops and res_scale initialized. + - `name`: device name; if NULL, only capability registration is performed. + - `caps`: RT_CLOCK_TIME_CAP_SOURCE and/or RT_CLOCK_TIME_CAP_EVENT. +- Behavior: + - Registers the device under RT_Device_Class_Timer when `name` is provided. + - If this is the first source, it becomes the default source. + - If this is the first event, it becomes the default event. +- Return values: + - RT_EOK on success. + - Negative error code if device registration fails. + +### rt_clock_time_set_default_source / rt_clock_time_set_default_event + +- Purpose: explicitly select the default source or event device. +- Behavior: overrides the auto-selected default. + +### rt_clock_time_get_default_source / rt_clock_time_get_default_event + +- Purpose: query the current default devices. +- Behavior: + - Source defaults to the internal tick-based device if none was registered. + - Event returns NULL if no event device is available. + +### rt_clock_time_source_init + +- Purpose: BSP hook to register an architecture counter or board source. +- Notes: this function is weak and may be overridden by BSP code. + +# Clock Time Query APIs + +```c +rt_uint64_t rt_clock_time_get_freq(void); +rt_uint64_t rt_clock_time_get_counter(void); +rt_uint64_t rt_clock_time_get_event_freq(void); +rt_uint64_t rt_clock_time_get_event_res_scaled(void); +``` + +## rt_clock_time_get_freq + +- Purpose: return the frequency of the default source in Hz. +- Return values: + - Non-zero frequency on success. + - 0 if no valid source is available. + +## rt_clock_time_get_counter + +- Purpose: return the current counter from the default source. +- Return values: + - Monotonic counter value on success. + - 0 if no valid source is available. + +## rt_clock_time_get_event_freq + +- Purpose: return the event device frequency in Hz. +- Behavior: if no event device exists, falls back to the default source. + +## rt_clock_time_get_event_res_scaled + +- Purpose: return the scaled resolution for the event device. +- Behavior: if no event device exists, falls back to the default source. + +# Conversion Helpers + +```c +rt_uint64_t rt_clock_time_get_res_scaled(void); +rt_uint64_t rt_clock_time_counter_to_ns(rt_uint64_t cnt); +rt_uint64_t rt_clock_time_ns_to_counter(rt_uint64_t ns); +``` + +## rt_clock_time_get_res_scaled + +- Purpose: return the scaled resolution for the default source. +- Return values: + - Non-zero scaled resolution when the source is ready. + - 0 when the source is missing or frequency is invalid. + +## rt_clock_time_counter_to_ns + +- Purpose: convert a counter value to nanoseconds based on the default source. +- Notes: returns 0 when resolution is unavailable. + +## rt_clock_time_ns_to_counter + +- Purpose: convert nanoseconds to counter units for the default source. +- Notes: returns 0 when resolution is unavailable. + +Internally, the core computes a scaled resolution: + +``` +res_scaled = (1e9 * res_scale) / freq +``` + +Nanoseconds are then derived using the scale factor RT_CLOCK_TIME_RESMUL to +avoid floating-point math. This keeps precision stable even when freq is not a +power of ten. + +# Event API + +```c +rt_err_t rt_clock_time_set_timeout(rt_uint64_t delta); +void rt_clock_time_event_isr(void); +``` + +## rt_clock_time_set_timeout + +- Purpose: program the next event using the default event device. +- Parameters: `delta` in event counter units (same as event get_counter). +- Return values: + - RT_EOK on success. + - -RT_ENOSYS if no event device exists or set_timeout is unsupported. + +## rt_clock_time_event_isr + +- Purpose: drive the hrtimer scheduler when an event expires. +- Usage: + - Call from the hardware timer ISR after acknowledging the interrupt. + - This function processes expired hrtimers and programs the next event. + +# BSP Integration Example + +## Register a Clock Source + +```c +static rt_uint64_t demo_get_freq(struct rt_clock_time_device *dev) +{ + RT_UNUSED(dev); + return 10000000ULL; /* 10 MHz */ +} + +static rt_uint64_t demo_get_counter(struct rt_clock_time_device *dev) +{ + RT_UNUSED(dev); + return demo_hw_counter_read(); +} + +static const struct rt_clock_time_ops demo_src_ops = +{ + demo_get_freq, + demo_get_counter, + RT_NULL, +}; + +static struct rt_clock_time_device demo_src_dev = +{ + .ops = &demo_src_ops, + .res_scale = RT_CLOCK_TIME_RESMUL, +}; + +void rt_clock_time_source_init(void) +{ + rt_clock_time_device_register(&demo_src_dev, "clock_time_demo_src", + RT_CLOCK_TIME_CAP_SOURCE); + rt_clock_time_set_default_source(&demo_src_dev); +} +``` + +## Register a Clock Event + +```c +static rt_err_t demo_set_timeout(struct rt_clock_time_device *dev, rt_uint64_t delta) +{ + RT_UNUSED(dev); + return demo_hw_timer_program(delta); +} + +static const struct rt_clock_time_ops demo_evt_ops = +{ + demo_get_freq, + demo_get_counter, + demo_set_timeout, +}; + +static struct rt_clock_time_device demo_evt_dev = +{ + .ops = &demo_evt_ops, + .res_scale = RT_CLOCK_TIME_RESMUL, +}; + +static void demo_timer_isr(void) +{ + demo_hw_timer_ack(); + rt_clock_time_event_isr(); +} + +void demo_register_event(void) +{ + rt_clock_time_device_register(&demo_evt_dev, "clock_time_demo_evt", + RT_CLOCK_TIME_CAP_EVENT); + rt_clock_time_set_default_event(&demo_evt_dev); +} +``` + +# Notes + +- Event callbacks may run in interrupt context when backed by a hardware event. +- If no event device is available, the hrtimer subsystem falls back to a + software timer. diff --git a/documentation/6.components/device-driver/clock_time/clock_time_core_zh.md b/documentation/6.components/device-driver/clock_time/clock_time_core_zh.md new file mode 100644 index 00000000000..9e81180f326 --- /dev/null +++ b/documentation/6.components/device-driver/clock_time/clock_time_core_zh.md @@ -0,0 +1,256 @@ +# Clock Time Core + +clock_time core 定义了子系统的设备模型与换算接口，负责默认时钟源/事件 +选择，并提供计数值与纳秒之间的定点换算。 + +# 设备模型 + +## 时钟操作接口 + +```c +struct rt_clock_time_ops +{ + rt_uint64_t (*get_freq)(struct rt_clock_time_device *dev); + rt_uint64_t (*get_counter)(struct rt_clock_time_device *dev); + rt_err_t (*set_timeout)(struct rt_clock_time_device *dev, rt_uint64_t delta); +}; +``` + +### get_freq + +- 作用：返回计数频率（Hz）。 +- 要求： + - 频率应稳定并与 get_counter 使用的计数源一致。 + - 返回 0 表示设备尚不可用。 + +### get_counter + +- 作用：返回单调递增计数值。 +- 要求： + - 不能回退。 + - 允许回绕，但需与硬件计数位宽一致。 + +### set_timeout + +- 作用：设置相对当前计数的超时事件。 +- 参数：`delta` 为计数单位，与 get_counter 一致。 +- 行为： + - 若 `delta` 为 0 且硬件支持，可取消事件。 + - 不支持时应返回 -RT_ENOSYS。 + +## 时钟设备对象 + +```c +struct rt_clock_time_device +{ + struct rt_device parent; + const struct rt_clock_time_ops *ops; + rt_uint64_t res_scale; + rt_uint8_t caps; /* RT_CLOCK_TIME_CAP_SOURCE / RT_CLOCK_TIME_CAP_EVENT */ +}; +``` + +- res_scale 用于提高换算精度，0 表示使用 RT_CLOCK_TIME_RESMUL 默认值。 +- caps 用于标识设备能力：时钟源或时钟事件。 + +## 注册与默认选择 + +```c +rt_err_t rt_clock_time_device_register(struct rt_clock_time_device *dev, + const char *name, + rt_uint8_t caps); +void rt_clock_time_set_default_source(struct rt_clock_time_device *dev); +void rt_clock_time_set_default_event(struct rt_clock_time_device *dev); +struct rt_clock_time_device *rt_clock_time_get_default_source(void); +struct rt_clock_time_device *rt_clock_time_get_default_event(void); +``` + +### rt_clock_time_device_register + +- 作用：注册 clock_time 设备及其能力。 +- 参数： + - `dev`：设备对象，需初始化 ops 与 res_scale。 + - `name`：设备名；为 NULL 时仅注册能力，不进入设备框架。 + - `caps`：RT_CLOCK_TIME_CAP_SOURCE / RT_CLOCK_TIME_CAP_EVENT。 +- 行为： + - 当 `name` 非空时，以 RT_Device_Class_Timer 注册到设备框架。 + - 首个时钟源/事件默认成为系统默认。 +- 返回值：成功返回 RT_EOK，失败返回负错误码。 + +### rt_clock_time_set_default_source / rt_clock_time_set_default_event + +- 作用：显式设置默认时钟源/事件设备。 +- 说明：会覆盖自动选择结果。 + +### rt_clock_time_get_default_source / rt_clock_time_get_default_event + +- 作用：获取当前默认设备。 +- 行为： + - 若无时钟源，返回内部 tick 源。 + - 若无事件设备，返回 NULL。 + +### rt_clock_time_source_init + +- 作用：BSP 提供时钟源的弱符号入口。 +- 说明：可在 BSP 中重写该函数完成设备注册。 + +# 时钟查询接口 + +```c +rt_uint64_t rt_clock_time_get_freq(void); +rt_uint64_t rt_clock_time_get_counter(void); +rt_uint64_t rt_clock_time_get_event_freq(void); +rt_uint64_t rt_clock_time_get_event_res_scaled(void); +``` + +## rt_clock_time_get_freq + +- 作用：获取默认时钟源频率（Hz）。 +- 返回值：成功返回非 0 频率；无有效时钟源则返回 0。 + +## rt_clock_time_get_counter + +- 作用：获取默认时钟源计数值。 +- 返回值：成功返回计数值；无有效时钟源则返回 0。 + +## rt_clock_time_get_event_freq + +- 作用：获取事件设备频率（Hz）。 +- 行为：若无事件设备则回退使用默认时钟源。 + +## rt_clock_time_get_event_res_scaled + +- 作用：获取事件设备的缩放分辨率。 +- 行为：若无事件设备则回退使用默认时钟源。 + +# 换算接口 + +```c +rt_uint64_t rt_clock_time_get_res_scaled(void); +rt_uint64_t rt_clock_time_counter_to_ns(rt_uint64_t cnt); +rt_uint64_t rt_clock_time_ns_to_counter(rt_uint64_t ns); +``` + +## rt_clock_time_get_res_scaled + +- 作用：获取默认时钟源的缩放分辨率。 +- 返回值：无有效时钟源时返回 0。 + +## rt_clock_time_counter_to_ns + +- 作用：将计数值换算为纳秒。 +- 说明：当分辨率不可用时返回 0。 + +## rt_clock_time_ns_to_counter + +- 作用：将纳秒换算为计数值。 +- 说明：当分辨率不可用时返回 0。 + +核心使用定点缩放换算： + +``` +res_scaled = (1e9 * res_scale) / freq +``` + +然后用 RT_CLOCK_TIME_RESMUL 进行定点缩放，以避免浮点运算带来的精度损失。 + +# 事件接口 + +```c +rt_err_t rt_clock_time_set_timeout(rt_uint64_t delta); +void rt_clock_time_event_isr(void); +``` + +## rt_clock_time_set_timeout + +- 作用：通过默认事件设备设置下一次超时。 +- 参数：`delta` 为事件设备计数单位。 +- 返回值： + - RT_EOK：成功。 + - -RT_ENOSYS：无事件设备或不支持 set_timeout。 + +## rt_clock_time_event_isr + +- 作用：事件到期时驱动 hrtimer 处理。 +- 使用方式： + - 在硬件中断中确认中断后调用该函数。 + - 该函数处理已到期的 hrtimer 并编程下一次事件。 + +# BSP 集成示例 + +## 注册时钟源 + +```c +static rt_uint64_t demo_get_freq(struct rt_clock_time_device *dev) +{ + RT_UNUSED(dev); + return 10000000ULL; /* 10 MHz */ +} + +static rt_uint64_t demo_get_counter(struct rt_clock_time_device *dev) +{ + RT_UNUSED(dev); + return demo_hw_counter_read(); +} + +static const struct rt_clock_time_ops demo_src_ops = +{ + demo_get_freq, + demo_get_counter, + RT_NULL, +}; + +static struct rt_clock_time_device demo_src_dev = +{ + .ops = &demo_src_ops, + .res_scale = RT_CLOCK_TIME_RESMUL, +}; + +void rt_clock_time_source_init(void) +{ + rt_clock_time_device_register(&demo_src_dev, "clock_time_demo_src", + RT_CLOCK_TIME_CAP_SOURCE); + rt_clock_time_set_default_source(&demo_src_dev); +} +``` + +## 注册时钟事件 + +```c +static rt_err_t demo_set_timeout(struct rt_clock_time_device *dev, rt_uint64_t delta) +{ + RT_UNUSED(dev); + return demo_hw_timer_program(delta); +} + +static const struct rt_clock_time_ops demo_evt_ops = +{ + demo_get_freq, + demo_get_counter, + demo_set_timeout, +}; + +static struct rt_clock_time_device demo_evt_dev = +{ + .ops = &demo_evt_ops, + .res_scale = RT_CLOCK_TIME_RESMUL, +}; + +static void demo_timer_isr(void) +{ + demo_hw_timer_ack(); + rt_clock_time_event_isr(); +} + +void demo_register_event(void) +{ + rt_clock_time_device_register(&demo_evt_dev, "clock_time_demo_evt", + RT_CLOCK_TIME_CAP_EVENT); + rt_clock_time_set_default_event(&demo_evt_dev); +} +``` + +# 注意事项 + +- 使用硬件事件时，回调可能运行于中断上下文。 +- 未提供事件设备时，hrtimer 会退化到软件定时器实现。 diff --git a/documentation/6.components/device-driver/clock_time/clock_timer.md b/documentation/6.components/device-driver/clock_time/clock_timer.md new file mode 100644 index 00000000000..d6c0721bc82 --- /dev/null +++ b/documentation/6.components/device-driver/clock_time/clock_timer.md @@ -0,0 +1,515 @@ +@page page_device_clock_timer CLOCK_TIMER Device + +> Note: CLOCK_TIMER is the unified hardware timer device in the `clock_time` subsystem. + +# Introduction to the Timer + +Hardware timers generally have two modes of operation, timer mode and counter mode. No matter which mode is operated, it works by counting the pulse signal counted by the internal counter module. Here are some important concepts of timers. + +**Timer mode**: Counts the internal pulse. Timers are often used as timing clocks for timing detection, timing response, and timing control. + +**Counter mode**: The counter can count up or down. The maximum count value of a 16-bit counter is 65535, and the maximum value of a 32-bit counter is 4 294 967 295. + +**Counting frequency**：Since the input frequency is usually fixed, the time it takes for the counter to reach its desired count number can be calculated from just the given frequency - `time = count value / count frequency`. For example, if the counting frequency is 1 MHz, the counter counts once every 1 / 1000000 seconds. That is, every 1 microsecond, the counter is incremented by one (or subtracted by one), at this time, the maximum timing capability of the 16-bit counter is 65535 microseconds, or 65.535 milliseconds. + +# Relationship to clock_time + +CLOCK_TIMER devices can be used directly by applications through the RT-Thread +device API, and can also act as a clock_time event device. When a clock_timer +is registered with `rt_clock_timer_register()` and selected as the default +event, its ISR calls `rt_clock_time_event_isr()` internally, which drives the +high-resolution timer scheduler. + +# Access Hardware Timer Device + +The application accesses the hardware timer device through the I/O device management interface provided by RT-Thread. The related interfaces are as follows: + +| **Function** | **Description** | +| -------------------- | ---------------------------------- | +| rt_device_find() | to look up the timer device | +| rt_device_open() | to open the timer device in read-write mode | +| rt_device_set_rx_indicate() | to set the timeout callback function | +| rt_device_control() | to control the timer device, you can set the timing mode (single time /cycle),counting frequency, or stop the timer | +| rt_device_write() | to set the timeout value of the timer. The timer then starts | +| rt_device_read() | to get the current value of the timer | +| rt_device_close() | to turn off the timer device. | + +## Find Timer Device + +The application obtains the device handle based on the hardware timer device name, and thus can operate the hardware timer device. The device function is as follows: + +```c +rt_device_t rt_device_find(const char* name); +``` + +| Parameter | **Description** | +| -------- | ---------------------------------- | +| name | hardware timer device name | +| **return** | —— | +| timer device handle | will return to the corresponding device handle if the corresponding device is found | +| RT_NULL | No device found | + +In general, the hardware timer device name registered to the system is timer0, timer1, etc. The usage examples are as follows: + +```c +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ +rt_device_t hw_dev; /* timer device handle */ +/* find timer device */ +hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); +``` + +Details: +- The device name is assigned by the BSP when calling `rt_clock_timer_register()`. +- If multiple timers are registered, each is exposed as a separate device. + +## Open Timer Device + +With the device handle, the application can open the device. When the device is open, it will detect whether the device has been initialized. If it is not initialized, it will call the initialization interface to initialize the device by default. Open the device with the following function: + +```c +rt_err_t rt_device_open(rt_device_t dev, rt_uint16_t oflags); +``` + +| Parameter | Description | +| ---------- | ------------------------------- | +| dev | hardware timer device handle | +| oflags | device open mode, is generally opened in read and write mode, which is to take the value：RT_DEVICE_OFLAG_RDWR | +| **return** | —— | +| RT_EOK | device opened successfully | +| other error code | device fail to open | + +An example of use is as follows: + +```c +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ +rt_device_t hw_dev; /* timer device handle */ +/* find timer device */ +hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); +/* to open the timer device in read-write mode */ +rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); +``` + +Details: +- Opening the device ensures the driver is initialized and the working + frequency is applied. +- Call open before using control/read/write APIs; otherwise behavior depends on + the BSP driver and may fail with -RT_ENOSYS or other errors. + +## Set the Timeout Callback Function + +Set the timer timeout callback function with the following function - this is the function that will be called when the timer reaches its set count value: + +```c +rt_err_t rt_device_set_rx_indicate(rt_device_t dev, rt_err_t (*rx_ind)(rt_device_t dev, rt_size_t size)) +``` + +| Parameter | **Description** | +| ---------- | ------------------------------- | +| dev | device handle | +| rx_ind | timeout callback function, provided by the caller | +| **return** | —— | +| RT_EOK | success | + +An example of use is as follows： + +```c +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ +rt_device_t hw_dev; /* timer device handle */ + +/* timer timeout callback function */ +static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) +{ + rt_kprintf("this is clock_timer timeout callback function!\n"); + rt_kprintf("tick is :%d !\n", rt_tick_get()); + + return 0; +} + +static int clock_timer_sample(int argc, char *argv[]) +{ + /* find timer device */ + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); + /* open the device in read and write mode */ + rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); + /* set the timeout callback function */ + rt_device_set_rx_indicate(hw_dev, timeout_cb); +} +``` + +Details: +- The callback runs in the timer interrupt context, so it must be fast and + non-blocking. +- `size` is the size of the timeout data (sizeof(rt_clock_timerval_t)) passed + by the driver; most users can ignore it. + +## Control the Timer Device + +By sending control words, the application can configure the hardware timer device with the following function: + +```c +rt_err_t rt_device_control(rt_device_t dev, rt_uint8_t cmd, void* arg); +``` + +| Parameter | **Description** | +| ---------------- | ------------------------------ | +| dev | device handle | +| cmd | command control word | +| arg | controlled parameter | +| **return** | —— | +| RT_EOK | function executed successfully | +| -RT_ENOSYS | execution failed，dev is null | +| other error code | execution failed | + +The command control words available for the hardware timer device are as follows： + +| **Control word** | Description | +| ---------------------- | ------------------------ | +| CLOCK_TIMER_CTRL_FREQ_SET | set the counting frequency | +| CLOCK_TIMER_CTRL_STOP | stop the timer | +| CLOCK_TIMER_CTRL_INFO_GET | get timer feature information | +| CLOCK_TIMER_CTRL_MODE_SET | set timer mode | + +Get the timer parameter argument, which is a pointer to the structure struct rt_clock_timer_info, to save the obtained information. + +>Setting frequency is valid only when the timer hardware and included driver set the counting frequency. Generally, the default frequency of the driving setting can be used. + +When setting the timer mode, the parameter argument can take the following values： + +```c +CLOCK_TIMER_MODE_ONESHOT /* Single timing */ +CLOCK_TIMER_MODE_PERIOD /* Periodic timing */ +``` + +An example of using the timer count frequency and timing mode is as follows: + +```c +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ +rt_device_t hw_dev; /* timer device handle */ +rt_clock_timer_mode_t mode; /* timer mode */ +rt_uint32_t freq = 10000; /* counting frequency */ + +/* Timer timeout callback function */ +static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) +{ + rt_kprintf("this is clock_timer timeout callback function!\n"); + rt_kprintf("tick is :%d !\n", rt_tick_get()); + + return 0; +} + +static int clock_timer_sample(int argc, char *argv[]) +{ + /* find timer device */ + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); + /* open the device in read and write mode */ + rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); + /* Set the timeout callback function */ + rt_device_set_rx_indicate(hw_dev, timeout_cb); + + /* Set the counting frequency (1Mhz or the supported minimum counting frequency by default) */ + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_FREQ_SET, &freq); + /* Set the mode to periodic timer */ + mode = CLOCK_TIMER_MODE_PERIOD; + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); +} +``` + +Details: +- CLOCK_TIMER_CTRL_FREQ_SET: + - `arg` points to an integer frequency in Hz. + - The driver checks against `minfreq` and `maxfreq` from rt_clock_timer_info. + - On success, the new frequency is used for subsequent timeouts. +- CLOCK_TIMER_CTRL_STOP: + - Stops the current timer cycle. It does not close the device. +- CLOCK_TIMER_CTRL_INFO_GET: + - `arg` points to `struct rt_clock_timer_info`. + - Returns hardware limits (min/max frequency, max count, count direction). +- CLOCK_TIMER_CTRL_MODE_SET: + - `arg` points to `rt_clock_timer_mode_t`. + - ONESHOT fires once, PERIOD repeats using the calculated reload. + +## Set the Timer Timeout Value + +The timer timeout value can be set by the following function： + +```c +rt_size_t rt_device_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size); +``` + +| **Parameter** | Description | +| ---------- | ------------------------------------------ | +| dev | device handle | +| pos | write data offset, unused now, can set 0 value | +| buffer | pointer to the timer timeout structure | +| size | timeout structure size | +| **return** | —— | +| The actual size of the written data | | +| 0 | fail | + +The prototype of the timeout structure is shown below : + +```c +typedef struct rt_clock_timerval +{ + rt_int32_t sec; /* second */ + rt_int32_t usec; /* microsecond */ +} rt_clock_timerval_t; +``` + +An example of using the timer timeout value is as follows: + +```c +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ +rt_device_t hw_dev; /* timer device handle */ +rt_clock_timer_mode_t mode; /* timer mode */ +rt_clock_timerval_t timeout_s; /* Timer timeout value */ + +/* Timer timeout callback function */ +static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) +{ + rt_kprintf("this is clock_timer timeout callback function!\n"); + rt_kprintf("tick is :%d !\n", rt_tick_get()); + + return 0; +} + +static int clock_timer_sample(int argc, char *argv[]) +{ + /* find timer device */ + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); + /* open the device in read-write mode */ + rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); + /* set the timeout callback function */ + rt_device_set_rx_indicate(hw_dev, timeout_cb); + /* set the mode as periodic timer */ + mode = CLOCK_TIMER_MODE_PERIOD; + rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); + + /* Set the timer timeout value to 5s and start the timer */ + timeout_s.sec = 5; /* second */ + timeout_s.usec = 0; /* microsecond */ + rt_device_write(hw_dev, 0, &timeout_s, sizeof(timeout_s)); +} +``` + +Details: +- `size` must match `sizeof(rt_clock_timerval_t)`; otherwise the write fails. +- In periodic mode, the driver may split a long timeout into multiple cycles + based on the hardware `maxcnt` and current frequency. +- For one-shot mode, if the timeout fits in a single cycle, the timer stops + automatically after expiry. + +## Obtain the Current Value of the Timer + +The current value of the timer can be obtained by the following function： + +```c +rt_size_t rt_device_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size); +``` + +| **Parameter** | Description | +| ---------- | ------------------------------------------ | +| dev | timer device handle | +| pos | write data offset, unused now , can set 0 value | +| buffer | output parameter, a pointer point to the timeout structure | +| size | timeout structure size | +| **return** | —— | +| Timeout structure size | success | +| 0 | fail | + +An example of use is shown below： + +```c +rt_clock_timerval_t timeout_s; /* Used to save the time the timer has elapsed */ +/* Read the elapsed time of the timer */ +rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s)); +``` + +Details: +- The returned value represents elapsed time since the timer started. +- In periodic mode, the driver accounts for completed cycles plus the current + counter value. +- In one-shot mode, the elapsed time is limited to the active cycle. + +## Close the Timer Device + +The timer device can be closed with the following function: + +```c +rt_err_t rt_device_close(rt_device_t dev); +``` + +| Parameter | Description | +| ---------- | ---------------------------------- | +| dev | timer device handle | +| **return** | —— | +| RT_EOK | close device successfully | +| -RT_ERROR | the device has been completely shut down and cannot be closed repeatedly | +| other error code | fail to close the device | + +When a timer device has been used and is not necessary anymore, it should be closed, otherwise the device will remain in an open status. + + An example of use is shown below： + +```c +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ +rt_device_t hw_dev; /* timer device handle */ +/* find timer device */ +hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); +... ... +rt_device_close(hw_dev); +``` + +Details: +- Closing the device may stop the timer and deinitialize hardware resources. +- Reopen the device before using it again. + +>Timing errors may occur. Assume that the counter has a maximum value of 0xFFFF, a counting frequency of 1Mhz, and a timing time of 1 second and 1 microsecond. Since the timer can only count up to 65535us at a time, the timing requirement for 1000001us can be completed 20 times at 50000us, and the calculation error will be 1us. + +# Driver Integration (BSP/Driver Authors) + +To provide a hardware timer as a clock_timer device, implement +`rt_clock_timer_ops`, fill `rt_clock_timer_info`, and register it with +`rt_clock_timer_register()`. The ISR should call `rt_clock_timer_isr()` to +handle overflow, callback dispatch, and (if selected) clock_time event +notification. + +```c +static const struct rt_clock_timer_ops timer_ops = +{ + .init = drv_timer_init, + .start = drv_timer_start, + .stop = drv_timer_stop, + .count_get = drv_timer_count_get, + .control = drv_timer_control, +}; + +static const struct rt_clock_timer_info timer_info = +{ + .maxfreq = 1000000, + .minfreq = 1000, + .maxcnt = 0xFFFFFFFF, + .cntmode = CLOCK_TIMER_CNTMODE_UP, +}; + +static rt_clock_timer_t hw_timer = +{ + .ops = &timer_ops, + .info = &timer_info, +}; + +void drv_timer_register(void) +{ + rt_clock_timer_register(&hw_timer, "timer0", RT_NULL); +} + +void drv_timer_isr(void) +{ + rt_clock_timer_isr(&hw_timer); +} +``` + +If the timer supports one-shot start, it can also serve as the default +clock_time event device (used by hrtimer). + +Details: +- rt_clock_timer_register(): + - Registers the device into the RT-Thread device framework as a timer class. + - If this is the first registered timer with a valid start op, it becomes + the clock_time event device automatically. + - The default event is opened and initialized if not already active. +- rt_clock_timer_isr(): + - Maintains internal overflow/cycle accounting. + - Triggers the user callback via `rx_indicate`. + - If the timer is the clock_time event owner, it calls + `rt_clock_time_event_isr()` to drive hrtimer. + +# Hardware Timer Device Usage Example + +The specific use of the hardware timer device can refer to the following sample code. The main steps of the sample code are as follows: + +1. First find the device handle based on the timer device name "timer0". +2. Open the device "timer0" in read-write mode. +3. Set the timer timeout callback function. +4. Set the timer mode to periodic timer and set the timeout period to 5 seconds. At this time, the timer starts. +5. Read the timer after 3500ms delay, the read value will be displayed in seconds and microseconds. + +```c + /* + * Program listing: This is a clock_timer device usage routine +  * The routine exports the clock_timer_sample command to the control terminal +  * Command call format: clock_timer_sample +  * Program function: The hardware timer timeout callback function periodically prints the current tick value, and the difference between the two tick values is converted to the time equivalent to the timing time value. + */ + +#include +#include + +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ + +/* Timer timeout callback function */ +static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) +{ + rt_kprintf("this is clock_timer timeout callback function!\n"); + rt_kprintf("tick is :%d !\n", rt_tick_get()); + + return 0; +} + +static int clock_timer_sample(int argc, char *argv[]) +{ + rt_err_t ret = RT_EOK; + rt_clock_timerval_t timeout_s; /* timer timeout value */ + rt_device_t hw_dev = RT_NULL; /* timer device value */ + rt_clock_timer_mode_t mode; /* timer mode */ + + /* find timer device */ + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); + if (hw_dev == RT_NULL) + { + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); + return -RT_ERROR; + } + + /* Open the device in read-write mode */ + ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); + if (ret != RT_EOK) + { + rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME); + return ret; + } + + /* set timeout callback function */ + rt_device_set_rx_indicate(hw_dev, timeout_cb); + + /* Setting mode is periodic timer */ + mode = CLOCK_TIMER_MODE_PERIOD; + ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); + if (ret != RT_EOK) + { + rt_kprintf("set mode failed! ret is :%d\n", ret); + return ret; + } + + /* Set the timer timeout value to 5s and start the timer. */ + timeout_s.sec = 5; /* second */ + timeout_s.usec = 0; /* microsecond */ + + if (rt_device_write(hw_dev, 0, &timeout_s, sizeof(timeout_s)) != sizeof(timeout_s)) + { + rt_kprintf("set timeout value failed\n"); + return -RT_ERROR; + } + + /* delay 3500ms */ + rt_thread_mdelay(3500); + + /* read the current value of timer */ + rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s)); + rt_kprintf("Read: Sec = %d, Usec = %d\n", timeout_s.sec, timeout_s.usec); + + return ret; +} +/* Export to the msh command list */ +MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample); +``` diff --git a/documentation/6.components/device-driver/clock_time/clock_timer_zh.md b/documentation/6.components/device-driver/clock_time/clock_timer_zh.md new file mode 100644 index 00000000000..880f604da67 --- /dev/null +++ b/documentation/6.components/device-driver/clock_time/clock_timer_zh.md @@ -0,0 +1,370 @@ +# CLOCK_TIMER 设备 + +> 说明：CLOCK_TIMER 是 `clock_time` 子系统中的统一硬件定时器设备。 + +# 定时器简介 + +硬件定时器通常有两种工作模式：定时模式与计数模式。无论哪种模式，本质都 +是对输入脉冲计数。以下为常用概念： + +**定时模式**：计数内部脉冲信号，常用于定时检测、响应与控制。 + +**计数模式**：计数器可加/减计数。16 位计数器最大计数值为 65535，32 位 +计数器最大值为 4,294,967,295。 + +**计数频率**：在输入频率固定时，可由 `time = count / freq` 计算时间。 +例如频率 1 MHz，计数器每 1 微秒加 1；16 位计数器最大定时能力约为 +65.535 ms。 + +# 与 clock_time 的关系 + +CLOCK_TIMER 设备可直接通过 RT-Thread 设备框架被应用使用，也可以作为 +clock_time 的事件设备。当通过 `rt_clock_timer_register()` 注册并成为默认 +事件设备时，其中断会触发 `rt_clock_time_event_isr()`，驱动高精度定时器 +调度。 + +# 访问硬件定时器设备 + +应用通过 RT-Thread I/O 设备管理接口访问硬件定时器，常用接口如下： + +| **函数** | **描述** | +| -------------------- | ---------------------------------- | +| rt_device_find() | 查找定时器设备 | +| rt_device_open() | 以读写方式打开定时器设备 | +| rt_device_set_rx_indicate() | 设置超时回调函数 | +| rt_device_control() | 控制定时器（模式、频率、停止等） | +| rt_device_write() | 设置超时时间并启动 | +| rt_device_read() | 读取当前计数值 | +| rt_device_close() | 关闭设备 | + +## 查找定时器设备 + +```c +rt_device_t rt_device_find(const char* name); +``` + +| 参数 | 描述 | +| -------- | ---------------------------------- | +| name | 定时器设备名称 | +| **返回** | —— | +| 设备句柄 | 查找成功返回句柄 | +| RT_NULL | 未找到设备 | + +通常设备名为 timer0、timer1 等。 + +```c +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ +rt_device_t hw_dev; /* timer device handle */ + +hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); +``` + +补充说明： +- 设备名由 BSP 在 `rt_clock_timer_register()` 中指定。 +- 系统内注册的每个定时器都会对应一个设备节点。 + +## 打开定时器设备 + +```c +rt_err_t rt_device_open(rt_device_t dev, rt_uint16_t oflags); +``` + +| 参数 | 描述 | +| ---------- | ------------------------------- | +| dev | 定时器设备句柄 | +| oflags | 打开模式，通常为 RT_DEVICE_OFLAG_RDWR | +| **返回** | —— | +| RT_EOK | 打开成功 | +| 其他错误码 | 打开失败 | + +```c +hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); +rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); +``` + +补充说明： +- 打开设备会确保驱动初始化并应用当前工作频率。 +- 调用 control/read/write 之前应先 open，否则可能返回 -RT_ENOSYS 或失败。 + +## 设置超时回调函数 + +```c +rt_err_t rt_device_set_rx_indicate(rt_device_t dev, + rt_err_t (*rx_ind)(rt_device_t dev, rt_size_t size)) +``` + +| 参数 | 描述 | +| ---------- | ------------------------------- | +| dev | 设备句柄 | +| rx_ind | 超时回调函数 | +| **返回** | —— | +| RT_EOK | 成功 | + +```c +static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) +{ + rt_kprintf("this is clock_timer timeout callback function!\n"); + rt_kprintf("tick is :%d !\n", rt_tick_get()); + + return 0; +} + +static int clock_timer_sample(int argc, char *argv[]) +{ + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); + rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); + rt_device_set_rx_indicate(hw_dev, timeout_cb); +} +``` + +补充说明： +- 回调在中断上下文执行，应尽量短小且避免阻塞。 +- `size` 通常为 sizeof(rt_clock_timerval_t)，多数场景可忽略。 + +## 控制定时器设备 + +```c +rt_err_t rt_device_control(rt_device_t dev, rt_uint8_t cmd, void* arg); +``` + +| 参数 | 描述 | +| ---------------- | ------------------------------ | +| dev | 设备句柄 | +| cmd | 控制命令 | +| arg | 参数 | +| **返回** | —— | +| RT_EOK | 成功 | +| -RT_ENOSYS | 失败，设备为空 | +| 其他错误码 | 失败 | + +控制命令： + +| **控制命令** | 描述 | +| ---------------------- | ------------------------ | +| CLOCK_TIMER_CTRL_FREQ_SET | 设置计数频率 | +| CLOCK_TIMER_CTRL_STOP | 停止定时器 | +| CLOCK_TIMER_CTRL_INFO_GET | 获取特性信息 | +| CLOCK_TIMER_CTRL_MODE_SET | 设置模式 | + +模式可选： + +```c +CLOCK_TIMER_MODE_ONESHOT /* 单次定时 */ +CLOCK_TIMER_MODE_PERIOD /* 周期定时 */ +``` + +示例： + +```c +rt_clock_timer_mode_t mode; +rt_uint32_t freq = 10000; /* counting frequency */ + +rt_device_control(hw_dev, CLOCK_TIMER_CTRL_FREQ_SET, &freq); +mode = CLOCK_TIMER_MODE_PERIOD; +rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); +``` + +补充说明： +- CLOCK_TIMER_CTRL_FREQ_SET： + - `arg` 指向频率值（Hz）。 + - 驱动会与 `rt_clock_timer_info` 中的 minfreq/maxfreq 做范围校验。 + - 设置成功后影响后续超时换算。 +- CLOCK_TIMER_CTRL_STOP： + - 仅停止当前定时流程，不会关闭设备。 +- CLOCK_TIMER_CTRL_INFO_GET： + - `arg` 指向 `struct rt_clock_timer_info`，返回硬件能力信息。 +- CLOCK_TIMER_CTRL_MODE_SET： + - `arg` 指向 `rt_clock_timer_mode_t`。 + - ONESHOT 单次触发；PERIOD 周期触发。 + +## 设置超时值 + +```c +rt_size_t rt_device_write(rt_device_t dev, rt_off_t pos, + const void* buffer, rt_size_t size); +``` + +| 参数 | 描述 | +| ---------- | ------------------------------------------ | +| dev | 设备句柄 | +| pos | 偏移，未使用，置 0 | +| buffer | 超时结构体指针 | +| size | 结构体大小 | +| **返回** | —— | +| 实际写入长度 | 成功 | +| 0 | 失败 | + +超时结构体： + +```c +typedef struct rt_clock_timerval +{ + rt_int32_t sec; + rt_int32_t usec; +} rt_clock_timerval_t; +``` + +```c +rt_clock_timerval_t timeout_s; + +timeout_s.sec = 5; +timeout_s.usec = 0; +rt_device_write(hw_dev, 0, &timeout_s, sizeof(timeout_s)); +``` + +补充说明： +- `size` 必须等于 `sizeof(rt_clock_timerval_t)`，否则写入失败。 +- 周期模式下，长超时可能被拆分为多个计数周期执行。 +- 单次模式且超时可在一个周期内完成时，到期后自动停止。 + +## 读取当前计数值 + +```c +rt_size_t rt_device_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size); +``` + +```c +rt_clock_timerval_t timeout_s; +rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s)); +``` + +补充说明： +- 返回值表示自定时启动以来的累计耗时。 +- 周期模式会包含已完成周期的时间。 +- 单次模式下只反映当前周期内的计数进度。 + +## 关闭设备 + +```c +rt_err_t rt_device_close(rt_device_t dev); +``` + +```c +rt_device_close(hw_dev); +``` + +补充说明： +- 关闭设备可能会停止定时器并释放硬件资源。 +- 再次使用前需要重新打开设备。 + +> 定时误差示例：若计数器最大 0xFFFF、频率 1 MHz，定时 1.000001 s 时需拆分 +> 为多次计数，误差约 1 us。 + +# 驱动对接（BSP/驱动作者） + +实现 `rt_clock_timer_ops` 并注册设备；在中断中调用 `rt_clock_timer_isr()`。 + +```c +static const struct rt_clock_timer_ops timer_ops = +{ + .init = drv_timer_init, + .start = drv_timer_start, + .stop = drv_timer_stop, + .count_get = drv_timer_count_get, + .control = drv_timer_control, +}; + +static const struct rt_clock_timer_info timer_info = +{ + .maxfreq = 1000000, + .minfreq = 1000, + .maxcnt = 0xFFFFFFFF, + .cntmode = CLOCK_TIMER_CNTMODE_UP, +}; + +static rt_clock_timer_t hw_timer = +{ + .ops = &timer_ops, + .info = &timer_info, +}; + +void drv_timer_register(void) +{ + rt_clock_timer_register(&hw_timer, "timer0", RT_NULL); +} + +void drv_timer_isr(void) +{ + rt_clock_timer_isr(&hw_timer); +} +``` + +若支持单次启动，clock_timer 设备也可作为 clock_time 默认事件设备。 + +补充说明： +- rt_clock_timer_register(): + - 将设备注册到 RT-Thread 设备框架，类型为 Timer。 + - 首个具备 start 操作的设备会被自动设置为 clock_time 事件设备。 + - 若默认事件尚未激活，注册后会自动初始化并打开。 +- rt_clock_timer_isr(): + - 维护溢出与周期计数。 + - 通过 rx_indicate 回调上层。 + - 若为 clock_time 事件设备，会调用 `rt_clock_time_event_isr()`。 + +# 使用示例 + +以下示例演示完整流程：查找设备、打开、设置回调、周期定时、读取计数等。 + +```c +#include +#include + +#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ + +static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) +{ + rt_kprintf("this is clock_timer timeout callback function!\n"); + rt_kprintf("tick is :%d !\n", rt_tick_get()); + + return 0; +} + +static int clock_timer_sample(int argc, char *argv[]) +{ + rt_err_t ret = RT_EOK; + rt_clock_timerval_t timeout_s; /* timer timeout value */ + rt_device_t hw_dev = RT_NULL; /* timer device handle */ + rt_clock_timer_mode_t mode; /* timer mode */ + + hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); + if (hw_dev == RT_NULL) + { + rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); + return -RT_ERROR; + } + + ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); + if (ret != RT_EOK) + { + rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME); + return ret; + } + + rt_device_set_rx_indicate(hw_dev, timeout_cb); + + mode = CLOCK_TIMER_MODE_PERIOD; + ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); + if (ret != RT_EOK) + { + rt_kprintf("set mode failed! ret is :%d\n", ret); + return ret; + } + + timeout_s.sec = 5; + timeout_s.usec = 0; + + if (rt_device_write(hw_dev, 0, &timeout_s, sizeof(timeout_s)) != sizeof(timeout_s)) + { + rt_kprintf("set timeout value failed\n"); + return -RT_ERROR; + } + + rt_thread_mdelay(3500); + + rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s)); + rt_kprintf("Read: Sec = %d, Usec = %d\n", timeout_s.sec, timeout_s.usec); + + return ret; +} +MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample); +``` diff --git a/documentation/6.components/device-driver/clock_time/figures/clock_time_arch.svg b/documentation/6.components/device-driver/clock_time/figures/clock_time_arch.svg new file mode 100644 index 00000000000..c9f47c33609 --- /dev/null +++ b/documentation/6.components/device-driver/clock_time/figures/clock_time_arch.svg @@ -0,0 +1,78 @@ + + + + + + + + + + Kernel Services + rt_timer, delays, IPC timeouts + + + POSIX / libc + clock_gettime, nanosleep + + + RTC / Soft RTC + timekeeping, alarms + + + Clock Time Subsystem + + + Core API + register, default source/event + counter <-> ns conversion + + + Clock Source Device + get_freq / get_counter + + + Clock Event Device + set_timeout / event ISR + + + Clock HRTimer + priority queue of timeouts + + + Boottime Helpers + get_us / get_ns / get_s + + + Clock Timer Adapter + rt_clock_timer device API + + + timeouts + + + + + + set_timeout + + + event_isr + + + BSP Drivers + arch counters, clock_timer drivers, DM/OFW integration + + + Hardware Counter / Timer + + + + + From 57cadb648753e6d258df18d3dd9cf52c081c35aa Mon Sep 17 00:00:00 2001 From: bernard Date: Fri, 2 Jan 2026 21:57:31 +0800 Subject: [PATCH 25/25] [docs][clock_time] Update clock time subsystem documentation - Update device driver index to use correct page reference - Clarify upper layer responsibilities in architecture overview - Update README to describe POSIX/libc, Soft RTC, and device driver usage - Refine architecture diagram with improved layout and color scheme - Remove obsolete clock_timer.md file --- .../6.components/device-driver/INDEX.md | 2 +- .../device-driver/clock_time/README.md | 8 +- .../device-driver/clock_time/README_zh.md | 6 +- .../clock_time/figures/clock_time_arch.svg | 158 ++++--- .../device-driver/clock_timer/clock_timer.md | 402 ------------------ 5 files changed, 98 insertions(+), 478 deletions(-) delete mode 100644 documentation/6.components/device-driver/clock_timer/clock_timer.md diff --git a/documentation/6.components/device-driver/INDEX.md b/documentation/6.components/device-driver/INDEX.md index f29dc0c9d77..b42844dbc94 100644 --- a/documentation/6.components/device-driver/INDEX.md +++ b/documentation/6.components/device-driver/INDEX.md @@ -8,7 +8,7 @@ - @subpage page_device_spi - @subpage page_device_pwm - @subpage page_device_rtc -- @subpage page_device_clock_timer +- @subpage page_device_clock_time - @subpage page_device_watchdog - @subpage page_device_wlan - @subpage page_device_sensor diff --git a/documentation/6.components/device-driver/clock_time/README.md b/documentation/6.components/device-driver/clock_time/README.md index 78efd7ab975..de705708121 100644 --- a/documentation/6.components/device-driver/clock_time/README.md +++ b/documentation/6.components/device-driver/clock_time/README.md @@ -13,9 +13,11 @@ hardware counters and timers while the kernel and libc see consistent behavior. ## Layering and Responsibilities -- Upper layers: kernel services (timeouts, delays), POSIX/libc time APIs - (clock_gettime, nanosleep), and RTC/soft-RTC consume the monotonic time base - and timer events exposed by clock_time. +- Upper layers: + - POSIX/libc time APIs (clock_gettime, nanosleep) use boottime and hrtimer APIs. + - Soft RTC uses boottime as its monotonic time base for timekeeping. + - Device drivers (input event timestamps, vDSO, PIC statistics) use boottime + for timestamping. - clock_time subsystem: core APIs, clock source/event devices, the hrtimer scheduler, boottime helpers, and the clock_timer adapter. - Lower layers: BSP drivers provide hardware counters and timers, which are diff --git a/documentation/6.components/device-driver/clock_time/README_zh.md b/documentation/6.components/device-driver/clock_time/README_zh.md index 4039cb39baa..d4433f18c22 100644 --- a/documentation/6.components/device-driver/clock_time/README_zh.md +++ b/documentation/6.components/device-driver/clock_time/README_zh.md @@ -10,8 +10,10 @@ clock_time 子系统为 RT-Thread 提供统一的高精度时间基准与事件 ## 分层关系与职责 -- 上层：内核超时/延时、POSIX/libc 时间接口（clock_gettime、nanosleep）， - 以及 RTC/软 RTC，直接使用 clock_time 提供的时间与事件能力。 +- 上层： + - POSIX/libc 时间接口（clock_gettime、nanosleep）使用 boottime 和 hrtimer API。 + - 软 RTC 使用 boottime 作为单调时间基准进行计时。 + - 设备驱动（输入事件时间戳、vDSO、中断控制器统计）使用 boottime 获取时间戳。 - clock_time 子系统：核心 API、时钟源/事件设备、高精度定时器调度器、 boottime 辅助函数、clock_timer 适配层。 - 下层：BSP 驱动提供硬件计数器与定时器，并封装为 clock_time 设备或 diff --git a/documentation/6.components/device-driver/clock_time/figures/clock_time_arch.svg b/documentation/6.components/device-driver/clock_time/figures/clock_time_arch.svg index c9f47c33609..ae0d42192c1 100644 --- a/documentation/6.components/device-driver/clock_time/figures/clock_time_arch.svg +++ b/documentation/6.components/device-driver/clock_time/figures/clock_time_arch.svg @@ -1,78 +1,96 @@ - + - - + + - - Kernel Services - rt_timer, delays, IPC timeouts + + + POSIX / libc + clock_gettime, nanosleep + + + Soft RTC + timekeeping baseline + + + Device Drivers + input timestamp, vDSO, PIC + + + + Clock Time Subsystem + + + + Core API + register, default source/event + counter ↔ ns conversion + + + Clock Source Device + get_freq / get_counter + monotonic time base + + + Clock Event Device + set_timeout / event ISR + timeout programming + + + + Clock HRTimer + priority queue of timeouts + callback dispatch + + + Boottime Helpers + get_us / get_ns / get_s + timeval / timespec + + + Clock Timer Adapter + rt_clock_timer device API + unified timer interface + + + + BSP Drivers + arch counters, clock_timer drivers, DM/OFW integration + + + + Hardware Counter / Timer + CPU timer, SoC timer peripherals + + + + + + + + + + + + + - - POSIX / libc - clock_gettime, nanosleep - - - RTC / Soft RTC - timekeeping, alarms - - - Clock Time Subsystem - - - Core API - register, default source/event - counter <-> ns conversion - - - Clock Source Device - get_freq / get_counter - - - Clock Event Device - set_timeout / event ISR - - - Clock HRTimer - priority queue of timeouts - - - Boottime Helpers - get_us / get_ns / get_s - - - Clock Timer Adapter - rt_clock_timer device API - - - timeouts - - - - - - set_timeout - - - event_isr - - - BSP Drivers - arch counters, clock_timer drivers, DM/OFW integration - - - Hardware Counter / Timer - - - - diff --git a/documentation/6.components/device-driver/clock_timer/clock_timer.md b/documentation/6.components/device-driver/clock_timer/clock_timer.md deleted file mode 100644 index 4ed15d42628..00000000000 --- a/documentation/6.components/device-driver/clock_timer/clock_timer.md +++ /dev/null @@ -1,402 +0,0 @@ -@page page_device_clock_timer CLOCK_TIMER Device - -> Note: CLOCK_TIMER is the unified hardware timer device under `clock_time`. - -# Introduction to the Timer - -Hardware timers generally have two modes of operation, timer mode and counter mode. No matter which mode is operated, it works by counting the pulse signal counted by the internal counter module. Here are some important concepts of timers. - -**Timer mode**: Counts the internal pulse. Timers are often used as timing clocks for timing detection, timing response, and timing control. - -**Counter mode**: The counter can count up or down. The maximum count value of a 16-bit counter is 65535, and the maximum value of a 32-bit counter is 4 294 967 295. - -**Counting frequency**：Since the input frequency is usually fixed, the time it takes for the counter to reach its desired count number can be calculated from just the given frequency - `time = count value / count frequency`. For example, if the counting frequency is 1 MHz, the counter counts once every 1 / 1000000 seconds. That is, every 1 microsecond, the counter is incremented by one (or subtracted by one), at this time, the maximum timing capability of the 16-bit counter is 65535 microseconds, or 65.535 milliseconds. - -# Access Hardware Timer Device - -The application accesses the hardware timer device through the I/O device management interface provided by RT-Thread. The related interfaces are as follows: - -| **Function** | **Description** | -| -------------------- | ---------------------------------- | -| rt_device_find() | to look up the timer device | -| rt_device_open() | to open the timer device in read-write mode | -| rt_device_set_rx_indicate() | to set the timeout callback function | -| rt_device_control() | to control the timer device, you can set the timing mode (single time /cycle),counting frequency, or stop the timer | -| rt_device_write() | to set the timeout value of the timer. The timer then starts | -| rt_device_read() | to get the current value of the timer | -| rt_device_close() | to turn off the timer device. | - -## Find Timer Device - -The application obtains the device handle based on the hardware timer device name, and thus can operate the hardware timer device. The device function is as follows: - -```c -rt_device_t rt_device_find(const char* name); -``` - -| Parameter | **Description** | -| -------- | ---------------------------------- | -| name | hardware timer device name | -| **return** | —— | -| timer device handle | will return to the corresponding device handle if the corresponding device is found | -| RT_NULL | No device found | - -In general, the hardware timer device name registered to the system is timer0, timer1, etc. The usage examples are as follows: - -```c -#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ -rt_device_t hw_dev; /* timer device handle */ -/* find timer device */ -hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); -``` - -## Open Timer Device - -With the device handle, the application can open the device. When the device is open, it will detect whether the device has been initialized. If it is not initialized, it will call the initialization interface to initialize the device by default. Open the device with the following function: - -```c -rt_err_t rt_device_open(rt_device_t dev, rt_uint16_t oflags); -``` - -| Parameter | Description | -| ---------- | ------------------------------- | -| dev | hardware timer device handle | -| oflags | device open mode, is generally opened in read and write mode, which is to take the value：RT_DEVICE_OFLAG_RDWR | -| **return** | —— | -| RT_EOK | device opened successfully | -| other error code | device fail to open | - -An example of use is as follows: - -```c -#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ -rt_device_t hw_dev; /* timer device handle */ -/* find timer device */ -hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); -/* to open the timer device in read-write mode */ -rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); -``` - -## Set the Timeout Callback Function - -Set the timer timeout callback function with the following function - this is the function that will be called when the timer reaches its set count value: - -```c -rt_err_t rt_device_set_rx_indicate(rt_device_t dev, rt_err_t (*rx_ind)(rt_device_t dev, rt_size_t size)) -``` - -| Parameter | **Description** | -| ---------- | ------------------------------- | -| dev | device handle | -| rx_ind | timeout callback function, provided by the caller | -| **return** | —— | -| RT_EOK | success | - -An example of use is as follows： - -```c -#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ -rt_device_t hw_dev; /* timer device handle */ - -/* timer timeout callback function */ -static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) -{ - rt_kprintf("this is clock_timer timeout callback fucntion!\n"); - rt_kprintf("tick is :%d !\n", rt_tick_get()); - - return 0; -} - -static int clock_timer_sample(int argc, char *argv[]) -{ - /* find timer device */ - hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); - /* open the device in read and write mode */ - rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); - /* set the timeout callback function */ - rt_device_set_rx_indicate(hw_dev, timeout_cb); -} -``` - -## Control the Timer Device - -By sending control words, the application can configure the hardware timer device with the following function: - -```c -rt_err_t rt_device_control(rt_device_t dev, rt_uint8_t cmd, void* arg); -``` - -| Parameter | **Description** | -| ---------------- | ------------------------------ | -| dev | device handle | -| cmd | command control word | -| arg | controlled parameter | -| **return** | —— | -| RT_EOK | function executed successfully | -| -RT_ENOSYS | execution failed，dev is null | -| other error code | execution failed | - -The command control words available for the hardware timer device are as follows： - -| **Control word** | Description | -| ---------------------- | ------------------------ | -| CLOCK_TIMER_CTRL_FREQ_SET | set the counting frequency | -| CLOCK_TIMER_CTRL_STOP | stop the timer | -| CLOCK_TIMER_CTRL_INFO_GET | get timer feature information | -| CLOCK_TIMER_CTRL_MODE_SET | set timer mode | - -Get the timer parameter argument, which is a pointer to the structure struct rt_clock_timer_info, to save the obtained information. - ->Setting frequency is valid only when the timer hardware and included driver set the counting frequency. Generally, the default frequency of the driving setting can be used. - -When setting the timer mode, the parameter argument can take the following values： - -```c -CLOCK_TIMER_MODE_ONESHOT /* Single timing */ -CLOCK_TIMER_MODE_PERIOD /* Periodic timing */ -``` - -An example of using the timer count frequency and timing mode is as follows: - -```c -#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ -rt_device_t hw_dev; /* timer device handle */ -rt_clock_timer_mode_t mode; /* timer mode */ -rt_uint32_t freq = 10000; /* couting frequency */ - -/* Timer timeout callback function */ -static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) -{ - rt_kprintf("this is clock_timer timeout callback fucntion!\n"); - rt_kprintf("tick is :%d !\n", rt_tick_get()); - - return 0; -} - -static int clock_timer_sample(int argc, char *argv[]) -{ - /* find timer device */ - hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); - /* open the device in read and write mode */ - rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); - /* Set the timeout callback function */ - rt_device_set_rx_indicate(hw_dev, timeout_cb); - - /* Set the counting frequency (1Mhz or the supported minimum counting frequency by default) */ - rt_device_control(hw_dev, CLOCK_TIMER_CTRL_FREQ_SET, &freq); - /* Set the mode to periodic timer */ - mode = CLOCK_TIMER_MODE_PERIOD; - rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); -} -``` - -## Set the Timer Timeout Value - -The timer timeout value can be set by the following function： - -```c -rt_size_t rt_device_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size); -``` - -| **Parameter** | Description | -| ---------- | ------------------------------------------ | -| dev | device handle | -| pos | write data offset, unused now, can set 0 value | -| buffer | pointer to the timer timeout structure | -| size | timeout structure size | -| **return** | —— | -| The actual size of the written data | | -| 0 | fail | - -The prototype of the timeout structure is shown below : - -```c -typedef struct rt_clock_timerval -{ - rt_int32_t sec; /* second */ - rt_int32_t usec; /* microsecond */ -} rt_clock_timerval_t; -``` - -An example of using the timer timeout value is as follows: - -```c -#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ -rt_device_t hw_dev; /* timer device handle */ -rt_clock_timer_mode_t mode; /* timer mode */ -rt_clock_timerval_t timeout_s; /* Timer timeout value */ - -/* Timer timeout callback function */ -static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) -{ - rt_kprintf("this is clock_timer timeout callback fucntion!\n"); - rt_kprintf("tick is :%d !\n", rt_tick_get()); - - return 0; -} - -static int clock_timer_sample(int argc, char *argv[]) -{ - /* find timer device */ - hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); - /* open the device in read-write mode */ - rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); - /* set the timeout callback function */ - rt_device_set_rx_indicate(hw_dev, timeout_cb); - /* set the mode as periodic timer */ - mode = CLOCK_TIMER_MODE_PERIOD; - rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); - - /* Set the timer timeout value to 5s and start the timer */ - timeout_s.sec = 5; /* second */ - timeout_s.usec = 0; /* microsecond */ - rt_device_write(hw_dev, 0, &timeout_s, sizeof(timeout_s)); -} -``` - -## Obtain the Current Value of the Timer - -The current value of the timer can be obtained by the following function： - -```c -rt_size_t rt_device_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size); -``` - -| **Parameter** | Description | -| ---------- | ------------------------------------------ | -| dev | timer device handle | -| pos | write data offset, unused now , can set 0 value | -| buffer | output parameter, a pointer point to the timeout structure | -| size | timeout structure size | -| **return** | —— | -| Timeout structure size | success | -| 0 | fail | - -An example of use is shown below： - -```c -rt_clock_timerval_t timeout_s; /* Used to save the time the timer has elapsed */ -/* Read the elapsed time of the timer */ -rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s)); -``` - -## Close the Timer Device - -The timer device can be closed with the following function: - -```c -rt_err_t rt_device_close(rt_device_t dev); -``` - -| Parameter | Description | -| ---------- | ---------------------------------- | -| dev | timer device handle | -| **return** | —— | -| RT_EOK | close device successfully | -| -RT_ERROR | the device has been completely shut down and cannot be closed repeatedly | -| other error code | fail to close the device | - -When a timer device has been used and is not necessary anymore, it should be closed, otherwise the device will remain in an open status. - - An example of use is shown below： - -```c -#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ -rt_device_t hw_dev; /* timer device handle */ -/* find timer device */ -hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); -... ... -rt_device_close(hw_dev); -``` - ->Timing errors may occur. Assume that the counter has a maximum value of 0xFFFF, a counting frequency of 1Mhz, and a timing time of 1 second and 1 microsecond. Since the timer can only count up to 65535us at a time, the timing requirement for 1000001us can be completed 20 times at 50000us, and the calculation error will be 1us. - -# Hardware Timer Device Usage Example - -The specific use of the hardware timer device can refer to the following sample code. The main steps of the sample code are as follows: - -1. First find the device handle based on the timer device name "timer0". -2. Open the device "timer0" in read-write mode. -3. Set the timer timeout callback function. -4. Set the timer mode to periodic timer and set the timeout period to 5 seconds. At this time, the timer starts. -5. Read the timer after 3500ms delay, the read value will be displayed in seconds and microseconds. - -```c - /* - * Program listing: This is an clock_timer device usage routine -  * The routine exports the clock_timer_sample command to the control terminal -  * Command call format: clock_timer_sample -  * Program function: The hardware timer timeout callback function periodically prints the current tick value, and the difference between the two tick values is converted to the time equivalent to the timing time value. - */ - -#include -#include - -#define CLOCK_TIMER_DEV_NAME "timer0" /* timer name */ - -/* Timer timeout callback function */ -static rt_err_t timeout_cb(rt_device_t dev, rt_size_t size) -{ - rt_kprintf("this is clock_timer timeout callback fucntion!\n"); - rt_kprintf("tick is :%d !\n", rt_tick_get()); - - return 0; -} - -static int clock_timer_sample(int argc, char *argv[]) -{ - rt_err_t ret = RT_EOK; - rt_clock_timerval_t timeout_s; /* timer timeout value */ - rt_device_t hw_dev = RT_NULL; /* timer device value */ - rt_clock_timer_mode_t mode; /* timer mode */ - - /* find timer device */ - hw_dev = rt_device_find(CLOCK_TIMER_DEV_NAME); - if (hw_dev == RT_NULL) - { - rt_kprintf("clock_timer sample run failed! can't find %s device!\n", CLOCK_TIMER_DEV_NAME); - return -RT_ERROR; - } - - /* Open the device in read-write mode */ - ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); - if (ret != RT_EOK) - { - rt_kprintf("open %s device failed!\n", CLOCK_TIMER_DEV_NAME); - return ret; - } - - /* set timeout callback function */ - rt_device_set_rx_indicate(hw_dev, timeout_cb); - - /* Setting mode is periodic timer */ - mode = CLOCK_TIMER_MODE_PERIOD; - ret = rt_device_control(hw_dev, CLOCK_TIMER_CTRL_MODE_SET, &mode); - if (ret != RT_EOK) - { - rt_kprintf("set mode failed! ret is :%d\n", ret); - return ret; - } - - /* Set the timer timeout value to 5s and start the timer. */ - timeout_s.sec = 5; /* second */ - timeout_s.usec = 0; /* microsecond */ - - if (rt_device_write(hw_dev, 0, &timeout_s, sizeof(timeout_s)) != sizeof(timeout_s)) - { - rt_kprintf("set timeout value failed\n"); - return -RT_ERROR; - } - - /* delay 3500ms */ - rt_thread_mdelay(3500); - - /* read the current value of timer */ - rt_device_read(hw_dev, 0, &timeout_s, sizeof(timeout_s)); - rt_kprintf("Read: Sec = %d, Usec = %d\n", timeout_s.sec, timeout_s.usec); - - return ret; -} -/* Export to the msh command list */ -MSH_CMD_EXPORT(clock_timer_sample, clock_timer sample); -```