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mathkmathk
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Add HAL for the STM32L47X and move peripherals to common folder.
1 parent 28cfb96 commit 874b275

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16 files changed

+632
-642
lines changed

16 files changed

+632
-642
lines changed

‎port/stmicro/stm32/src/Chips.zig‎

Lines changed: 84 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -28552,6 +28552,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2855228552
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2855328553
},
2855428554
},
28555+
.hal = .{
28556+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28557+
},
2855528558
};
2855628559

2855728560
ret.STM32L471QG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28577,6 +28580,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2857728580
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2857828581
},
2857928582
},
28583+
.hal = .{
28584+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28585+
},
2858028586
};
2858128587

2858228588
ret.STM32L471RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28602,6 +28608,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2860228608
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2860328609
},
2860428610
},
28611+
.hal = .{
28612+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28613+
},
2860528614
};
2860628615

2860728616
ret.STM32L471RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28627,6 +28636,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2862728636
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2862828637
},
2862928638
},
28639+
.hal = .{
28640+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28641+
},
2863028642
};
2863128643

2863228644
ret.STM32L471VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28652,6 +28664,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2865228664
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2865328665
},
2865428666
},
28667+
.hal = .{
28668+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28669+
},
2865528670
};
2865628671

2865728672
ret.STM32L471VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28677,6 +28692,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2867728692
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2867828693
},
2867928694
},
28695+
.hal = .{
28696+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28697+
},
2868028698
};
2868128699

2868228700
ret.STM32L471ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28702,6 +28720,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2870228720
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2870328721
},
2870428722
},
28723+
.hal = .{
28724+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28725+
},
2870528726
};
2870628727

2870728728
ret.STM32L471ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28727,6 +28748,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2872728748
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2872828749
},
2872928750
},
28751+
.hal = .{
28752+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28753+
},
2873028754
};
2873128755

2873228756
ret.STM32L475RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28752,6 +28776,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2875228776
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2875328777
},
2875428778
},
28779+
.hal = .{
28780+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28781+
},
2875528782
};
2875628783

2875728784
ret.STM32L475RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28777,6 +28804,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2877728804
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2877828805
},
2877928806
},
28807+
.hal = .{
28808+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28809+
},
2878028810
};
2878128811

2878228812
ret.STM32L475RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28802,6 +28832,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2880228832
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2880328833
},
2880428834
},
28835+
.hal = .{
28836+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28837+
},
2880528838
};
2880628839

2880728840
ret.STM32L475VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28827,6 +28860,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2882728860
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2882828861
},
2882928862
},
28863+
.hal = .{
28864+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28865+
},
2883028866
};
2883128867

2883228868
ret.STM32L475VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28852,6 +28888,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2885228888
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2885328889
},
2885428890
},
28891+
.hal = .{
28892+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28893+
},
2885528894
};
2885628895

2885728896
ret.STM32L475VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28877,6 +28916,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2887728916
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2887828917
},
2887928918
},
28919+
.hal = .{
28920+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28921+
},
2888028922
};
2888128923

2888228924
ret.STM32L476JE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28902,6 +28944,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2890228944
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2890328945
},
2890428946
},
28947+
.hal = .{
28948+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28949+
},
2890528950
};
2890628951

2890728952
ret.STM32L476JG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28927,6 +28972,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2892728972
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2892828973
},
2892928974
},
28975+
.hal = .{
28976+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
28977+
},
2893028978
};
2893128979

2893228980
ret.STM32L476ME = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28952,6 +29000,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2895229000
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2895329001
},
2895429002
},
29003+
.hal = .{
29004+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29005+
},
2895529006
};
2895629007

2895729008
ret.STM32L476MG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -28977,6 +29028,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2897729028
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2897829029
},
2897929030
},
29031+
.hal = .{
29032+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29033+
},
2898029034
};
2898129035

2898229036
ret.STM32L476QE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29002,6 +29056,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2900229056
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2900329057
},
2900429058
},
29059+
.hal = .{
29060+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29061+
},
2900529062
};
2900629063

2900729064
ret.STM32L476QG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29027,6 +29084,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2902729084
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2902829085
},
2902929086
},
29087+
.hal = .{
29088+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29089+
},
2903029090
};
2903129091

2903229092
ret.STM32L476RC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29052,6 +29112,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2905229112
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2905329113
},
2905429114
},
29115+
.hal = .{
29116+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29117+
},
2905529118
};
2905629119

2905729120
ret.STM32L476RE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29077,6 +29140,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2907729140
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2907829141
},
2907929142
},
29143+
.hal = .{
29144+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29145+
},
2908029146
};
2908129147

2908229148
ret.STM32L476RG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29102,6 +29168,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2910229168
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2910329169
},
2910429170
},
29171+
.hal = .{
29172+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29173+
},
2910529174
};
2910629175

2910729176
ret.STM32L476VC = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29127,6 +29196,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2912729196
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2912829197
},
2912929198
},
29199+
.hal = .{
29200+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29201+
},
2913029202
};
2913129203

2913229204
ret.STM32L476VE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29152,6 +29224,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2915229224
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2915329225
},
2915429226
},
29227+
.hal = .{
29228+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29229+
},
2915529230
};
2915629231

2915729232
ret.STM32L476VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29177,6 +29252,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2917729252
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2917829253
},
2917929254
},
29255+
.hal = .{
29256+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29257+
},
2918029258
};
2918129259

2918229260
ret.STM32L476ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29202,6 +29280,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2920229280
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2920329281
},
2920429282
},
29283+
.hal = .{
29284+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29285+
},
2920529286
};
2920629287

2920729288
ret.STM32L476ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
@@ -29227,6 +29308,9 @@ pub fn init(dep: *std.Build.Dependency) Self {
2922729308
.{ .tag = .ram, .offset = 0x20000000, .length = 0x18000, .access = .rwx },
2922829309
},
2922929310
},
29311+
.hal = .{
29312+
.root_source_file = b.path("src/hals/STM32L47X.zig"),
29313+
},
2923029314
};
2923129315

2923229316
ret.STM32L486JG = b.allocator.create(microzig.Target) catch @panic("out of memory");

‎port/stmicro/stm32/src/generate.zig‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -259,6 +259,14 @@ fn generate_chips_file(
259259
\\
260260
);
261261
}
262+
if (std.mem.startsWith(u8, chip_file.name, "STM32L47")) {
263+
try writer.writeAll(
264+
\\ .hal = .{
265+
\\ .root_source_file = b.path("src/hals/STM32L47X.zig"),
266+
\\ },
267+
\\
268+
);
269+
}
262270

263271
try writer.writeAll(
264272
\\ };

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