diff --git a/port/wch/ch32v/src/cpus/main.zig b/port/wch/ch32v/src/cpus/main.zig
index de63574c8..32a6bf4d0 100644
--- a/port/wch/ch32v/src/cpus/main.zig
+++ b/port/wch/ch32v/src/cpus/main.zig
@@ -253,7 +253,6 @@ pub const startup_logic = struct {
             },
         }
 
-        // Enable interrupts.
         // Set mtvec.base to (vector_table_address - 4) >> 2 so that interrupt N
         // jumps to the correct handler regardless of any padding between _reset_vector
         // and vector_table.
@@ -263,10 +262,16 @@ pub const startup_logic = struct {
             .mode1 = 1, // Use absolute addresses
             .base = @intCast((vtable_addr - 4) >> 2),
         });
+
+        // We set machine mode (0x3) so the user can enable/disable interrupts
+        // or manage machine/user mode themselves. 
+        // With mpp at 0 the users main function is forced to run at user level.
+        // Also enable interrupts.
         csr.mstatus.write(.{
             .mie = 1,
             .mpie = 1,
             .fs = if (cpu_name == .@"qingkev4-rv32imafc") .dirty else .off,
+            .mpp = 0x3,
         });
 
         // Initialize the system.