Generic input and output in host

Author: axiotisk

hls4ml/templates/vitis_accelerator/myproject_host.cpp

@@ -161,15 +161,15 @@ int main(int argc, char **argv) {
             // Print contents of bo0_map
             std::cout << "Contents of bo0_map (Input):" << std::endl;
             for (int i = 0; i < DATA_SIZE; ++i) {
-                for (size_t j = 0; j < N_INPUT_1_1; j++) {
+                for (size_t j = 0; j < myinput; j++) {
                     std::cout << bo0_map[i][j] << " ";
                 }
             }
             std::cout << std::endl;
 
             std::cout << "Contents of bo0_out_map (Output):" << std::endl;
             for (int i = 0; i < DATA_SIZE; ++i) {
-                for (size_t j = 0; j < N_LAYER_8; j++) {
+                for (size_t j = 0; j < mylayer_out; j++) {
                     std::cout << bo0_out_map[i][j] << " ";
                 }
             }
@@ -180,7 +180,7 @@ int main(int argc, char **argv) {
             if (e % CHECKPOINT == 0) {
                 std::cout << "Predictions" << std::endl;
                 // hls-fpga-machine-learning insert predictions
-                for (int i = 0; i < N_LAYER_8; i++) {
+                for (int i = 0; i < mylayer_out; i++) {
                     std::cout << pr[i] << " ";
                 }
                 std::cout << std::endl;
@@ -214,7 +214,7 @@ int main(int argc, char **argv) {
 
         std::cout << "Contents of bo0_out_map (Output):" << std::endl;
         for (int i = 0; i < DATA_SIZE; ++i) {
-            for (size_t j = 0; j < N_LAYER_8; j++) {
+            for (size_t j = 0; j < mylayer_out; j++) {
                 std::cout << bo0_out_map[i][j] << " ";
             }
         }

hls4ml/writer/vitis_accelerator_writer.py

@@ -119,6 +119,8 @@ def write_host(self, model):
         filedir = os.path.dirname(os.path.abspath(__file__))
         f = open(os.path.join(filedir, '../templates/vitis_accelerator/myproject_host.cpp'))
         fout = open(f'{model.config.get_output_dir()}/{model.config.get_project_name()}_host.cpp', 'w')
+        model_inputs = model.get_input_variables()
+        model_outputs = model.get_output_variables()
 
         for line in f.readlines():
             if 'MYPROJECT' in line:
@@ -131,6 +133,10 @@ def write_host(self, model):
                 newline = line.replace('output_dir', format(model.config.get_output_dir()))
             elif 'myplatform' in line:
                 newline = line.replace('myplatform', format(vitis_accelerator_config.get_platform()))
+            elif 'mylayer_out' in line:
+                newline = line.replace('mylayer_out', format(model_outputs[-1].size_cpp())) 
+            elif 'myinput' in line:
+                newline = line.replace('myinput', format(model_inputs[-1].size_cpp()))
             else:
                 newline = line
             fout.write(newline)