@@ -554,63 +554,57 @@ void analogWrite(uint32_t pin, uint32_t value)
554554 };
555555 GCLK -> CLKCTRL .reg = (uint16_t ) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_IDs [tcNum ]);
556556 while (GCLK -> STATUS .bit .SYNCBUSY == 1 );
557-
558- // Set PORT
559- if (tcNum >= TCC_INST_NUM ) {
560- // -- Configure TC
561- Tc * TCx = (Tc * ) GetTC (pinDesc .ulPWMChannel );
562- // Disable TCx
563- TCx -> COUNT8 .CTRLA .bit .ENABLE = 0 ;
564- syncTC_16 (TCx );
565- // Set Timer counter Mode to 8 bits, normal PWM, prescaler 1/256
566- TCx -> COUNT8 .CTRLA .reg |= TC_CTRLA_MODE_COUNT8 | TC_CTRLA_WAVEGEN_NPWM | TC_CTRLA_PRESCALER_DIV256 ;
567- syncTC_16 (TCx );
568- // Set the initial value
569- TCx -> COUNT8 .CC [tcChannel ].reg = (uint8_t ) value ;
570- syncTC_16 (TCx );
571- // Set PER to maximum counter value (resolution : 0xFF)
572- TCx -> COUNT8 .PER .reg = 0xFF ;
573- syncTC_16 (TCx );
574- // Enable TCx
575- TCx -> COUNT8 .CTRLA .bit .ENABLE = 1 ;
576- syncTC_16 (TCx );
577- } else {
578- // -- Configure TCC
579- Tcc * TCCx = (Tcc * ) GetTC (pinDesc .ulPWMChannel );
580- // Disable TCCx
581- TCCx -> CTRLA .bit .ENABLE = 0 ;
582- syncTCC (TCCx );
583- // Set prescaler to 1/256
584- TCCx -> CTRLA .reg |= TCC_CTRLA_PRESCALER_DIV256 ;
585- syncTCC (TCCx );
586- // Set TCx as normal PWM
587- TCCx -> WAVE .reg |= TCC_WAVE_WAVEGEN_NPWM ;
588- syncTCC (TCCx );
589- // Set the initial value
590- TCCx -> CC [tcChannel ].reg = (uint32_t ) value ;
591- syncTCC (TCCx );
592- // Set PER to maximum counter value (resolution : 0xFF)
593- TCCx -> PER .reg = 0xFF ;
594- syncTCC (TCCx );
595- // Enable TCCx
596- TCCx -> CTRLA .bit .ENABLE = 1 ;
597- syncTCC (TCCx );
598- }
599- } else {
600- if (tcNum >= TCC_INST_NUM ) {
601- Tc * TCx = (Tc * ) GetTC (pinDesc .ulPWMChannel );
602- TCx -> COUNT8 .CC [tcChannel ].reg = (uint8_t ) value ;
603- syncTC_16 (TCx );
604- } else {
605- Tcc * TCCx = (Tcc * ) GetTC (pinDesc .ulPWMChannel );
606- TCCx -> CTRLBSET .bit .LUPD = 1 ;
607- syncTCC (TCCx );
608- TCCx -> CCB [tcChannel ].reg = (uint32_t ) value ;
609- syncTCC (TCCx );
610- TCCx -> CTRLBCLR .bit .LUPD = 1 ;
611- syncTCC (TCCx );
612- }
613- }
557+
558+ // Set PORT
559+ if (tcNum >= TCC_INST_NUM ) {
560+ // -- Configure TC
561+ Tc * TCx = (Tc * ) GetTC (pinDesc .ulPWMChannel );
562+ // Disable TCx
563+ TCx -> COUNT16 .CTRLA .bit .ENABLE = 0 ;
564+ syncTC_16 (TCx );
565+ // Set Timer counter Mode to 16 bits, normal PWM
566+ TCx -> COUNT16 .CTRLA .reg |= TC_CTRLA_MODE_COUNT16 | TC_CTRLA_WAVEGEN_NPWM ;
567+ syncTC_16 (TCx );
568+ // Set the initial value
569+ TCx -> COUNT16 .CC [tcChannel ].reg = (uint32_t ) value ;
570+ syncTC_16 (TCx );
571+ // Enable TCx
572+ TCx -> COUNT16 .CTRLA .bit .ENABLE = 1 ;
573+ syncTC_16 (TCx );
574+ } else {
575+ // -- Configure TCC
576+ Tcc * TCCx = (Tcc * ) GetTC (pinDesc .ulPWMChannel );
577+ // Disable TCCx
578+ TCCx -> CTRLA .bit .ENABLE = 0 ;
579+ syncTCC (TCCx );
580+ // Set TCCx as normal PWM
581+ TCCx -> WAVE .reg |= TCC_WAVE_WAVEGEN_NPWM ;
582+ syncTCC (TCCx );
583+ // Set the initial value
584+ TCCx -> CC [tcChannel ].reg = (uint32_t ) value ;
585+ syncTCC (TCCx );
586+ // Set PER to maximum counter value (resolution : 0xFFFF)
587+ TCCx -> PER .reg = 0xFFFF ;
588+ syncTCC (TCCx );
589+ // Enable TCCx
590+ TCCx -> CTRLA .bit .ENABLE = 1 ;
591+ syncTCC (TCCx );
592+ }
593+ } else {
594+ if (tcNum >= TCC_INST_NUM ) {
595+ Tc * TCx = (Tc * ) GetTC (pinDesc .ulPWMChannel );
596+ TCx -> COUNT16 .CC [tcChannel ].reg = (uint32_t ) value ;
597+ syncTC_16 (TCx );
598+ } else {
599+ Tcc * TCCx = (Tcc * ) GetTC (pinDesc .ulPWMChannel );
600+ TCCx -> CTRLBSET .bit .LUPD = 1 ;
601+ syncTCC (TCCx );
602+ TCCx -> CCB [tcChannel ].reg = (uint32_t ) value ;
603+ syncTCC (TCCx );
604+ TCCx -> CTRLBCLR .bit .LUPD = 1 ;
605+ syncTCC (TCCx );
606+ }
607+ }
614608#endif
615609
616610 return ;
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