Update IR

IR commit: 86685504274b0c71d9985b3c926dccaca2cacf9b

Author: dstogov

ext/opcache/jit/ir/.gitignore

@@ -8,6 +8,7 @@ ir_emit_aarch64.h
 minilua
 gen_ir_fold_hash
 ir_test
+tester
 ir
 b.c
 

ext/opcache/jit/ir/ir.c

@@ -9,7 +9,7 @@
  * Representation" In ACM SIGPLAN Workshop on Intermediate Representations
  * (IR '95), pages 35-49, Jan. 1995.
  *
- * The phisical IR representation is based on Mike Pall's LuaJIT IR.
+ * The physical IR representation is based on Mike Pall's LuaJIT IR.
  * See: M. Pall. "LuaJIT 2.0 intellectual property disclosure and research
  * opportunities" November 2009 http://lua-users.org/lists/lua-l/2009-11/msg00089.html
  */
@@ -134,10 +134,18 @@ void ir_print_const(const ir_ctx *ctx, const ir_insn *insn, FILE *f, bool quoted
 			fprintf(f, "%" PRIi64, insn->val.i64);
 			break;
 		case IR_DOUBLE:
-			fprintf(f, "%g", insn->val.d);
+			if (isnan(insn->val.d)) {
+				fprintf(f, "nan");
+			} else {
+				fprintf(f, "%g", insn->val.d);
+			}
 			break;
 		case IR_FLOAT:
-			fprintf(f, "%f", insn->val.f);
+			if (isnan(insn->val.f)) {
+				fprintf(f, "nan");
+			} else {
+				fprintf(f, "%f", insn->val.f);
+			}
 			break;
 		default:
 			IR_ASSERT(0);
@@ -806,7 +814,7 @@ ir_ref ir_folding(ir_ctx *ctx, uint32_t opt, ir_ref op1, ir_ref op2, ir_ref op3,
 			}
 		}
 		if (any == 0x7f) {
-			/* All parrerns ar checked. Pass on to CSE. */
+			/* All parrerns are checked. Pass on to CSE. */
 			goto ir_fold_cse;
 		}
 		/* op2/op1/op  op2/_/op    _/op1/op    _/_/op
@@ -1307,6 +1315,104 @@ void ir_hashtab_key_sort(ir_hashtab *tab)
 	} while (--i);
 }
 
+static void ir_addrtab_resize(ir_hashtab *tab)
+{
+	uint32_t old_hash_size = (uint32_t)(-(int32_t)tab->mask);
+	char *old_data = tab->data;
+	uint32_t size = tab->size * 2;
+	uint32_t hash_size = ir_hashtab_hash_size(size);
+	char *data = ir_mem_malloc(hash_size * sizeof(uint32_t) + size * sizeof(ir_addrtab_bucket));
+	ir_addrtab_bucket *p;
+	uint32_t pos, i;
+
+	memset(data, -1, hash_size * sizeof(uint32_t));
+	tab->data = data + (hash_size * sizeof(uint32_t));
+	tab->mask = (uint32_t)(-(int32_t)hash_size);
+	tab->size = size;
+
+	memcpy(tab->data, old_data, tab->count * sizeof(ir_addrtab_bucket));
+	ir_mem_free(old_data - (old_hash_size * sizeof(uint32_t)));
+
+	i = tab->count;
+	pos = 0;
+	p = (ir_addrtab_bucket*)tab->data;
+	do {
+		uint32_t key = (uint32_t)p->key | tab->mask;
+		p->next = ((uint32_t*)tab->data)[(int32_t)key];
+		((uint32_t*)tab->data)[(int32_t)key] = pos;
+		pos += sizeof(ir_addrtab_bucket);
+		p++;
+	} while (--i);
+}
+
+void ir_addrtab_init(ir_hashtab *tab, uint32_t size)
+{
+	IR_ASSERT(size > 0);
+	uint32_t hash_size = ir_hashtab_hash_size(size);
+	char *data = ir_mem_malloc(hash_size * sizeof(uint32_t) + size * sizeof(ir_addrtab_bucket));
+	memset(data, -1, hash_size * sizeof(uint32_t));
+	tab->data = (data + (hash_size * sizeof(uint32_t)));
+	tab->mask = (uint32_t)(-(int32_t)hash_size);
+	tab->size = size;
+	tab->count = 0;
+	tab->pos = 0;
+}
+
+void ir_addrtab_free(ir_hashtab *tab)
+{
+	uint32_t hash_size = (uint32_t)(-(int32_t)tab->mask);
+	char *data = (char*)tab->data - (hash_size * sizeof(uint32_t));
+	ir_mem_free(data);
+	tab->data = NULL;
+}
+
+ir_ref ir_addrtab_find(const ir_hashtab *tab, uint64_t key)
+{
+	const char *data = (const char*)tab->data;
+	uint32_t pos = ((uint32_t*)data)[(int32_t)(key | tab->mask)];
+	ir_addrtab_bucket *p;
+
+	while (pos != IR_INVALID_IDX) {
+		p = (ir_addrtab_bucket*)(data + pos);
+		if (p->key == key) {
+			return p->val;
+		}
+		pos = p->next;
+	}
+	return IR_INVALID_VAL;
+}
+
+bool ir_addrtab_add(ir_hashtab *tab, uint64_t key, ir_ref val)
+{
+	char *data = (char*)tab->data;
+	uint32_t pos = ((uint32_t*)data)[(int32_t)(key | tab->mask)];
+	ir_addrtab_bucket *p;
+
+	while (pos != IR_INVALID_IDX) {
+		p = (ir_addrtab_bucket*)(data + pos);
+		if (p->key == key) {
+			return p->val == val;
+		}
+		pos = p->next;
+	}
+
+	if (UNEXPECTED(tab->count >= tab->size)) {
+		ir_addrtab_resize(tab);
+		data = tab->data;
+	}
+
+	pos = tab->pos;
+	tab->pos += sizeof(ir_addrtab_bucket);
+	tab->count++;
+	p = (ir_addrtab_bucket*)(data + pos);
+	p->key = key;
+	p->val = val;
+	key |= tab->mask;
+	p->next = ((uint32_t*)data)[(int32_t)key];
+	((uint32_t*)data)[(int32_t)key] = pos;
+	return 1;
+}
+
 /* Memory API */
 #ifdef _WIN32
 void *ir_mem_mmap(size_t size)
@@ -1537,24 +1643,32 @@ ir_ref _ir_PARAM(ir_ctx *ctx, ir_type type, const char* name, ir_ref num)
 
 ir_ref _ir_VAR(ir_ctx *ctx, ir_type type, const char* name)
 {
-	IR_ASSERT(ctx->control);
-	IR_ASSERT(IR_IS_BB_START(ctx->ir_base[ctx->control].op));
-	return ir_var(ctx, type, ctx->control, name);
+//	IR_ASSERT(ctx->control);
+//	IR_ASSERT(IR_IS_BB_START(ctx->ir_base[ctx->control].op));
+//	TODO: VAR may be insterted after some "memory" instruction
+	ir_ref ref = ctx->control;
+
+	while (1) {
+		IR_ASSERT(ctx->control);
+		if (IR_IS_BB_START(ctx->ir_base[ref].op)) {
+			break;
+		}
+		ref = ctx->ir_base[ref].op1;
+	}
+	return ir_var(ctx, type, ref, name);
 }
 
-ir_ref _ir_PHI_2(ir_ctx *ctx, ir_ref src1, ir_ref src2)
+ir_ref _ir_PHI_2(ir_ctx *ctx, ir_type type, ir_ref src1, ir_ref src2)
 {
-	ir_type type = ctx->ir_base[src1].type;
-
 	IR_ASSERT(ctx->control);
 	IR_ASSERT(ctx->ir_base[ctx->control].op == IR_MERGE || ctx->ir_base[ctx->control].op == IR_LOOP_BEGIN);
-	if (src1 == src2) {
+	if (src1 == src2 && src1 != IR_UNUSED) {
 		return src1;
 	}
 	return ir_emit3(ctx, IR_OPTX(IR_PHI, type, 3), ctx->control, src1, src2);
 }
 
-ir_ref _ir_PHI_N(ir_ctx *ctx, ir_ref n, ir_ref *inputs)
+ir_ref _ir_PHI_N(ir_ctx *ctx, ir_type type, ir_ref n, ir_ref *inputs)
 {
 	IR_ASSERT(ctx->control);
 	IR_ASSERT(n > 0);
@@ -1565,17 +1679,19 @@ ir_ref _ir_PHI_N(ir_ctx *ctx, ir_ref n, ir_ref *inputs)
 		ir_ref ref = inputs[0];
 
 		IR_ASSERT(ctx->ir_base[ctx->control].op == IR_MERGE || ctx->ir_base[ctx->control].op == IR_LOOP_BEGIN);
-		for (i = 1; i < n; i++) {
-			if (inputs[i] != ref) {
-				break;
+		if (ref != IR_UNUSED) {
+			for (i = 1; i < n; i++) {
+				if (inputs[i] != ref) {
+					break;
+				}
+			}
+			if (i == n) {
+				/* all the same */
+				return ref;
 			}
-		}
-		if (i == n) {
-			/* all the same */
-			return ref;
 		}
 
-		ref = ir_emit_N(ctx, IR_OPT(IR_PHI, ctx->ir_base[inputs[0]].type), n + 1);
+		ref = ir_emit_N(ctx, IR_OPT(IR_PHI, type), n + 1);
 		ir_set_op(ctx, ref, 1, ctx->control);
 		for (i = 0; i < n; i++) {
 			ir_set_op(ctx, ref, i + 2, inputs[i]);
@@ -1857,6 +1973,22 @@ ir_ref _ir_CALL_5(ir_ctx *ctx, ir_type type, ir_ref func, ir_ref arg1, ir_ref ar
 	return call;
 }
 
+ir_ref _ir_CALL_N(ir_ctx *ctx, ir_type type, ir_ref func, uint32_t count, ir_ref *args)
+{
+	ir_ref call;
+	uint32_t i;
+
+	IR_ASSERT(ctx->control);
+	call = ir_emit_N(ctx, IR_OPT(IR_CALL, type), count + 2);
+	ir_set_op(ctx, call, 1, ctx->control);
+	ir_set_op(ctx, call, 2, func);
+	for (i = 0; i < count; i++) {
+		ir_set_op(ctx, call, i + 3, args[i]);
+	}
+	ctx->control = call;
+	return call;
+}
+
 void _ir_UNREACHABLE(ir_ctx *ctx)
 {
 	IR_ASSERT(ctx->control);
@@ -1941,6 +2073,22 @@ void _ir_TAILCALL_5(ir_ctx *ctx, ir_ref func, ir_ref arg1, ir_ref arg2, ir_ref a
 	_ir_UNREACHABLE(ctx);
 }
 
+void _ir_TAILCALL_N(ir_ctx *ctx, ir_ref func, uint32_t count, ir_ref *args)
+{
+	ir_ref call;
+	uint32_t i;
+
+	IR_ASSERT(ctx->control);
+	call = ir_emit_N(ctx, IR_TAILCALL, count + 2);
+	ir_set_op(ctx, call, 1, ctx->control);
+	ir_set_op(ctx, call, 2, func);
+	for (i = 0; i < count; i++) {
+		ir_set_op(ctx, call, i + 3, args[i]);
+	}
+	ctx->control = call;
+	_ir_UNREACHABLE(ctx);
+}
+
 ir_ref _ir_SWITCH(ir_ctx *ctx, ir_ref val)
 {
 	ir_ref ref;
@@ -2197,20 +2345,23 @@ ir_type ir_get_return_type(ir_ctx *ctx)
 	ir_ref ref;
 	ir_insn *insn;
 	uint8_t ret_type = 255;
+	ir_type type;
 
 	/* Check all RETURN nodes */
 	ref = ctx->ir_base[1].op1;
 	while (ref) {
 		insn = &ctx->ir_base[ref];
 		if (insn->op == IR_RETURN) {
+			type = ctx->ir_base[insn->op2].type;
+check_type:
 			if (ret_type == 255) {
 				if (insn->op2) {
-					ret_type = ctx->ir_base[insn->op2].type;
+					ret_type = type;
 				} else {
 					ret_type = IR_VOID;
 				}
 			} else if (insn->op2) {
-				if (ret_type != ctx->ir_base[insn->op2].type) {
+				if (ret_type != type) {
 					IR_ASSERT(0 && "conflicting return types");
 					return IR_VOID;
 				}
@@ -2220,6 +2371,12 @@ ir_type ir_get_return_type(ir_ctx *ctx)
 					return IR_VOID;
 				}
 			}
+		} else if (insn->op == IR_UNREACHABLE) {
+			insn = &ctx->ir_base[insn->op1];
+			if (insn->op == IR_TAILCALL) {
+				type = insn->type;
+				goto check_type;
+			}
 		}
 		ref = ctx->ir_base[ref].op3;
 	}

ext/opcache/jit/ir/ir.h

@@ -166,7 +166,7 @@ typedef enum _ir_type {
  * def - reference to a definition op (data-flow use-def dependency edge)
  * ref - memory reference (data-flow use-def dependency edge)
  * var - variable reference (data-flow use-def dependency edge)
- * arg - argument referene CALL/TAILCALL/CARG->CARG
+ * arg - argument reference CALL/TAILCALL/CARG->CARG
  * src - reference to a previous control region (IF, IF_TRUE, IF_FALSE, MERGE, LOOP_BEGIN, LOOP_END, RETURN)
  * reg - data-control dependency on region (PHI, VAR, PARAM)
  * ret - reference to a previous RETURN instruction (RETURN)
@@ -180,7 +180,7 @@ typedef enum _ir_type {
  * - NOP is never used (code 0 is used as ANY pattern)
  * - CONST is the most often used instruction (encode with 1 bit)
  * - equality inversion:  EQ <-> NE                         => op =^ 1
- * - comparison inversio: [U]LT <-> [U]GT, [U]LE <-> [U]GE  => op =^ 3
+ * - comparison inversion: [U]LT <-> [U]GT, [U]LE <-> [U]GE  => op =^ 3
  */
 
 #define IR_OPS(_) \
@@ -484,7 +484,7 @@ void ir_strtab_free(ir_strtab *strtab);
 #define IR_OPT_IN_SCCP         (1<<19)
 #define IR_LINEAR              (1<<20)
 #define IR_GEN_NATIVE          (1<<21)
-#define IR_GEN_C               (1<<22)
+#define IR_GEN_CODE            (1<<22) /* C or LLVM */
 
 /* Temporary: SCCP -> CFG */
 #define IR_SCCP_DONE           (1<<25)
@@ -499,7 +499,7 @@ void ir_strtab_free(ir_strtab *strtab);
 #define IR_RA_HAVE_SPLITS      (1<<25)
 #define IR_RA_HAVE_SPILLS      (1<<26)
 
-/* debug relted */
+/* debug related */
 #ifdef IR_DEBUG
 # define IR_DEBUG_SCCP        (1<<27)
 # define IR_DEBUG_GCM         (1<<28)
@@ -525,7 +525,7 @@ typedef bool (*ir_set_veneer_t)(ir_ctx *ctx, const void *addr, const void *venee
 
 struct _ir_ctx {
 	ir_insn           *ir_base;                 /* two directional array - instructions grow down, constants grow up */
-	ir_ref             insns_count;             /* number of instructins stored in instructions buffer */
+	ir_ref             insns_count;             /* number of instructions stored in instructions buffer */
 	ir_ref             insns_limit;             /* size of allocated instructions buffer (it's extended when overflow) */
 	ir_ref             consts_count;            /* number of constants stored in constants buffer */
 	ir_ref             consts_limit;            /* size of allocated constants buffer (it's extended when overflow) */
@@ -551,7 +551,7 @@ struct _ir_ctx {
 	int32_t            fixed_stack_red_zone;    /* reusable stack allocated by caller (default 0) */
 	int32_t            fixed_stack_frame_size;  /* fixed stack allocated by generated code for spills and registers save/restore */
 	int32_t            fixed_call_stack_size;   /* fixed preallocated stack for parameter passing (default 0) */
-	uint64_t           fixed_save_regset;       /* registers that always saved/restored in prologue/epilugue */
+	uint64_t           fixed_save_regset;       /* registers that always saved/restored in prologue/epilogue */
 	ir_live_interval **live_intervals;
 	ir_arena          *arena;
 	ir_live_range     *unused_ranges;
@@ -711,7 +711,7 @@ bool ir_reg_is_int(int32_t reg);
 const char *ir_reg_name(int8_t reg, ir_type type);
 int32_t ir_get_spill_slot_offset(ir_ctx *ctx, ir_ref ref);
 
-/* Target CPU instruction selection and code geneartion (see ir_x86.c) */
+/* Target CPU instruction selection and code generation (see ir_x86.c) */
 int ir_match(ir_ctx *ctx);
 void *ir_emit_code(ir_ctx *ctx, size_t *size);
 
@@ -750,6 +750,10 @@ void ir_loader_init(void);
 void ir_loader_free(void);
 int ir_load(ir_ctx *ctx, FILE *f);
 
+/* IR LLVM load API (implementation in ir_load_llvm.c) */
+int ir_load_llvm_bitcode(const char *filename, uint32_t flags);
+int ir_load_llvm_asm(const char *filename, uint32_t flags);
+
 /* IR save API (implementation in ir_save.c) */
 void ir_save(const ir_ctx *ctx, FILE *f);
 
@@ -763,7 +767,10 @@ void ir_dump_live_ranges(const ir_ctx *ctx, FILE *f);
 void ir_dump_codegen(const ir_ctx *ctx, FILE *f);
 
 /* IR to C conversion (implementation in ir_emit_c.c) */
-int ir_emit_c(ir_ctx *ctx, FILE *f);
+int ir_emit_c(ir_ctx *ctx, const char *name, FILE *f);
+
+/* IR to LLVM conversion (implementation in ir_emit_llvm.c) */
+int ir_emit_llvm(ir_ctx *ctx, const char *name, FILE *f);
 
 /* IR verification API (implementation in ir_check.c) */
 bool ir_check(const ir_ctx *ctx);