diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README
index 3acee9e93194cc..0cf8be6e32c16f 100644
--- a/arch/arm/boot/dts/overlays/README
+++ b/arch/arm/boot/dts/overlays/README
@@ -5181,6 +5181,18 @@ Name: uart2
Info: Enable uart 2 on GPIOs 0-3. BCM2711 only.
Load: dtoverlay=uart2,
Params: ctsrts Enable CTS/RTS on GPIOs 2-3 (default off)
+ rs485 Enable RS485 mode for using the RTS line to
+ drive the OE pin of an RS485 transceiver (i.e.
+ MAX3078E); also enables the UARTx ctsrts
+ parameter, as RTS is required (default off).
+ rs485_invert_rts When RS485 mode is enabled, inverts the RTS
+ line from active-high (default) to active-low.
+ rs485_rts_on_delay When RS485 mode is enabled, sets the delay (in
+ milliseconds) between data transmission starting
+ and the RTS line being asserted (default 0).
+ rs485_rts_off_delay When RS485 mode is enabled, sets the delay (in
+ milliseconds) between data transmission ending
+ and the RTS line being deasserted (default 0).
Name: uart2-pi5
@@ -5193,6 +5205,18 @@ Name: uart3
Info: Enable uart 3 on GPIOs 4-7. BCM2711 only.
Load: dtoverlay=uart3,
Params: ctsrts Enable CTS/RTS on GPIOs 6-7 (default off)
+ rs485 Enable RS485 mode for using the RTS line to
+ drive the OE pin of an RS485 transceiver (i.e.
+ MAX3078E); also enables the UARTx ctsrts
+ parameter, as RTS is required (default off).
+ rs485_invert_rts When RS485 mode is enabled, inverts the RTS
+ line from active-high (default) to active-low.
+ rs485_rts_on_delay When RS485 mode is enabled, sets the delay (in
+ milliseconds) between data transmission starting
+ and the RTS line being asserted (default 0).
+ rs485_rts_off_delay When RS485 mode is enabled, sets the delay (in
+ milliseconds) between data transmission ending
+ and the RTS line being deasserted (default 0).
Name: uart3-pi5
@@ -5205,6 +5229,18 @@ Name: uart4
Info: Enable uart 4 on GPIOs 8-11. BCM2711 only.
Load: dtoverlay=uart4,
Params: ctsrts Enable CTS/RTS on GPIOs 10-11 (default off)
+ rs485 Enable RS485 mode for using the RTS line to
+ drive the OE pin of an RS485 transceiver (i.e.
+ MAX3078E); also enables the UARTx ctsrts
+ parameter, as RTS is required (default off).
+ rs485_invert_rts When RS485 mode is enabled, inverts the RTS
+ line from active-high (default) to active-low.
+ rs485_rts_on_delay When RS485 mode is enabled, sets the delay (in
+ milliseconds) between data transmission starting
+ and the RTS line being asserted (default 0).
+ rs485_rts_off_delay When RS485 mode is enabled, sets the delay (in
+ milliseconds) between data transmission ending
+ and the RTS line being deasserted (default 0).
Name: uart4-pi5
@@ -5217,6 +5253,18 @@ Name: uart5
Info: Enable uart 5 on GPIOs 12-15. BCM2711 only.
Load: dtoverlay=uart5,
Params: ctsrts Enable CTS/RTS on GPIOs 14-15 (default off)
+ rs485 Enable RS485 mode for using the RTS line to
+ drive the OE pin of an RS485 transceiver (i.e.
+ MAX3078E); also enables the UARTx ctsrts
+ parameter, as RTS is required (default off).
+ rs485_invert_rts When RS485 mode is enabled, inverts the RTS
+ line from active-high (default) to active-low.
+ rs485_rts_on_delay When RS485 mode is enabled, sets the delay (in
+ milliseconds) between data transmission starting
+ and the RTS line being asserted (default 0).
+ rs485_rts_off_delay When RS485 mode is enabled, sets the delay (in
+ milliseconds) between data transmission ending
+ and the RTS line being deasserted (default 0).
Name: udrc
diff --git a/arch/arm/boot/dts/overlays/uart2-overlay.dts b/arch/arm/boot/dts/overlays/uart2-overlay.dts
index d98cb5795f6a62..4efbbed72619da 100644
--- a/arch/arm/boot/dts/overlays/uart2-overlay.dts
+++ b/arch/arm/boot/dts/overlays/uart2-overlay.dts
@@ -19,7 +19,19 @@
};
};
+ rs485: fragment@2 {
+ target = <&uart2>;
+ __dormant__ {
+ linux,rs485-enabled-at-boot-time;
+ rs485-rts-delay = <0 0>;
+ };
+ };
+
__overrides__ {
ctsrts = <0>,"=1";
+ rs485 = <0>,"=1=2";
+ rs485_invert_rts = <&rs485>,"rs485-rts-active-low";
+ rs485_rts_on_delay = <&rs485>, "rs485-rts-delay:0";
+ rs485_rts_off_delay = <&rs485>, "rs485-rts-delay:4";
};
};
diff --git a/arch/arm/boot/dts/overlays/uart3-overlay.dts b/arch/arm/boot/dts/overlays/uart3-overlay.dts
index 5751d5b1a29e84..a1a5c12f46e29e 100644
--- a/arch/arm/boot/dts/overlays/uart3-overlay.dts
+++ b/arch/arm/boot/dts/overlays/uart3-overlay.dts
@@ -19,7 +19,19 @@
};
};
+ rs485: fragment@2 {
+ target = <&uart3>;
+ __dormant__ {
+ linux,rs485-enabled-at-boot-time;
+ rs485-rts-delay = <0 0>;
+ };
+ };
+
__overrides__ {
ctsrts = <0>,"=1";
+ rs485 = <0>,"=1=2";
+ rs485_invert_rts = <&rs485>,"rs485-rts-active-low";
+ rs485_rts_on_delay = <&rs485>, "rs485-rts-delay:0";
+ rs485_rts_off_delay = <&rs485>, "rs485-rts-delay:4";
};
};
diff --git a/arch/arm/boot/dts/overlays/uart4-overlay.dts b/arch/arm/boot/dts/overlays/uart4-overlay.dts
index 99def557b779a1..782e0928393f87 100644
--- a/arch/arm/boot/dts/overlays/uart4-overlay.dts
+++ b/arch/arm/boot/dts/overlays/uart4-overlay.dts
@@ -19,7 +19,19 @@
};
};
+ rs485: fragment@2 {
+ target = <&uart4>;
+ __dormant__ {
+ linux,rs485-enabled-at-boot-time;
+ rs485-rts-delay = <0 0>;
+ };
+ };
+
__overrides__ {
ctsrts = <0>,"=1";
+ rs485 = <0>,"=1=2";
+ rs485_invert_rts = <&rs485>,"rs485-rts-active-low";
+ rs485_rts_on_delay = <&rs485>, "rs485-rts-delay:0";
+ rs485_rts_off_delay = <&rs485>, "rs485-rts-delay:4";
};
};
diff --git a/arch/arm/boot/dts/overlays/uart5-overlay.dts b/arch/arm/boot/dts/overlays/uart5-overlay.dts
index 649daea52e6b14..228598ebcec3c3 100644
--- a/arch/arm/boot/dts/overlays/uart5-overlay.dts
+++ b/arch/arm/boot/dts/overlays/uart5-overlay.dts
@@ -19,7 +19,19 @@
};
};
+ rs485: fragment@2 {
+ target = <&uart5>;
+ __dormant__ {
+ linux,rs485-enabled-at-boot-time;
+ rs485-rts-delay = <0 0>;
+ };
+ };
+
__overrides__ {
ctsrts = <0>,"=1";
+ rs485 = <0>,"=1=2";
+ rs485_invert_rts = <&rs485>,"rs485-rts-active-low";
+ rs485_rts_on_delay = <&rs485>, "rs485-rts-delay:0";
+ rs485_rts_off_delay = <&rs485>, "rs485-rts-delay:4";
};
};