From 75fb5afc5791042d00d7332eec54b5a9f7f685c5 Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Fri, 19 Sep 2025 09:59:26 +0100 Subject: [PATCH 1/2] Revert "dtoverlays: adjust inbound windows for MIP1 on Pi 5 with 32-bit PCIe DMA" This reverts commit a23cf5f93d7cb730161ad215eb15501c0914a815. Signed-off-by: Jonathan Bell --- .../dts/overlays/pcie-32bit-dma-pi5-overlay.dts | 15 +-------------- 1 file changed, 1 insertion(+), 14 deletions(-) diff --git a/arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts b/arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts index 23d2241ec7df4e..f9908494f101f6 100644 --- a/arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts +++ b/arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts @@ -19,21 +19,8 @@ #address-cells = <3>; #size-cells = <2>; dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 - 0x0 0x80000000>, - <0x02000000 0x00 0xfffff000 0x10 0x00131000 - 0x00 0x00001000>; + 0x0 0x80000000>; }; }; - fragment@1 { - target = <&mip1>; - __overlay__ { - /* - * The MIP driver uses the reg property to derive the target - * address for MSI writes - place this below 4GB. - */ - reg = <0x10 0x00131000 0x00 0xc0>, - <0x00 0xfffff000 0x00 0x1000>; - }; - }; }; From 27c16363a029e30b3faaefcb79253aa7d7819a12 Mon Sep 17 00:00:00 2001 From: Jonathan Bell Date: Mon, 22 Sep 2025 13:03:18 +0100 Subject: [PATCH 2/2] dtoverlays: make pcie-32bit-dma-pi5 select internal MSI target Adding a second inbound bridge window at <4GB for the MIP causes SWIOTLB allocations to overflow/fail. See tail of https://github.com/raspberrypi/linux/issues/7046 A simple fix is to switch to the RC-provided MSI target. Signed-off-by: Jonathan Bell --- arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts b/arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts index f9908494f101f6..b8ce3bc53b80f8 100644 --- a/arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts +++ b/arch/arm/boot/dts/overlays/pcie-32bit-dma-pi5-overlay.dts @@ -18,6 +18,7 @@ */ #address-cells = <3>; #size-cells = <2>; + msi-parent = <&pciex1>; dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; };