Format code

Author: wtdcode

qemu/target/i386/unicorn.c

@@ -99,7 +99,7 @@ static void reg_reset(struct uc_struct *uc)
     memset(env->dr, 0, sizeof(env->dr));
     env->dr[6] = DR6_FIXED_1;
     env->dr[7] = DR7_FIXED_1;
-    
+
     /* sysenter registers */
     env->sysenter_cs = 0;
     env->sysenter_esp = 0;
@@ -163,7 +163,7 @@ static void reg_reset(struct uc_struct *uc)
                        HF_LMA_MASK | HF_OSFXSR_MASK;
         env->hflags &= ~(HF_ADDSEG_MASK);
         env->efer |= MSR_EFER_LMA | MSR_EFER_LME; // extended mode activated
-        
+
         /* If we are operating in 64bit mode then add the Long Mode flag
          * to the CPUID feature flag
          */
@@ -173,23 +173,23 @@ static void reg_reset(struct uc_struct *uc)
 
     // CR initialization
     switch (uc->mode) {
-        case UC_MODE_32:
-        case UC_MODE_64: {
-            uint32_t cr4 = 0;
-
-            if (env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE) {
-                cr4 |= CR4_OSFXSR_MASK | CR4_OSXSAVE_MASK;
-            }
-            if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_FSGSBASE) {
-                cr4 |= CR4_FSGSBASE_MASK;
-            }
+    case UC_MODE_32:
+    case UC_MODE_64: {
+        uint32_t cr4 = 0;
 
-            cpu_x86_update_cr0(env, CR0_PE_MASK);     // protected mode
-            cpu_x86_update_cr4(env, cr4);
-            break;
+        if (env->features[FEAT_1_ECX] & CPUID_EXT_XSAVE) {
+            cr4 |= CR4_OSFXSR_MASK | CR4_OSXSAVE_MASK;
         }
-        default:
-            break;
+        if (env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_FSGSBASE) {
+            cr4 |= CR4_FSGSBASE_MASK;
+        }
+
+        cpu_x86_update_cr0(env, CR0_PE_MASK); // protected mode
+        cpu_x86_update_cr4(env, cr4);
+        break;
+    }
+    default:
+        break;
     }
 }
 

qemu/target/m68k/unicorn.c

@@ -173,7 +173,7 @@ uc_err reg_write(void *_env, int mode, unsigned int regid, const void *value,
             break;
         case UC_M68K_REG_CR_CACR: {
             CHECK_REG_TYPE(uint32_t);
-            uint32_t val = *(uint32_t*)value;
+            uint32_t val = *(uint32_t *)value;
             if (m68k_feature(env, M68K_FEATURE_M68020)) {
                 env->cacr = val & 0x0000000f;
             } else if (m68k_feature(env, M68K_FEATURE_M68030)) {

tests/unit/test_ctl.c

@@ -277,8 +277,8 @@ static void test_uc_hook_cached_uaf(void)
 
     uc_common_setup(&uc, UC_ARCH_X86, UC_MODE_32, code, sizeof(code) - 1);
 
-    OK(uc_hook_add(uc, &h, UC_HOOK_CODE, (void *)test_uc_hook_cached_cb, (void *)&count, 1,
-                   0));
+    OK(uc_hook_add(uc, &h, UC_HOOK_CODE, (void *)test_uc_hook_cached_cb,
+                   (void *)&count, 1, 0));
 
     OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
 
@@ -288,9 +288,10 @@ static void test_uc_hook_cached_uaf(void)
     // This will clear deleted hooks and SHOULD clear cache.
     OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
 
-    // Now hooks are deleted and thus this _should not_ call test_uc_hook_cached_cb anymore.
-    // If the hook is allocated like from malloc, and the code region is free-ed, this call _shall not_
-    // call the hook anymore to avoid UAF.
+    // Now hooks are deleted and thus this _should not_ call
+    // test_uc_hook_cached_cb anymore. If the hook is allocated like from
+    // malloc, and the code region is free-ed, this call _shall not_ call the
+    // hook anymore to avoid UAF.
     OK(uc_emu_start(uc, code_start, code_start + sizeof(code) - 1, 0, 0));
 
     // Only 4 calls

tests/unit/test_mips.c

@@ -107,13 +107,14 @@ static void test_mips_stop_delay_slot_from_qiling(void)
     // 24 ab ff da          addiu                $t3, $a1, -0x26
     // 2d 62 00 02          sltiu                $v0, $t3, 2
     // 10 40 00 32          beqz                 $v0, 0x47c8c9c
-    // 00 00 00 00          nop  
+    // 00 00 00 00          nop
     char code[] =
-        "\x24\x06\x00\x03\x10\xa6\x00\x79\x30\x42\x00\xfc\x10\x40\x00\x32\x24\xab\xff\xda\x2d\x62\x00\x02\x10\x40\x00\x32\x00\x00\x00\x00";
+        "\x24\x06\x00\x03\x10\xa6\x00\x79\x30\x42\x00\xfc\x10\x40\x00\x32\x24"
+        "\xab\xff\xda\x2d\x62\x00\x02\x10\x40\x00\x32\x00\x00\x00\x00";
     uint32_t r_pc = 0x0;
     uint32_t r_v0 = 0xff;
     uint32_t r_a1 = 0x3;
-    
+
     uc_common_setup(&uc, UC_ARCH_MIPS, UC_MODE_MIPS32 | UC_MODE_BIG_ENDIAN,
                     code, sizeof(code) - 1);
     OK(uc_reg_write(uc, UC_MIPS_REG_V0, &r_v0));
@@ -207,5 +208,6 @@ TEST_LIST = {
     {"test_mips_lwx_exception_issue_1314", test_mips_lwx_exception_issue_1314},
     {"test_mips_mips16", test_mips_mips16},
     {"test_mips_mips_fpr", test_mips_mips_fpr},
-    {"test_mips_stop_delay_slot_from_qiling", test_mips_stop_delay_slot_from_qiling},
+    {"test_mips_stop_delay_slot_from_qiling",
+     test_mips_stop_delay_slot_from_qiling},
     {NULL, NULL}};

uc.c

@@ -1981,12 +1981,13 @@ void helper_uc_tracecode(int32_t size, uc_hook_idx index, void *handle,
         index &
         UC_HOOK_FLAG_MASK; // The index here may contain additional flags. See
                            // the comments of uc_hook_idx for details.
-    // bool not_allow_stop = (size & UC_HOOK_FLAG_NO_STOP) || (hook_flags & UC_HOOK_FLAG_NO_STOP);
+    // bool not_allow_stop = (size & UC_HOOK_FLAG_NO_STOP) || (hook_flags &
+    // UC_HOOK_FLAG_NO_STOP);
     bool not_allow_stop = hook_flags & UC_HOOK_FLAG_NO_STOP;
-    
+
     index = index & UC_HOOK_IDX_MASK;
-    // // Like hook index, only low 6 bits of size is used for representing sizes.
-    // size = size & UC_HOOK_IDX_MASK;
+    // // Like hook index, only low 6 bits of size is used for representing
+    // sizes. size = size & UC_HOOK_IDX_MASK;
 
     // This has been done in tcg code.
     // sync PC in CPUArchState with address