diff --git a/boards/qualcomm/index.rst b/boards/qualcomm/index.rst new file mode 100644 index 0000000000000..fe43e150fad65 --- /dev/null +++ b/boards/qualcomm/index.rst @@ -0,0 +1,10 @@ +.. _boards-qualcomm: + +Qualcomm Technologies, Inc. +########################### + +.. toctree:: + :maxdepth: 1 + :glob: + + **/* diff --git a/boards/qualcomm/qcc744m_evk/Kconfig.qcc744m_evk b/boards/qualcomm/qcc744m_evk/Kconfig.qcc744m_evk new file mode 100644 index 0000000000000..1a71dc7b3f6ee --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/Kconfig.qcc744m_evk @@ -0,0 +1,6 @@ +# Copyright (c) 2025 MASSDRIVER EI (massdriver.space) +# +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_QCC744M_EVK + select SOC_BL618M05Q2I diff --git a/boards/qualcomm/qcc744m_evk/board.cmake b/boards/qualcomm/qcc744m_evk/board.cmake new file mode 100644 index 0000000000000..1dcc4d772fad3 --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/board.cmake @@ -0,0 +1,23 @@ +# Copyright (c) 2025 MASSDRIVER EI (massdriver.space) +# +# SPDX-License-Identifier: Apache-2.0 + +board_runner_args(openocd --cmd-pre-init "source [find bl61x.cfg]") + +board_runner_args(openocd --use-elf --no-load --no-init) +board_runner_args(openocd --gdb-init "set mem inaccessible-by-default off") +board_runner_args(openocd --gdb-init "set architecture riscv:rv32") +board_runner_args(openocd --gdb-init "set remotetimeout 250") +board_runner_args(openocd --gdb-init "set print asm-demangle on") +board_runner_args(openocd --gdb-init "set backtrace limit 32") +board_runner_args(openocd --gdb-init "mem 0x22FC0000 0x23010000 rw") +board_runner_args(openocd --gdb-init "mem 0x62FC0000 0x63010000 rw") +board_runner_args(openocd --gdb-init "mem 0x90000000 0x90020000 ro") +board_runner_args(openocd --gdb-init "mem 0xA8000000 0xA8800000 rw") +board_runner_args(openocd --gdb-init "mem 0xA0000000 0xA0400000 ro") +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) + +board_runner_args(bflb_mcu_tool --chipname bl616) +include(${ZEPHYR_BASE}/boards/common/bflb_mcu_tool.board.cmake) + +board_set_flasher(bflb_mcu_tool) diff --git a/boards/qualcomm/qcc744m_evk/board.yml b/boards/qualcomm/qcc744m_evk/board.yml new file mode 100644 index 0000000000000..2c4b865e91674 --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/board.yml @@ -0,0 +1,6 @@ +board: + name: qcc744m_evk + full_name: Qualcomm QCC744M Evaluation Board + vendor: qcom + socs: + - name: bl618m05q2i diff --git a/boards/qualcomm/qcc744m_evk/doc/img/qcc744m_evk.webp b/boards/qualcomm/qcc744m_evk/doc/img/qcc744m_evk.webp new file mode 100644 index 0000000000000..ae8976043ce1a Binary files /dev/null and b/boards/qualcomm/qcc744m_evk/doc/img/qcc744m_evk.webp differ diff --git a/boards/qualcomm/qcc744m_evk/doc/index.rst b/boards/qualcomm/qcc744m_evk/doc/index.rst new file mode 100644 index 0000000000000..ee96d3e53ddcd --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/doc/index.rst @@ -0,0 +1,102 @@ +.. zephyr:board:: qcc744m_evk + +Overview +******** + +The QCC744M Evaluation board features the QCC744M module, which contains a QCC744-2 SoC with 4MB of +PSRAM and an external 8MB Flash chip. +Qualcomm QCC74x is a tri-radio chipset integrating 1x1 Wi-Fi 6, Bluetooth 5.4, +and IEEE 802.15.4 (Thread and Zigbee-ready) powered by a 32-bit RISC-V MCU up to 320 MHz, it is +based on, and mostly equivalent, to the Bouffalolab BL61x Serie of chipsets. + +Hardware +******** + +For more information about the Qualcomm QCC74x MCU: + +- `Qualcomm QCC74x MCU Datasheet`_ +- `Qualcomm QCC74x MCU Programming Manual`_ +- `Qualcomm QCC744M EVK Quick Start Guide`_ +- `Qualcomm QCC74x SDK`_ +- `qcc744m_evk Schematics`_ + +Supported Features +================== + +.. zephyr:board-supported-hw:: + + +Serial Port +=========== + +The ``qcc744m_evk`` board uses UART0 as default serial port. It is connected +to the onboard USB Serial converter and the port is used for both program and console. + + +Programming and Debugging +************************* + +Samples +======= + +#. Build the Zephyr kernel and the :zephyr:code-sample:`hello_world` sample application: + + .. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: qcc744m_evk + :goals: build + +#. ``west flash`` cannot flash QCC74x MCUs at the moment. + You may first acquire 'QConn Flash' from the QCC74x SDK and follow these instructions: + + * Open Qconn Flash + * Go to tab 'Flash Utils' + * Select appropriate flash port and interface. + * Reset board (press RESET, right button) while holding the BOOT (left) button to enter flash mode + * In 'Flash Program', browse to ``bsp/board/qcc744dk/config/boot2_qcc743_isp_release_v8.1.9.bin`` from the SDK and set the address to 0x0 + * Press the 'Download' Button + * Enter Flash mode again + * In 'Flash Program', browse to zephyr.bin from your build folder and set the address to 0x2000 + * Press the 'Download' Button again. + + Your board is now flashed. Once the first binary has been flashed at 0x0, there is no need to re-flash it + unless the flash area containing it is erased. + +#. Run your favorite terminal program to listen for output. Under Linux the + terminal should be :code:`/dev/ttyACM1`. For example: + + .. code-block:: console + + $ screen /dev/ttyACM1 115200 + + Connection should be configured as follows: + + - Speed: 115200 + - Data: 8 bits + - Parity: None + - Stop bits: 1 + + Then, press and release RESET button + + .. code-block:: console + + *** Booting Zephyr OS build v4.2.0 *** + Hello World! qcc744m_evk/bl618m05q2i + +Congratulations, you have ``qcc744m_evk`` configured and running Zephyr. + + +.. _Qualcomm QCC74x MCU Datasheet: + https://docs.qualcomm.com/bundle/publicresource/topics/80-WL743-1 + +.. _Qualcomm QCC74x MCU Programming Manual: + https://docs.qualcomm.com/bundle/publicresource/topics/80-58740-1/ + +.. _Qualcomm QCC744M EVK Quick Start Guide: + https://docs.qualcomm.com/bundle/publicresource/topics/80-WL740-250/landingpage.html + +.. _Qualcomm QCC74x SDK: + https://git.codelinaro.org/clo/qcc7xx/QCCSDK-QCC74x + +.. _qcc744m_evk Schematics: + https://docs.qualcomm.com/bundle/publicresource/80-78831-41_REV_AC_QCC744M_Evaluation_Kit_Reference_Schematic.pdf diff --git a/boards/qualcomm/qcc744m_evk/qcc744m-pinctrl.dtsi b/boards/qualcomm/qcc744m_evk/qcc744m-pinctrl.dtsi new file mode 100644 index 0000000000000..42d6b7429f9a8 --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/qcc744m-pinctrl.dtsi @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2025 MASSDRIVER EI (massdriver.space) + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + uart0_default: uart0_default { + group1 { + pinmux = , + ; + bias-pull-up; + input-schmitt-enable; + }; + }; + + uart0_sleep: uart0_sleep { + group1 { + pinmux = , + ; + bias-high-impedance; + }; + }; +}; diff --git a/boards/qualcomm/qcc744m_evk/qcc744m.dtsi b/boards/qualcomm/qcc744m_evk/qcc744m.dtsi new file mode 100644 index 0000000000000..d90d105f4639d --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/qcc744m.dtsi @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2025 MASSDRIVER EI (massdriver.space) + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "qcc744m-pinctrl.dtsi" + +/ { + model = "Qualcomm QCC744M Module"; + compatible = "qcom,qcc744"; + + chosen { + zephyr,flash = &flash0; + zephyr,code-partition = &slot0_partition; + zephyr,itcm = &sram1; + zephyr,sram = &sram0; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + }; +}; + +&cpu0 { + clock-frequency = ; +}; + +&flashctrl { + flash0: flash@A0000000 { + compatible = "soc-nv-flash", "giantec,25q64a"; + reg = <0xA0000000 (0x800000 - 0x2000)>; + write-block-size = <256>; + erase-block-size = ; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot0_partition: partition@0 { + label = "image-0"; + reg = <0x00000000 0x00100000>; + read-only; + }; + + storage_partition: partition@100000 { + label = "storage"; + reg = <0x00100000 (0x700000 - 0x2000)>; + }; + }; + }; +}; + +&uart0 { + status = "okay"; + current-speed = <115200>; + + pinctrl-0 = <&uart0_default>; + pinctrl-1 = <&uart0_sleep>; + pinctrl-names = "default", "sleep"; +}; + +&gpio0 { + status = "okay"; +}; diff --git a/boards/qualcomm/qcc744m_evk/qcc744m_evk-pinctrl.dtsi b/boards/qualcomm/qcc744m_evk/qcc744m_evk-pinctrl.dtsi new file mode 100644 index 0000000000000..197e7b0303861 --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/qcc744m_evk-pinctrl.dtsi @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2025 MASSDRIVER EI (massdriver.space) + * + * SPDX-License-Identifier: Apache-2.0 + */ + +&pinctrl { + i2c0_default: i2c0_default { + group1 { + pinmux = , + ; + bias-pull-up; + input-schmitt-enable; + }; + }; + + spi0_default: spi0_default { + group1 { + pinmux = , + , + ; + bias-pull-up; + input-schmitt-enable; + }; + }; +}; diff --git a/boards/qualcomm/qcc744m_evk/qcc744m_evk.dts b/boards/qualcomm/qcc744m_evk/qcc744m_evk.dts new file mode 100644 index 0000000000000..e91e0528c554f --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/qcc744m_evk.dts @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2025 MASSDRIVER EI (massdriver.space) + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include "qcc744m.dtsi" +#include "qcc744m_evk-pinctrl.dtsi" + +/ { + model = "Qualcomm QCC744M Evaluation Board"; + + aliases { + sw0 = &button_0; + }; + + buttons { + compatible = "gpio-keys"; + + button_0: sw0 { + /* To use, CH347 DTR1 jumper must be removed */ + gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; + zephyr,code = ; + }; + }; +}; + +&cpu0 { + clock-frequency = ; +}; + +&flashctrl { + flash0: flash@A0000000 { + compatible = "soc-nv-flash", "giantec,25q64a"; + reg = <0xA0000000 (0x800000 - 0x2000)>; + write-block-size = <256>; + erase-block-size = ; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot0_partition: partition@0 { + label = "image-0"; + reg = <0x00000000 0x00100000>; + read-only; + }; + + storage_partition: partition@100000 { + label = "storage"; + reg = <0x00100000 (0x700000 - 0x2000)>; + }; + }; + }; +}; + +&i2c0 { + status = "okay"; + clock-frequency = ; + + pinctrl-0 = <&i2c0_default>; + pinctrl-names = "default"; +}; + +&spi0 { + status = "okay"; + + pinctrl-0 = <&spi0_default>; + pinctrl-names = "default"; +}; diff --git a/boards/qualcomm/qcc744m_evk/qcc744m_evk.yaml b/boards/qualcomm/qcc744m_evk/qcc744m_evk.yaml new file mode 100644 index 0000000000000..84e990872dbd4 --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/qcc744m_evk.yaml @@ -0,0 +1,24 @@ +# Copyright (c) 2025 MASSDRIVER EI (massdriver.space) +# +# SPDX-License-Identifier: Apache-2.0 + +identifier: qcc744m_evk +name: Qualcomm QCC744M Evaluation Board +type: mcu +arch: riscv +ram: 480 +toolchain: + - zephyr +testing: + ignore_tags: + - net + - bluetooth +supported: + - gpio + - pinctrl + - uart + - dma + - i2c + - spi + - flash +vendor: qcom diff --git a/boards/qualcomm/qcc744m_evk/qcc744m_evk_defconfig b/boards/qualcomm/qcc744m_evk/qcc744m_evk_defconfig new file mode 100644 index 0000000000000..f55755ffde6f3 --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/qcc744m_evk_defconfig @@ -0,0 +1,10 @@ +# Copyright (c) 2025 MASSDRIVER EI (massdriver.space) +# +# SPDX-License-Identifier: Apache-2.0 + +CONFIG_CONSOLE=y +CONFIG_SERIAL=y + +CONFIG_UART_CONSOLE=y + +CONFIG_MEMC=y diff --git a/boards/qualcomm/qcc744m_evk/support/bl61x.cfg b/boards/qualcomm/qcc744m_evk/support/bl61x.cfg new file mode 100644 index 0000000000000..9c8523db4f1d8 --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/support/bl61x.cfg @@ -0,0 +1,80 @@ +# Copyright (c) 2025 MASSDRIVER EI (massdriver.space) +# +# SPDX-License-Identifier: Apache-2.0 + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME riscv +} + +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x10000 +} + +if { [info exists WORKAREAADDR] } { + set _WORKAREAADDR $WORKAREAADDR +} else { + set _WORKAREAADDR 0x40000000 +} + +if { [info exists CPUTAPID] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x10000b6f +} + +transport select jtag +jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id $_CPUTAPID + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME + +$_TARGETNAME.0 configure -work-area-phys $_WORKAREAADDR -work-area-size $_WORKAREASIZE -work-area-backup 0 + +echo "Ready for Remote Connections" + +$_TARGETNAME.0 configure -event reset-assert-pre { + echo "reset-assert-pre" + adapter speed 400 +} + +$_TARGETNAME.0 configure -event reset-deassert-post { + echo "reset-deassert-post" + + adapter speed 400 + + reg mstatus 0x7880 + reg mie 0 +} + +$_TARGETNAME.0 configure -event reset-init { + echo "reset-init" + + adapter speed 400 + reg mstatus 0x1880 + reg mie 0 + reg pc 0xA0000000 +} + +$_TARGETNAME.0 configure -event gdb-attach { + echo "Debugger attaching: halting execution" + halt + gdb_breakpoint_override hard +} + +$_TARGETNAME.0 configure -event gdb-detach { + echo "Debugger detaching: resuming execution" + resume +} + +gdb_memory_map enable +gdb_flash_program enable + +# 'progbuf', 'sysbus' or 'abstract' +riscv set_mem_access sysbus +riscv set_command_timeout_sec 1 + +init diff --git a/boards/qualcomm/qcc744m_evk/support/openocd.cfg b/boards/qualcomm/qcc744m_evk/support/openocd.cfg new file mode 100644 index 0000000000000..5785fb1b210ad --- /dev/null +++ b/boards/qualcomm/qcc744m_evk/support/openocd.cfg @@ -0,0 +1,8 @@ +# For the provided CH347 + +adapter driver ch347 +ch347 vid_pid 0x1a86 0x55de + +adapter speed 1000 + +transport select jtag