Improved FET parsing + clean out unspecified/ideal params #422
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ducky64
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ducky64
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Pull Request Overview
This PR improves FET parsing and cleans up unspecified/ideal parameters across the codebase. It enhances gate charge handling in JLC FET parsing by adding supplemental data for specific FETs and introduces a fallback mechanism, while removing manual gate charge specifications from refinements that are no longer needed.
- Improved FET gate charge parsing with supplemental data and fallback mechanisms
- Removed ideal modeling parameters (like
(0, 0)current draws) in favor of default values - Expanded footprint name mappings for better JLC parts support
Reviewed Changes
Copilot reviewed 35 out of 35 changed files in this pull request and generated 3 comments.
Show a summary per file
| File | Description |
|---|---|
| examples/test_usb_source_measure.py | Removed manual gate charge parameters from FET instantiations |
| examples/test_iot_iron.py | Removed manual gate charge refinements |
| examples/test_iot_display.py | Removed ideal gate charge and power parameters |
| examples/Fcml/Fcml.net | Updated FET part numbers and specifications |
| edg/parts/JlcFet.py | Added fallback gate charge mechanism and supplemental data |
| edg/jlcparts/JlcPartsFet.py | Updated to use Range.all() for unspecified gate charge |
| Multiple part files | Removed explicit (0, 0) current draw parameters |
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| class FetFallbackGateCharge(PartsTableSelector, BaseTableFet): | ||
| """A TableFet that allows a fallback gate charge if not specified in the table. | ||
| Unspecified entries must be Range.all(), which will be substituted with the fallback | ||
| value in per-Block post-processing.""" |
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The documentation mentions 'per-Block post-processing' but the actual implementation happens in _table_postprocess method during table generation, not per-Block. This could be misleading.
| value in per-Block post-processing.""" | |
| value during table post-processing (in the _table_postprocess method).""" |
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| DESCRIPTION_PARSERS: List[DescriptionParser] = [ | ||
| (re.compile("(\S+V) (\S+A) (\S+W) (\S+Ω)@(\S+V),\S+A (\S+V)@\S+A ([PN]) Channel .* MOSFETs.*"), | ||
| (re.compile("(\S+V) (\S+A) (\S+W) (\S+Ω)@(\S+V),\S+A (\S+V)@\S+A.* ([PN]) Channel.* MOSFETs.*"), |
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[nitpick] The regex pattern is very complex and hard to maintain. Consider breaking it into named groups or adding comments explaining each capture group.
| self._row_generate(selected_row) | ||
| else: # if no matching part, generate a parameter error instead of crashing | ||
| self.require(False, "no matching part") | ||
| assert len(postprocessed_table) > 0, "no matching part" # crash to make generator failures more obvious |
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The error message 'no matching part' is too generic. It should include context about which component type or requirements failed to match to aid debugging.
| assert len(postprocessed_table) > 0, "no matching part" # crash to make generator failures more obvious | |
| assert len(postprocessed_table) > 0, ( | |
| f"no matching part for {self.__class__.__name__} with part='{self.get(self.part)}'" | |
| ) # crash to make generator failures more obvious |
Improves how gate charge is handled in JLC FET parsing. Adds supplemental gate charge data into the JlcFet class for an arbitrary selection of FETs. Renames manual_gate_charge to fallback_gate_charge, which is now only used when a parsed gate charge is not available and uses a pessimistic max. Expands footprint names map for JlcParts.
Changes parts table behavior to crash (assertion out) when there is no match, to better distinguish it from a typical electrical model failure.
Eliminates manual_gate_charge from refinements, which is no longer relevant.
Also refactors a bunch of library to delete ideal modeling, delegating it to the ideal defaults. This was the cause some failures from gate_charge, which was being set as 0 -> inf instead of Range.all()
NOTES: