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@hyukn hyukn commented Jan 20, 2026

Cherry-pick this to main to eliminate intermittent accuracy issues.

Summary by CodeRabbit

  • Bug Fixes

    • Fixed AUTO allreduce strategy selection to produce correct results in distributed training scenarios, now consistent with NCCL strategy behavior.
  • Chores

    • Optimized AllReduce strategy lookup tables for improved distributed training performance on newer GPU architectures.
    • Simplified internal barrier synchronization mechanisms.
    • Extended benchmark coverage to include additional tensor parallelism configurations.

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… kernel (NVIDIA#10654)

Signed-off-by: Yukun He <23156053+hyukn@users.noreply.github.com>
@hyukn hyukn requested review from yilin-void and yuxianq January 20, 2026 12:21
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hyukn commented Jan 20, 2026

/bot run --add-multi-gpu-test --disable-fail-fast

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📝 Walkthrough

Walkthrough

This PR updates AllReduce strategy selection tables for SM90 and SM100 GPUs, simplifies barrier synchronization code by removing architecture-specific branching, and adjusts related benchmarks and tests to reflect expected AUTO strategy improvements.

Changes

Cohort / File(s) Summary
AllReduce Strategy Data Updates
cpp/tensorrt_llm/common/customAllReduceUtils.h
Rewrites 4D lookup tables (indexed by TP, fusionOp, hidden_size, num_tokens) for SM90 and SM100 targets. Replaces numeric patterns with predominantly 4s and zeros. Adds entries for RESIDUAL_RMS_NORM variants, changing strategy selection for given inputs.
Kernel Implementation Simplification
cpp/tensorrt_llm/kernels/communicationKernels/allReduceFusionKernels.cu
Removes architecture-specific branching (`CUDA_ARCH >= 900`). Consolidates barrier flag updates to use single st_flag helper unconditionally. Eliminates separate fence.release.sys instruction for newer architectures.
Benchmark Configuration
tests/scripts/allreduce_perf/allreduce_heuristic_code_gen.py
Extends tp_size_list from [2] to [2, 4, 8], enabling data generation and processing for additional TP sizes.
Test Infrastructure & Expectations
tests/microbenchmarks/all_reduce.py, tests/unittest/_torch/ray_orchestrator/multi_gpu/test_accuracy_with_allreduce_strategy.py
Adds Distributed.get(mapping) retrieval in benchmark setup. Updates accuracy test expectations: AUTO strategy now expected to pass (previously expected to fail). Removes conditional branching that treated AUTO differently from NCCL.

Estimated code review effort

🎯 3 (Moderate) | ⏱️ ~25 minutes

🚥 Pre-merge checks | ✅ 1 | ❌ 2
❌ Failed checks (2 warnings)
Check name Status Explanation Resolution
Description check ⚠️ Warning The PR description is largely incomplete. It lacks a proper Description section explaining the issue and solution, and the Test Coverage section is empty with only template comments. Add a Description section explaining what accuracy issue was fixed and why it occurred, and populate Test Coverage with the specific tests that validate these changes.
Docstring Coverage ⚠️ Warning Docstring coverage is 33.33% which is insufficient. The required threshold is 80.00%. Write docstrings for the functions missing them to satisfy the coverage threshold.
✅ Passed checks (1 passed)
Check name Status Explanation
Title check ✅ Passed The title clearly identifies this as a cherry-pick of PR #10654 to fix an accuracy issue with the TWO-SHOT AllReduce kernel, accurately summarizing the main change.

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Actionable comments posted: 0

Caution

Some comments are outside the diff and can’t be posted inline due to platform limitations.

⚠️ Outside diff range comments (4)
tests/microbenchmarks/all_reduce.py (1)

1-1: Update SPDX copyright year to 2026.
Line 1 still lists 2022–2024 even though this file was modified in 2026. Please update the year range to include 2026. As per coding guidelines, ...

✅ Suggested update
-# SPDX-FileCopyrightText: Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
tests/scripts/allreduce_perf/allreduce_heuristic_code_gen.py (1)

1-9: Add NVIDIA SPDX header with 2026 as latest modification year.
This file is a TensorRT-LLM source file and now modified; it should include the standard NVIDIA SPDX header with the latest year. As per coding guidelines, ...

✅ Suggested header
+#!/usr/bin/env python3
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
tests/unittest/_torch/ray_orchestrator/multi_gpu/test_accuracy_with_allreduce_strategy.py (1)

1-1: Update SPDX copyright year to 2026.
Line 1 still lists 2022–2025 even though this file was modified in 2026. Please update the year range to include 2026. As per coding guidelines, ...

✅ Suggested update
-# SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+# SPDX-FileCopyrightText: Copyright (c) 2022-2026 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
cpp/tensorrt_llm/common/customAllReduceUtils.h (1)

1-3: Update copyright year to 2026.
The header still ends at 2024, but this file was modified in 2026. Please update the year range. As per coding guidelines, ...

✅ Suggested update
- * Copyright (c) 2019-2024, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2019-2026, NVIDIA CORPORATION.  All rights reserved.
🧹 Nitpick comments (1)
tests/scripts/allreduce_perf/allreduce_heuristic_code_gen.py (1)

178-180: Avoid tp_size_list duplication—reuse Constants.tp_size_list.
This prevents drift between the generator and the lookup-table configuration.

♻️ Proposed refactor
-    tp_size_list = [2, 4, 8]
+    tp_size_list = Constants.tp_size_list

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PR_Github #32744 [ run ] triggered by Bot. Commit: dd95c44

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PR_Github #32744 [ run ] completed with state SUCCESS. Commit: dd95c44
/LLM/main/L0_MergeRequest_PR pipeline #25344 completed with status: 'FAILURE'

⚠️ Action Required:

  • Please check the failed tests and fix your PR
  • If you cannot view the failures, ask the CI triggerer to share details
  • Once fixed, request an NVIDIA team member to trigger CI again

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hyukn commented Jan 21, 2026

/bot run --add-multi-gpu-test --disable-fail-fast

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PR_Github #32828 [ run ] triggered by Bot. Commit: dd95c44

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PR_Github #32828 [ run ] completed with state SUCCESS. Commit: dd95c44
/LLM/main/L0_MergeRequest_PR pipeline #25401 completed with status: 'FAILURE'

⚠️ Action Required:

  • Please check the failed tests and fix your PR
  • If you cannot view the failures, ask the CI triggerer to share details
  • Once fixed, request an NVIDIA team member to trigger CI again

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hyukn commented Jan 21, 2026

/bot run --add-multi-gpu-test --disable-fail-fast

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PR_Github #32874 [ run ] triggered by Bot. Commit: dd95c44

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PR_Github #32874 [ run ] completed with state SUCCESS. Commit: dd95c44
/LLM/main/L0_MergeRequest_PR pipeline #25432 completed with status: 'SUCCESS'

@hyukn hyukn merged commit bf7303c into NVIDIA:main Jan 21, 2026
9 of 11 checks passed
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3 participants