bsp: cvitek: riscv: use marco for linker script

bsp/cvitek/README.md

@@ -163,11 +163,11 @@ RT-Thread Kernel  --->
     [*] Enable RT-Thread Smart (microkernel on kernel/userland)
 ```
 
-**注意检查内核虚拟起始地址的配置，确保为 `0xFFFFFFC000200000`。**
+**注意检查内核虚拟起始地址的配置，确保为 `0xFFFFFFC000000000`。**
 
 ```shell
     RT-Thread Kernel  --->
-(0xFFFFFFC000200000) The virtural address of kernel start
+(0xFFFFFFC000000000) The virtural address of kernel start
     RT-Thread Components  --->
 ```
 

bsp/cvitek/cv18xx_risc-v/.config

@@ -155,7 +155,6 @@ CONFIG_RT_DEBUGING_ASSERT=y
 CONFIG_RT_DEBUGING_COLOR=y
 CONFIG_RT_DEBUGING_CONTEXT=y
 # CONFIG_RT_DEBUGING_AUTO_INIT is not set
-# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
 # CONFIG_RT_USING_CI_ACTION is not set
 
 #
@@ -173,7 +172,6 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
 #
 # Memory Management
 #
-CONFIG_RT_PAGE_MAX_ORDER=11
 # CONFIG_RT_USING_MEMPOOL is not set
 # CONFIG_RT_USING_SMALL_MEM is not set
 CONFIG_RT_USING_SLAB=y
@@ -195,15 +193,15 @@ CONFIG_RT_USING_DEVICE_OPS=y
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=256
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
-CONFIG_RT_VER_NUM=0x50200
+CONFIG_RT_VER_NUM=0x50201
 CONFIG_RT_USING_STDC_ATOMIC=y
 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
 # end of RT-Thread Kernel
 
 CONFIG_ARCH_CPU_64BIT=y
 CONFIG_RT_USING_CACHE=y
 CONFIG_ARCH_MM_MMU=y
-CONFIG_KERNEL_VADDR_START=0xFFFFFFC000200000
+CONFIG_KERNEL_VADDR_START=0xffffffc000000000
 CONFIG_ARCH_RISCV=y
 CONFIG_ARCH_RISCV_FPU=y
 CONFIG_ARCH_RISCV_FPU_D=y
@@ -274,6 +272,7 @@ CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000
 CONFIG_RT_USING_DFS_DEVFS=y
 CONFIG_RT_USING_DFS_ROMFS=y
 CONFIG_RT_USING_DFS_PTYFS=y
+# CONFIG_RT_USING_DFS_PROCFS is not set
 # CONFIG_RT_USING_DFS_CROMFS is not set
 CONFIG_RT_USING_DFS_TMPFS=y
 # CONFIG_RT_USING_DFS_MQUEUE is not set
@@ -533,9 +532,25 @@ CONFIG_RT_USING_ADT_REF=y
 # end of Utilities
 
 # CONFIG_RT_USING_VBUS is not set
+
+#
+# Memory management
+#
+CONFIG_RT_PAGE_AFFINITY_BLOCK_SIZE=0x1000
+CONFIG_RT_PAGE_MAX_ORDER=11
+# CONFIG_RT_USING_MEMBLOCK is not set
+
+#
+# Debugging
+#
+# CONFIG_RT_DEBUGGING_ALIASING is not set
+# CONFIG_RT_DEBUGING_PAGE_LEAK is not set
+# CONFIG_RT_DEBUGGING_PAGE_POISON is not set
+# end of Debugging
+# end of Memory management
+
 CONFIG_RT_USING_LWP=y
-CONFIG_LWP_DEBUG=y
-# CONFIG_LWP_DEBUG_INIT is not set
+# CONFIG_LWP_DEBUG is not set
 CONFIG_LWP_USING_RUNTIME=y
 CONFIG_RT_LWP_MAX_NR=30
 CONFIG_LWP_TASK_STACK_SIZE=16384
@@ -548,12 +563,6 @@ CONFIG_RT_USING_LDSO=y
 CONFIG_LWP_USING_TERMINAL=y
 CONFIG_LWP_PTY_MAX_PARIS_LIMIT=64
 
-#
-# Memory management
-#
-# CONFIG_RT_USING_MEMBLOCK is not set
-# end of Memory management
-
 #
 # Using USB legacy version
 #

bsp/cvitek/cv18xx_risc-v/.gitignore

@@ -1,2 +1,4 @@
 dtb/
-Image
+Image
+
+link.lds.generated

bsp/cvitek/cv18xx_risc-v/SConstruct

@@ -29,20 +29,11 @@ drivers_path_prefix = os.path.dirname(SDK_ROOT) + '/drivers'
 # prepare building environment
 objs = PrepareBuilding(env, RTT_ROOT, has_libcpu = False)
 
-if GetDepend('RT_USING_SMART'):
-    # use smart link.lds
-    env['LINKFLAGS'] = env['LINKFLAGS'].replace('link.lds', 'link_smart.lds')
-
 # include libraries
 objs.extend(SConscript(drivers_path_prefix + '/SConscript', variant_dir='build/drivers', duplicate=0))
 
-stack_size = 4096
-
-stack_lds = open('link_stacksize.lds', 'w')
-if GetDepend('__STACKSIZE__'):
-    stack_size = GetDepend('__STACKSIZE__')
-stack_lds.write('__STACKSIZE__ = %d;\n' % stack_size)
-stack_lds.close()
+from gen_ld import *
+generate_ldscript('link.lds', 'link.lds.generated')
 
 # make a building
 DoBuilding(TARGET, objs)

bsp/cvitek/cv18xx_risc-v/board/board.c

@@ -14,21 +14,32 @@
 
 #include "sbi.h"
 
+extern unsigned int __sram_end;
+#define RAM_END     (rt_size_t)((void *)&__sram_end)
+
+extern unsigned int __bss_start;
+extern unsigned int __bss_end;
+
+#define RT_HW_HEAP_BEGIN ((void *)&__bss_end)
+#define RT_HW_HEAP_END   ((void *)((rt_size_t)RT_HW_HEAP_BEGIN + 8 * 1024 * 1024))
+
+#define RT_HW_PAGE_START RT_HW_HEAP_END
+#define RT_HW_PAGE_END   ((void *)(RAM_END))
+
 #ifdef RT_USING_SMART
 #include "riscv_mmu.h"
 #include "mmu.h"
 #include "page.h"
 #include "lwp_arch.h"
 
-/* respect to boot loader, must be 0xFFFFFFC000200000 */
-RT_STATIC_ASSERT(kmem_region, KERNEL_VADDR_START == 0xFFFFFFC000200000);
+#include "mem_layout.h"
 
 rt_region_t init_page_region = {(rt_size_t)RT_HW_PAGE_START, (rt_size_t)RT_HW_PAGE_END};
 
 extern size_t MMUTable[];
 
 struct mem_desc platform_mem_desc[] = {
-    {KERNEL_VADDR_START, (rt_size_t)RT_HW_PAGE_END - 1, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM},
+    {KERNEL_START, (rt_size_t)RT_HW_PAGE_END - 1, (rt_size_t)ARCH_MAP_FAILED, NORMAL_MEM},
 };
 
 #define NUM_MEM_DESC (sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]))

bsp/cvitek/cv18xx_risc-v/board/board.h

@@ -15,18 +15,6 @@
 #include "drv_uart.h"
 #include "tick.h"
 
-extern unsigned int __sram_end;
-#define RAM_END     (rt_size_t)((void *)&__sram_end)
-
-extern unsigned int __bss_start;
-extern unsigned int __bss_end;
-
-#define RT_HW_HEAP_BEGIN ((void *)&__bss_end)
-#define RT_HW_HEAP_END   ((void *)((rt_size_t)RT_HW_HEAP_BEGIN + 8 * 1024 * 1024))
-
-#define RT_HW_PAGE_START RT_HW_HEAP_END
-#define RT_HW_PAGE_END   ((void *)(RAM_END))
-
 void rt_hw_board_init(void);
 
 #endif

bsp/cvitek/cv18xx_risc-v/board/mem_layout.h

@@ -0,0 +1,22 @@
+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef MEMORY_LAYOUT_H__
+#define MEMORY_LAYOUT_H__
+
+#include "../rtconfig.h"
+
+/* Real start address of kernel is located after bootloader */
+#define KERNEL_OFFSET 0x200000
+
+#ifdef RT_USING_SMART
+#define KERNEL_START (KERNEL_VADDR_START + KERNEL_OFFSET)
+#define KERNEL_SIZE    64 * 1024 * 1024
+#else
+#define KERNEL_START (0x80000000 + KERNEL_OFFSET)
+#define KERNEL_SIZE    32 * 1024 * 1024
+#endif
+
+#endif // MEMORY_LAYOUT_H__

bsp/cvitek/cv18xx_risc-v/gen_ld.py

@@ -0,0 +1,27 @@
+import os
+import rtconfig
+import platform
+import subprocess
+
+def generate_ldscript(input, output):
+
+    if not os.path.exists(input):
+        print('Error: file', input, 'not found')
+        return
+
+    if os.path.exists(output):
+        os.remove(output)
+
+    if rtconfig.PLATFORM == 'gcc':
+
+        gcc_cmd = os.path.join(rtconfig.EXEC_PATH, rtconfig.CC)
+
+        # gcc -E -P -x c $input -o $output
+        if (platform.system() == 'Windows'):
+            child = subprocess.Popen([gcc_cmd, '-E', '-P', '-x', 'c', input, '-o', output], stdout=subprocess.PIPE, stderr=subprocess.PIPE, shell=True)
+        else:
+            child = subprocess.Popen(gcc_cmd + f' -E -P -x c {input} -o {output}', stdout=subprocess.PIPE, stderr=subprocess.PIPE, shell=True)
+
+        child.communicate()
+
+        print(output, 'is generated from', input)

bsp/cvitek/cv18xx_risc-v/link.lds

@@ -8,28 +8,20 @@
  * 2020/12/12     bernard      The first version
  */
 
-INCLUDE "link_stacksize.lds"
+#include "board/mem_layout.h"
 
 OUTPUT_ARCH( "riscv" )
 
-/*
- * Memory layout:
- * 0x10200000 - 0x10201000: Bootloader
- * 0x10201000 - 0x10A00000: Kernel
- * 0x10A00000 - 0x11200000: Heap
- */
-
 MEMORY
 {
-   SRAM(wx): ORIGIN = 0x80200000, LENGTH = 32M
+   SRAM(wx): ORIGIN = KERNEL_START, LENGTH = KERNEL_SIZE
 }
 
 ENTRY(_start)
 SECTIONS
 {
     . = ORIGIN(SRAM) ;
 
-    /* __STACKSIZE__ = 4096; */
     __sram_base = ORIGIN(SRAM);
     __sram_size = LENGTH(SRAM);
     __sram_end = __sram_base + __sram_size;