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2 changes: 2 additions & 0 deletions examples/stmicro/stm32/build.zig
Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,8 @@ pub fn build(b: *std.Build) void {
.{ .target = stm32.chips.STM32F103CB, .name = "STM32F1xx_timer_capture", .file = "src/stm32f1xx/timer_capture.zig" },
.{ .target = stm32.chips.STM32F103CB, .name = "STM32F1xx_rtc", .file = "src/stm32f1xx/rtc.zig" },
.{ .target = stm32.chips.STM32F103CB, .name = "STM32F1xx_EXTI", .file = "src/stm32f1xx/EXTI.zig" },

.{ .target = stm32.chips.STM32H723VG, .name = "STM32H723_rcc", .file = "src/stm32h723/rcc.zig" },
};

for (available_examples) |example| {
Expand Down
70 changes: 70 additions & 0 deletions examples/stmicro/stm32/src/stm32h723/rcc.zig
Original file line number Diff line number Diff line change
@@ -0,0 +1,70 @@
// This is an example RCC configuration for the STM32H723
// Configurations and procedures may vary for other targets

const std = @import("std");
const microzig = @import("microzig");
const hal = microzig.hal;
const pins = hal.pins;
const rcc = hal.rcc;
const PWR = microzig.chip.peripherals.PWR;

//set Master Clock Output(MCO) pins
const global_pins = pins.GlobalConfiguration{
.GPIOA = .{
.PIN8 = .{
.mode = .{
.alternate_function = .{
.afr = .AF0,
},
},
.name = "MCO1",
},
},
.GPIOC = .{
.PIN9 = .{
.mode = .{
.alternate_function = .{ .afr = .AF0 },
},
.name = "MCO2",
},
},
};

pub fn main() !void {

// set inital power state
PWR.CR3.modify(.{
.LDOEN = 1,
.SDEN = 1,
});

//configure cpu clock to 550 Mhz
_ = try rcc.apply(.{
.HSE_VALUE = 25_000_000,
.PLLSource = .RCC_PLLSOURCE_HSE,
.DIVM1 = 5,
.DIVN1 = 110,
.DIVP1 = 1,
.DIVQ1 = 10,
.SYSCLKSource = .RCC_SYSCLKSOURCE_PLLCLK,
.RCC_MCO1Source = .RCC_MCO1SOURCE_PLL1QCLK,
.RCC_MCO2Source = .RCC_MCO2SOURCE_LSICLK,
.RCC_MCODiv2 = .RCC_MCODIV_10,
.RCC_MCODiv1 = .RCC_MCODIV_10,
.D2PPRE2 = .RCC_APB2_DIV2,
.D2PPRE1 = .RCC_APB1_DIV2,
.D3PPRE = .RCC_APB4_DIV2,
.D1PPRE = .RCC_APB3_DIV2,
.HPRE = .RCC_HCLK_DIV2,
.flags = .{
.MCO1Config = true,
.MCO2Config = true,
.HSEOscillator = true,
},
});

//apply pins config
_ = global_pins.apply();

while (true) {}
}
4 changes: 2 additions & 2 deletions port/stmicro/stm32/build.zig.zon
Original file line number Diff line number Diff line change
Expand Up @@ -10,8 +10,8 @@
.hash = "N-V-__8AAFi8WBlOh-NikHFVBjzQE0F1KixgKjVWYnlijPNm",
},
.ClockHelper = .{
.url = "git+https://github.com/ZigEmbeddedGroup/ClockHelper#7fd073b1be9544941c15f9a63032ed06149ddb70",
.hash = "ClockHelper-2.0.0-RcMaOSniGQHXH_qeoZbQDG64XThqpXTVPMfJ6P7LHpYY",
.url = "git+https://github.com/ZigEmbeddedGroup/ClockHelper#922c35eb54f0417318ccfcc32367bdcf11823ede",
.hash = "ClockHelper-2.0.0-RcMaOUMGIwEUEHQJ0C2Q-KbWdKXN2GqzQcs9MpVSTgm3",
},
},
.paths = .{
Expand Down
16 changes: 16 additions & 0 deletions port/stmicro/stm32/src/Chips.zig
Original file line number Diff line number Diff line change
Expand Up @@ -21522,6 +21522,10 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
.{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
},
},
.hal = .{
.root_source_file = b.path("src/hals/STM32H723.zig"),
.imports = hal_imports,
},
};

ret.STM32H723VG = b.allocator.create(microzig.Target) catch @panic("out of memory");
Expand Down Expand Up @@ -21549,6 +21553,10 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
.{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
},
},
.hal = .{
.root_source_file = b.path("src/hals/STM32H723.zig"),
.imports = hal_imports,
},
};

ret.STM32H723ZE = b.allocator.create(microzig.Target) catch @panic("out of memory");
Expand Down Expand Up @@ -21576,6 +21584,10 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
.{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
},
},
.hal = .{
.root_source_file = b.path("src/hals/STM32H723.zig"),
.imports = hal_imports,
},
};

ret.STM32H723ZG = b.allocator.create(microzig.Target) catch @panic("out of memory");
Expand Down Expand Up @@ -21603,6 +21615,10 @@ pub fn init(dep: *std.Build.Dependency, hal_imports: []std.Build.Module.Import)
.{ .name = "RAM_D3", .tag = .ram, .offset = 0x38000000, .length = 0x4000, .access = .rwx },
},
},
.hal = .{
.root_source_file = b.path("src/hals/STM32H723.zig"),
.imports = hal_imports,
},
};

ret.STM32H725AE = b.allocator.create(microzig.Target) catch @panic("out of memory");
Expand Down
11 changes: 9 additions & 2 deletions port/stmicro/stm32/src/generate.zig
Original file line number Diff line number Diff line change
Expand Up @@ -278,15 +278,22 @@ fn generate_chips_file(
\\ },
\\
);
}
if (std.mem.startsWith(u8, chip_file.name, "STM32L47")) {
} else if (std.mem.startsWith(u8, chip_file.name, "STM32L47")) {
try writer.writeAll(
\\ .hal = .{
\\ .root_source_file = b.path("src/hals/STM32L47X.zig"),
\\ .imports = hal_imports,
\\ },
\\
);
} else if (std.mem.startsWith(u8, chip_file.name, "STM32H723")) {
try writer.writeAll(
\\ .hal = .{
\\ .root_source_file = b.path("src/hals/STM32H723.zig"),
\\ .imports = hal_imports,
\\ },
\\
);
}

try writer.writeAll(
Expand Down
28 changes: 28 additions & 0 deletions port/stmicro/stm32/src/hals/STM32H723.zig
Original file line number Diff line number Diff line change
@@ -0,0 +1,28 @@
const std = @import("std");
const microzig = @import("microzig");

pub const systick_timer = @import("./common/systick_timer.zig");
pub const systick = @import("./common/systick.zig");
pub const gpio = @import("./common/gpio_v2.zig");
pub const pins = @import("./common/pins_v2.zig");
pub const rcc = @import("./STM32H723/rcc.zig");

pub fn get_sys_clk() u32 {
return @intFromFloat(rcc.current_clocks.SysCLKOutput);
}

pub fn get_systick_clk() u32 {
return @intFromFloat(rcc.current_clocks.CortexSysOutput);
}

pub var Reset_Reason: rcc.ResetReason = .unknown;

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Suggestion: Rename Reset_Reason to ResetReason, it should be more in line with our style guidelines. This automation is not perfect so take it with a grain of salt.

pub fn init() void {
const reset = rcc.get_reset_reason();
Reset_Reason = reset;

// force default configuration; required for clock configuration
// Power control (PWR) 6.4.1 System supply startup - page: 238 RM0468 Rev 3
if (reset == .power_on) {
microzig.chip.peripherals.PWR.CR3.raw = 0x0000_0046;
}
}
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