Armv8.1-M: Add native Keccak x4 XORBytes and ExtractBytes#972
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Armv8.1-M: Add native Keccak x4 XORBytes and ExtractBytes#972mkannwischer wants to merge 4 commits intomainfrom
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Feb 19, 2026
- Ports Armv8.1-M: Add native Keccak x4 XORBytes and ExtractBytes mlkem-native#1524
Replace test_keccakf1600x4_permute with test_keccakf1600x4_xor_permute_extract that tests the full x4 Keccak flow (xor_bytes, permute, extract_bytes) against the x1 C reference implementation. Testing through the public interface rather than comparing internal state directly allows verifying backends that use custom state representations (e.g., bit-interleaved) without requiring state conversion functions. The test uses random offsets and lengths for both xor_bytes and extract_bytes, and verifies each of the 4 lanes independently against the x1 reference. Also reduce functional test iterations for M55 baremetal platform. Signed-off-by: Matthias J. Kannwischer <matthias@kannwischer.eu>
Extend the FIPS202 native backend API to support implementing XORBytes and ExtractBytes steps in native code. This is essential for backends using custom state representations (e.g., bit-interleaved state), where these functions handle conversion to/from the internal format on-the-fly. In such cases, they also account for a significant amount of processing time. New flags: - MLD_USE_FIPS202_X4_XOR_BYTES_NATIVE: Backend provides native XOR bytes - MLD_USE_FIPS202_X4_EXTRACT_BYTES_NATIVE: Backend provides native extract bytes When set, backends provide native implementations for: - mld_keccakf1600_xor_bytes_x4_native: XOR input data into state - mld_keccakf1600_extract_bytes_x4_native: Extract output from state Signed-off-by: Matthias J. Kannwischer <matthias@kannwischer.eu>
Add native MVE implementations of XORBytes and ExtractBytes that perform bit-interleaving/deinterleaving on-the-fly, enabling use of a bit-interleaved state representation without temporary conversions in the permutation. This improves performance by: - Reducing the number of bit-interleaving operations - Accelerating bit-interleaving using MVE vector instructions The backend uses bit-interleaved state representation where each 64-bit lane is split into even and odd 32-bit halves for efficient 32-bit MVE processing. Co-Authored-By: Brendan Moran <brendan.moran@arm.com> Signed-off-by: Matthias J. Kannwischer <matthias@kannwischer.eu>
Follow the same dispatch pattern used by mld_keccakf1600_permute and mld_keccakf1600x4_permute: extract the C fallback into a static _c function, have the public function dispatch via the native return code, and mark the native wrappers with MLD_MUST_CHECK_RETURN_VALUE. Add CBMC contracts for the native xor_bytes and extract_bytes functions and corresponding proofs for the native dispatch paths. The _c functions do not have separate proofs, in line with the other FIPS-202 functions. Signed-off-by: Matthias J. Kannwischer <matthias@kannwischer.eu>
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CBMC Results (ML-DSA-65)Full Results (177 proofs)
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CBMC Results (ML-DSA-44)Full Results (177 proofs)
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CBMC Results (ML-DSA-87)Full Results (177 proofs)
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