boards: qualcomm: Add QCC744M EVK

boards/qualcomm/index.rst

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+.. _boards-qualcomm:
+
+Qualcomm Technologies, Inc.
+###########################
+
+.. toctree::
+   :maxdepth: 1
+   :glob:
+
+   **/*

boards/qualcomm/qcc744m_evk/Kconfig.qcc744m_evk

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+# Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
+#
+# SPDX-License-Identifier: Apache-2.0
+
+config BOARD_QCC744M_EVK
+	select SOC_BL618M05Q2I

boards/qualcomm/qcc744m_evk/board.cmake

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+# Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
+#
+# SPDX-License-Identifier: Apache-2.0
+
+board_runner_args(openocd --cmd-pre-init "source [find bl61x.cfg]")
+
+board_runner_args(openocd --use-elf --no-load --no-init)
+board_runner_args(openocd --gdb-init "set mem inaccessible-by-default off")
+board_runner_args(openocd --gdb-init "set architecture riscv:rv32")
+board_runner_args(openocd --gdb-init "set remotetimeout 250")
+board_runner_args(openocd --gdb-init "set print asm-demangle on")
+board_runner_args(openocd --gdb-init "set backtrace limit 32")
+board_runner_args(openocd --gdb-init "mem 0x22FC0000 0x23010000 rw")
+board_runner_args(openocd --gdb-init "mem 0x62FC0000 0x63010000 rw")
+board_runner_args(openocd --gdb-init "mem 0x90000000 0x90020000 ro")
+board_runner_args(openocd --gdb-init "mem 0xA8000000 0xA8800000 rw")
+board_runner_args(openocd --gdb-init "mem 0xA0000000 0xA0400000 ro")
+include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
+
+board_runner_args(bflb_mcu_tool --chipname bl616)
+include(${ZEPHYR_BASE}/boards/common/bflb_mcu_tool.board.cmake)
+
+board_set_flasher(bflb_mcu_tool)

boards/qualcomm/qcc744m_evk/board.yml

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+board:
+  name: qcc744m_evk
+  full_name: Qualcomm QCC744M Evaluation Board
+  vendor: qcom
+  socs:
+    - name: bl618m05q2i

boards/qualcomm/qcc744m_evk/doc/index.rst

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+.. zephyr:board:: qcc744m_evk
+
+Overview
+********
+
+The QCC744M Evaluation board features the QCC744M module, which contains a QCC744-2 SoC with 4MB of
+PSRAM and an external 8MB Flash chip.
+Qualcomm QCC74x is a tri-radio chipset integrating 1x1 Wi-Fi 6, Bluetooth 5.4,
+and IEEE 802.15.4 (Thread and Zigbee-ready) powered by a 32-bit RISC-V MCU up to 320 MHz, it is
+based on, and mostly equivalent, to the Bouffalolab BL61x Serie of chipsets.
+
+Hardware
+********
+
+For more information about the Qualcomm QCC74x MCU:
+
+- `Qualcomm QCC74x MCU Datasheet`_
+- `Qualcomm QCC74x MCU Programming Manual`_
+- `Qualcomm QCC744M EVK Quick Start Guide`_
+- `Qualcomm QCC74x SDK`_
+- `qcc744m_evk Schematics`_
+
+Supported Features
+==================
+
+.. zephyr:board-supported-hw::
+
+
+Serial Port
+===========
+
+The ``qcc744m_evk`` board uses UART0 as default serial port.  It is connected
+to the onboard USB Serial converter and the port is used for both program and console.
+
+
+Programming and Debugging
+*************************
+
+Samples
+=======
+
+#. Build the Zephyr kernel and the :zephyr:code-sample:`hello_world` sample application:
+
+   .. zephyr-app-commands::
+      :zephyr-app: samples/hello_world
+      :board: qcc744m_evk
+      :goals: build
+
+#. ``west flash`` cannot flash QCC74x MCUs at the moment.
+   You may first acquire 'QConn Flash' from the QCC74x SDK and follow these instructions:
+
+   * Open Qconn Flash
+   * Go to tab 'Flash Utils'
+   * Select appropriate flash port and interface.
+   * Reset board (press RESET, right button) while holding the BOOT (left) button to enter flash mode
+   * In 'Flash Program', browse to ``bsp/board/qcc744dk/config/boot2_qcc743_isp_release_v8.1.9.bin`` from the SDK and set the address to 0x0
+   * Press the 'Download' Button
+   * Enter Flash mode again
+   * In 'Flash Program', browse to zephyr.bin from your build folder and set the address to 0x2000
+   * Press the 'Download' Button again.
+
+   Your board is now flashed. Once the first binary has been flashed at 0x0, there is no need to re-flash it
+   unless the flash area containing it is erased.
+
+#. Run your favorite terminal program to listen for output. Under Linux the
+   terminal should be :code:`/dev/ttyACM1`. For example:
+
+   .. code-block:: console
+
+      $ screen /dev/ttyACM1 115200
+
+   Connection should be configured as follows:
+
+      - Speed: 115200
+      - Data: 8 bits
+      - Parity: None
+      - Stop bits: 1
+
+   Then, press and release RESET button
+
+   .. code-block:: console
+
+      *** Booting Zephyr OS build v4.2.0 ***
+      Hello World! qcc744m_evk/bl618m05q2i
+
+Congratulations, you have ``qcc744m_evk`` configured and running Zephyr.
+
+
+.. _Qualcomm QCC74x MCU Datasheet:
+   https://docs.qualcomm.com/bundle/publicresource/topics/80-WL743-1
+
+.. _Qualcomm QCC74x MCU Programming Manual:
+   https://docs.qualcomm.com/bundle/publicresource/topics/80-58740-1/
+
+.. _Qualcomm QCC744M EVK Quick Start Guide:
+   https://docs.qualcomm.com/bundle/publicresource/topics/80-WL740-250/landingpage.html
+
+.. _Qualcomm QCC74x SDK:
+   https://git.codelinaro.org/clo/qcc7xx/QCCSDK-QCC74x
+
+.. _qcc744m_evk Schematics:
+   https://docs.qualcomm.com/bundle/publicresource/80-78831-41_REV_AC_QCC744M_Evaluation_Kit_Reference_Schematic.pdf

boards/qualcomm/qcc744m_evk/qcc744m-pinctrl.dtsi

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+/*
+ * Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <dt-bindings/pinctrl/bl618x-pinctrl.h>
+
+&pinctrl {
+	uart0_default: uart0_default {
+		group1 {
+			pinmux = <GPIO22_UART0_RX>,
+				 <GPIO21_UART0_TX>;
+			bias-pull-up;
+			input-schmitt-enable;
+		};
+	};
+
+	uart0_sleep: uart0_sleep {
+		group1 {
+			pinmux = <GPIO22_UART0_RX>,
+				 <GPIO21_UART0_TX>;
+			bias-high-impedance;
+		};
+	};
+};

boards/qualcomm/qcc744m_evk/qcc744m.dtsi

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+/*
+ * Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <bflb/bl618.dtsi>
+#include "qcc744m-pinctrl.dtsi"
+
+/ {
+	model = "Qualcomm QCC744M Module";
+	compatible = "qcom,qcc744";
+
+	chosen {
+		zephyr,flash = &flash0;
+		zephyr,code-partition = &slot0_partition;
+		zephyr,itcm = &sram1;
+		zephyr,sram = &sram0;
+		zephyr,console = &uart0;
+		zephyr,shell-uart = &uart0;
+	};
+};
+
+&cpu0 {
+	clock-frequency = <DT_FREQ_M(320)>;
+};
+
+&flashctrl {
+	flash0: flash@A0000000 {
+		compatible = "soc-nv-flash", "giantec,25q64a";
+		reg = <0xA0000000 (0x800000 - 0x2000)>;
+		write-block-size = <256>;
+		erase-block-size = <DT_SIZE_K(4)>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			slot0_partition: partition@0 {
+				label = "image-0";
+				reg = <0x00000000 0x00100000>;
+				read-only;
+			};
+
+			storage_partition: partition@100000 {
+				label = "storage";
+				reg = <0x00100000 (0x700000 - 0x2000)>;
+			};
+		};
+	};
+};
+
+&uart0 {
+	status = "okay";
+	current-speed = <115200>;
+
+	pinctrl-0 = <&uart0_default>;
+	pinctrl-1 = <&uart0_sleep>;
+	pinctrl-names = "default", "sleep";
+};
+
+&gpio0 {
+	status = "okay";
+};

boards/qualcomm/qcc744m_evk/qcc744m_evk-pinctrl.dtsi

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+/*
+ * Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&pinctrl {
+	i2c0_default: i2c0_default {
+		group1 {
+			pinmux = <GPIO24_I2C0_SCL>,
+				 <GPIO23_I2C0_SDA>;
+			bias-pull-up;
+			input-schmitt-enable;
+		};
+	};
+
+	spi0_default: spi0_default {
+		group1 {
+			pinmux = <GPIO31_SPI_MOSI>,
+				 <GPIO30_SPI_MISO>,
+				 <GPIO29_SPI_SCLK>;
+			bias-pull-up;
+			input-schmitt-enable;
+		};
+	};
+};

boards/qualcomm/qcc744m_evk/qcc744m_evk.dts

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+/*
+ * Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+
+#include "qcc744m.dtsi"
+#include "qcc744m_evk-pinctrl.dtsi"
+
+/ {
+	model = "Qualcomm QCC744M Evaluation Board";
+
+	aliases {
+		sw0 = &button_0;
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+
+		button_0: sw0 {
+			/* To use, CH347 DTR1 jumper must be removed */
+			gpios = <&gpio0 2 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
+			zephyr,code = <INPUT_KEY_0>;
+		};
+	};
+};
+
+&cpu0 {
+	clock-frequency = <DT_FREQ_M(320)>;
+};
+
+&flashctrl {
+	flash0: flash@A0000000 {
+		compatible = "soc-nv-flash", "giantec,25q64a";
+		reg = <0xA0000000 (0x800000 - 0x2000)>;
+		write-block-size = <256>;
+		erase-block-size = <DT_SIZE_K(4)>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			slot0_partition: partition@0 {
+				label = "image-0";
+				reg = <0x00000000 0x00100000>;
+				read-only;
+			};
+
+			storage_partition: partition@100000 {
+				label = "storage";
+				reg = <0x00100000 (0x700000 - 0x2000)>;
+			};
+		};
+	};
+};
+
+&i2c0 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+
+	pinctrl-0 = <&i2c0_default>;
+	pinctrl-names = "default";
+};
+
+&spi0 {
+	status = "okay";
+
+	pinctrl-0 = <&spi0_default>;
+	pinctrl-names = "default";
+};

boards/qualcomm/qcc744m_evk/qcc744m_evk.yaml

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+# Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
+#
+# SPDX-License-Identifier: Apache-2.0
+
+identifier: qcc744m_evk
+name: Qualcomm QCC744M Evaluation Board
+type: mcu
+arch: riscv
+ram: 480
+toolchain:
+  - zephyr
+testing:
+  ignore_tags:
+    - net
+    - bluetooth
+supported:
+  - gpio
+  - pinctrl
+  - uart
+  - dma
+  - i2c
+  - spi
+  - flash
+vendor: qcom

boards/qualcomm/qcc744m_evk/qcc744m_evk_defconfig

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+# Copyright (c) 2025 MASSDRIVER EI (massdriver.space)
+#
+# SPDX-License-Identifier: Apache-2.0
+
+CONFIG_CONSOLE=y
+CONFIG_SERIAL=y
+
+CONFIG_UART_CONSOLE=y
+
+CONFIG_MEMC=y